1 #ifndef __ASM_X86_MSR_H_
2 #define __ASM_X86_MSR_H_
4 #include <asm/msr-index.h>
7 # include <linux/types.h>
14 #include <asm/errno.h>
16 static inline unsigned long long native_read_tscp(unsigned int *aux
)
18 unsigned long low
, high
;
19 asm volatile (".byte 0x0f,0x01,0xf9"
20 : "=a" (low
), "=d" (high
), "=c" (*aux
));
21 return low
| ((u64
)high
>> 32);
25 * i386 calling convention returns 64-bit value in edx:eax, while
26 * x86_64 returns at rax. Also, the "A" constraint does not really
27 * mean rdx:rax in x86_64, so we need specialized behaviour for each
31 #define DECLARE_ARGS(val, low, high) unsigned low, high
32 #define EAX_EDX_VAL(val, low, high) (low | ((u64)(high) << 32))
33 #define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
34 #define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
36 #define DECLARE_ARGS(val, low, high) unsigned long long val
37 #define EAX_EDX_VAL(val, low, high) (val)
38 #define EAX_EDX_ARGS(val, low, high) "A" (val)
39 #define EAX_EDX_RET(val, low, high) "=A" (val)
42 static inline unsigned long long native_read_msr(unsigned int msr
)
44 DECLARE_ARGS(val
, low
, high
);
46 asm volatile("rdmsr" : EAX_EDX_RET(val
, low
, high
) : "c" (msr
));
47 return EAX_EDX_VAL(val
, low
, high
);
50 static inline unsigned long long native_read_msr_safe(unsigned int msr
,
53 DECLARE_ARGS(val
, low
, high
);
55 asm volatile("2: rdmsr ; xor %0,%0\n"
57 ".section .fixup,\"ax\"\n\t"
58 "3: mov %3,%0 ; jmp 1b\n\t"
60 ".section __ex_table,\"a\"\n"
64 : "=r" (*err
), EAX_EDX_RET(val
, low
, high
)
65 : "c" (msr
), "i" (-EFAULT
));
66 return EAX_EDX_VAL(val
, low
, high
);
69 static inline void native_write_msr(unsigned int msr
,
70 unsigned low
, unsigned high
)
72 asm volatile("wrmsr" : : "c" (msr
), "a"(low
), "d" (high
));
75 static inline int native_write_msr_safe(unsigned int msr
,
76 unsigned low
, unsigned high
)
79 asm volatile("2: wrmsr ; xor %0,%0\n"
81 ".section .fixup,\"ax\"\n\t"
82 "3: mov %4,%0 ; jmp 1b\n\t"
84 ".section __ex_table,\"a\"\n"
89 : "c" (msr
), "0" (low
), "d" (high
),
94 static inline unsigned long long native_read_tsc(void)
96 DECLARE_ARGS(val
, low
, high
);
98 asm volatile("rdtsc" : EAX_EDX_RET(val
, low
, high
));
99 return EAX_EDX_VAL(val
, low
, high
);
102 static inline unsigned long long native_read_pmc(int counter
)
104 DECLARE_ARGS(val
, low
, high
);
106 asm volatile("rdpmc" : EAX_EDX_RET(val
, low
, high
) : "c" (counter
));
107 return EAX_EDX_VAL(val
, low
, high
);
110 #ifdef CONFIG_PARAVIRT
111 #include <asm/paravirt.h>
113 #include <linux/errno.h>
115 * Access to machine-specific registers (available on 586 and better only)
116 * Note: the rd* operations modify the parameters directly (without using
117 * pointer indirection), this allows gcc to optimize better
120 #define rdmsr(msr,val1,val2) \
122 u64 __val = native_read_msr(msr); \
123 (val1) = (u32)__val; \
124 (val2) = (u32)(__val >> 32); \
127 static inline void wrmsr(unsigned msr
, unsigned low
, unsigned high
)
129 native_write_msr(msr
, low
, high
);
132 #define rdmsrl(msr,val) \
133 ((val) = native_read_msr(msr))
135 #define wrmsrl(msr, val) \
136 native_write_msr(msr, (u32)((u64)(val)), (u32)((u64)(val) >> 32))
138 /* wrmsr with exception handling */
139 static inline int wrmsr_safe(unsigned msr
, unsigned low
, unsigned high
)
141 return native_write_msr_safe(msr
, low
, high
);
144 /* rdmsr with exception handling */
145 #define rdmsr_safe(msr,p1,p2) \
148 u64 __val = native_read_msr_safe(msr, &__err); \
149 (*p1) = (u32)__val; \
150 (*p2) = (u32)(__val >> 32); \
154 #define rdtscl(low) \
155 ((low) = (u32)native_read_tsc())
157 #define rdtscll(val) \
158 ((val) = native_read_tsc())
160 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
162 #define rdpmc(counter,low,high) \
164 u64 _l = native_read_pmc(counter); \
166 (high) = (u32)(_l >> 32); \
169 #define rdtscp(low, high, aux) \
171 unsigned long long _val = native_read_tscp(&(aux)); \
173 (high) = (u32)(_val >> 32); \
176 #define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
178 #endif /* !CONFIG_PARAVIRT */
181 #define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
183 #define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
185 #define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
188 void rdmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
);
189 void wrmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
);
190 int rdmsr_safe_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
);
191 int wrmsr_safe_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
);
192 #else /* CONFIG_SMP */
193 static inline void rdmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
)
195 rdmsr(msr_no
, *l
, *h
);
197 static inline void wrmsr_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
)
201 static inline int rdmsr_safe_on_cpu(unsigned int cpu
, u32 msr_no
, u32
*l
, u32
*h
)
203 return rdmsr_safe(msr_no
, l
, h
);
205 static inline int wrmsr_safe_on_cpu(unsigned int cpu
, u32 msr_no
, u32 l
, u32 h
)
207 return wrmsr_safe(msr_no
, l
, h
);
209 #endif /* CONFIG_SMP */
210 #endif /* __ASSEMBLY__ */
211 #endif /* __KERNEL__ */