| blob | 36937cb1fd66d35eb7e012a3185d329ed15a4cd5 |
1 /************************************************************************
2 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
3 * Copyright(c) 2002-2005 Neterion Inc.
5 * This software may be used and distributed according to the terms of
6 * the GNU General Public License (GPL), incorporated herein by reference.
7 * Drivers based on or derived from this code fall under the GPL and must
8 * retain the authorship, copyright and license notice. This file is not
9 * a complete program and may only be used when the entire operating
10 * system is licensed under the GPL.
11 * See the file COPYING in this distribution for more information.
12 *
13 * Credits:
14 * Jeff Garzik : For pointing out the improper error condition
15 * check in the s2io_xmit routine and also some
16 * issues in the Tx watch dog function. Also for
17 * patiently answering all those innumerable
18 * questions regaring the 2.6 porting issues.
19 * Stephen Hemminger : Providing proper 2.6 porting mechanism for some
20 * macros available only in 2.6 Kernel.
21 * Francois Romieu : For pointing out all code part that were
22 * deprecated and also styling related comments.
23 * Grant Grundler : For helping me get rid of some Architecture
24 * dependent code.
25 * Christopher Hellwig : Some more 2.6 specific issues in the driver.
26 *
27 * The module loadable parameters that are supported by the driver and a brief
28 * explaination of all the variables.
29 *
30 * rx_ring_num : This can be used to program the number of receive rings used
31 * in the driver.
32 * rx_ring_sz: This defines the number of receive blocks each ring can have.
33 * This is also an array of size 8.
34 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
35 * values are 1, 2 and 3.
36 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
37 * tx_fifo_len: This too is an array of 8. Each element defines the number of
38 * Tx descriptors that can be associated with each corresponding FIFO.
39 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
40 * 1(MSI), 2(MSI_X). Default value is '0(INTA)'
41 * lro: Specifies whether to enable Large Receive Offload (LRO) or not.
42 * Possible values '1' for enable '0' for disable. Default is '0'
43 * lro_max_pkts: This parameter defines maximum number of packets can be
44 * aggregated as a single large packet
45 ************************************************************************/
47 #include <linux/module.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/ioport.h>
51 #include <linux/pci.h>
52 #include <linux/dma-mapping.h>
53 #include <linux/kernel.h>
54 #include <linux/netdevice.h>
55 #include <linux/etherdevice.h>
56 #include <linux/skbuff.h>
57 #include <linux/init.h>
58 #include <linux/delay.h>
59 #include <linux/stddef.h>
60 #include <linux/ioctl.h>
61 #include <linux/timex.h>
62 #include <linux/sched.h>
63 #include <linux/ethtool.h>
64 #include <linux/workqueue.h>
65 #include <linux/if_vlan.h>
66 #include <linux/ip.h>
67 #include <linux/tcp.h>
68 #include <net/tcp.h>
70 #include <asm/system.h>
71 #include <asm/uaccess.h>
72 #include <asm/io.h>
73 #include <asm/div64.h>
74 #include <asm/irq.h>
76 /* local include */
82 /* S2io Driver name & version. */
90 {
97 }
99 /*
100 * Cards with following subsystem_id have a link state indication
101 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
102 * macro below identifies these cards given the subsystem_id.
103 */
104 #define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
105 (dev_type == XFRAME_I_DEVICE) ? \
106 ((((subid >= 0x600B) && (subid <= 0x600D)) || \
107 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
109 #define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
110 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
111 #define TASKLET_IN_USE test_and_set_bit(0, (&sp->tasklet_status))
112 #define PANIC 1
113 #define LOW 2
115 {
124 }
126 /* Ethtool related variables and Macros. */
133 };
271 };
273 #define S2IO_STAT_LEN sizeof(ethtool_stats_keys)/ ETH_GSTRING_LEN
274 #define S2IO_STAT_STRINGS_LEN S2IO_STAT_LEN * ETH_GSTRING_LEN
276 #define S2IO_TEST_LEN sizeof(s2io_gstrings) / ETH_GSTRING_LEN
277 #define S2IO_STRINGS_LEN S2IO_TEST_LEN * ETH_GSTRING_LEN
279 #define S2IO_TIMER_CONF(timer, handle, arg, exp) \
280 init_timer(&timer); \
281 timer.function = handle; \
282 timer.data = (unsigned long) arg; \
283 mod_timer(&timer, (jiffies + exp)) \
285 /* Add the vlan */
288 {
295 }
297 /* Unregister the vlan */
299 {
307 }
309 /*
310 * Constants to be programmed into the Xena's registers, to configure
311 * the XAUI.
312 */
314 #define END_SIGN 0x0
316 /* Set address */
318 /* Write data */
320 /* Set address */
322 /* Write data */
324 /* Set address */
326 /* Write data */
328 /* Set address */
330 /* Write data */
332 /* Done */
333 END_SIGN
334 };
337 /* Set address */
339 /* Write data */
341 /* Set address */
343 /* Write data */
345 /* Set address */
347 /* Write data */
349 END_SIGN
350 };
352 /*
353 * Constants for Fixing the MacAddress problem seen mostly on
354 * Alpha machines.
355 */
371 END_SIGN
372 };
379 /* Module Loadable parameters. */
394 /* Frequency of Rx desc syncs expressed as power of 2 */
396 /* Interrupt type. Values can be 0(INTA), 1(MSI), 2(MSI_X) */
398 /* Large receive offload feature */
400 /* Max pkts to be aggregated by LRO at one time. If not specified,
401 * aggregation happens until we hit max IP pkt size(64K)
402 */
404 #ifndef CONFIG_S2IO_NAPI
406 #endif
419 /*
420 * S2IO device table.
421 * This table lists all the devices that this driver supports.
422 */
433 };
442 };
444 /* A simplifier macro used both by init and free shared_mem Fns(). */
445 #define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
447 /**
448 * init_shared_mem - Allocation and Initialization of Memory
449 * @nic: Device private variable.
450 * Description: The function allocates all the memory areas shared
451 * between the NIC and the driver. This includes Tx descriptors,
452 * Rx descriptors and the statistics block.
453 */
456 {
457 u32 size;
474 /* Allocation and initialization of TXDLs in FIOFs */
478 }
483 }
493 GFP_KERNEL);
498 }
500 }
503 lst_per_page);
516 dma_addr_t tmp_p;
525 }
526 /* If we got a zero DMA address(can happen on
527 * certain platforms like PPC), reallocate.
528 * Store virtual address of page we don't want,
529 * to be freed later.
530 */
544 }
545 }
554 k++;
555 }
556 }
557 }
563 /* Allocation and initialization of RXDs in Rings */
570 i);
573 }
580 }
583 else
601 /* Allocating all the Rx blocks */
611 /*
612 * In case of failure, free_shared_mem()
613 * is called, which should free any
614 * memory that was alloced till the
615 * failure happened.
616 */
619 }
625 GFP_KERNEL);
633 }
634 }
635 /* Interlinking all Rx Blocks */
637 tmp_v_addr =
639 tmp_v_addr_next =
642 tmp_p_addr =
644 tmp_p_addr_next =
653 }
654 }
656 /*
657 * Allocation of Storages for buffer addresses in 2BUFF mode
658 * and the buffers as well.
659 */
665 GFP_KERNEL);
673 GFP_KERNEL);
696 k++;
697 }
698 }
699 }
700 }
702 /* Allocation and initialization of Statistics block */
708 /*
709 * In case of failure, free_shared_mem() is called, which
710 * should free any memory that was alloced till the
711 * failure happened.
712 */
714 }
724 }
726 /**
727 * free_shared_mem - Free the allocated Memory
728 * @nic: Device private variable.
729 * Description: This function is to free all memory locations allocated by
730 * the init_shared_mem() function and return it to the kernel.
731 */
734 {
737 dma_addr_t tmp_p_addr;
754 lst_per_page);
760 list_virt_addr)
765 list_virt_addr,
768 list_phy_addr);
769 }
770 /* If we got a zero DMA address during allocation,
771 * free the page now
772 */
782 }
784 }
791 block_virt_addr;
793 block_dma_addr;
799 }
800 }
803 /* Freeing buffer storage addresses in 2BUFF mode. */
816 k++;
817 }
819 }
821 }
822 }
829 }
832 }
834 /**
835 * s2io_verify_pci_mode -
836 */
839 {
850 }
852 #define NEC_VENID 0x1033
853 #define NEC_DEVID 0x0125
855 {
862 }
863 }
865 }
868 /**
869 * s2io_print_pci_mode -
870 */
872 {
890 }
896 }
925 }
928 }
930 /**
931 * init_nic - Initialization of hardware
932 * @nic: device peivate variable
933 * Description: The function sequentially configures every block
934 * of the H/W from their reset values.
935 * Return Value: SUCCESS on success and
936 * '-1' on failure (endian settings incorrect).
937 */
940 {
945 u32 time;
956 /* to set the swapper controle on the card */
960 }
962 /*
963 * Herc requires EOI to be removed from reset before XGXS, so..
964 */
970 }
972 /* Remove XGXS from reset state */
978 /* Enable Receiving broadcasts */
987 /* Read registers in all blocks */
992 /* Set MTU */
1002 dtx_cnt++;
1003 }
1009 dtx_cnt++;
1010 }
1011 }
1013 /* Tx DMA Initialization */
1022 val64 |=
1029 i++;
1030 }
1048 }
1049 }
1051 /*
1052 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
1053 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
1054 */
1063 /*
1064 * Initialization of Tx_PA_CONFIG register to ignore packet
1065 * integrity checking.
1066 */
1072 /* Rx DMA intialization. */
1075 val64 |=
1078 }
1081 /*
1082 * Allocating equal share of memory to all the
1083 * configured Rings.
1084 */
1088 else
1126 }
1127 }
1130 /*
1131 * Filling Tx round robin registers
1132 * as per the number of FIFOs
1133 */
1227 }
1229 /* Enable all configured Tx FIFO partitions */
1234 /* Filling the Rx round robin registers as per the
1235 * number of Rings and steering based on QoS.
1236 */
1347 }
1349 /* UDP Fix */
1354 /* Set the default rts frame length for the rings configured */
1359 /* Set the frame length for the configured rings
1360 * desired by the user
1361 */
1363 /* If rts_frm_len[i] == 0 then it is assumed that user not
1364 * specified frame length steering.
1365 * If the user provides the frame length then program
1366 * the rts_frm_len register for those values or else
1367 * leave it as it is.
1368 */
1372 }
1373 }
1375 /* Program statistics memory */
1381 }
1383 /*
1384 * Initializing the sampling rate for the device to calculate the
1385 * bandwidth utilization.
1386 */
1392 /*
1393 * Initializing the Transmit and Receive Traffic Interrupt
1394 * Scheme.
1395 */
1396 /*
1397 * TTI Initialization. Default Tx timer gets us about
1398 * 250 interrupts per sec. Continuous interrupts are enabled
1399 * by default.
1400 */
1407 }
1423 /*
1424 * Once the operation completes, the Strobe bit of the command
1425 * register will be reset. We poll for this particular condition
1426 * We wait for a maximum of 500ms for the operation to complete,
1427 * if it's not complete by then we return error.
1428 */
1434 }
1439 }
1441 time++;
1442 }
1451 /*
1452 * Once the operation completes, the Strobe bit of the command
1453 * register will be reset. We poll for this particular condition
1454 * We wait for a maximum of 500ms for the operation to complete,
1455 * if it's not complete by then we return error.
1456 */
1462 }
1468 }
1469 time++;
1471 }
1472 }
1475 /* RTI Initialization */
1477 /*
1478 * Programmed to generate Apprx 500 Intrs per
1479 * second
1480 */
1485 }
1497 else
1507 /*
1508 * Once the operation completes, the Strobe bit of the
1509 * command register will be reset. We poll for this
1510 * particular condition. We wait for a maximum of 500ms
1511 * for the operation to complete, if it's not complete
1512 * by then we return error.
1513 */
1519 }
1524 }
1525 time++;
1527 }
1528 }
1529 }
1531 /*
1532 * Initializing proper values as Pause threshold into all
1533 * the 8 Queues on Rx side.
1534 */
1538 /* Disable RMAC PAD STRIPPING */
1548 /* Enable FCS stripping by adapter */
1559 }
1561 /*
1562 * Set the time value to be inserted in the pause frame
1563 * generated by xena.
1564 */
1570 /*
1571 * Set the Threshold Limit for Generating the pause frame
1572 * If the amount of data in any Queue exceeds ratio of
1573 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
1574 * pause frame is generated
1575 */
1578 val64 |=
1580 mc_pause_threshold_q0q3)
1582 }
1587 val64 |=
1589 mc_pause_threshold_q4q7)
1591 }
1594 /*
1595 * TxDMA will stop Read request if the number of read split has
1596 * exceeded the limit pointed by shared_splits
1597 */
1606 }
1608 /*
1609 * Programming the Herc to split every write transaction
1610 * that does not start on an ADB to reduce disconnects.
1611 */
1618 }
1622 }
1625 }
1626 #define LINK_UP_DOWN_INTERRUPT 1
1627 #define MAC_RMAC_ERR_TIMER 2
1630 {
1635 else
1637 }
1639 /**
1640 * en_dis_able_nic_intrs - Enable or Disable the interrupts
1641 * @nic: device private variable,
1642 * @mask: A mask indicating which Intr block must be modified and,
1643 * @flag: A flag indicating whether to enable or disable the Intrs.
1644 * Description: This function will either disable or enable the interrupts
1645 * depending on the flag argument. The mask argument can be used to
1646 * enable/disable any Intr block.
1647 * Return Value: NONE.
1648 */
1651 {
1655 /* Top level interrupt classification */
1656 /* PIC Interrupts */
1658 /* Enable PIC Intrs in the general intr mask register */
1664 /*
1665 * If Hercules adapter enable GPIO otherwise
1666 * disable all PCIX, Flash, MDIO, IIC and GPIO
1667 * interrupts for now.
1668 * TODO
1669 */
1671 LINK_UP_DOWN_INTERRUPT ) {
1680 }
1681 /*
1682 * No MSI Support is available presently, so TTI and
1683 * RTI interrupts are also disabled.
1684 */
1686 /*
1687 * Disable PIC Intrs in the general
1688 * intr mask register
1689 */
1694 }
1695 }
1697 /* DMA Interrupts */
1698 /* Enabling/Disabling Tx DMA interrupts */
1700 /* Enable TxDMA Intrs in the general intr mask register */
1706 /*
1707 * Keep all interrupts other than PFC interrupt
1708 * and PCC interrupt disabled in DMA level.
1709 */
1711 TXDMA_PCC_INT_M);
1713 /*
1714 * Enable only the MISC error 1 interrupt in PFC block
1715 */
1718 /*
1719 * Enable only the FB_ECC error interrupt in PCC block
1720 */
1724 /*
1725 * Disable TxDMA Intrs in the general intr mask
1726 * register
1727 */
1733 }
1734 }
1736 /* Enabling/Disabling Rx DMA interrupts */
1738 /* Enable RxDMA Intrs in the general intr mask register */
1744 /*
1745 * All RxDMA block interrupts are disabled for now
1746 * TODO
1747 */
1750 /*
1751 * Disable RxDMA Intrs in the general intr mask
1752 * register
1753 */
1758 }
1759 }
1761 /* MAC Interrupts */
1762 /* Enabling/Disabling MAC interrupts */
1769 /*
1770 * All MAC block error interrupts are disabled for now
1771 * TODO
1772 */
1774 /*
1775 * Disable MAC Intrs in the general intr mask register
1776 */
1784 }
1785 }
1787 /* XGXS Interrupts */
1794 /*
1795 * All XGXS block error interrupts are disabled for now
1796 * TODO
1797 */
1800 /*
1801 * Disable MC Intrs in the general intr mask register
1802 */
1807 }
1808 }
1810 /* Memory Controller(MC) interrupts */
1817 /*
1818 * Enable all MC Intrs.
1819 */
1823 /*
1824 * Disable MC Intrs in the general intr mask register
1825 */
1830 }
1831 }
1834 /* Tx traffic interrupts */
1841 /*
1842 * Enable all the Tx side interrupts
1843 * writing 0 Enables all 64 TX interrupt levels
1844 */
1847 /*
1848 * Disable Tx Traffic Intrs in the general intr mask
1849 * register.
1850 */
1855 }
1856 }
1858 /* Rx traffic interrupts */
1865 /* writing 0 Enables all 8 RX interrupt levels */
1868 /*
1869 * Disable Rx Traffic Intrs in the general intr mask
1870 * register.
1871 */
1876 }
1877 }
1878 }
1881 {
1888 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
1890 }
1894 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
1896 }
1897 }
1901 ADAPTER_STATUS_RMAC_PCC_IDLE) &&
1904 ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
1906 }
1909 ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) &&
1912 ADAPTER_STATUS_RC_PRC_QUIESCENT))) {
1914 }
1915 }
1916 }
1919 }
1920 /**
1921 * verify_xena_quiescence - Checks whether the H/W is ready
1922 * @val64 : Value read from adapter status register.
1923 * @flag : indicates if the adapter enable bit was ever written once
1924 * before.
1925 * Description: Returns whether the H/W is ready to go or not. Depending
1926 * on whether adapter enable bit was written or not the comparison
1927 * differs and the calling function passes the input argument flag to
1928 * indicate this.
1929 * Return: 1 If xena is quiescence
1930 * 0 If Xena is not quiescence
1931 */
1934 {
1946 ADAPTER_STATUS_P_PLL_LOCK))) {
1948 }
1951 }
1953 /**
1954 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
1955 * @sp: Pointer to device specifc structure
1956 * Description :
1957 * New procedure to clear mac address reading problems on Alpha platforms
1958 *
1959 */
1962 {
1964 u64 val64;
1971 }
1972 }
1974 /**
1975 * start_nic - Turns the device on
1976 * @nic : device private variable.
1977 * Description:
1978 * This function actually turns the device on. Before this function is
1979 * called,all Registers are configured from their reset states
1980 * and shared memory is allocated but the NIC is still quiescent. On
1981 * calling this function, the device interrupts are cleared and the NIC is
1982 * literally switched on by writing into the adapter control register.
1983 * Return Value:
1984 * SUCCESS on success and -1 on failure.
1985 */
1988 {
1999 /* PRC Initialization and configuration */
2009 else
2016 }
2019 /* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
2023 }
2025 /*
2026 * Enabling MC-RLDRAM. After enabling the device, we timeout
2027 * for around 100ms, which is approximately the time required
2028 * for the device to be ready for operation.
2029 */
2037 /* Enabling ECC Protection. */
2042 /*
2043 * Clearing any possible Link state change interrupts that
2044 * could have popped up just before Enabling the card.
2045 */
2050 /*
2051 * Verify if the device is ready to be enabled, if so enable
2052 * it.
2053 */
2060 }
2062 /*
2063 * With some switches, link might be already up at this point.
2064 * Because of this weird behavior, when we enable laser,
2065 * we may not get link. We need to handle this. We cannot
2066 * figure out which switch is misbehaving. So we are forced to
2067 * make a global change.
2068 */
2070 /* Enabling Laser. */
2076 /*
2077 * Dont see link state interrupts initally on some switches,
2078 * so directly scheduling the link state task here.
2079 */
2081 }
2082 /* SXE-002: Initialize link and activity LED */
2091 }
2094 }
2095 /**
2096 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2097 */
2099 {
2109 PCI_DMA_TODEVICE);
2110 txds++;
2111 }
2118 }
2122 PCI_DMA_TODEVICE);
2125 txds++;
2133 }
2134 }
2137 }
2139 /**
2140 * free_tx_buffers - Free all queued Tx buffers
2141 * @nic : device private variable.
2142 * Description:
2143 * Free all queued Tx buffers.
2144 * Return Value: void
2145 */
2148 {
2163 list_virt_addr;
2167 cnt++;
2168 }
2169 }
2175 }
2176 }
2178 /**
2179 * stop_nic - To stop the nic
2180 * @nic ; device private variable.
2181 * Description:
2182 * This function does exactly the opposite of what the start_nic()
2183 * function does. This function is called to stop the device.
2184 * Return Value:
2185 * void.
2186 */
2189 {
2192 u16 interruptible;
2199 /* Disable all interrupts */
2205 /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
2209 }
2212 {
2217 /* Buffer-1 receives L3/L4 headers */
2220 PCI_DMA_FROMDEVICE);
2222 /* skb_shinfo(skb)->frag_list will have L4 data payload */
2227 }
2234 /* Buffer-2 receives L4 data payload */
2237 PCI_DMA_FROMDEVICE);
2242 }
2244 /**
2245 * fill_rx_buffers - Allocates the Rx side skbs
2246 * @nic: device private variable
2247 * @ring_no: ring number
2248 * Description:
2249 * The function allocates Rx side skbs and puts the physical
2250 * address of these buffers into the RxD buffer pointers, so that the NIC
2251 * can DMA the received frame into these locations.
2252 * The NIC supports 3 receive modes, viz
2253 * 1. single buffer,
2254 * 2. three buffer and
2255 * 3. Five buffer modes.
2256 * Each mode defines how many fragments the received frame will be split
2257 * up into by the NIC. The frame is split into L3 header, L4 Header,
2258 * L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
2259 * is split into 3 fragments. As of now only single buffer mode is
2260 * supported.
2261 * Return Value:
2262 * SUCCESS on success or an appropriate -ve value on failure.
2263 */
2266 {
2272 u32 alloc_cnt;
2275 u64 tmp;
2277 #ifndef CONFIG_S2IO_NAPI
2279 #endif
2291 block_index;
2303 }
2306 block_index++;
2309 block_count)
2322 }
2323 #ifndef CONFIG_S2IO_NAPI
2328 #endif
2335 }
2336 /* calculate size of skb based on ring mode */
2343 else
2346 /* allocate skb */
2354 }
2356 }
2358 /* 1 buffer mode - normal operation mode */
2363 PCI_DMA_FROMDEVICE);
2367 /*
2368 * 2 or 3 buffer mode -
2369 * Both 2 buffer mode and 3 buffer mode provides 128
2370 * byte aligned receive buffers.
2371 *
2372 * 3 buffer mode provides header separation where in
2373 * skb->data will have L3/L4 headers where as
2374 * skb_shinfo(skb)->frag_list will have the L4 data
2375 * payload
2376 */
2390 PCI_DMA_FROMDEVICE);
2391 else
2397 /* Two buffer mode */
2399 /*
2400 * Buffer2 will have L3/L4 header plus
2401 * L4 payload
2402 */
2405 PCI_DMA_FROMDEVICE);
2407 /* Buffer-1 will be dummy buffer. Not used */
2412 PCI_DMA_FROMDEVICE);
2413 }
2418 /* 3 buffer mode */
2424 RXD_OWN_XENA;
2425 }
2427 }
2428 }
2430 }
2434 off++;
2444 }
2446 }
2448 alloc_tab++;
2449 }
2451 end:
2452 /* Transfer ownership of first descriptor to adapter just before
2453 * exiting. Before that, use memory barrier so that ownership
2454 * and other fields are seen by adapter correctly.
2455 */
2459 }
2462 }
2465 {
2481 }
2486 HEADER_ETHERNET_II_802_3_SIZE
2488 HEADER_SNAP_SIZE,
2489 PCI_DMA_FROMDEVICE);
2496 BUF0_LEN,
2497 PCI_DMA_FROMDEVICE);
2500 BUF1_LEN,
2501 PCI_DMA_FROMDEVICE);
2505 PCI_DMA_FROMDEVICE);
2510 PCI_DMA_FROMDEVICE);
2514 PCI_DMA_FROMDEVICE);
2517 PCI_DMA_FROMDEVICE);
2519 }
2522 }
2523 }
2525 /**
2526 * free_rx_buffers - Frees all Rx buffers
2527 * @sp: device private variable.
2528 * Description:
2529 * This function will free all Rx buffers allocated by host.
2530 * Return Value:
2531 * NONE.
2532 */
2535 {
2555 }
2556 }
2558 /**
2559 * s2io_poll - Rx interrupt handler for NAPI support
2560 * @dev : pointer to the device structure.
2561 * @budget : The number of packets that were budgeted to be processed
2562 * during one pass through the 'Poll" function.
2563 * Description:
2564 * Comes into picture only if NAPI support has been incorporated. It does
2565 * the same thing that rx_intr_handler does, but not in a interrupt context
2566 * also It will process only a given number of packets.
2567 * Return value:
2568 * 0 on success and 1 if there are No Rx packets to be processed.
2569 */
2571 #if defined(CONFIG_S2IO_NAPI)
2573 {
2598 /* Quota for the current iteration has been met */
2600 }
2601 }
2614 }
2615 }
2616 /* Re enable the Rx interrupts. */
2622 no_rx:
2631 }
2632 }
2635 }
2636 #endif
2638 #ifdef CONFIG_NET_POLL_CONTROLLER
2639 /**
2640 * s2io_netpoll - netpoll event handler entry point
2641 * @dev : pointer to the device structure.
2642 * Description:
2643 * This function will be called by upper layer to check for events on the
2644 * interface in situations where interrupts are disabled. It is used for
2645 * specific in-kernel networking tasks, such as remote consoles and kernel
2646 * debugging over the network (example netdump in RedHat).
2647 */
2649 {
2666 /* we need to free up the transmitted skbufs or else netpoll will
2667 * run out of skbs and will fail and eventually netpoll application such
2668 * as netdump will fail.
2669 */
2673 /* check for received packet and indicate up to network */
2682 }
2683 }
2687 }
2688 #endif
2690 /**
2691 * rx_intr_handler - Rx interrupt handler
2692 * @nic: device private variable.
2693 * Description:
2694 * If the interrupt is because of a received frame or if the
2695 * receive ring contains fresh as yet un-processed frames,this function is
2696 * called. It picks out the RxD at which place the last Rx processing had
2697 * stopped and sends the skb to the OSM's Rx handler and then increments
2698 * the offset.
2699 * Return Value:
2700 * NONE.
2701 */
2703 {
2710 #ifndef CONFIG_S2IO_NAPI
2712 #endif
2721 }
2728 #ifndef CONFIG_S2IO_NAPI
2732 #else
2735 #endif
2737 /* If your are next to put index then it's FIFO full condition */
2742 }
2750 }
2755 HEADER_ETHERNET_II_802_3_SIZE +
2756 HEADER_802_2_SIZE +
2757 HEADER_SNAP_SIZE,
2758 PCI_DMA_FROMDEVICE);
2766 PCI_DMA_FROMDEVICE);
2770 PCI_DMA_FROMDEVICE);
2774 PCI_DMA_FROMDEVICE);
2778 }
2788 get_block++;
2793 }
2795 #ifdef CONFIG_S2IO_NAPI
2799 #else
2800 pkt_cnt++;
2803 #endif
2804 }
2806 /* Clear all LRO sessions before exiting */
2813 }
2814 }
2815 }
2818 }
2820 /**
2821 * tx_intr_handler - Transmit interrupt handler
2822 * @nic : device private variable
2823 * Description:
2824 * If an interrupt was raised to indicate DMA complete of the
2825 * Tx packet, this function is called. It identifies the last TxD
2826 * whose buffer was freed and frees all skbs whose data have already
2827 * DMA'ed into the NICs internal memory.
2828 * Return Value:
2829 * NONE
2830 */
2833 {
2843 list_virt_addr;
2847 /* Check for TxD errors */
2853 parity_err_cnt++;
2854 }
2858 }
2862 }
2863 }
2868 __FUNCTION__);
2871 }
2873 /* Updating the statistics block */
2884 }
2890 }
2892 /**
2893 * s2io_mdio_write - Function to write in to MDIO registers
2894 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
2895 * @addr : address value
2896 * @value : data value
2897 * @dev : pointer to net_device structure
2898 * Description:
2899 * This function is used to write values to the MDIO registers
2900 * NONE
2901 */
2903 {
2908 //address transaction
2917 //Data transaction
2939 }
2941 /**
2942 * s2io_mdio_read - Function to write in to MDIO registers
2943 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
2944 * @addr : address value
2945 * @dev : pointer to net_device structure
2946 * Description:
2947 * This function is used to read values to the MDIO registers
2948 * NONE
2949 */
2951 {
2957 /* address transaction */
2966 /* Data transaction */
2977 /* Read the value from regs */
2982 }
2983 /**
2984 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
2985 * @counter : couter value to be updated
2986 * @flag : flag to indicate the status
2987 * @type : counter type
2988 * Description:
2989 * This function is to check the status of the xpak counters value
2990 * NONE
2991 */
2993 static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
2994 {
2996 u64 val64;
3002 {
3008 {
3010 {
3013 "service. Excessive temperatures may "
3014 "result in premature transceiver "
3019 "service Excessive bias currents may "
3020 "indicate imminent laser diode "
3025 "service Excessive laser output "
3026 "power may saturate far-end "
3032 }
3034 }
3040 }
3041 }
3043 /**
3044 * s2io_updt_xpak_counter - Function to update the xpak counters
3045 * @dev : pointer to net_device struct
3046 * Description:
3047 * This function is to upate the status of the xpak counters value
3048 * NONE
3049 */
3051 {
3061 /* Check the communication with the MDIO slave */
3066 {
3070 }
3072 /* Check for the expecte value of 2040 at PMA address 0x0000 */
3074 {
3079 }
3081 /* Loading the DOM register to MDIO register */
3086 /* Reading the Alarm flags */
3118 /* Reading the Warning flags */
3140 }
3142 /**
3143 * alarm_intr_handler - Alarm Interrrupt handler
3144 * @nic: device private variable
3145 * Description: If the interrupt was neither because of Rx packet or Tx
3146 * complete, this function is called. If the interrupt was to indicate
3147 * a loss of link, the OSM link status handler is invoked for any other
3148 * alarm interrupt the block that raised the interrupt is displayed
3149 * and a H/W reset is issued.
3150 * Return Value:
3151 * NONE
3152 */
3155 {
3159 u64 cnt;
3162 /* Handling the XPAK counters update */
3164 /* waiting for an hour */
3168 /* reset the count to zero */
3170 }
3172 /* Handling link status change error Intr */
3178 }
3179 }
3181 /* Handling Ecc errors */
3187 double_ecc_errs++;
3192 /* Reset XframeI only if critical error */
3194 MC_ERR_REG_MIRI_ECC_DB_ERR_1)) {
3198 soft_reset_cnt++;
3199 }
3200 }
3203 single_ecc_errs++;
3204 }
3205 }
3207 /* In case of a serious error, the device will be Reset. */
3217 }
3219 /*
3220 * Also as mentioned in the latest Errata sheets if the PCC_FB_ECC
3221 * Error occurs, the adapter will be recycled by disabling the
3222 * adapter enable bit and enabling it again after the device
3223 * becomes Quiescent.
3224 */
3233 }
3234 /* Check for data parity error */
3242 }
3243 }
3245 /* Check for ring full counter */
3253 }
3261 }
3262 }
3264 /* Other type of interrupts are not being handled now, TODO */
3265 }
3267 /**
3268 * wait_for_cmd_complete - waits for a command to complete.
3269 * @sp : private member of the device structure, which is a pointer to the
3270 * s2io_nic structure.
3271 * Description: Function that waits for a command to Write into RMAC
3272 * ADDR DATA registers to be completed and returns either success or
3273 * error depending on whether the command was complete or not.
3274 * Return value:
3275 * SUCCESS on success and FAILURE on failure.
3276 */
3279 {
3281 u64 val64;
3288 }
3292 else
3297 }
3299 }
3301 /**
3302 * s2io_reset - Resets the card.
3303 * @sp : private member of the device structure.
3304 * Description: Function to Reset the card. This function then also
3305 * restores the previously saved PCI configuration space registers as
3306 * the card reset also resets the configuration space.
3307 * Return value:
3308 * void.
3309 */
3312 {
3314 u64 val64;
3317 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
3323 /*
3324 * At this stage, if the PCI write is indeed completed, the
3325 * card is reset and so is the PCI Config space of the device.
3326 * So a read cannot be issued at this stage on any of the
3327 * registers to ensure the write into "sw_reset" register
3328 * has gone through.
3329 * Question: Is there any system call that will explicitly force
3330 * all the write commands still pending on the bus to be pushed
3331 * through?
3332 * As of now I'am just giving a 250ms delay and hoping that the
3333 * PCI write to sw_reset register is done by this time.
3334 */
3338 }
3340 /* Restore the PCI state saved during initialization. */
3343 pci_cmd);
3348 /* Set swapper to enable I/O register access */
3351 /* Restore the MSIX table entries from local variables */
3354 /* Clear certain PCI/PCI-X fields after reset */
3356 /* Clear "detected parity error" bit */
3359 /* Clearing PCIX Ecc status register */
3362 /* Clearing PCI_STATUS error reflected here */
3364 }
3366 /* Reset device statistics maintained by OS */
3369 /* SXE-002: Configure link and activity LED to turn it off */
3378 }
3380 /*
3381 * Clear spurious ECC interrupts that would have occured on
3382 * XFRAME II cards after reset.
3383 */
3387 }
3390 }
3392 /**
3393 * s2io_set_swapper - to set the swapper controle on the card
3394 * @sp : private member of the device structure,
3395 * pointer to the s2io_nic structure.
3396 * Description: Function to set the swapper control on the card
3397 * correctly depending on the 'endianness' of the system.
3398 * Return value:
3399 * SUCCESS on success and FAILURE on failure.
3400 */
3403 {
3408 /*
3409 * Set proper endian settings and verify the same by reading
3410 * the PIF Feed-back register.
3411 */
3426 i++;
3427 }
3434 }
3438 }
3457 i++;
3458 }
3464 }
3465 }
3469 #ifdef __BIG_ENDIAN
3470 /*
3471 * The device by default set to a big endian format, so a
3472 * big endian driver need not set anything.
3473 */
3475 SWAPPER_CTRL_TXP_SE |
3476 SWAPPER_CTRL_TXD_R_FE |
3477 SWAPPER_CTRL_TXD_W_FE |
3478 SWAPPER_CTRL_TXF_R_FE |
3479 SWAPPER_CTRL_RXD_R_FE |
3480 SWAPPER_CTRL_RXD_W_FE |
3481 SWAPPER_CTRL_RXF_W_FE |
3482 SWAPPER_CTRL_XMSI_FE |
3487 #else
3488 /*
3489 * Initially we enable all bits to make it accessible by the
3490 * driver, then we selectively enable only those bits that
3491 * we want to set.
3492 */
3494 SWAPPER_CTRL_TXP_SE |
3495 SWAPPER_CTRL_TXD_R_FE |
3496 SWAPPER_CTRL_TXD_R_SE |
3497 SWAPPER_CTRL_TXD_W_FE |
3498 SWAPPER_CTRL_TXD_W_SE |
3499 SWAPPER_CTRL_TXF_R_FE |
3500 SWAPPER_CTRL_RXD_R_FE |
3501 SWAPPER_CTRL_RXD_R_SE |
3502 SWAPPER_CTRL_RXD_W_FE |
3503 SWAPPER_CTRL_RXD_W_SE |
3504 SWAPPER_CTRL_RXF_W_FE |
3505 SWAPPER_CTRL_XMSI_FE |
3510 #endif
3513 /*
3514 * Verifying if endian settings are accurate by reading a
3515 * feedback register.
3516 */
3519 /* Endian settings are incorrect, calls for another dekko. */
3525 }
3528 }
3531 {
3533 u64 val64;
3541 cnt++;
3546 }
3549 }
3552 {
3554 u64 val64;
3565 }
3566 }
3567 }
3570 {
3575 /* Store and display */
3582 }
3588 }
3589 }
3590 }
3593 {
3610 }
3612 /*
3613 * Enable MSI and use MSI-1 in stead of the standard MSI-0
3614 * for interrupt handling.
3615 */
3625 /* program MSI-1 into all usable Tx_Mat and Rx_Mat fields */
3629 }
3635 }
3640 }
3643 {
3650 GFP_KERNEL);
3654 }
3659 GFP_KERNEL);
3664 }
3673 }
3681 }
3691 }
3700 }
3702 }
3706 /* We fail init if error or we get less vectors than min required */
3710 }
3719 }
3723 /*
3724 * To enable MSI-X, MSI also needs to be enabled, due to a bug
3725 * in the herc NIC. (Temp change, needs to be removed later)
3726 */
3732 }
3734 /* ********************************************************* *
3735 * Functions defined below concern the OS part of the driver *
3736 * ********************************************************* */
3738 /**
3739 * s2io_open - open entry point of the driver
3740 * @dev : pointer to the device structure.
3741 * Description:
3742 * This function is the open entry point of the driver. It mainly calls a
3743 * function to allocate Rx buffers and inserts them into the buffer
3744 * descriptors and then enables the Rx part of the NIC.
3745 * Return value:
3746 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3747 * file on failure.
3748 */
3751 {
3755 /*
3756 * Make sure you have link off by default every time
3757 * Nic is initialized
3758 */
3762 /* Initialize H/W and enable interrupts */
3768 }
3775 }
3780 hw_init_failed:
3786 }
3788 }
3790 /**
3791 * s2io_close -close entry point of the driver
3792 * @dev : device pointer.
3793 * Description:
3794 * This is the stop entry point of the driver. It needs to undo exactly
3795 * whatever was done by the open entry point,thus it's usually referred to
3796 * as the close function.Among other things this function mainly stops the
3797 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3798 * Return value:
3799 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3800 * file on failure.
3801 */
3804 {
3809 /* Reset card, kill tasklet and free Tx and Rx buffers. */
3814 }
3816 /**
3817 * s2io_xmit - Tx entry point of te driver
3818 * @skb : the socket buffer containing the Tx data.
3819 * @dev : device pointer.
3820 * Description :
3821 * This function is the Tx entry point of the driver. S2IO NIC supports
3822 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
3823 * NOTE: when device cant queue the pkt,just the trans_start variable will
3824 * not be upadted.
3825 * Return value:
3826 * 0 on success & 1 on failure.
3827 */
3830 {
3854 }
3858 /* Get Fifo number to Transmit based on vlan priority */
3863 }
3868 list_virt_addr;
3871 /* Avoid "put" pointer going beyond "get" pointer */
3879 }
3881 /* A buffer with no data will be dropped */
3887 }
3893 }
3897 TXD_TX_CKO_UDP_EN);
3898 }
3906 }
3917 #ifdef __BIG_ENDIAN
3920 #else
3923 #endif
3928 txdp++;
3929 }
3939 /* For fragmented SKB. */
3942 /* A '0' length fragment will be ignored */
3945 txdp++;
3952 }
3963 TX_FIFO_LAST_LIST);
3971 put_off++;
3976 /* Avoid "put" pointer going beyond "get" pointer */
3983 }
3989 }
3991 static void
3993 {
3998 }
4001 {
4014 __FUNCTION__);
4017 }
4025 }
4027 }
4030 {
4042 /* If Intr is because of Rx Traffic */
4046 /* If Intr is because of Tx Traffic */
4050 /*
4051 * If the Rx buffer count is below the panic threshold then
4052 * reallocate the buffers from the interrupt handler itself,
4053 * else schedule a tasklet to reallocate the buffers.
4054 */
4060 }
4063 {
4074 }
4077 {
4085 }
4087 {
4089 u64 val64;
4096 /*
4097 * This is unstable state so clear both up/down
4098 * interrupt and adapter to re-evaluate the link state.
4099 */
4105 GPIO_INT_MASK_LINK_DOWN);
4107 }
4112 /* Enable Adapter */
4122 /*
4123 * unmask link down interrupt and mask link-up
4124 * intr
4125 */
4131 }
4137 /* Link is down so unmaks link up interrupt */
4142 }
4143 }
4144 }
4146 }
4148 /**
4149 * s2io_isr - ISR handler of the device .
4150 * @irq: the irq of the device.
4151 * @dev_id: a void pointer to the dev structure of the NIC.
4152 * Description: This function is the ISR handler of the device. It
4153 * identifies the reason for the interrupt and calls the relevant
4154 * service routines. As a contongency measure, this ISR allocates the
4155 * recv buffers, if their numbers are below the panic value which is
4156 * presently set to 25% of the original number of rcv buffers allocated.
4157 * Return value:
4158 * IRQ_HANDLED: will be returned if IRQ was handled by this routine
4159 * IRQ_NONE: will be returned if interrupt is not from our device
4160 */
4162 {
4175 /*
4176 * Identify the cause for interrupt and call the appropriate
4177 * interrupt handler. Causes for the interrupt could be;
4178 * 1. Rx of packet.
4179 * 2. Tx complete.
4180 * 3. Link down.
4181 * 4. Error in any functional blocks of the NIC.
4182 */
4186 /* The interrupt was not raised by Xena. */
4189 }
4192 /* Store current mask before masking all interrupts */
4196 #ifdef CONFIG_S2IO_NAPI
4201 }
4202 }
4203 #else
4204 /*
4205 * Rx handler is called by default, without checking for the
4206 * cause of interrupt.
4207 * rx_traffic_int reg is an R1 register, writing all 1's
4208 * will ensure that the actual interrupt causing bit get's
4209 * cleared and hence a read can be avoided.
4210 */
4214 }
4215 #endif
4217 /*
4218 * tx_traffic_int reg is an R1 register, writing all 1's
4219 * will ensure that the actual interrupt causing bit get's
4220 * cleared and hence a read can be avoided.
4221 */
4229 /*
4230 * If the Rx buffer count is below the panic threshold then
4231 * reallocate the buffers from the interrupt handler itself,
4232 * else schedule a tasklet to reallocate the buffers.
4233 */
4234 #ifndef CONFIG_S2IO_NAPI
4237 #endif
4241 }
4243 /**
4244 * s2io_updt_stats -
4245 */
4247 {
4249 u64 val64;
4253 /* Apprx 30us on a 133 MHz bus */
4262 cnt++;
4268 }
4269 }
4271 /**
4272 * s2io_get_stats - Updates the device statistics structure.
4273 * @dev : pointer to the device structure.
4274 * Description:
4275 * This function updates the device statistics structure in the s2io_nic
4276 * structure and returns a pointer to the same.
4277 * Return value:
4278 * pointer to the updated net_device_stats structure.
4279 */
4282 {
4291 /* Configure Stats for immediate updt */
4306 }
4308 /**
4309 * s2io_set_multicast - entry point for multicast address enable/disable.
4310 * @dev : pointer to the device structure
4311 * Description:
4312 * This function is a driver entry point which gets called by the kernel
4313 * whenever multicast addresses must be enabled/disabled. This also gets
4314 * called to set/reset promiscuous mode. Depending on the deivce flag, we
4315 * determine, if multicast address must be enabled or if promiscuous mode
4316 * is to be disabled etc.
4317 * Return value:
4318 * void.
4319 */
4322 {
4333 /* Enable all Multicast addresses */
4339 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4342 /* Wait till command completes */
4344 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
4349 /* Disable all Multicast addresses */
4355 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4358 /* Wait till command completes */
4360 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
4364 }
4367 /* Put the NIC into promiscuous mode */
4382 /* Remove the NIC from promiscuous mode */
4396 }
4398 /* Update individual M_CAST address list */
4407 }
4412 /* Clear out the previous list of Mc in the H/W. */
4419 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4420 RMAC_ADDR_CMD_MEM_OFFSET
4424 /* Wait for command completes */
4426 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4431 }
4432 }
4434 /* Create the new Rx filter list and update the same in H/W. */
4438 ETH_ALEN);
4443 }
4450 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4451 RMAC_ADDR_CMD_MEM_OFFSET
4455 /* Wait for command completes */
4457 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4462 }
4463 }
4464 }
4465 }
4467 /**
4468 * s2io_set_mac_addr - Programs the Xframe mac address
4469 * @dev : pointer to the device structure.
4470 * @addr: a uchar pointer to the new mac address which is to be set.
4471 * Description : This procedure will program the Xframe to receive
4472 * frames with new Mac Address
4473 * Return value: SUCCESS on success and an appropriate (-)ve integer
4474 * as defined in errno.h file on failure.
4475 */
4478 {
4484 /*
4485 * Set the new MAC address as the new unicast filter and reflect this
4486 * change on the device address registered with the OS. It will be
4487 * at offset 0.
4488 */
4492 }
4497 val64 =
4501 /* Wait till command completes */
4503 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING)) {
4506 }
4509 }
4511 /**
4512 * s2io_ethtool_sset - Sets different link parameters.
4513 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
4514 * @info: pointer to the structure with parameters given by ethtool to set
4515 * link information.
4516 * Description:
4517 * The function sets different link parameters provided by the user onto
4518 * the NIC.
4519 * Return value:
4520 * 0 on success.
4521 */
4525 {
4533 }
4536 }
4538 /**
4539 * s2io_ethtol_gset - Return link specific information.
4540 * @sp : private member of the device structure, pointer to the
4541 * s2io_nic structure.
4542 * @info : pointer to the structure with parameters given by ethtool
4543 * to return link information.
4544 * Description:
4545 * Returns link specific information like speed, duplex etc.. to ethtool.
4546 * Return value :
4547 * return 0 on success.
4548 */
4551 {
4556 /* info->transceiver?? TODO */
4564 }
4568 }
4570 /**
4571 * s2io_ethtool_gdrvinfo - Returns driver specific information.
4572 * @sp : private member of the device structure, which is a pointer to the
4573 * s2io_nic structure.
4574 * @info : pointer to the structure with parameters given by ethtool to
4575 * return driver information.
4576 * Description:
4577 * Returns driver specefic information like name, version etc.. to ethtool.
4578 * Return value:
4579 * void
4580 */
4584 {
4595 }
4597 /**
4598 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
4599 * @sp: private member of the device structure, which is a pointer to the
4600 * s2io_nic structure.
4601 * @regs : pointer to the structure with parameters given by ethtool for
4602 * dumping the registers.
4603 * @reg_space: The input argumnet into which all the registers are dumped.
4604 * Description:
4605 * Dumps the entire register space of xFrame NIC into the user given
4606 * buffer area.
4607 * Return value :
4608 * void .
4609 */
4613 {
4615 u64 reg;
4625 }
4626 }
4628 /**
4629 * s2io_phy_id - timer function that alternates adapter LED.
4630 * @data : address of the private member of the device structure, which
4631 * is a pointer to the s2io_nic structure, provided as an u32.
4632 * Description: This is actually the timer function that alternates the
4633 * adapter LED bit of the adapter control bit to set/reset every time on
4634 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
4635 * once every second.
4636 */
4638 {
4642 u16 subid;
4654 }
4657 }
4659 /**
4660 * s2io_ethtool_idnic - To physically identify the nic on the system.
4661 * @sp : private member of the device structure, which is a pointer to the
4662 * s2io_nic structure.
4663 * @id : pointer to the structure with identification parameters given by
4664 * ethtool.
4665 * Description: Used to physically identify the NIC on the system.
4666 * The Link LED will blink for a time specified by the user for
4667 * identification.
4668 * NOTE: The Link has to be Up to be able to blink the LED. Hence
4669 * identification is possible only if it's link is up.
4670 * Return value:
4671 * int , returns 0 on success
4672 */
4675 {
4679 u16 subid;
4690 }
4691 }
4696 }
4700 else
4707 }
4710 }
4712 /**
4713 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
4714 * @sp : private member of the device structure, which is a pointer to the
4715 * s2io_nic structure.
4716 * @ep : pointer to the structure with pause parameters given by ethtool.
4717 * Description:
4718 * Returns the Pause frame generation and reception capability of the NIC.
4719 * Return value:
4720 * void
4721 */
4724 {
4725 u64 val64;
4735 }
4737 /**
4738 * s2io_ethtool_setpause_data - set/reset pause frame generation.
4739 * @sp : private member of the device structure, which is a pointer to the
4740 * s2io_nic structure.
4741 * @ep : pointer to the structure with pause parameters given by ethtool.
4742 * Description:
4743 * It can be used to set or reset Pause frame generation or reception
4744 * support of the NIC.
4745 * Return value:
4746 * int, returns 0 on Success
4747 */
4751 {
4752 u64 val64;
4759 else
4763 else
4767 }
4769 /**
4770 * read_eeprom - reads 4 bytes of data from user given offset.
4771 * @sp : private member of the device structure, which is a pointer to the
4772 * s2io_nic structure.
4773 * @off : offset at which the data must be written
4774 * @data : Its an output parameter where the data read at the given
4775 * offset is stored.
4776 * Description:
4777 * Will read 4 bytes of data from the user given offset and return the
4778 * read data.
4779 * NOTE: Will allow to read only part of the EEPROM visible through the
4780 * I2C bus.
4781 * Return value:
4782 * -1 on failure and 0 on success.
4783 */
4785 #define S2IO_DEV_ID 5
4787 {
4790 u64 val64;
4796 I2C_CONTROL_CNTL_START;
4805 }
4807 exit_cnt++;
4808 }
4809 }
4828 }
4830 exit_cnt++;
4831 }
4832 }
4834 }
4836 /**
4837 * write_eeprom - actually writes the relevant part of the data value.
4838 * @sp : private member of the device structure, which is a pointer to the
4839 * s2io_nic structure.
4840 * @off : offset at which the data must be written
4841 * @data : The data that is to be written
4842 * @cnt : Number of bytes of the data that are actually to be written into
4843 * the Eeprom. (max of 3)
4844 * Description:
4845 * Actually writes the relevant part of the data value into the Eeprom
4846 * through the I2C bus.
4847 * Return value:
4848 * 0 on success, -1 on failure.
4849 */
4852 {
4854 u64 val64;
4860 I2C_CONTROL_CNTL_START;
4869 }
4871 exit_cnt++;
4872 }
4873 }
4893 }
4895 exit_cnt++;
4896 }
4897 }
4899 }
4901 {
4903 u8 data;
4910 }
4914 }
4929 }
4934 }
4937 }
4941 }
4943 }
4945 /**
4946 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
4947 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
4948 * @eeprom : pointer to the user level structure provided by ethtool,
4949 * containing all relevant information.
4950 * @data_buf : user defined value to be written into Eeprom.
4951 * Description: Reads the values stored in the Eeprom at given offset
4952 * for a given length. Stores these values int the input argument data
4953 * buffer 'data_buf' and returns these to the caller (ethtool.)
4954 * Return value:
4955 * int 0 on success
4956 */
4960 {
4962 u64 data;
4974 }
4977 }
4979 }
4981 /**
4982 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
4983 * @sp : private member of the device structure, which is a pointer to the
4984 * s2io_nic structure.
4985 * @eeprom : pointer to the user level structure provided by ethtool,
4986 * containing all relevant information.
4987 * @data_buf ; user defined value to be written into Eeprom.
4988 * Description:
4989 * Tries to write the user provided value in the Eeprom, at the offset
4990 * given by the user.
4991 * Return value:
4992 * 0 on success, -EFAULT on failure.
4993 */
4998 {
5009 }
5024 }
5025 cnt++;
5026 len--;
5027 }
5030 }
5032 /**
5033 * s2io_register_test - reads and writes into all clock domains.
5034 * @sp : private member of the device structure, which is a pointer to the
5035 * s2io_nic structure.
5036 * @data : variable that returns the result of each of the test conducted b
5037 * by the driver.
5038 * Description:
5039 * Read and write into all clock domains. The NIC has 3 clock domains,
5040 * see that registers in all the three regions are accessible.
5041 * Return value:
5042 * 0 on success.
5043 */
5046 {
5055 }
5061 }
5066 else
5071 }
5077 }
5085 }
5093 }
5097 }
5099 /**
5100 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
5101 * @sp : private member of the device structure, which is a pointer to the
5102 * s2io_nic structure.
5103 * @data:variable that returns the result of each of the test conducted by
5104 * the driver.
5105 * Description:
5106 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
5107 * register.
5108 * Return value:
5109 * 0 on success.
5110 */
5113 {
5119 /* Test Write Error at offset 0 */
5120 /* Note that SPI interface allows write access to all areas
5121 * of EEPROM. Hence doing all negative testing only for Xframe I.
5122 */
5127 /* Save current values at offsets 0x4F0 and 0x7F0 */
5133 /* Test Write at offset 4f0 */
5145 }
5147 /* Reset the EEPROM data go FFFF */
5150 /* Test Write Request Error at offset 0x7c */
5155 /* Test Write Request at offset 0x7f0 */
5167 }
5169 /* Reset the EEPROM data go FFFF */
5173 /* Test Write Error at offset 0x80 */
5177 /* Test Write Error at offset 0xfc */
5181 /* Test Write Error at offset 0x100 */
5185 /* Test Write Error at offset 4ec */
5188 }
5190 /* Restore values at offsets 0x4F0 and 0x7F0 */
5198 }
5200 /**
5201 * s2io_bist_test - invokes the MemBist test of the card .
5202 * @sp : private member of the device structure, which is a pointer to the
5203 * s2io_nic structure.
5204 * @data:variable that returns the result of each of the test conducted by
5205 * the driver.
5206 * Description:
5207 * This invokes the MemBist test of the card. We give around
5208 * 2 secs time for the Test to complete. If it's still not complete
5209 * within this peiod, we consider that the test failed.
5210 * Return value:
5211 * 0 on success and -1 on failure.
5212 */
5215 {
5229 }
5231 cnt++;
5232 }
5235 }
5237 /**
5238 * s2io-link_test - verifies the link state of the nic
5239 * @sp ; private member of the device structure, which is a pointer to the
5240 * s2io_nic structure.
5241 * @data: variable that returns the result of each of the test conducted by
5242 * the driver.
5243 * Description:
5244 * The function verifies the link state of the NIC and updates the input
5245 * argument 'data' appropriately.
5246 * Return value:
5247 * 0 on success.
5248 */
5251 {
5253 u64 val64;
5258 else
5262 }
5264 /**
5265 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
5266 * @sp - private member of the device structure, which is a pointer to the
5267 * s2io_nic structure.
5268 * @data - variable that returns the result of each of the test
5269 * conducted by the driver.
5270 * Description:
5271 * This is one of the offline test that tests the read and write
5272 * access to the RldRam chip on the NIC.
5273 * Return value:
5274 * 0 on success.
5275 */
5278 {
5280 u64 val64;
5302 }
5308 }
5314 }
5321 MC_RLDRAM_TEST_GO;
5329 }
5342 }
5351 iteration++;
5352 }
5356 /* Bring the adapter out of test mode */
5360 }
5362 /**
5363 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
5364 * @sp : private member of the device structure, which is a pointer to the
5365 * s2io_nic structure.
5366 * @ethtest : pointer to a ethtool command specific structure that will be
5367 * returned to the user.
5368 * @data : variable that returns the result of each of the test
5369 * conducted by the driver.
5370 * Description:
5371 * This function conducts 6 tests ( 4 offline and 2 online) to determine
5372 * the health of the card.
5373 * Return value:
5374 * void
5375 */
5380 {
5385 /* Offline Tests. */
5410 /* Online Tests. */
5420 }
5429 }
5430 }
5435 {
5643 /*
5644 * Since 64-bit divide does not work on all platforms,
5645 * do repeated subtraction.
5646 */
5649 count++;
5650 }
5652 }
5653 else
5655 }
5658 {
5660 }
5664 {
5668 }
5671 {
5676 else
5680 }
5683 {
5685 }
5688 {
5690 }
5694 {
5702 }
5703 }
5705 {
5707 }
5710 {
5713 else
5717 }
5720 {
5722 }
5724 {
5727 else
5731 }
5761 };
5763 /**
5764 * s2io_ioctl - Entry point for the Ioctl
5765 * @dev : Device pointer.
5766 * @ifr : An IOCTL specefic structure, that can contain a pointer to
5767 * a proprietary structure used to pass information to the driver.
5768 * @cmd : This is used to distinguish between the different commands that
5769 * can be passed to the IOCTL functions.
5770 * Description:
5771 * Currently there are no special functionality supported in IOCTL, hence
5772 * function always return EOPNOTSUPPORTED
5773 */
5776 {
5778 }
5780 /**
5781 * s2io_change_mtu - entry point to change MTU size for the device.
5782 * @dev : device pointer.
5783 * @new_mtu : the new MTU size for the device.
5784 * Description: A driver entry point to change MTU size for the device.
5785 * Before changing the MTU the device must be stopped.
5786 * Return value:
5787 * 0 on success and an appropriate (-)ve integer as defined in errno.h
5788 * file on failure.
5789 */
5792 {
5799 }
5807 __FUNCTION__);
5808 }
5816 }
5819 }
5821 /**
5822 * s2io_tasklet - Bottom half of the ISR.
5823 * @dev_adr : address of the device structure in dma_addr_t format.
5824 * Description:
5825 * This is the tasklet or the bottom half of the ISR. This is
5826 * an extension of the ISR which is scheduled by the scheduler to be run
5827 * when the load on the CPU is low. All low priority tasks of the ISR can
5828 * be pushed into the tasklet. For now the tasklet is used only to
5829 * replenish the Rx buffers in the Rx buffer descriptors.
5830 * Return value:
5831 * void.
5832 */
5835 {
5858 }
5859 }
5861 }
5862 }
5864 /**
5865 * s2io_set_link - Set the LInk status
5866 * @data: long pointer to device private structue
5867 * Description: Sets the link status for the adapter
5868 */
5871 {
5876 u16 subid;
5879 /* The card is being reset, no point doing anything */
5881 }
5885 /*
5886 * Allow a small delay for the NICs self initiated
5887 * cleanup to complete.
5888 */
5890 }
5899 subid)) {
5907 }
5909 MAC_RMAC_ERR_TIMER) {
5917 }
5918 }
5921 }
5925 subid)) {
5930 }
5932 }
5937 }
5939 }
5944 {
5949 /* allocate skb */
5952 /*
5953 * As Rx frame are not going to be processed,
5954 * using same mapped address for the Rxd
5955 * buffer pointer
5956 */
5964 }
5965 /* storing the mapped addr in a temp variable
5966 * such it will be used for next rxd whose
5967 * Host Control is NULL
5968 */
5972 PCI_DMA_FROMDEVICE);
5974 }
5976 /* Two buffer Mode */
5987 }
5991 PCI_DMA_FROMDEVICE);
5994 PCI_DMA_FROMDEVICE);
5997 /* Buffer-1 will be dummy buffer not used */
6000 PCI_DMA_FROMDEVICE);
6001 }
6003 /* Three buffer mode */
6014 }
6017 PCI_DMA_FROMDEVICE);
6018 /* Buffer-1 receives L3/L4 headers */
6022 PCI_DMA_FROMDEVICE);
6023 /*
6024 * skb_shinfo(skb)->frag_list will have L4
6025 * data payload
6026 */
6028 ALIGN_SIZE);
6033 }
6036 /*
6037 * Buffer-2 receives L4 data payload
6038 */
6042 }
6043 }
6045 }
6047 {
6059 }
6060 }
6063 {
6073 /* Calculate the size based on ring mode */
6080 else
6100 /* flip the Ownership bit to Hardware */
6102 }
6103 }
6104 }
6107 }
6110 {
6122 }
6124 /* Store the values of the MSIX table in the nic_t structure */
6127 /* After proper initialization of H/W, register ISR */
6136 }
6137 }
6158 }
6164 }
6166 }
6167 }
6175 }
6176 }
6178 }
6180 {
6186 u16 msi_control;
6194 }
6203 u16 val;
6209 }
6210 }
6211 /* Waiting till all Interrupt handlers are complete */
6217 cnt++;
6219 }
6222 {
6229 /* If s2io_set_link task is executing, wait till it completes. */
6232 }
6235 /* disable Tx and Rx traffic on the NIC */
6240 /* Kill tasklet. */
6243 /* Check if the device is Quiescent and then Reset the NIC */
6245 /* As per the HW requirement we need to replenish the
6246 * receive buffer to avoid the ring bump. Since there is
6247 * no intention of processing the Rx frame at this pointwe are
6248 * just settting the ownership bit of rxd in Each Rx
6249 * ring to HW and set the appropriate buffer size
6250 * based on the ring mode
6251 */
6257 }
6260 cnt++;
6267 }
6272 /* Free all Tx buffers */
6276 /* Free all Rx buffers */
6282 }
6285 {
6290 u16 interruptible;
6292 /* Initialize the H/W I/O registers */
6298 }
6300 /*
6301 * Initializing the Rx buffers. For now we are considering only 1
6302 * Rx ring and initializing buffers into 30 Rx blocks
6303 */
6314 }
6317 }
6319 /* Setting its receive mode */
6323 /* Initialize max aggregatable pkts per session based on MTU */
6325 /* Check if we can use(if specified) user provided value */
6328 }
6330 /* Enable Rx Traffic and interrupts on the NIC */
6336 }
6338 /* Add interrupt service routine */
6345 }
6349 /* Enable tasklet for the device */
6352 /* Enable select interrupts */
6360 }
6365 }
6367 /**
6368 * s2io_restart_nic - Resets the NIC.
6369 * @data : long pointer to the device private structure
6370 * Description:
6371 * This function is scheduled to be run by the s2io_tx_watchdog
6372 * function after 0.5 secs to reset the NIC. The idea is to reduce
6373 * the run time of the watch dog routine which is run holding a
6374 * spin lock.
6375 */
6378 {
6386 }
6391 }
6393 /**
6394 * s2io_tx_watchdog - Watchdog for transmit side.
6395 * @dev : Pointer to net device structure
6396 * Description:
6397 * This function is triggered if the Tx Queue is stopped
6398 * for a pre-defined amount of time when the Interface is still up.
6399 * If the Interface is jammed in such a situation, the hardware is
6400 * reset (by s2io_close) and restarted again (by s2io_open) to
6401 * overcome any problem that might have been caused in the hardware.
6402 * Return value:
6403 * void
6404 */
6407 {
6413 }
6414 }
6416 /**
6417 * rx_osm_handler - To perform some OS related operations on SKB.
6418 * @sp: private member of the device structure,pointer to s2io_nic structure.
6419 * @skb : the socket buffer pointer.
6420 * @len : length of the packet
6421 * @cksum : FCS checksum of the frame.
6422 * @ring_no : the ring from which this RxD was extracted.
6423 * Description:
6424 * This function is called by the Rx interrupt serivce routine to perform
6425 * some OS related operations on the SKB before passing it to the upper
6426 * layers. It mainly checks if the checksum is OK, if so adds it to the
6427 * SKBs cksum variable, increments the Rx packet count and passes the SKB
6428 * to the upper layer. If the checksum is wrong, it increments the Rx
6429 * packet error count, frees the SKB and returns error.
6430 * Return value:
6431 * SUCCESS on success and -1 on failure.
6432 */
6434 {
6447 /* Check for parity error */
6450 }
6452 /*
6453 * Drop the packet if bad transfer code. Exception being
6454 * 0x5, which could be due to unsupported IPv6 extension header.
6455 * In this case, we let stack handle the packet.
6456 * Note that in this case, since checksum will be incorrect,
6457 * stack will validate the same.
6458 */
6467 }
6468 }
6470 /* Updating statistics */
6503 }
6511 /*
6512 * NIC verifies if the Checksum of the received
6513 * frame is Ok or not and accordingly returns
6514 * a flag in the RxD.
6515 */
6518 u32 tcp_len;
6529 {
6533 }
6535 {
6543 }
6554 * L2 aggregatable
6555 */
6557 * First pkt in session not
6558 * L3/L4 aggregatable
6559 */
6564 __FUNCTION__);
6566 }
6567 }
6569 /*
6570 * Packet with erroneous checksum, let the
6571 * upper layers deal with it.
6572 */
6574 }
6577 }
6581 #ifdef CONFIG_S2IO_NAPI
6583 /* Queueing the vlan frame to the upper layer */
6588 }
6589 #else
6591 /* Queueing the vlan frame to the upper layer */
6596 }
6597 #endif
6599 send_up:
6601 }
6603 aggregate:
6606 }
6608 /**
6609 * s2io_link - stops/starts the Tx queue.
6610 * @sp : private member of the device structure, which is a pointer to the
6611 * s2io_nic structure.
6612 * @link : inidicates whether link is UP/DOWN.
6613 * Description:
6614 * This function stops/starts the Tx queue depending on whether the link
6615 * status of the NIC is is down or up. This is called by the Alarm
6616 * interrupt handler whenever a link change interrupt comes up.
6617 * Return value:
6618 * void.
6619 */
6622 {
6632 }
6633 }
6635 }
6637 /**
6638 * get_xena_rev_id - to identify revision ID of xena.
6639 * @pdev : PCI Dev structure
6640 * Description:
6641 * Function to identify the Revision ID of xena.
6642 * Return value:
6643 * returns the revision ID of the device.
6644 */
6647 {
6652 }
6654 /**
6655 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
6656 * @sp : private member of the device structure, which is a pointer to the
6657 * s2io_nic structure.
6658 * Description:
6659 * This function initializes a few of the PCI and PCI-X configuration registers
6660 * with recommended values.
6661 * Return value:
6662 * void
6663 */
6666 {
6669 /* Enable Data Parity Error Recovery in PCI-X command register. */
6677 /* Set the PErr Response bit in PCI command register. */
6682 }
6685 {
6691 }
6697 }
6698 #ifdef CONFIG_S2IO_NAPI
6703 }
6704 #endif
6705 #ifndef CONFIG_PCI_MSI
6710 }
6711 #else
6716 }
6717 #endif
6724 }
6729 }
6731 }
6733 /**
6734 * s2io_init_nic - Initialization of the adapter .
6735 * @pdev : structure containing the PCI related information of the device.
6736 * @pre: List of PCI devices supported by the driver listed in s2io_tbl.
6737 * Description:
6738 * The function initializes an adapter identified by the pci_dec structure.
6739 * All OS related initialization including memory and device structure and
6740 * initlaization of the device private variable is done. Also the swapper
6741 * control register is initialized to enable read and write into the I/O
6742 * registers of the device.
6743 * Return value:
6744 * returns 0 on success and negative on failure.
6745 */
6747 static int __devinit
6749 {
6757 u16 subid;
6770 }
6778 "Unable to obtain 64bit DMA for \
6782 }
6788 }
6794 }
6795 }
6802 }
6810 }
6811 }
6819 }
6826 /* Private member variable initialized to s2io NIC structure */
6845 else
6850 /* Initialize some PCI/PCI-X fields of the NIC. */
6853 /*
6854 * Setting the device configuration parameters.
6855 * Most of these parameters can be specified by the user during
6856 * module insertion as they are module loadable parameters. If
6857 * these parameters are not not specified during load time, they
6858 * are initialized with default values.
6859 */
6863 /* Tx side parameters. */
6868 }
6870 /* mapping the QoS priority to the configured fifos */
6881 }
6882 }
6883 /* + 2 because one Txd for skb->data and one Txd for UFO */
6886 /* Rx side parameters. */
6892 }
6898 }
6900 /* Setting Mac Control parameters */
6906 /* Initialize Ring buffer parameters. */
6910 /* Initialize the number of ISRs currently running */
6913 /* initialize the shared memory used by the NIC and the host */
6919 }
6928 }
6937 }
6942 /* Initializing the BAR1 address as the start of the FIFO pointer. */
6946 }
6948 /* Driver entry points */
6961 /*
6962 * will use eth_mac_addr() for dev->set_mac_address
6963 * mac address will be set every time dev->open() is called
6964 */
6965 #if defined(CONFIG_S2IO_NAPI)
6968 #endif
6970 #ifdef CONFIG_NET_POLL_CONTROLLER
6972 #endif
6982 }
6991 /* Setting swapper control on the NIC, for proper reset operation */
6997 }
6999 /* Verify if the Herc works on the slot its placed into */
7007 }
7008 }
7010 /* Not needed for Herc */
7012 /*
7013 * Fix for all "FFs" MAC address problems observed on
7014 * Alpha platforms
7015 */
7018 }
7020 /*
7021 * MAC address initialization.
7022 * For now only one mac address will be read and used.
7023 */
7029 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING);
7043 /* Set the factory defined MAC address initially */
7047 /* reset Nic and bring it to known state */
7050 /*
7051 * Initialize the tasklet status and link state flags
7052 * and the card state parameter
7053 */
7058 /* Initialize spinlocks */
7060 #ifndef CONFIG_S2IO_NAPI
7062 #endif
7065 /*
7066 * SXE-002: Configure link and activity LED to init state
7067 * on driver load.
7068 */
7077 }
7085 }
7091 s2io_driver_version);
7107 }
7108 }
7122 }
7123 #ifdef CONFIG_S2IO_NAPI
7125 #endif
7136 }
7141 /* Initialize device name */
7144 /* Initialize bimodal Interrupts */
7150 }
7152 /*
7153 * Make Link state as off at this point, when the Link change
7154 * interrupt comes the state will be automatically changed to
7155 * the right state.
7156 */
7161 register_failed:
7162 set_swap_failed:
7164 bar1_remap_failed:
7166 bar0_remap_failed:
7167 mem_alloc_failed:
7177 }
7182 }
7184 /**
7185 * s2io_rem_nic - Free the PCI device
7186 * @pdev: structure containing the PCI related information of the device.
7187 * Description: This function is called by the Pci subsystem to release a
7188 * PCI device and free up all resource held up by the device. This could
7189 * be in response to a Hot plug event or when the driver is to be removed
7190 * from memory.
7191 */
7194 {
7202 }
7218 }
7221 }
7223 /**
7224 * s2io_starter - Entry point for the driver
7225 * Description: This function is the entry point for the driver. It verifies
7226 * the module loadable parameters and initializes PCI configuration space.
7227 */
7230 {
7232 }
7234 /**
7235 * s2io_closer - Cleanup routine for the driver
7236 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
7237 */
7240 {
7243 }
7250 {
7256 __FUNCTION__);
7258 }
7260 /* TODO:
7261 * By default the VLAN field in the MAC is stripped by the card, if this
7262 * feature is turned off in rx_pa_cfg register, then the ip_off field
7263 * has to be shifted by a further 2 bytes
7264 */
7270 /* LLC, SNAP etc are considered non-mergeable */
7273 }
7281 }
7285 {
7291 }
7294 {
7296 }
7300 {
7310 /*
7311 * check if we saw TCP timestamp. Other consistency checks have
7312 * already been done.
7313 */
7320 }
7322 }
7325 {
7328 u16 nchk;
7332 /* Update L3 header */
7338 /* Update L4 header */
7342 /* Update tsecr field if this session has timestamps enabled */
7346 }
7348 /* Update counters required for calculation of
7349 * average no. of packets aggregated.
7350 */
7353 }
7357 {
7364 /* Update ack seq no. and window ad(from this pkt) in LRO object */
7370 /* Update tsecr and tsval from this packet */
7374 }
7375 }
7379 {
7385 /* Runt frame or a pure ack */
7387 }
7392 /* If we see CE codepoint in IP header, packet is not mergeable */
7396 /* If we see ECE or CWR flags in TCP header, packet is not mergeable */
7399 /*
7400 * Currently recognize only the ack control word and
7401 * any other control field being set would result in
7402 * flushing the LRO session
7403 */
7405 }
7407 /*
7408 * Allow only one TCP timestamp option. Don't aggregate if
7409 * any other options are detected.
7410 */
7417 ptr++;
7421 /* Ensure timestamp value increases monotonically */
7426 /* timestamp echo reply should be non-zero */
7429 }
7432 }
7434 static int
7437 {
7443 rxdp))) {
7448 }
7457 /* Sock pair matched */
7470 }
7474 else
7477 }
7478 }
7481 /* Before searching for available LRO objects,
7482 * check if the pkt is L3/L4 aggregatable. If not
7483 * don't create new LRO session. Just send this
7484 * packet up.
7485 */
7488 }
7496 }
7497 }
7498 }
7502 __FUNCTION__);
7505 }
7519 }
7523 __FUNCTION__);
7525 }
7528 }
7531 {
7535 }
7538 {
7542 #ifdef CONFIG_S2IO_NAPI
7544 #else
7546 #endif
7547 }
7550 u32 tcp_len)
7551 {
7559 else
7564 }