[MTD] [OneNAND] main read/write ops support for yaffs2
[linux-2.6/openmoko-kernel.git] / drivers / mtd / onenand / onenand_base.c
blob40d8d6ff626b45a90b6581b4d53a7a3de341c30a
1 /*
2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2007 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * Credits:
8 * Adrian Hunter <ext-adrian.hunter@nokia.com>:
9 * auto-placement support, read-while load support, various fixes
10 * Copyright (C) Nokia Corporation, 2007
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/init.h>
20 #include <linux/sched.h>
21 #include <linux/interrupt.h>
22 #include <linux/jiffies.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/onenand.h>
25 #include <linux/mtd/partitions.h>
27 #include <asm/io.h>
29 /**
30 * onenand_oob_64 - oob info for large (2KB) page
32 static struct nand_ecclayout onenand_oob_64 = {
33 .eccbytes = 20,
34 .eccpos = {
35 8, 9, 10, 11, 12,
36 24, 25, 26, 27, 28,
37 40, 41, 42, 43, 44,
38 56, 57, 58, 59, 60,
40 .oobfree = {
41 {2, 3}, {14, 2}, {18, 3}, {30, 2},
42 {34, 3}, {46, 2}, {50, 3}, {62, 2}
46 /**
47 * onenand_oob_32 - oob info for middle (1KB) page
49 static struct nand_ecclayout onenand_oob_32 = {
50 .eccbytes = 10,
51 .eccpos = {
52 8, 9, 10, 11, 12,
53 24, 25, 26, 27, 28,
55 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
58 static const unsigned char ffchars[] = {
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
62 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
63 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
64 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
65 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
66 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
69 /**
70 * onenand_readw - [OneNAND Interface] Read OneNAND register
71 * @param addr address to read
73 * Read OneNAND register
75 static unsigned short onenand_readw(void __iomem *addr)
77 return readw(addr);
80 /**
81 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
82 * @param value value to write
83 * @param addr address to write
85 * Write OneNAND register with value
87 static void onenand_writew(unsigned short value, void __iomem *addr)
89 writew(value, addr);
92 /**
93 * onenand_block_address - [DEFAULT] Get block address
94 * @param this onenand chip data structure
95 * @param block the block
96 * @return translated block address if DDP, otherwise same
98 * Setup Start Address 1 Register (F100h)
100 static int onenand_block_address(struct onenand_chip *this, int block)
102 /* Device Flash Core select, NAND Flash Block Address */
103 if (block & this->density_mask)
104 return ONENAND_DDP_CHIP1 | (block ^ this->density_mask);
106 return block;
110 * onenand_bufferram_address - [DEFAULT] Get bufferram address
111 * @param this onenand chip data structure
112 * @param block the block
113 * @return set DBS value if DDP, otherwise 0
115 * Setup Start Address 2 Register (F101h) for DDP
117 static int onenand_bufferram_address(struct onenand_chip *this, int block)
119 /* Device BufferRAM Select */
120 if (block & this->density_mask)
121 return ONENAND_DDP_CHIP1;
123 return ONENAND_DDP_CHIP0;
127 * onenand_page_address - [DEFAULT] Get page address
128 * @param page the page address
129 * @param sector the sector address
130 * @return combined page and sector address
132 * Setup Start Address 8 Register (F107h)
134 static int onenand_page_address(int page, int sector)
136 /* Flash Page Address, Flash Sector Address */
137 int fpa, fsa;
139 fpa = page & ONENAND_FPA_MASK;
140 fsa = sector & ONENAND_FSA_MASK;
142 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
146 * onenand_buffer_address - [DEFAULT] Get buffer address
147 * @param dataram1 DataRAM index
148 * @param sectors the sector address
149 * @param count the number of sectors
150 * @return the start buffer value
152 * Setup Start Buffer Register (F200h)
154 static int onenand_buffer_address(int dataram1, int sectors, int count)
156 int bsa, bsc;
158 /* BufferRAM Sector Address */
159 bsa = sectors & ONENAND_BSA_MASK;
161 if (dataram1)
162 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
163 else
164 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
166 /* BufferRAM Sector Count */
167 bsc = count & ONENAND_BSC_MASK;
169 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
173 * onenand_command - [DEFAULT] Send command to OneNAND device
174 * @param mtd MTD device structure
175 * @param cmd the command to be sent
176 * @param addr offset to read from or write to
177 * @param len number of bytes to read or write
179 * Send command to OneNAND device. This function is used for middle/large page
180 * devices (1KB/2KB Bytes per page)
182 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
184 struct onenand_chip *this = mtd->priv;
185 int value, readcmd = 0, block_cmd = 0;
186 int block, page;
188 /* Address translation */
189 switch (cmd) {
190 case ONENAND_CMD_UNLOCK:
191 case ONENAND_CMD_LOCK:
192 case ONENAND_CMD_LOCK_TIGHT:
193 case ONENAND_CMD_UNLOCK_ALL:
194 block = -1;
195 page = -1;
196 break;
198 case ONENAND_CMD_ERASE:
199 case ONENAND_CMD_BUFFERRAM:
200 case ONENAND_CMD_OTP_ACCESS:
201 block_cmd = 1;
202 block = (int) (addr >> this->erase_shift);
203 page = -1;
204 break;
206 default:
207 block = (int) (addr >> this->erase_shift);
208 page = (int) (addr >> this->page_shift);
210 if (ONENAND_IS_2PLANE(this)) {
211 /* Make the even block number */
212 block &= ~1;
213 /* Is it the odd plane? */
214 if (addr & this->writesize)
215 block++;
216 page >>= 1;
218 page &= this->page_mask;
219 break;
222 /* NOTE: The setting order of the registers is very important! */
223 if (cmd == ONENAND_CMD_BUFFERRAM) {
224 /* Select DataRAM for DDP */
225 value = onenand_bufferram_address(this, block);
226 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
228 if (ONENAND_IS_2PLANE(this))
229 /* It is always BufferRAM0 */
230 ONENAND_SET_BUFFERRAM0(this);
231 else
232 /* Switch to the next data buffer */
233 ONENAND_SET_NEXT_BUFFERRAM(this);
235 return 0;
238 if (block != -1) {
239 /* Write 'DFS, FBA' of Flash */
240 value = onenand_block_address(this, block);
241 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
243 if (block_cmd) {
244 /* Select DataRAM for DDP */
245 value = onenand_bufferram_address(this, block);
246 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
250 if (page != -1) {
251 /* Now we use page size operation */
252 int sectors = 4, count = 4;
253 int dataram;
255 switch (cmd) {
256 case ONENAND_CMD_READ:
257 case ONENAND_CMD_READOOB:
258 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
259 readcmd = 1;
260 break;
262 default:
263 if (ONENAND_IS_2PLANE(this) && cmd == ONENAND_CMD_PROG)
264 cmd = ONENAND_CMD_2X_PROG;
265 dataram = ONENAND_CURRENT_BUFFERRAM(this);
266 break;
269 /* Write 'FPA, FSA' of Flash */
270 value = onenand_page_address(page, sectors);
271 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
273 /* Write 'BSA, BSC' of DataRAM */
274 value = onenand_buffer_address(dataram, sectors, count);
275 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
277 if (readcmd) {
278 /* Select DataRAM for DDP */
279 value = onenand_bufferram_address(this, block);
280 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
284 /* Interrupt clear */
285 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
287 /* Write command */
288 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
290 return 0;
294 * onenand_wait - [DEFAULT] wait until the command is done
295 * @param mtd MTD device structure
296 * @param state state to select the max. timeout value
298 * Wait for command done. This applies to all OneNAND command
299 * Read can take up to 30us, erase up to 2ms and program up to 350us
300 * according to general OneNAND specs
302 static int onenand_wait(struct mtd_info *mtd, int state)
304 struct onenand_chip * this = mtd->priv;
305 unsigned long timeout;
306 unsigned int flags = ONENAND_INT_MASTER;
307 unsigned int interrupt = 0;
308 unsigned int ctrl;
310 /* The 20 msec is enough */
311 timeout = jiffies + msecs_to_jiffies(20);
312 while (time_before(jiffies, timeout)) {
313 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
315 if (interrupt & flags)
316 break;
318 if (state != FL_READING)
319 cond_resched();
321 /* To get correct interrupt status in timeout case */
322 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
324 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
326 if (ctrl & ONENAND_CTRL_ERROR) {
327 printk(KERN_ERR "onenand_wait: controller error = 0x%04x\n", ctrl);
328 if (ctrl & ONENAND_CTRL_LOCK)
329 printk(KERN_ERR "onenand_wait: it's locked error.\n");
330 return ctrl;
333 if (interrupt & ONENAND_INT_READ) {
334 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
335 if (ecc) {
336 printk(KERN_ERR "onenand_wait: ECC error = 0x%04x\n", ecc);
337 if (ecc & ONENAND_ECC_2BIT_ALL) {
338 mtd->ecc_stats.failed++;
339 return ecc;
340 } else if (ecc & ONENAND_ECC_1BIT_ALL)
341 mtd->ecc_stats.corrected++;
343 } else if (state == FL_READING) {
344 printk(KERN_ERR "onenand_wait: read timeout! ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
345 return -EIO;
348 return 0;
352 * onenand_interrupt - [DEFAULT] onenand interrupt handler
353 * @param irq onenand interrupt number
354 * @param dev_id interrupt data
356 * complete the work
358 static irqreturn_t onenand_interrupt(int irq, void *data)
360 struct onenand_chip *this = (struct onenand_chip *) data;
362 /* To handle shared interrupt */
363 if (!this->complete.done)
364 complete(&this->complete);
366 return IRQ_HANDLED;
370 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
371 * @param mtd MTD device structure
372 * @param state state to select the max. timeout value
374 * Wait for command done.
376 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
378 struct onenand_chip *this = mtd->priv;
380 wait_for_completion(&this->complete);
382 return onenand_wait(mtd, state);
386 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
387 * @param mtd MTD device structure
388 * @param state state to select the max. timeout value
390 * Try interrupt based wait (It is used one-time)
392 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
394 struct onenand_chip *this = mtd->priv;
395 unsigned long remain, timeout;
397 /* We use interrupt wait first */
398 this->wait = onenand_interrupt_wait;
400 timeout = msecs_to_jiffies(100);
401 remain = wait_for_completion_timeout(&this->complete, timeout);
402 if (!remain) {
403 printk(KERN_INFO "OneNAND: There's no interrupt. "
404 "We use the normal wait\n");
406 /* Release the irq */
407 free_irq(this->irq, this);
409 this->wait = onenand_wait;
412 return onenand_wait(mtd, state);
416 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
417 * @param mtd MTD device structure
419 * There's two method to wait onenand work
420 * 1. polling - read interrupt status register
421 * 2. interrupt - use the kernel interrupt method
423 static void onenand_setup_wait(struct mtd_info *mtd)
425 struct onenand_chip *this = mtd->priv;
426 int syscfg;
428 init_completion(&this->complete);
430 if (this->irq <= 0) {
431 this->wait = onenand_wait;
432 return;
435 if (request_irq(this->irq, &onenand_interrupt,
436 IRQF_SHARED, "onenand", this)) {
437 /* If we can't get irq, use the normal wait */
438 this->wait = onenand_wait;
439 return;
442 /* Enable interrupt */
443 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
444 syscfg |= ONENAND_SYS_CFG1_IOBE;
445 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
447 this->wait = onenand_try_interrupt_wait;
451 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
452 * @param mtd MTD data structure
453 * @param area BufferRAM area
454 * @return offset given area
456 * Return BufferRAM offset given area
458 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
460 struct onenand_chip *this = mtd->priv;
462 if (ONENAND_CURRENT_BUFFERRAM(this)) {
463 /* Note: the 'this->writesize' is a real page size */
464 if (area == ONENAND_DATARAM)
465 return this->writesize;
466 if (area == ONENAND_SPARERAM)
467 return mtd->oobsize;
470 return 0;
474 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
475 * @param mtd MTD data structure
476 * @param area BufferRAM area
477 * @param buffer the databuffer to put/get data
478 * @param offset offset to read from or write to
479 * @param count number of bytes to read/write
481 * Read the BufferRAM area
483 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
484 unsigned char *buffer, int offset, size_t count)
486 struct onenand_chip *this = mtd->priv;
487 void __iomem *bufferram;
489 bufferram = this->base + area;
491 bufferram += onenand_bufferram_offset(mtd, area);
493 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
494 unsigned short word;
496 /* Align with word(16-bit) size */
497 count--;
499 /* Read word and save byte */
500 word = this->read_word(bufferram + offset + count);
501 buffer[count] = (word & 0xff);
504 memcpy(buffer, bufferram + offset, count);
506 return 0;
510 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
511 * @param mtd MTD data structure
512 * @param area BufferRAM area
513 * @param buffer the databuffer to put/get data
514 * @param offset offset to read from or write to
515 * @param count number of bytes to read/write
517 * Read the BufferRAM area with Sync. Burst Mode
519 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
520 unsigned char *buffer, int offset, size_t count)
522 struct onenand_chip *this = mtd->priv;
523 void __iomem *bufferram;
525 bufferram = this->base + area;
527 bufferram += onenand_bufferram_offset(mtd, area);
529 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
531 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
532 unsigned short word;
534 /* Align with word(16-bit) size */
535 count--;
537 /* Read word and save byte */
538 word = this->read_word(bufferram + offset + count);
539 buffer[count] = (word & 0xff);
542 memcpy(buffer, bufferram + offset, count);
544 this->mmcontrol(mtd, 0);
546 return 0;
550 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
551 * @param mtd MTD data structure
552 * @param area BufferRAM area
553 * @param buffer the databuffer to put/get data
554 * @param offset offset to read from or write to
555 * @param count number of bytes to read/write
557 * Write the BufferRAM area
559 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
560 const unsigned char *buffer, int offset, size_t count)
562 struct onenand_chip *this = mtd->priv;
563 void __iomem *bufferram;
565 bufferram = this->base + area;
567 bufferram += onenand_bufferram_offset(mtd, area);
569 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
570 unsigned short word;
571 int byte_offset;
573 /* Align with word(16-bit) size */
574 count--;
576 /* Calculate byte access offset */
577 byte_offset = offset + count;
579 /* Read word and save byte */
580 word = this->read_word(bufferram + byte_offset);
581 word = (word & ~0xff) | buffer[count];
582 this->write_word(word, bufferram + byte_offset);
585 memcpy(bufferram + offset, buffer, count);
587 return 0;
591 * onenand_get_2x_blockpage - [GENERIC] Get blockpage at 2x program mode
592 * @param mtd MTD data structure
593 * @param addr address to check
594 * @return blockpage address
596 * Get blockpage address at 2x program mode
598 static int onenand_get_2x_blockpage(struct mtd_info *mtd, loff_t addr)
600 struct onenand_chip *this = mtd->priv;
601 int blockpage, block, page;
603 /* Calculate the even block number */
604 block = (int) (addr >> this->erase_shift) & ~1;
605 /* Is it the odd plane? */
606 if (addr & this->writesize)
607 block++;
608 page = (int) (addr >> (this->page_shift + 1)) & this->page_mask;
609 blockpage = (block << 7) | page;
611 return blockpage;
615 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
616 * @param mtd MTD data structure
617 * @param addr address to check
618 * @return 1 if there are valid data, otherwise 0
620 * Check bufferram if there is data we required
622 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
624 struct onenand_chip *this = mtd->priv;
625 int blockpage, found = 0;
626 unsigned int i;
628 if (ONENAND_IS_2PLANE(this))
629 blockpage = onenand_get_2x_blockpage(mtd, addr);
630 else
631 blockpage = (int) (addr >> this->page_shift);
633 /* Is there valid data? */
634 i = ONENAND_CURRENT_BUFFERRAM(this);
635 if (this->bufferram[i].blockpage == blockpage)
636 found = 1;
637 else {
638 /* Check another BufferRAM */
639 i = ONENAND_NEXT_BUFFERRAM(this);
640 if (this->bufferram[i].blockpage == blockpage) {
641 ONENAND_SET_NEXT_BUFFERRAM(this);
642 found = 1;
646 if (found && ONENAND_IS_DDP(this)) {
647 /* Select DataRAM for DDP */
648 int block = (int) (addr >> this->erase_shift);
649 int value = onenand_bufferram_address(this, block);
650 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
653 return found;
657 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
658 * @param mtd MTD data structure
659 * @param addr address to update
660 * @param valid valid flag
662 * Update BufferRAM information
664 static void onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
665 int valid)
667 struct onenand_chip *this = mtd->priv;
668 int blockpage;
669 unsigned int i;
671 if (ONENAND_IS_2PLANE(this))
672 blockpage = onenand_get_2x_blockpage(mtd, addr);
673 else
674 blockpage = (int) (addr >> this->page_shift);
676 /* Invalidate another BufferRAM */
677 i = ONENAND_NEXT_BUFFERRAM(this);
678 if (this->bufferram[i].blockpage == blockpage)
679 this->bufferram[i].blockpage = -1;
681 /* Update BufferRAM */
682 i = ONENAND_CURRENT_BUFFERRAM(this);
683 if (valid)
684 this->bufferram[i].blockpage = blockpage;
685 else
686 this->bufferram[i].blockpage = -1;
690 * onenand_invalidate_bufferram - [GENERIC] Invalidate BufferRAM information
691 * @param mtd MTD data structure
692 * @param addr start address to invalidate
693 * @param len length to invalidate
695 * Invalidate BufferRAM information
697 static void onenand_invalidate_bufferram(struct mtd_info *mtd, loff_t addr,
698 unsigned int len)
700 struct onenand_chip *this = mtd->priv;
701 int i;
702 loff_t end_addr = addr + len;
704 /* Invalidate BufferRAM */
705 for (i = 0; i < MAX_BUFFERRAM; i++) {
706 loff_t buf_addr = this->bufferram[i].blockpage << this->page_shift;
707 if (buf_addr >= addr && buf_addr < end_addr)
708 this->bufferram[i].blockpage = -1;
713 * onenand_get_device - [GENERIC] Get chip for selected access
714 * @param mtd MTD device structure
715 * @param new_state the state which is requested
717 * Get the device and lock it for exclusive access
719 static int onenand_get_device(struct mtd_info *mtd, int new_state)
721 struct onenand_chip *this = mtd->priv;
722 DECLARE_WAITQUEUE(wait, current);
725 * Grab the lock and see if the device is available
727 while (1) {
728 spin_lock(&this->chip_lock);
729 if (this->state == FL_READY) {
730 this->state = new_state;
731 spin_unlock(&this->chip_lock);
732 break;
734 if (new_state == FL_PM_SUSPENDED) {
735 spin_unlock(&this->chip_lock);
736 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
738 set_current_state(TASK_UNINTERRUPTIBLE);
739 add_wait_queue(&this->wq, &wait);
740 spin_unlock(&this->chip_lock);
741 schedule();
742 remove_wait_queue(&this->wq, &wait);
745 return 0;
749 * onenand_release_device - [GENERIC] release chip
750 * @param mtd MTD device structure
752 * Deselect, release chip lock and wake up anyone waiting on the device
754 static void onenand_release_device(struct mtd_info *mtd)
756 struct onenand_chip *this = mtd->priv;
758 /* Release the chip */
759 spin_lock(&this->chip_lock);
760 this->state = FL_READY;
761 wake_up(&this->wq);
762 spin_unlock(&this->chip_lock);
766 * onenand_transfer_auto_oob - [Internal] oob auto-placement transfer
767 * @param mtd MTD device structure
768 * @param buf destination address
769 * @param column oob offset to read from
770 * @param thislen oob length to read
772 static int onenand_transfer_auto_oob(struct mtd_info *mtd, uint8_t *buf, int column,
773 int thislen)
775 struct onenand_chip *this = mtd->priv;
776 struct nand_oobfree *free;
777 int readcol = column;
778 int readend = column + thislen;
779 int lastgap = 0;
780 unsigned int i;
781 uint8_t *oob_buf = this->oob_buf;
783 free = this->ecclayout->oobfree;
784 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
785 if (readcol >= lastgap)
786 readcol += free->offset - lastgap;
787 if (readend >= lastgap)
788 readend += free->offset - lastgap;
789 lastgap = free->offset + free->length;
791 this->read_bufferram(mtd, ONENAND_SPARERAM, oob_buf, 0, mtd->oobsize);
792 free = this->ecclayout->oobfree;
793 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
794 int free_end = free->offset + free->length;
795 if (free->offset < readend && free_end > readcol) {
796 int st = max_t(int,free->offset,readcol);
797 int ed = min_t(int,free_end,readend);
798 int n = ed - st;
799 memcpy(buf, oob_buf + st, n);
800 buf += n;
801 } else if (column == 0)
802 break;
804 return 0;
808 * onenand_read_ops - [OneNAND Interface] OneNAND read main and/or out-of-band
809 * @param mtd MTD device structure
810 * @param from offset to read from
811 * @param ops: oob operation description structure
813 * OneNAND read main and/or out-of-band data
815 static int onenand_read_ops(struct mtd_info *mtd, loff_t from,
816 struct mtd_oob_ops *ops)
818 struct onenand_chip *this = mtd->priv;
819 struct mtd_ecc_stats stats;
820 size_t len = ops->len;
821 size_t ooblen = ops->ooblen;
822 u_char *buf = ops->datbuf;
823 u_char *oobbuf = ops->oobbuf;
824 int read = 0, column, thislen;
825 int oobread = 0, oobcolumn, thisooblen, oobsize;
826 int ret = 0, boundary = 0;
827 int writesize = this->writesize;
829 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ops: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
831 if (ops->mode == MTD_OOB_AUTO)
832 oobsize = this->ecclayout->oobavail;
833 else
834 oobsize = mtd->oobsize;
836 oobcolumn = from & (mtd->oobsize - 1);
838 /* Do not allow reads past end of device */
839 if ((from + len) > mtd->size) {
840 printk(KERN_ERR "onenand_read_ops: Attempt read beyond end of device\n");
841 ops->retlen = 0;
842 ops->oobretlen = 0;
843 return -EINVAL;
846 /* Grab the lock and see if the device is available */
847 onenand_get_device(mtd, FL_READING);
849 stats = mtd->ecc_stats;
851 /* Read-while-load method */
853 /* Do first load to bufferRAM */
854 if (read < len) {
855 if (!onenand_check_bufferram(mtd, from)) {
856 this->command(mtd, ONENAND_CMD_READ, from, writesize);
857 ret = this->wait(mtd, FL_READING);
858 onenand_update_bufferram(mtd, from, !ret);
862 thislen = min_t(int, writesize, len - read);
863 column = from & (writesize - 1);
864 if (column + thislen > writesize)
865 thislen = writesize - column;
867 while (!ret) {
868 /* If there is more to load then start next load */
869 from += thislen;
870 if (read + thislen < len) {
871 this->command(mtd, ONENAND_CMD_READ, from, writesize);
873 * Chip boundary handling in DDP
874 * Now we issued chip 1 read and pointed chip 1
875 * bufferam so we have to point chip 0 bufferam.
877 if (ONENAND_IS_DDP(this) &&
878 unlikely(from == (this->chipsize >> 1))) {
879 this->write_word(ONENAND_DDP_CHIP0, this->base + ONENAND_REG_START_ADDRESS2);
880 boundary = 1;
881 } else
882 boundary = 0;
883 ONENAND_SET_PREV_BUFFERRAM(this);
885 /* While load is going, read from last bufferRAM */
886 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
888 /* Read oob area if needed */
889 if (oobbuf) {
890 thisooblen = oobsize - oobcolumn;
891 thisooblen = min_t(int, thisooblen, ooblen - oobread);
893 if (ops->mode == MTD_OOB_AUTO)
894 onenand_transfer_auto_oob(mtd, oobbuf, oobcolumn, thisooblen);
895 else
896 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, oobcolumn, thisooblen);
897 oobread += thisooblen;
898 oobbuf += thisooblen;
899 oobcolumn = 0;
902 /* See if we are done */
903 read += thislen;
904 if (read == len)
905 break;
906 /* Set up for next read from bufferRAM */
907 if (unlikely(boundary))
908 this->write_word(ONENAND_DDP_CHIP1, this->base + ONENAND_REG_START_ADDRESS2);
909 ONENAND_SET_NEXT_BUFFERRAM(this);
910 buf += thislen;
911 thislen = min_t(int, writesize, len - read);
912 column = 0;
913 cond_resched();
914 /* Now wait for load */
915 ret = this->wait(mtd, FL_READING);
916 onenand_update_bufferram(mtd, from, !ret);
919 /* Deselect and wake up anyone waiting on the device */
920 onenand_release_device(mtd);
923 * Return success, if no ECC failures, else -EBADMSG
924 * fs driver will take care of that, because
925 * retlen == desired len and result == -EBADMSG
927 ops->retlen = read;
928 ops->oobretlen = oobread;
930 if (mtd->ecc_stats.failed - stats.failed)
931 return -EBADMSG;
933 if (ret)
934 return ret;
936 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
940 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
941 * @param mtd MTD device structure
942 * @param from offset to read from
943 * @param ops: oob operation description structure
945 * OneNAND read out-of-band data from the spare area
947 static int onenand_do_read_oob(struct mtd_info *mtd, loff_t from,
948 struct mtd_oob_ops *ops)
950 struct onenand_chip *this = mtd->priv;
951 int read = 0, thislen, column, oobsize;
952 size_t len = ops->ooblen;
953 mtd_oob_mode_t mode = ops->mode;
954 u_char *buf = ops->oobbuf;
955 int ret = 0;
957 from += ops->ooboffs;
959 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
961 /* Initialize return length value */
962 ops->oobretlen = 0;
964 if (mode == MTD_OOB_AUTO)
965 oobsize = this->ecclayout->oobavail;
966 else
967 oobsize = mtd->oobsize;
969 column = from & (mtd->oobsize - 1);
971 if (unlikely(column >= oobsize)) {
972 printk(KERN_ERR "onenand_read_oob: Attempted to start read outside oob\n");
973 return -EINVAL;
976 /* Do not allow reads past end of device */
977 if (unlikely(from >= mtd->size ||
978 column + len > ((mtd->size >> this->page_shift) -
979 (from >> this->page_shift)) * oobsize)) {
980 printk(KERN_ERR "onenand_read_oob: Attempted to read beyond end of device\n");
981 return -EINVAL;
984 /* Grab the lock and see if the device is available */
985 onenand_get_device(mtd, FL_READING);
987 while (read < len) {
988 cond_resched();
990 thislen = oobsize - column;
991 thislen = min_t(int, thislen, len);
993 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
995 onenand_update_bufferram(mtd, from, 0);
997 ret = this->wait(mtd, FL_READING);
998 /* First copy data and check return value for ECC handling */
1000 if (mode == MTD_OOB_AUTO)
1001 onenand_transfer_auto_oob(mtd, buf, column, thislen);
1002 else
1003 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1005 if (ret) {
1006 printk(KERN_ERR "onenand_read_oob: read failed = 0x%x\n", ret);
1007 break;
1010 read += thislen;
1012 if (read == len)
1013 break;
1015 buf += thislen;
1017 /* Read more? */
1018 if (read < len) {
1019 /* Page size */
1020 from += mtd->writesize;
1021 column = 0;
1025 /* Deselect and wake up anyone waiting on the device */
1026 onenand_release_device(mtd);
1028 ops->oobretlen = read;
1029 return ret;
1033 * onenand_read - [MTD Interface] Read data from flash
1034 * @param mtd MTD device structure
1035 * @param from offset to read from
1036 * @param len number of bytes to read
1037 * @param retlen pointer to variable to store the number of read bytes
1038 * @param buf the databuffer to put data
1040 * Read with ecc
1042 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
1043 size_t *retlen, u_char *buf)
1045 struct mtd_oob_ops ops = {
1046 .len = len,
1047 .ooblen = 0,
1048 .datbuf = buf,
1049 .oobbuf = NULL,
1051 int ret;
1053 ret = onenand_read_ops(mtd, from, &ops);
1054 *retlen = ops.retlen;
1056 return ret;
1060 * onenand_read_oob - [MTD Interface] Read main and/or out-of-band
1061 * @param mtd: MTD device structure
1062 * @param from: offset to read from
1063 * @param ops: oob operation description structure
1065 * Read main and/or out-of-band
1067 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
1068 struct mtd_oob_ops *ops)
1070 switch (ops->mode) {
1071 case MTD_OOB_PLACE:
1072 case MTD_OOB_AUTO:
1073 break;
1074 case MTD_OOB_RAW:
1075 /* Not implemented yet */
1076 default:
1077 return -EINVAL;
1080 if (ops->datbuf)
1081 return onenand_read_ops(mtd, from, ops);
1083 return onenand_do_read_oob(mtd, from, ops);
1087 * onenand_bbt_wait - [DEFAULT] wait until the command is done
1088 * @param mtd MTD device structure
1089 * @param state state to select the max. timeout value
1091 * Wait for command done.
1093 static int onenand_bbt_wait(struct mtd_info *mtd, int state)
1095 struct onenand_chip *this = mtd->priv;
1096 unsigned long timeout;
1097 unsigned int interrupt;
1098 unsigned int ctrl;
1100 /* The 20 msec is enough */
1101 timeout = jiffies + msecs_to_jiffies(20);
1102 while (time_before(jiffies, timeout)) {
1103 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1104 if (interrupt & ONENAND_INT_MASTER)
1105 break;
1107 /* To get correct interrupt status in timeout case */
1108 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
1109 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
1111 if (ctrl & ONENAND_CTRL_ERROR) {
1112 printk(KERN_DEBUG "onenand_bbt_wait: controller error = 0x%04x\n", ctrl);
1113 /* Initial bad block case */
1114 if (ctrl & ONENAND_CTRL_LOAD)
1115 return ONENAND_BBT_READ_ERROR;
1116 return ONENAND_BBT_READ_FATAL_ERROR;
1119 if (interrupt & ONENAND_INT_READ) {
1120 int ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
1121 if (ecc & ONENAND_ECC_2BIT_ALL)
1122 return ONENAND_BBT_READ_ERROR;
1123 } else {
1124 printk(KERN_ERR "onenand_bbt_wait: read timeout!"
1125 "ctrl=0x%04x intr=0x%04x\n", ctrl, interrupt);
1126 return ONENAND_BBT_READ_FATAL_ERROR;
1129 return 0;
1133 * onenand_bbt_read_oob - [MTD Interface] OneNAND read out-of-band for bbt scan
1134 * @param mtd MTD device structure
1135 * @param from offset to read from
1136 * @param ops oob operation description structure
1138 * OneNAND read out-of-band data from the spare area for bbt scan
1140 int onenand_bbt_read_oob(struct mtd_info *mtd, loff_t from,
1141 struct mtd_oob_ops *ops)
1143 struct onenand_chip *this = mtd->priv;
1144 int read = 0, thislen, column;
1145 int ret = 0;
1146 size_t len = ops->ooblen;
1147 u_char *buf = ops->oobbuf;
1149 DEBUG(MTD_DEBUG_LEVEL3, "onenand_bbt_read_oob: from = 0x%08x, len = %zi\n", (unsigned int) from, len);
1151 /* Initialize return value */
1152 ops->oobretlen = 0;
1154 /* Do not allow reads past end of device */
1155 if (unlikely((from + len) > mtd->size)) {
1156 printk(KERN_ERR "onenand_bbt_read_oob: Attempt read beyond end of device\n");
1157 return ONENAND_BBT_READ_FATAL_ERROR;
1160 /* Grab the lock and see if the device is available */
1161 onenand_get_device(mtd, FL_READING);
1163 column = from & (mtd->oobsize - 1);
1165 while (read < len) {
1166 cond_resched();
1168 thislen = mtd->oobsize - column;
1169 thislen = min_t(int, thislen, len);
1171 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
1173 onenand_update_bufferram(mtd, from, 0);
1175 ret = onenand_bbt_wait(mtd, FL_READING);
1176 if (ret)
1177 break;
1179 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
1180 read += thislen;
1181 if (read == len)
1182 break;
1184 buf += thislen;
1186 /* Read more? */
1187 if (read < len) {
1188 /* Update Page size */
1189 from += this->writesize;
1190 column = 0;
1194 /* Deselect and wake up anyone waiting on the device */
1195 onenand_release_device(mtd);
1197 ops->oobretlen = read;
1198 return ret;
1201 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
1203 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
1204 * @param mtd MTD device structure
1205 * @param buf the databuffer to verify
1206 * @param to offset to read from
1208 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to)
1210 struct onenand_chip *this = mtd->priv;
1211 char oobbuf[64];
1212 int status, i;
1214 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
1215 onenand_update_bufferram(mtd, to, 0);
1216 status = this->wait(mtd, FL_READING);
1217 if (status)
1218 return status;
1220 this->read_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1221 for (i = 0; i < mtd->oobsize; i++)
1222 if (buf[i] != 0xFF && buf[i] != oobbuf[i])
1223 return -EBADMSG;
1225 return 0;
1229 * onenand_verify - [GENERIC] verify the chip contents after a write
1230 * @param mtd MTD device structure
1231 * @param buf the databuffer to verify
1232 * @param addr offset to read from
1233 * @param len number of bytes to read and compare
1235 static int onenand_verify(struct mtd_info *mtd, const u_char *buf, loff_t addr, size_t len)
1237 struct onenand_chip *this = mtd->priv;
1238 void __iomem *dataram;
1239 int ret = 0;
1240 int thislen, column;
1242 while (len != 0) {
1243 thislen = min_t(int, this->writesize, len);
1244 column = addr & (this->writesize - 1);
1245 if (column + thislen > this->writesize)
1246 thislen = this->writesize - column;
1248 this->command(mtd, ONENAND_CMD_READ, addr, this->writesize);
1250 onenand_update_bufferram(mtd, addr, 0);
1252 ret = this->wait(mtd, FL_READING);
1253 if (ret)
1254 return ret;
1256 onenand_update_bufferram(mtd, addr, 1);
1258 dataram = this->base + ONENAND_DATARAM;
1259 dataram += onenand_bufferram_offset(mtd, ONENAND_DATARAM);
1261 if (memcmp(buf, dataram + column, thislen))
1262 return -EBADMSG;
1264 len -= thislen;
1265 buf += thislen;
1266 addr += thislen;
1269 return 0;
1271 #else
1272 #define onenand_verify(...) (0)
1273 #define onenand_verify_oob(...) (0)
1274 #endif
1276 #define NOTALIGNED(x) ((x & (this->subpagesize - 1)) != 0)
1279 * onenand_fill_auto_oob - [Internal] oob auto-placement transfer
1280 * @param mtd MTD device structure
1281 * @param oob_buf oob buffer
1282 * @param buf source address
1283 * @param column oob offset to write to
1284 * @param thislen oob length to write
1286 static int onenand_fill_auto_oob(struct mtd_info *mtd, u_char *oob_buf,
1287 const u_char *buf, int column, int thislen)
1289 struct onenand_chip *this = mtd->priv;
1290 struct nand_oobfree *free;
1291 int writecol = column;
1292 int writeend = column + thislen;
1293 int lastgap = 0;
1294 unsigned int i;
1296 free = this->ecclayout->oobfree;
1297 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1298 if (writecol >= lastgap)
1299 writecol += free->offset - lastgap;
1300 if (writeend >= lastgap)
1301 writeend += free->offset - lastgap;
1302 lastgap = free->offset + free->length;
1304 free = this->ecclayout->oobfree;
1305 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES && free->length; i++, free++) {
1306 int free_end = free->offset + free->length;
1307 if (free->offset < writeend && free_end > writecol) {
1308 int st = max_t(int,free->offset,writecol);
1309 int ed = min_t(int,free_end,writeend);
1310 int n = ed - st;
1311 memcpy(oob_buf + st, buf, n);
1312 buf += n;
1313 } else if (column == 0)
1314 break;
1316 return 0;
1320 * onenand_write_ops - [OneNAND Interface] write main and/or out-of-band
1321 * @param mtd MTD device structure
1322 * @param to offset to write to
1323 * @param ops oob operation description structure
1325 * Write main and/or oob with ECC
1327 static int onenand_write_ops(struct mtd_info *mtd, loff_t to,
1328 struct mtd_oob_ops *ops)
1330 struct onenand_chip *this = mtd->priv;
1331 int written = 0, column, thislen, subpage;
1332 int oobwritten = 0, oobcolumn, thisooblen, oobsize;
1333 size_t len = ops->len;
1334 size_t ooblen = ops->ooblen;
1335 const u_char *buf = ops->datbuf;
1336 const u_char *oob = ops->oobbuf;
1337 u_char *oobbuf;
1338 int ret = 0;
1340 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1342 /* Initialize retlen, in case of early exit */
1343 ops->retlen = 0;
1344 ops->oobretlen = 0;
1346 /* Do not allow writes past end of device */
1347 if (unlikely((to + len) > mtd->size)) {
1348 printk(KERN_ERR "onenand_write: Attempt write to past end of device\n");
1349 return -EINVAL;
1352 /* Reject writes, which are not page aligned */
1353 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
1354 printk(KERN_ERR "onenand_write: Attempt to write not page aligned data\n");
1355 return -EINVAL;
1358 if (ops->mode == MTD_OOB_AUTO)
1359 oobsize = this->ecclayout->oobavail;
1360 else
1361 oobsize = mtd->oobsize;
1363 oobcolumn = to & (mtd->oobsize - 1);
1365 column = to & (mtd->writesize - 1);
1367 /* Grab the lock and see if the device is available */
1368 onenand_get_device(mtd, FL_WRITING);
1370 /* Loop until all data write */
1371 while (written < len) {
1372 u_char *wbuf = (u_char *) buf;
1374 thislen = min_t(int, mtd->writesize - column, len - written);
1375 thisooblen = min_t(int, oobsize - oobcolumn, ooblen - oobwritten);
1377 cond_resched();
1379 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, thislen);
1381 /* Partial page write */
1382 subpage = thislen < mtd->writesize;
1383 if (subpage) {
1384 memset(this->page_buf, 0xff, mtd->writesize);
1385 memcpy(this->page_buf + column, buf, thislen);
1386 wbuf = this->page_buf;
1389 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, mtd->writesize);
1391 if (oob) {
1392 oobbuf = this->oob_buf;
1394 /* We send data to spare ram with oobsize
1395 * to prevent byte access */
1396 memset(oobbuf, 0xff, mtd->oobsize);
1397 if (ops->mode == MTD_OOB_AUTO)
1398 onenand_fill_auto_oob(mtd, oobbuf, oob, oobcolumn, thisooblen);
1399 else
1400 memcpy(oobbuf + oobcolumn, oob, thisooblen);
1402 oobwritten += thisooblen;
1403 oob += thisooblen;
1404 oobcolumn = 0;
1405 } else
1406 oobbuf = (u_char *) ffchars;
1408 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1410 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1412 ret = this->wait(mtd, FL_WRITING);
1414 /* In partial page write we don't update bufferram */
1415 onenand_update_bufferram(mtd, to, !ret && !subpage);
1416 if (ONENAND_IS_2PLANE(this)) {
1417 ONENAND_SET_BUFFERRAM1(this);
1418 onenand_update_bufferram(mtd, to + this->writesize, !ret && !subpage);
1421 if (ret) {
1422 printk(KERN_ERR "onenand_write: write filaed %d\n", ret);
1423 break;
1426 /* Only check verify write turn on */
1427 ret = onenand_verify(mtd, (u_char *) wbuf, to, thislen);
1428 if (ret) {
1429 printk(KERN_ERR "onenand_write: verify failed %d\n", ret);
1430 break;
1433 written += thislen;
1435 if (written == len)
1436 break;
1438 column = 0;
1439 to += thislen;
1440 buf += thislen;
1443 /* Deselect and wake up anyone waiting on the device */
1444 onenand_release_device(mtd);
1446 ops->retlen = written;
1448 return ret;
1453 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1454 * @param mtd MTD device structure
1455 * @param to offset to write to
1456 * @param len number of bytes to write
1457 * @param retlen pointer to variable to store the number of written bytes
1458 * @param buf the data to write
1459 * @param mode operation mode
1461 * OneNAND write out-of-band
1463 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to,
1464 struct mtd_oob_ops *ops)
1466 struct onenand_chip *this = mtd->priv;
1467 int column, ret = 0, oobsize;
1468 int written = 0;
1469 u_char *oobbuf;
1470 size_t len = ops->ooblen;
1471 const u_char *buf = ops->oobbuf;
1472 mtd_oob_mode_t mode = ops->mode;
1474 to += ops->ooboffs;
1476 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1478 /* Initialize retlen, in case of early exit */
1479 ops->oobretlen = 0;
1481 if (mode == MTD_OOB_AUTO)
1482 oobsize = this->ecclayout->oobavail;
1483 else
1484 oobsize = mtd->oobsize;
1486 column = to & (mtd->oobsize - 1);
1488 if (unlikely(column >= oobsize)) {
1489 printk(KERN_ERR "onenand_write_oob: Attempted to start write outside oob\n");
1490 return -EINVAL;
1493 /* For compatibility with NAND: Do not allow write past end of page */
1494 if (unlikely(column + len > oobsize)) {
1495 printk(KERN_ERR "onenand_write_oob: "
1496 "Attempt to write past end of page\n");
1497 return -EINVAL;
1500 /* Do not allow reads past end of device */
1501 if (unlikely(to >= mtd->size ||
1502 column + len > ((mtd->size >> this->page_shift) -
1503 (to >> this->page_shift)) * oobsize)) {
1504 printk(KERN_ERR "onenand_write_oob: Attempted to write past end of device\n");
1505 return -EINVAL;
1508 /* Grab the lock and see if the device is available */
1509 onenand_get_device(mtd, FL_WRITING);
1511 oobbuf = this->oob_buf;
1513 /* Loop until all data write */
1514 while (written < len) {
1515 int thislen = min_t(int, oobsize, len - written);
1517 cond_resched();
1519 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1521 /* We send data to spare ram with oobsize
1522 * to prevent byte access */
1523 memset(oobbuf, 0xff, mtd->oobsize);
1524 if (mode == MTD_OOB_AUTO)
1525 onenand_fill_auto_oob(mtd, oobbuf, buf, column, thislen);
1526 else
1527 memcpy(oobbuf + column, buf, thislen);
1528 this->write_bufferram(mtd, ONENAND_SPARERAM, oobbuf, 0, mtd->oobsize);
1530 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1532 onenand_update_bufferram(mtd, to, 0);
1533 if (ONENAND_IS_2PLANE(this)) {
1534 ONENAND_SET_BUFFERRAM1(this);
1535 onenand_update_bufferram(mtd, to + this->writesize, 0);
1538 ret = this->wait(mtd, FL_WRITING);
1539 if (ret) {
1540 printk(KERN_ERR "onenand_write_oob: write failed %d\n", ret);
1541 break;
1544 ret = onenand_verify_oob(mtd, oobbuf, to);
1545 if (ret) {
1546 printk(KERN_ERR "onenand_write_oob: verify failed %d\n", ret);
1547 break;
1550 written += thislen;
1551 if (written == len)
1552 break;
1554 to += mtd->writesize;
1555 buf += thislen;
1556 column = 0;
1559 /* Deselect and wake up anyone waiting on the device */
1560 onenand_release_device(mtd);
1562 ops->oobretlen = written;
1564 return ret;
1568 * onenand_write - [MTD Interface] write buffer to FLASH
1569 * @param mtd MTD device structure
1570 * @param to offset to write to
1571 * @param len number of bytes to write
1572 * @param retlen pointer to variable to store the number of written bytes
1573 * @param buf the data to write
1575 * Write with ECC
1577 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
1578 size_t *retlen, const u_char *buf)
1580 struct mtd_oob_ops ops = {
1581 .len = len,
1582 .ooblen = 0,
1583 .datbuf = (u_char *) buf,
1584 .oobbuf = NULL,
1586 int ret;
1588 ret = onenand_write_ops(mtd, to, &ops);
1589 *retlen = ops.retlen;
1591 return ret;
1595 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1596 * @param mtd: MTD device structure
1597 * @param to: offset to write
1598 * @param ops: oob operation description structure
1600 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1601 struct mtd_oob_ops *ops)
1603 switch (ops->mode) {
1604 case MTD_OOB_PLACE:
1605 case MTD_OOB_AUTO:
1606 break;
1607 case MTD_OOB_RAW:
1608 /* Not implemented yet */
1609 default:
1610 return -EINVAL;
1613 if (ops->datbuf)
1614 return onenand_write_ops(mtd, to, ops);
1616 return onenand_do_write_oob(mtd, to, ops);
1620 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1621 * @param mtd MTD device structure
1622 * @param ofs offset from device start
1623 * @param getchip 0, if the chip is already selected
1624 * @param allowbbt 1, if its allowed to access the bbt area
1626 * Check, if the block is bad. Either by reading the bad block table or
1627 * calling of the scan function.
1629 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1631 struct onenand_chip *this = mtd->priv;
1632 struct bbm_info *bbm = this->bbm;
1634 /* Return info from the table */
1635 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1639 * onenand_erase - [MTD Interface] erase block(s)
1640 * @param mtd MTD device structure
1641 * @param instr erase instruction
1643 * Erase one ore more blocks
1645 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1647 struct onenand_chip *this = mtd->priv;
1648 unsigned int block_size;
1649 loff_t addr;
1650 int len;
1651 int ret = 0;
1653 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1655 block_size = (1 << this->erase_shift);
1657 /* Start address must align on block boundary */
1658 if (unlikely(instr->addr & (block_size - 1))) {
1659 printk(KERN_ERR "onenand_erase: Unaligned address\n");
1660 return -EINVAL;
1663 /* Length must align on block boundary */
1664 if (unlikely(instr->len & (block_size - 1))) {
1665 printk(KERN_ERR "onenand_erase: Length not block aligned\n");
1666 return -EINVAL;
1669 /* Do not allow erase past end of device */
1670 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1671 printk(KERN_ERR "onenand_erase: Erase past end of device\n");
1672 return -EINVAL;
1675 instr->fail_addr = 0xffffffff;
1677 /* Grab the lock and see if the device is available */
1678 onenand_get_device(mtd, FL_ERASING);
1680 /* Loop throught the pages */
1681 len = instr->len;
1682 addr = instr->addr;
1684 instr->state = MTD_ERASING;
1686 while (len) {
1687 cond_resched();
1689 /* Check if we have a bad block, we do not erase bad blocks */
1690 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1691 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1692 instr->state = MTD_ERASE_FAILED;
1693 goto erase_exit;
1696 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1698 onenand_invalidate_bufferram(mtd, addr, block_size);
1700 ret = this->wait(mtd, FL_ERASING);
1701 /* Check, if it is write protected */
1702 if (ret) {
1703 printk(KERN_ERR "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1704 instr->state = MTD_ERASE_FAILED;
1705 instr->fail_addr = addr;
1706 goto erase_exit;
1709 len -= block_size;
1710 addr += block_size;
1713 instr->state = MTD_ERASE_DONE;
1715 erase_exit:
1717 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1718 /* Do call back function */
1719 if (!ret)
1720 mtd_erase_callback(instr);
1722 /* Deselect and wake up anyone waiting on the device */
1723 onenand_release_device(mtd);
1725 return ret;
1729 * onenand_sync - [MTD Interface] sync
1730 * @param mtd MTD device structure
1732 * Sync is actually a wait for chip ready function
1734 static void onenand_sync(struct mtd_info *mtd)
1736 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1738 /* Grab the lock and see if the device is available */
1739 onenand_get_device(mtd, FL_SYNCING);
1741 /* Release it and go back */
1742 onenand_release_device(mtd);
1746 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1747 * @param mtd MTD device structure
1748 * @param ofs offset relative to mtd start
1750 * Check whether the block is bad
1752 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1754 /* Check for invalid offset */
1755 if (ofs > mtd->size)
1756 return -EINVAL;
1758 return onenand_block_checkbad(mtd, ofs, 1, 0);
1762 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1763 * @param mtd MTD device structure
1764 * @param ofs offset from device start
1766 * This is the default implementation, which can be overridden by
1767 * a hardware specific driver.
1769 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1771 struct onenand_chip *this = mtd->priv;
1772 struct bbm_info *bbm = this->bbm;
1773 u_char buf[2] = {0, 0};
1774 struct mtd_oob_ops ops = {
1775 .mode = MTD_OOB_PLACE,
1776 .ooblen = 2,
1777 .oobbuf = buf,
1778 .ooboffs = 0,
1780 int block;
1782 /* Get block number */
1783 block = ((int) ofs) >> bbm->bbt_erase_shift;
1784 if (bbm->bbt)
1785 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1787 /* We write two bytes, so we dont have to mess with 16 bit access */
1788 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1789 return onenand_do_write_oob(mtd, ofs, &ops);
1793 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1794 * @param mtd MTD device structure
1795 * @param ofs offset relative to mtd start
1797 * Mark the block as bad
1799 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1801 struct onenand_chip *this = mtd->priv;
1802 int ret;
1804 ret = onenand_block_isbad(mtd, ofs);
1805 if (ret) {
1806 /* If it was bad already, return success and do nothing */
1807 if (ret > 0)
1808 return 0;
1809 return ret;
1812 return this->block_markbad(mtd, ofs);
1816 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1817 * @param mtd MTD device structure
1818 * @param ofs offset relative to mtd start
1819 * @param len number of bytes to lock or unlock
1820 * @param cmd lock or unlock command
1822 * Lock or unlock one or more blocks
1824 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1826 struct onenand_chip *this = mtd->priv;
1827 int start, end, block, value, status;
1828 int wp_status_mask;
1830 start = ofs >> this->erase_shift;
1831 end = len >> this->erase_shift;
1833 if (cmd == ONENAND_CMD_LOCK)
1834 wp_status_mask = ONENAND_WP_LS;
1835 else
1836 wp_status_mask = ONENAND_WP_US;
1838 /* Continuous lock scheme */
1839 if (this->options & ONENAND_HAS_CONT_LOCK) {
1840 /* Set start block address */
1841 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1842 /* Set end block address */
1843 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1844 /* Write lock command */
1845 this->command(mtd, cmd, 0, 0);
1847 /* There's no return value */
1848 this->wait(mtd, FL_LOCKING);
1850 /* Sanity check */
1851 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1852 & ONENAND_CTRL_ONGO)
1853 continue;
1855 /* Check lock status */
1856 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1857 if (!(status & wp_status_mask))
1858 printk(KERN_ERR "wp status = 0x%x\n", status);
1860 return 0;
1863 /* Block lock scheme */
1864 for (block = start; block < start + end; block++) {
1865 /* Set block address */
1866 value = onenand_block_address(this, block);
1867 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1868 /* Select DataRAM for DDP */
1869 value = onenand_bufferram_address(this, block);
1870 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1871 /* Set start block address */
1872 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1873 /* Write lock command */
1874 this->command(mtd, cmd, 0, 0);
1876 /* There's no return value */
1877 this->wait(mtd, FL_LOCKING);
1879 /* Sanity check */
1880 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1881 & ONENAND_CTRL_ONGO)
1882 continue;
1884 /* Check lock status */
1885 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1886 if (!(status & wp_status_mask))
1887 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1890 return 0;
1894 * onenand_lock - [MTD Interface] Lock block(s)
1895 * @param mtd MTD device structure
1896 * @param ofs offset relative to mtd start
1897 * @param len number of bytes to unlock
1899 * Lock one or more blocks
1901 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1903 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1907 * onenand_unlock - [MTD Interface] Unlock block(s)
1908 * @param mtd MTD device structure
1909 * @param ofs offset relative to mtd start
1910 * @param len number of bytes to unlock
1912 * Unlock one or more blocks
1914 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1916 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1920 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1921 * @param this onenand chip data structure
1923 * Check lock status
1925 static void onenand_check_lock_status(struct onenand_chip *this)
1927 unsigned int value, block, status;
1928 unsigned int end;
1930 end = this->chipsize >> this->erase_shift;
1931 for (block = 0; block < end; block++) {
1932 /* Set block address */
1933 value = onenand_block_address(this, block);
1934 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1935 /* Select DataRAM for DDP */
1936 value = onenand_bufferram_address(this, block);
1937 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1938 /* Set start block address */
1939 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1941 /* Check lock status */
1942 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1943 if (!(status & ONENAND_WP_US))
1944 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1949 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1950 * @param mtd MTD device structure
1952 * Unlock all blocks
1954 static int onenand_unlock_all(struct mtd_info *mtd)
1956 struct onenand_chip *this = mtd->priv;
1958 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1959 /* Set start block address */
1960 this->write_word(0, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1961 /* Write unlock command */
1962 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1964 /* There's no return value */
1965 this->wait(mtd, FL_LOCKING);
1967 /* Sanity check */
1968 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1969 & ONENAND_CTRL_ONGO)
1970 continue;
1972 /* Workaround for all block unlock in DDP */
1973 if (ONENAND_IS_DDP(this)) {
1974 /* 1st block on another chip */
1975 loff_t ofs = this->chipsize >> 1;
1976 size_t len = mtd->erasesize;
1978 onenand_unlock(mtd, ofs, len);
1981 onenand_check_lock_status(this);
1983 return 0;
1986 onenand_unlock(mtd, 0x0, this->chipsize);
1988 return 0;
1991 #ifdef CONFIG_MTD_ONENAND_OTP
1993 /* Interal OTP operation */
1994 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1995 size_t *retlen, u_char *buf);
1998 * do_otp_read - [DEFAULT] Read OTP block area
1999 * @param mtd MTD device structure
2000 * @param from The offset to read
2001 * @param len number of bytes to read
2002 * @param retlen pointer to variable to store the number of readbytes
2003 * @param buf the databuffer to put/get data
2005 * Read OTP block area.
2007 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
2008 size_t *retlen, u_char *buf)
2010 struct onenand_chip *this = mtd->priv;
2011 int ret;
2013 /* Enter OTP access mode */
2014 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2015 this->wait(mtd, FL_OTPING);
2017 ret = mtd->read(mtd, from, len, retlen, buf);
2019 /* Exit OTP access mode */
2020 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2021 this->wait(mtd, FL_RESETING);
2023 return ret;
2027 * do_otp_write - [DEFAULT] Write OTP block area
2028 * @param mtd MTD device structure
2029 * @param from The offset to write
2030 * @param len number of bytes to write
2031 * @param retlen pointer to variable to store the number of write bytes
2032 * @param buf the databuffer to put/get data
2034 * Write OTP block area.
2036 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
2037 size_t *retlen, u_char *buf)
2039 struct onenand_chip *this = mtd->priv;
2040 unsigned char *pbuf = buf;
2041 int ret;
2043 /* Force buffer page aligned */
2044 if (len < mtd->writesize) {
2045 memcpy(this->page_buf, buf, len);
2046 memset(this->page_buf + len, 0xff, mtd->writesize - len);
2047 pbuf = this->page_buf;
2048 len = mtd->writesize;
2051 /* Enter OTP access mode */
2052 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2053 this->wait(mtd, FL_OTPING);
2055 ret = mtd->write(mtd, from, len, retlen, pbuf);
2057 /* Exit OTP access mode */
2058 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2059 this->wait(mtd, FL_RESETING);
2061 return ret;
2065 * do_otp_lock - [DEFAULT] Lock OTP block area
2066 * @param mtd MTD device structure
2067 * @param from The offset to lock
2068 * @param len number of bytes to lock
2069 * @param retlen pointer to variable to store the number of lock bytes
2070 * @param buf the databuffer to put/get data
2072 * Lock OTP block area.
2074 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
2075 size_t *retlen, u_char *buf)
2077 struct onenand_chip *this = mtd->priv;
2078 struct mtd_oob_ops ops = {
2079 .mode = MTD_OOB_PLACE,
2080 .ooblen = len,
2081 .oobbuf = buf,
2082 .ooboffs = 0,
2084 int ret;
2086 /* Enter OTP access mode */
2087 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
2088 this->wait(mtd, FL_OTPING);
2090 ret = onenand_do_write_oob(mtd, from, &ops);
2092 *retlen = ops.oobretlen;
2094 /* Exit OTP access mode */
2095 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
2096 this->wait(mtd, FL_RESETING);
2098 return ret;
2102 * onenand_otp_walk - [DEFAULT] Handle OTP operation
2103 * @param mtd MTD device structure
2104 * @param from The offset to read/write
2105 * @param len number of bytes to read/write
2106 * @param retlen pointer to variable to store the number of read bytes
2107 * @param buf the databuffer to put/get data
2108 * @param action do given action
2109 * @param mode specify user and factory
2111 * Handle OTP operation.
2113 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2114 size_t *retlen, u_char *buf,
2115 otp_op_t action, int mode)
2117 struct onenand_chip *this = mtd->priv;
2118 int otp_pages;
2119 int density;
2120 int ret = 0;
2122 *retlen = 0;
2124 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2125 if (density < ONENAND_DEVICE_DENSITY_512Mb)
2126 otp_pages = 20;
2127 else
2128 otp_pages = 10;
2130 if (mode == MTD_OTP_FACTORY) {
2131 from += mtd->writesize * otp_pages;
2132 otp_pages = 64 - otp_pages;
2135 /* Check User/Factory boundary */
2136 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
2137 return 0;
2139 while (len > 0 && otp_pages > 0) {
2140 if (!action) { /* OTP Info functions */
2141 struct otp_info *otpinfo;
2143 len -= sizeof(struct otp_info);
2144 if (len <= 0)
2145 return -ENOSPC;
2147 otpinfo = (struct otp_info *) buf;
2148 otpinfo->start = from;
2149 otpinfo->length = mtd->writesize;
2150 otpinfo->locked = 0;
2152 from += mtd->writesize;
2153 buf += sizeof(struct otp_info);
2154 *retlen += sizeof(struct otp_info);
2155 } else {
2156 size_t tmp_retlen;
2157 int size = len;
2159 ret = action(mtd, from, len, &tmp_retlen, buf);
2161 buf += size;
2162 len -= size;
2163 *retlen += size;
2165 if (ret < 0)
2166 return ret;
2168 otp_pages--;
2171 return 0;
2175 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
2176 * @param mtd MTD device structure
2177 * @param buf the databuffer to put/get data
2178 * @param len number of bytes to read
2180 * Read factory OTP info.
2182 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
2183 struct otp_info *buf, size_t len)
2185 size_t retlen;
2186 int ret;
2188 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
2190 return ret ? : retlen;
2194 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
2195 * @param mtd MTD device structure
2196 * @param from The offset to read
2197 * @param len number of bytes to read
2198 * @param retlen pointer to variable to store the number of read bytes
2199 * @param buf the databuffer to put/get data
2201 * Read factory OTP area.
2203 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2204 size_t len, size_t *retlen, u_char *buf)
2206 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
2210 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
2211 * @param mtd MTD device structure
2212 * @param buf the databuffer to put/get data
2213 * @param len number of bytes to read
2215 * Read user OTP info.
2217 static int onenand_get_user_prot_info(struct mtd_info *mtd,
2218 struct otp_info *buf, size_t len)
2220 size_t retlen;
2221 int ret;
2223 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
2225 return ret ? : retlen;
2229 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
2230 * @param mtd MTD device structure
2231 * @param from The offset to read
2232 * @param len number of bytes to read
2233 * @param retlen pointer to variable to store the number of read bytes
2234 * @param buf the databuffer to put/get data
2236 * Read user OTP area.
2238 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2239 size_t len, size_t *retlen, u_char *buf)
2241 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
2245 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
2246 * @param mtd MTD device structure
2247 * @param from The offset to write
2248 * @param len number of bytes to write
2249 * @param retlen pointer to variable to store the number of write bytes
2250 * @param buf the databuffer to put/get data
2252 * Write user OTP area.
2254 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2255 size_t len, size_t *retlen, u_char *buf)
2257 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
2261 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
2262 * @param mtd MTD device structure
2263 * @param from The offset to lock
2264 * @param len number of bytes to unlock
2266 * Write lock mark on spare area in page 0 in OTP block
2268 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
2269 size_t len)
2271 unsigned char oob_buf[64];
2272 size_t retlen;
2273 int ret;
2275 memset(oob_buf, 0xff, mtd->oobsize);
2277 * Note: OTP lock operation
2278 * OTP block : 0xXXFC
2279 * 1st block : 0xXXF3 (If chip support)
2280 * Both : 0xXXF0 (If chip support)
2282 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
2285 * Write lock mark to 8th word of sector0 of page0 of the spare0.
2286 * We write 16 bytes spare area instead of 2 bytes.
2288 from = 0;
2289 len = 16;
2291 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
2293 return ret ? : retlen;
2295 #endif /* CONFIG_MTD_ONENAND_OTP */
2298 * onenand_check_features - Check and set OneNAND features
2299 * @param mtd MTD data structure
2301 * Check and set OneNAND features
2302 * - lock scheme
2303 * - two plane
2305 static void onenand_check_features(struct mtd_info *mtd)
2307 struct onenand_chip *this = mtd->priv;
2308 unsigned int density, process;
2310 /* Lock scheme depends on density and process */
2311 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2312 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
2314 /* Lock scheme */
2315 switch (density) {
2316 case ONENAND_DEVICE_DENSITY_4Gb:
2317 this->options |= ONENAND_HAS_2PLANE;
2319 case ONENAND_DEVICE_DENSITY_2Gb:
2320 /* 2Gb DDP don't have 2 plane */
2321 if (!ONENAND_IS_DDP(this))
2322 this->options |= ONENAND_HAS_2PLANE;
2323 this->options |= ONENAND_HAS_UNLOCK_ALL;
2325 case ONENAND_DEVICE_DENSITY_1Gb:
2326 /* A-Die has all block unlock */
2327 if (process)
2328 this->options |= ONENAND_HAS_UNLOCK_ALL;
2329 break;
2331 default:
2332 /* Some OneNAND has continuous lock scheme */
2333 if (!process)
2334 this->options |= ONENAND_HAS_CONT_LOCK;
2335 break;
2338 if (this->options & ONENAND_HAS_CONT_LOCK)
2339 printk(KERN_DEBUG "Lock scheme is Continuous Lock\n");
2340 if (this->options & ONENAND_HAS_UNLOCK_ALL)
2341 printk(KERN_DEBUG "Chip support all block unlock\n");
2342 if (this->options & ONENAND_HAS_2PLANE)
2343 printk(KERN_DEBUG "Chip has 2 plane\n");
2347 * onenand_print_device_info - Print device & version ID
2348 * @param device device ID
2349 * @param version version ID
2351 * Print device & version ID
2353 static void onenand_print_device_info(int device, int version)
2355 int vcc, demuxed, ddp, density;
2357 vcc = device & ONENAND_DEVICE_VCC_MASK;
2358 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
2359 ddp = device & ONENAND_DEVICE_IS_DDP;
2360 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
2361 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
2362 demuxed ? "" : "Muxed ",
2363 ddp ? "(DDP)" : "",
2364 (16 << density),
2365 vcc ? "2.65/3.3" : "1.8",
2366 device);
2367 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
2370 static const struct onenand_manufacturers onenand_manuf_ids[] = {
2371 {ONENAND_MFR_SAMSUNG, "Samsung"},
2375 * onenand_check_maf - Check manufacturer ID
2376 * @param manuf manufacturer ID
2378 * Check manufacturer ID
2380 static int onenand_check_maf(int manuf)
2382 int size = ARRAY_SIZE(onenand_manuf_ids);
2383 char *name;
2384 int i;
2386 for (i = 0; i < size; i++)
2387 if (manuf == onenand_manuf_ids[i].id)
2388 break;
2390 if (i < size)
2391 name = onenand_manuf_ids[i].name;
2392 else
2393 name = "Unknown";
2395 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
2397 return (i == size);
2401 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
2402 * @param mtd MTD device structure
2404 * OneNAND detection method:
2405 * Compare the values from command with ones from register
2407 static int onenand_probe(struct mtd_info *mtd)
2409 struct onenand_chip *this = mtd->priv;
2410 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
2411 int density;
2412 int syscfg;
2414 /* Save system configuration 1 */
2415 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
2416 /* Clear Sync. Burst Read mode to read BootRAM */
2417 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
2419 /* Send the command for reading device ID from BootRAM */
2420 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
2422 /* Read manufacturer and device IDs from BootRAM */
2423 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
2424 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
2426 /* Reset OneNAND to read default register values */
2427 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
2428 /* Wait reset */
2429 this->wait(mtd, FL_RESETING);
2431 /* Restore system configuration 1 */
2432 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
2434 /* Check manufacturer ID */
2435 if (onenand_check_maf(bram_maf_id))
2436 return -ENXIO;
2438 /* Read manufacturer and device IDs from Register */
2439 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
2440 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
2441 ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
2443 /* Check OneNAND device */
2444 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
2445 return -ENXIO;
2447 /* Flash device information */
2448 onenand_print_device_info(dev_id, ver_id);
2449 this->device_id = dev_id;
2450 this->version_id = ver_id;
2452 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
2453 this->chipsize = (16 << density) << 20;
2454 /* Set density mask. it is used for DDP */
2455 if (ONENAND_IS_DDP(this))
2456 this->density_mask = (1 << (density + 6));
2457 else
2458 this->density_mask = 0;
2460 /* OneNAND page size & block size */
2461 /* The data buffer size is equal to page size */
2462 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
2463 mtd->oobsize = mtd->writesize >> 5;
2464 /* Pages per a block are always 64 in OneNAND */
2465 mtd->erasesize = mtd->writesize << 6;
2467 this->erase_shift = ffs(mtd->erasesize) - 1;
2468 this->page_shift = ffs(mtd->writesize) - 1;
2469 this->page_mask = (1 << (this->erase_shift - this->page_shift)) - 1;
2470 /* It's real page size */
2471 this->writesize = mtd->writesize;
2473 /* REVIST: Multichip handling */
2475 mtd->size = this->chipsize;
2477 /* Check OneNAND features */
2478 onenand_check_features(mtd);
2481 * We emulate the 4KiB page and 256KiB erase block size
2482 * But oobsize is still 64 bytes.
2483 * It is only valid if you turn on 2X program support,
2484 * Otherwise it will be ignored by compiler.
2486 if (ONENAND_IS_2PLANE(this)) {
2487 mtd->writesize <<= 1;
2488 mtd->erasesize <<= 1;
2491 return 0;
2495 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
2496 * @param mtd MTD device structure
2498 static int onenand_suspend(struct mtd_info *mtd)
2500 return onenand_get_device(mtd, FL_PM_SUSPENDED);
2504 * onenand_resume - [MTD Interface] Resume the OneNAND flash
2505 * @param mtd MTD device structure
2507 static void onenand_resume(struct mtd_info *mtd)
2509 struct onenand_chip *this = mtd->priv;
2511 if (this->state == FL_PM_SUSPENDED)
2512 onenand_release_device(mtd);
2513 else
2514 printk(KERN_ERR "resume() called for the chip which is not"
2515 "in suspended state\n");
2519 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
2520 * @param mtd MTD device structure
2521 * @param maxchips Number of chips to scan for
2523 * This fills out all the not initialized function pointers
2524 * with the defaults.
2525 * The flash ID is read and the mtd/chip structures are
2526 * filled with the appropriate values.
2528 int onenand_scan(struct mtd_info *mtd, int maxchips)
2530 int i;
2531 struct onenand_chip *this = mtd->priv;
2533 if (!this->read_word)
2534 this->read_word = onenand_readw;
2535 if (!this->write_word)
2536 this->write_word = onenand_writew;
2538 if (!this->command)
2539 this->command = onenand_command;
2540 if (!this->wait)
2541 onenand_setup_wait(mtd);
2543 if (!this->read_bufferram)
2544 this->read_bufferram = onenand_read_bufferram;
2545 if (!this->write_bufferram)
2546 this->write_bufferram = onenand_write_bufferram;
2548 if (!this->block_markbad)
2549 this->block_markbad = onenand_default_block_markbad;
2550 if (!this->scan_bbt)
2551 this->scan_bbt = onenand_default_bbt;
2553 if (onenand_probe(mtd))
2554 return -ENXIO;
2556 /* Set Sync. Burst Read after probing */
2557 if (this->mmcontrol) {
2558 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2559 this->read_bufferram = onenand_sync_read_bufferram;
2562 /* Allocate buffers, if necessary */
2563 if (!this->page_buf) {
2564 this->page_buf = kzalloc(mtd->writesize, GFP_KERNEL);
2565 if (!this->page_buf) {
2566 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2567 return -ENOMEM;
2569 this->options |= ONENAND_PAGEBUF_ALLOC;
2571 if (!this->oob_buf) {
2572 this->oob_buf = kzalloc(mtd->oobsize, GFP_KERNEL);
2573 if (!this->oob_buf) {
2574 printk(KERN_ERR "onenand_scan(): Can't allocate oob_buf\n");
2575 if (this->options & ONENAND_PAGEBUF_ALLOC) {
2576 this->options &= ~ONENAND_PAGEBUF_ALLOC;
2577 kfree(this->page_buf);
2579 return -ENOMEM;
2581 this->options |= ONENAND_OOBBUF_ALLOC;
2584 this->state = FL_READY;
2585 init_waitqueue_head(&this->wq);
2586 spin_lock_init(&this->chip_lock);
2589 * Allow subpage writes up to oobsize.
2591 switch (mtd->oobsize) {
2592 case 64:
2593 this->ecclayout = &onenand_oob_64;
2594 mtd->subpage_sft = 2;
2595 break;
2597 case 32:
2598 this->ecclayout = &onenand_oob_32;
2599 mtd->subpage_sft = 1;
2600 break;
2602 default:
2603 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2604 mtd->oobsize);
2605 mtd->subpage_sft = 0;
2606 /* To prevent kernel oops */
2607 this->ecclayout = &onenand_oob_32;
2608 break;
2611 this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2614 * The number of bytes available for a client to place data into
2615 * the out of band area
2617 this->ecclayout->oobavail = 0;
2618 for (i = 0; i < MTD_MAX_OOBFREE_ENTRIES &&
2619 this->ecclayout->oobfree[i].length; i++)
2620 this->ecclayout->oobavail +=
2621 this->ecclayout->oobfree[i].length;
2622 mtd->oobavail = this->ecclayout->oobavail;
2624 mtd->ecclayout = this->ecclayout;
2626 /* Fill in remaining MTD driver data */
2627 mtd->type = MTD_NANDFLASH;
2628 mtd->flags = MTD_CAP_NANDFLASH;
2629 mtd->erase = onenand_erase;
2630 mtd->point = NULL;
2631 mtd->unpoint = NULL;
2632 mtd->read = onenand_read;
2633 mtd->write = onenand_write;
2634 mtd->read_oob = onenand_read_oob;
2635 mtd->write_oob = onenand_write_oob;
2636 #ifdef CONFIG_MTD_ONENAND_OTP
2637 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2638 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2639 mtd->get_user_prot_info = onenand_get_user_prot_info;
2640 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2641 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2642 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2643 #endif
2644 mtd->sync = onenand_sync;
2645 mtd->lock = onenand_lock;
2646 mtd->unlock = onenand_unlock;
2647 mtd->suspend = onenand_suspend;
2648 mtd->resume = onenand_resume;
2649 mtd->block_isbad = onenand_block_isbad;
2650 mtd->block_markbad = onenand_block_markbad;
2651 mtd->owner = THIS_MODULE;
2653 /* Unlock whole block */
2654 onenand_unlock_all(mtd);
2656 return this->scan_bbt(mtd);
2660 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2661 * @param mtd MTD device structure
2663 void onenand_release(struct mtd_info *mtd)
2665 struct onenand_chip *this = mtd->priv;
2667 #ifdef CONFIG_MTD_PARTITIONS
2668 /* Deregister partitions */
2669 del_mtd_partitions (mtd);
2670 #endif
2671 /* Deregister the device */
2672 del_mtd_device (mtd);
2674 /* Free bad block table memory, if allocated */
2675 if (this->bbm) {
2676 struct bbm_info *bbm = this->bbm;
2677 kfree(bbm->bbt);
2678 kfree(this->bbm);
2680 /* Buffers allocated by onenand_scan */
2681 if (this->options & ONENAND_PAGEBUF_ALLOC)
2682 kfree(this->page_buf);
2683 if (this->options & ONENAND_OOBBUF_ALLOC)
2684 kfree(this->oob_buf);
2687 EXPORT_SYMBOL_GPL(onenand_scan);
2688 EXPORT_SYMBOL_GPL(onenand_release);
2690 MODULE_LICENSE("GPL");
2691 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2692 MODULE_DESCRIPTION("Generic OneNAND flash driver code");