drivers/mfd/ucb1x00.h

   1 /*
   2  *  linux/drivers/mfd/ucb1x00.h
   3  *
   4  *  Copyright (C) 2001 Russell King, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License.
   9  */
  10 #ifndef UCB1200_H
  11 #define UCB1200_H
  12
  13 #define UCB_IO_DATA     0x00
  14 #define UCB_IO_DIR      0x01
  15
  16 #define UCB_IO_0                (1 << 0)
  17 #define UCB_IO_1                (1 << 1)
  18 #define UCB_IO_2                (1 << 2)
  19 #define UCB_IO_3                (1 << 3)
  20 #define UCB_IO_4                (1 << 4)
  21 #define UCB_IO_5                (1 << 5)
  22 #define UCB_IO_6                (1 << 6)
  23 #define UCB_IO_7                (1 << 7)
  24 #define UCB_IO_8                (1 << 8)
  25 #define UCB_IO_9                (1 << 9)
  26
  27 #define UCB_IE_RIS      0x02
  28 #define UCB_IE_FAL      0x03
  29 #define UCB_IE_STATUS   0x04
  30 #define UCB_IE_CLEAR    0x04
  31 #define UCB_IE_ADC              (1 << 11)
  32 #define UCB_IE_TSPX             (1 << 12)
  33 #define UCB_IE_TSMX             (1 << 13)
  34 #define UCB_IE_TCLIP            (1 << 14)
  35 #define UCB_IE_ACLIP            (1 << 15)
  36
  37 #define UCB_IRQ_TSPX            12
  38
  39 #define UCB_TC_A        0x05
  40 #define UCB_TC_A_LOOP           (1 << 7)        /* UCB1200 */
  41 #define UCB_TC_A_AMPL           (1 << 7)        /* UCB1300 */
  42
  43 #define UCB_TC_B        0x06
  44 #define UCB_TC_B_VOICE_ENA      (1 << 3)
  45 #define UCB_TC_B_CLIP           (1 << 4)
  46 #define UCB_TC_B_ATT            (1 << 6)
  47 #define UCB_TC_B_SIDE_ENA       (1 << 11)
  48 #define UCB_TC_B_MUTE           (1 << 13)
  49 #define UCB_TC_B_IN_ENA         (1 << 14)
  50 #define UCB_TC_B_OUT_ENA        (1 << 15)
  51
  52 #define UCB_AC_A        0x07
  53 #define UCB_AC_B        0x08
  54 #define UCB_AC_B_LOOP           (1 << 8)
  55 #define UCB_AC_B_MUTE           (1 << 13)
  56 #define UCB_AC_B_IN_ENA         (1 << 14)
  57 #define UCB_AC_B_OUT_ENA        (1 << 15)
  58
  59 #define UCB_TS_CR       0x09
  60 #define UCB_TS_CR_TSMX_POW      (1 << 0)
  61 #define UCB_TS_CR_TSPX_POW      (1 << 1)
  62 #define UCB_TS_CR_TSMY_POW      (1 << 2)
  63 #define UCB_TS_CR_TSPY_POW      (1 << 3)
  64 #define UCB_TS_CR_TSMX_GND      (1 << 4)
  65 #define UCB_TS_CR_TSPX_GND      (1 << 5)
  66 #define UCB_TS_CR_TSMY_GND      (1 << 6)
  67 #define UCB_TS_CR_TSPY_GND      (1 << 7)
  68 #define UCB_TS_CR_MODE_INT      (0 << 8)
  69 #define UCB_TS_CR_MODE_PRES     (1 << 8)
  70 #define UCB_TS_CR_MODE_POS      (2 << 8)
  71 #define UCB_TS_CR_BIAS_ENA      (1 << 11)
  72 #define UCB_TS_CR_TSPX_LOW      (1 << 12)
  73 #define UCB_TS_CR_TSMX_LOW      (1 << 13)
  74
  75 #define UCB_ADC_CR      0x0a
  76 #define UCB_ADC_SYNC_ENA        (1 << 0)
  77 #define UCB_ADC_VREFBYP_CON     (1 << 1)
  78 #define UCB_ADC_INP_TSPX        (0 << 2)
  79 #define UCB_ADC_INP_TSMX        (1 << 2)
  80 #define UCB_ADC_INP_TSPY        (2 << 2)
  81 #define UCB_ADC_INP_TSMY        (3 << 2)
  82 #define UCB_ADC_INP_AD0         (4 << 2)
  83 #define UCB_ADC_INP_AD1         (5 << 2)
  84 #define UCB_ADC_INP_AD2         (6 << 2)
  85 #define UCB_ADC_INP_AD3         (7 << 2)
  86 #define UCB_ADC_EXT_REF         (1 << 5)
  87 #define UCB_ADC_START           (1 << 7)
  88 #define UCB_ADC_ENA             (1 << 15)
  89
  90 #define UCB_ADC_DATA    0x0b
  91 #define UCB_ADC_DAT_VAL         (1 << 15)
  92 #define UCB_ADC_DAT(x)          (((x) & 0x7fe0) >> 5)
  93
  94 #define UCB_ID          0x0c
  95 #define UCB_ID_1200             0x1004
  96 #define UCB_ID_1300             0x1005
  97 #define UCB_ID_TC35143          0x9712
  98
  99 #define UCB_MODE        0x0d
 100 #define UCB_MODE_DYN_VFLAG_ENA  (1 << 12)
 101 #define UCB_MODE_AUD_OFF_CAN    (1 << 13)
 102
 103 #include "mcp.h"
 104
 105 struct ucb1x00_irq {
 106         void *devid;
 107         void (*fn)(int, void *);
 108 };
 109
 110 struct ucb1x00 {
 111         spinlock_t              lock;
 112         struct mcp              *mcp;
 113         unsigned int            irq;
 114         struct semaphore        adc_sem;
 115         spinlock_t              io_lock;
 116         u16                     id;
 117         u16                     io_dir;
 118         u16                     io_out;
 119         u16                     adc_cr;
 120         u16                     irq_fal_enbl;
 121         u16                     irq_ris_enbl;
 122         struct ucb1x00_irq      irq_handler[16];
 123         struct class_device     cdev;
 124         struct list_head        node;
 125         struct list_head        devs;
 126 };
 127
 128 struct ucb1x00_driver;
 129
 130 struct ucb1x00_dev {
 131         struct list_head        dev_node;
 132         struct list_head        drv_node;
 133         struct ucb1x00          *ucb;
 134         struct ucb1x00_driver   *drv;
 135         void                    *priv;
 136 };
 137
 138 struct ucb1x00_driver {
 139         struct list_head        node;
 140         struct list_head        devs;
 141         int     (*add)(struct ucb1x00_dev *dev);
 142         void    (*remove)(struct ucb1x00_dev *dev);
 143         int     (*suspend)(struct ucb1x00_dev *dev, pm_message_t state);
 144         int     (*resume)(struct ucb1x00_dev *dev);
 145 };
 146
 147 #define classdev_to_ucb1x00(cd) container_of(cd, struct ucb1x00, cdev)
 148
 149 int ucb1x00_register_driver(struct ucb1x00_driver *);
 150 void ucb1x00_unregister_driver(struct ucb1x00_driver *);
 151
 152 /**
 153  *      ucb1x00_clkrate - return the UCB1x00 SIB clock rate
 154  *      @ucb: UCB1x00 structure describing chip
 155  *
 156  *      Return the SIB clock rate in Hz.
 157  */
 158 static inline unsigned int ucb1x00_clkrate(struct ucb1x00 *ucb)
 159 {
 160         return mcp_get_sclk_rate(ucb->mcp);
 161 }
 162
 163 /**
 164  *      ucb1x00_enable - enable the UCB1x00 SIB clock
 165  *      @ucb: UCB1x00 structure describing chip
 166  *
 167  *      Enable the SIB clock.  This can be called multiple times.
 168  */
 169 static inline void ucb1x00_enable(struct ucb1x00 *ucb)
 170 {
 171         mcp_enable(ucb->mcp);
 172 }
 173
 174 /**
 175  *      ucb1x00_disable - disable the UCB1x00 SIB clock
 176  *      @ucb: UCB1x00 structure describing chip
 177  *
 178  *      Disable the SIB clock.  The SIB clock will only be disabled
 179  *      when the number of ucb1x00_enable calls match the number of
 180  *      ucb1x00_disable calls.
 181  */
 182 static inline void ucb1x00_disable(struct ucb1x00 *ucb)
 183 {
 184         mcp_disable(ucb->mcp);
 185 }
 186
 187 /**
 188  *      ucb1x00_reg_write - write a UCB1x00 register
 189  *      @ucb: UCB1x00 structure describing chip
 190  *      @reg: UCB1x00 4-bit register index to write
 191  *      @val: UCB1x00 16-bit value to write
 192  *
 193  *      Write the UCB1x00 register @reg with value @val.  The SIB
 194  *      clock must be running for this function to return.
 195  */
 196 static inline void ucb1x00_reg_write(struct ucb1x00 *ucb, unsigned int reg, unsigned int val)
 197 {
 198         mcp_reg_write(ucb->mcp, reg, val);
 199 }
 200
 201 /**
 202  *      ucb1x00_reg_read - read a UCB1x00 register
 203  *      @ucb: UCB1x00 structure describing chip
 204  *      @reg: UCB1x00 4-bit register index to write
 205  *
 206  *      Read the UCB1x00 register @reg and return its value.  The SIB
 207  *      clock must be running for this function to return.
 208  */
 209 static inline unsigned int ucb1x00_reg_read(struct ucb1x00 *ucb, unsigned int reg)
 210 {
 211         return mcp_reg_read(ucb->mcp, reg);
 212 }
 213 /**
 214  *      ucb1x00_set_audio_divisor -
 215  *      @ucb: UCB1x00 structure describing chip
 216  *      @div: SIB clock divisor
 217  */
 218 static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div)
 219 {
 220         mcp_set_audio_divisor(ucb->mcp, div);
 221 }
 222
 223 /**
 224  *      ucb1x00_set_telecom_divisor -
 225  *      @ucb: UCB1x00 structure describing chip
 226  *      @div: SIB clock divisor
 227  */
 228 static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div)
 229 {
 230         mcp_set_telecom_divisor(ucb->mcp, div);
 231 }
 232
 233 void ucb1x00_io_set_dir(struct ucb1x00 *ucb, unsigned int, unsigned int);
 234 void ucb1x00_io_write(struct ucb1x00 *ucb, unsigned int, unsigned int);
 235 unsigned int ucb1x00_io_read(struct ucb1x00 *ucb);
 236
 237 #define UCB_NOSYNC      (0)
 238 #define UCB_SYNC        (1)
 239
 240 unsigned int ucb1x00_adc_read(struct ucb1x00 *ucb, int adc_channel, int sync);
 241 void ucb1x00_adc_enable(struct ucb1x00 *ucb);
 242 void ucb1x00_adc_disable(struct ucb1x00 *ucb);
 243
 244 /*
 245  * Which edges of the IRQ do you want to control today?
 246  */
 247 #define UCB_RISING      (1 << 0)
 248 #define UCB_FALLING     (1 << 1)
 249
 250 int ucb1x00_hook_irq(struct ucb1x00 *ucb, unsigned int idx, void (*fn)(int, void *), void *devid);
 251 void ucb1x00_enable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
 252 void ucb1x00_disable_irq(struct ucb1x00 *ucb, unsigned int idx, int edges);
 253 int ucb1x00_free_irq(struct ucb1x00 *ucb, unsigned int idx, void *devid);
 254
 255 #endif