?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
epca.c: reformat comments and coding style improvements
[linux-2.6/openmoko-kernel.git] / drivers / serial / bfin_5xx.c
blob6f475b6098643751cf630dd7e26cb3294645182c
1 /*
2 * File: drivers/serial/bfin_5xx.c
3 * Based on: Based on drivers/serial/sa1100.c
4 * Author: Aubrey Li <aubrey.li@analog.com>
5 *
6 * Created:
7 * Description: Driver for blackfin 5xx serial ports
8 *
9 * Modified:
10 * Copyright 2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
31 #define SUPPORT_SYSRQ
32 #endif
33
34 #include <linux/module.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/platform_device.h>
40 #include <linux/tty.h>
41 #include <linux/tty_flip.h>
42 #include <linux/serial_core.h>
43
44 #ifdef CONFIG_KGDB_UART
45 #include <linux/kgdb.h>
46 #include <asm/irq_regs.h>
47 #endif
48
49 #include <asm/gpio.h>
50 #include <asm/mach/bfin_serial_5xx.h>
51
52 #ifdef CONFIG_SERIAL_BFIN_DMA
53 #include <linux/dma-mapping.h>
54 #include <asm/io.h>
55 #include <asm/irq.h>
56 #include <asm/cacheflush.h>
57 #endif
58
59 /* UART name and device definitions */
60 #define BFIN_SERIAL_NAME "ttyBF"
61 #define BFIN_SERIAL_MAJOR 204
62 #define BFIN_SERIAL_MINOR 64
63
64 /*
65 * Setup for console. Argument comes from the menuconfig
66 */
67 #define DMA_RX_XCOUNT 512
68 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
69
70 #define DMA_RX_FLUSH_JIFFIES 5
71
72 #ifdef CONFIG_SERIAL_BFIN_DMA
73 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
74 #else
75 static void bfin_serial_do_work(struct work_struct *work);
76 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
77 static void local_put_char(struct bfin_serial_port *uart, char ch);
78 #endif
79
80 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
81
82 /*
83 * interrupts are disabled on entry
84 */
85 static void bfin_serial_stop_tx(struct uart_port *port)
86 {
87 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
88
89 while (!(UART_GET_LSR(uart) & TEMT))
90 continue;
91
92 #ifdef CONFIG_SERIAL_BFIN_DMA
93 disable_dma(uart->tx_dma_channel);
94 #else
95 #ifdef CONFIG_BF54x
96 /* Waiting for Transmission Finished */
97 while (!(UART_GET_LSR(uart) & TFI))
98 continue;
99 /* Clear TFI bit */
100 UART_PUT_LSR(uart, TFI);
101 UART_CLEAR_IER(uart, ETBEI);
102 #else
103 unsigned short ier;
104
105 ier = UART_GET_IER(uart);
106 ier &= ~ETBEI;
107 UART_PUT_IER(uart, ier);
108 #endif
109 #endif
110 }
111
112 /*
113 * port is locked and interrupts are disabled
114 */
115 static void bfin_serial_start_tx(struct uart_port *port)
116 {
117 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
118
119 #ifdef CONFIG_SERIAL_BFIN_DMA
120 bfin_serial_dma_tx_chars(uart);
121 #else
122 #ifdef CONFIG_BF54x
123 UART_SET_IER(uart, ETBEI);
124 #else
125 unsigned short ier;
126 ier = UART_GET_IER(uart);
127 ier |= ETBEI;
128 UART_PUT_IER(uart, ier);
129 #endif
130 bfin_serial_tx_chars(uart);
131 #endif
132 }
133
134 /*
135 * Interrupts are enabled
136 */
137 static void bfin_serial_stop_rx(struct uart_port *port)
138 {
139 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
140 #ifdef CONFIG_KGDB_UART
141 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
142 #endif
143 #ifdef CONFIG_BF54x
144 UART_CLEAR_IER(uart, ERBFI);
145 #else
146 unsigned short ier;
147
148 ier = UART_GET_IER(uart);
149 ier &= ~ERBFI;
150 UART_PUT_IER(uart, ier);
151 #endif
152 #ifdef CONFIG_KGDB_UART
153 }
154 #endif
155 }
156
157 /*
158 * Set the modem control timer to fire immediately.
159 */
160 static void bfin_serial_enable_ms(struct uart_port *port)
161 {
162 }
163
164 #ifdef CONFIG_KGDB_UART
165 static int kgdb_entry_state;
166
167 void kgdb_put_debug_char(int chr)
168 {
169 struct bfin_serial_port *uart;
170
171 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
172 uart = &bfin_serial_ports[0];
173 else
174 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
175
176 while (!(UART_GET_LSR(uart) & THRE)) {
177 SSYNC();
178 }
179
180 #ifndef CONFIG_BF54x
181 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
182 SSYNC();
183 #endif
184 UART_PUT_CHAR(uart, (unsigned char)chr);
185 SSYNC();
186 }
187
188 int kgdb_get_debug_char(void)
189 {
190 struct bfin_serial_port *uart;
191 unsigned char chr;
192
193 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
194 uart = &bfin_serial_ports[0];
195 else
196 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
197
198 while(!(UART_GET_LSR(uart) & DR)) {
199 SSYNC();
200 }
201 #ifndef CONFIG_BF54x
202 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
203 SSYNC();
204 #endif
205 chr = UART_GET_CHAR(uart);
206 SSYNC();
207
208 return chr;
209 }
210 #endif
211
212 #ifdef CONFIG_SERIAL_BFIN_PIO
213 static void local_put_char(struct bfin_serial_port *uart, char ch)
214 {
215 unsigned short status;
216 int flags = 0;
217
218 spin_lock_irqsave(&uart->port.lock, flags);
219
220 do {
221 status = UART_GET_LSR(uart);
222 } while (!(status & THRE));
223
224 UART_PUT_CHAR(uart, ch);
225 SSYNC();
226
227 spin_unlock_irqrestore(&uart->port.lock, flags);
228 }
229
230 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
231 {
232 struct tty_struct *tty = uart->port.info->tty;
233 unsigned int status, ch, flg;
234 static int in_break = 0;
235 #ifdef CONFIG_KGDB_UART
236 struct pt_regs *regs = get_irq_regs();
237 #endif
238
239 status = UART_GET_LSR(uart);
240 ch = UART_GET_CHAR(uart);
241 uart->port.icount.rx++;
242
243 #ifdef CONFIG_KGDB_UART
244 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
245 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
246 kgdb_breakkey_pressed(regs);
247 return;
248 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
249 kgdb_entry_state = 1;
250 } else if (kgdb_entry_state == 1 && ch == 'q') {
251 kgdb_entry_state = 0;
252 kgdb_breakkey_pressed(regs);
253 return;
254 } else if (ch == 0x3) {/* Ctrl + C */
255 kgdb_entry_state = 0;
256 kgdb_breakkey_pressed(regs);
257 return;
258 } else {
259 kgdb_entry_state = 0;
260 }
261 }
262 #endif
263
264 if (ANOMALY_05000230) {
265 /* The BF533 family of processors have a nice misbehavior where
266 * they continuously generate characters for a "single" break.
267 * We have to basically ignore this flood until the "next" valid
268 * character comes across. All other Blackfin families operate
269 * properly though.
270 * Note: While Anomaly 05000230 does not directly address this,
271 * the changes that went in for it also fixed this issue.
272 */
273 if (in_break) {
274 if (ch != 0) {
275 in_break = 0;
276 ch = UART_GET_CHAR(uart);
277 if (bfin_revid() < 5)
278 return;
279 } else
280 return;
281 }
282 }
283
284 if (status & BI) {
285 if (ANOMALY_05000230)
286 in_break = 1;
287 uart->port.icount.brk++;
288 if (uart_handle_break(&uart->port))
289 goto ignore_char;
290 status &= ~(PE | FE);
291 }
292 if (status & PE)
293 uart->port.icount.parity++;
294 if (status & OE)
295 uart->port.icount.overrun++;
296 if (status & FE)
297 uart->port.icount.frame++;
298
299 status &= uart->port.read_status_mask;
300
301 if (status & BI)
302 flg = TTY_BREAK;
303 else if (status & PE)
304 flg = TTY_PARITY;
305 else if (status & FE)
306 flg = TTY_FRAME;
307 else
308 flg = TTY_NORMAL;
309
310 if (uart_handle_sysrq_char(&uart->port, ch))
311 goto ignore_char;
312
313 uart_insert_char(&uart->port, status, OE, ch, flg);
314
315 ignore_char:
316 tty_flip_buffer_push(tty);
317 }
318
319 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
320 {
321 struct circ_buf *xmit = &uart->port.info->xmit;
322
323 if (uart->port.x_char) {
324 UART_PUT_CHAR(uart, uart->port.x_char);
325 uart->port.icount.tx++;
326 uart->port.x_char = 0;
327 return;
328 }
329 /*
330 * Check the modem control lines before
331 * transmitting anything.
332 */
333 bfin_serial_mctrl_check(uart);
334
335 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
336 bfin_serial_stop_tx(&uart->port);
337 return;
338 }
339
340 local_put_char(uart, xmit->buf[xmit->tail]);
341 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
342 uart->port.icount.tx++;
343
344 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
345 uart_write_wakeup(&uart->port);
346
347 if (uart_circ_empty(xmit))
348 bfin_serial_stop_tx(&uart->port);
349 }
350
351 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
352 {
353 struct bfin_serial_port *uart = dev_id;
354
355 #ifdef CONFIG_BF54x
356 unsigned short status;
357 spin_lock(&uart->port.lock);
358 status = UART_GET_LSR(uart);
359 while ((UART_GET_IER(uart) & ERBFI) && (status & DR)) {
360 bfin_serial_rx_chars(uart);
361 status = UART_GET_LSR(uart);
362 }
363 spin_unlock(&uart->port.lock);
364 #else
365 spin_lock(&uart->port.lock);
366 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
367 bfin_serial_rx_chars(uart);
368 spin_unlock(&uart->port.lock);
369 #endif
370 return IRQ_HANDLED;
371 }
372
373 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
374 {
375 struct bfin_serial_port *uart = dev_id;
376
377 #ifdef CONFIG_BF54x
378 unsigned short status;
379 spin_lock(&uart->port.lock);
380 status = UART_GET_LSR(uart);
381 while ((UART_GET_IER(uart) & ETBEI) && (status & THRE)) {
382 bfin_serial_tx_chars(uart);
383 status = UART_GET_LSR(uart);
384 }
385 spin_unlock(&uart->port.lock);
386 #else
387 spin_lock(&uart->port.lock);
388 while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
389 bfin_serial_tx_chars(uart);
390 spin_unlock(&uart->port.lock);
391 #endif
392 return IRQ_HANDLED;
393 }
394
395
396 static void bfin_serial_do_work(struct work_struct *work)
397 {
398 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
399
400 bfin_serial_mctrl_check(uart);
401 }
402 #endif
403
404 #ifdef CONFIG_SERIAL_BFIN_DMA
405 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
406 {
407 struct circ_buf *xmit = &uart->port.info->xmit;
408 unsigned short ier;
409 int flags = 0;
410
411 if (!uart->tx_done)
412 return;
413
414 uart->tx_done = 0;
415
416 if (uart->port.x_char) {
417 UART_PUT_CHAR(uart, uart->port.x_char);
418 uart->port.icount.tx++;
419 uart->port.x_char = 0;
420 uart->tx_done = 1;
421 return;
422 }
423 /*
424 * Check the modem control lines before
425 * transmitting anything.
426 */
427 bfin_serial_mctrl_check(uart);
428
429 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
430 bfin_serial_stop_tx(&uart->port);
431 uart->tx_done = 1;
432 return;
433 }
434
435 spin_lock_irqsave(&uart->port.lock, flags);
436 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
437 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
438 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
439 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
440 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
441 set_dma_config(uart->tx_dma_channel,
442 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
443 INTR_ON_BUF,
444 DIMENSION_LINEAR,
445 DATA_SIZE_8));
446 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
447 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
448 set_dma_x_modify(uart->tx_dma_channel, 1);
449 enable_dma(uart->tx_dma_channel);
450 #ifdef CONFIG_BF54x
451 UART_SET_IER(uart, ETBEI);
452 #else
453 ier = UART_GET_IER(uart);
454 ier |= ETBEI;
455 UART_PUT_IER(uart, ier);
456 #endif
457 spin_unlock_irqrestore(&uart->port.lock, flags);
458 }
459
460 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
461 {
462 struct tty_struct *tty = uart->port.info->tty;
463 int i, flg, status;
464
465 status = UART_GET_LSR(uart);
466 uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
467
468 if (status & BI) {
469 uart->port.icount.brk++;
470 if (uart_handle_break(&uart->port))
471 goto dma_ignore_char;
472 status &= ~(PE | FE);
473 }
474 if (status & PE)
475 uart->port.icount.parity++;
476 if (status & OE)
477 uart->port.icount.overrun++;
478 if (status & FE)
479 uart->port.icount.frame++;
480
481 status &= uart->port.read_status_mask;
482
483 if (status & BI)
484 flg = TTY_BREAK;
485 else if (status & PE)
486 flg = TTY_PARITY;
487 else if (status & FE)
488 flg = TTY_FRAME;
489 else
490 flg = TTY_NORMAL;
491
492 for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
493 if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
494 goto dma_ignore_char;
495 uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
496 }
497
498 dma_ignore_char:
499 tty_flip_buffer_push(tty);
500 }
501
502 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
503 {
504 int x_pos, pos;
505 int flags = 0;
506
507 bfin_serial_dma_tx_chars(uart);
508
509 spin_lock_irqsave(&uart->port.lock, flags);
510 x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
511 if (x_pos == DMA_RX_XCOUNT)
512 x_pos = 0;
513
514 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
515
516 if (pos>uart->rx_dma_buf.tail) {
517 uart->rx_dma_buf.tail = pos;
518 bfin_serial_dma_rx_chars(uart);
519 uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
520 }
521 spin_unlock_irqrestore(&uart->port.lock, flags);
522 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
523 add_timer(&(uart->rx_dma_timer));
524 }
525
526 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
527 {
528 struct bfin_serial_port *uart = dev_id;
529 struct circ_buf *xmit = &uart->port.info->xmit;
530 unsigned short ier;
531
532 spin_lock(&uart->port.lock);
533 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
534 clear_dma_irqstat(uart->tx_dma_channel);
535 disable_dma(uart->tx_dma_channel);
536 #ifdef CONFIG_BF54x
537 UART_CLEAR_IER(uart, ETBEI);
538 #else
539 ier = UART_GET_IER(uart);
540 ier &= ~ETBEI;
541 UART_PUT_IER(uart, ier);
542 #endif
543 xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
544 uart->port.icount.tx+=uart->tx_count;
545
546 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
547 uart_write_wakeup(&uart->port);
548
549 if (uart_circ_empty(xmit))
550 bfin_serial_stop_tx(&uart->port);
551 uart->tx_done = 1;
552 }
553
554 spin_unlock(&uart->port.lock);
555 return IRQ_HANDLED;
556 }
557
558 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
559 {
560 struct bfin_serial_port *uart = dev_id;
561 unsigned short irqstat;
562
563 uart->rx_dma_nrows++;
564 if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
565 uart->rx_dma_nrows = 0;
566 uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
567 bfin_serial_dma_rx_chars(uart);
568 uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
569 }
570 spin_lock(&uart->port.lock);
571 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
572 clear_dma_irqstat(uart->rx_dma_channel);
573
574 spin_unlock(&uart->port.lock);
575 return IRQ_HANDLED;
576 }
577 #endif
578
579 /*
580 * Return TIOCSER_TEMT when transmitter is not busy.
581 */
582 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
583 {
584 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
585 unsigned short lsr;
586
587 lsr = UART_GET_LSR(uart);
588 if (lsr & TEMT)
589 return TIOCSER_TEMT;
590 else
591 return 0;
592 }
593
594 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
595 {
596 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
597 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
598 if (uart->cts_pin < 0)
599 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
600
601 if (gpio_get_value(uart->cts_pin))
602 return TIOCM_DSR | TIOCM_CAR;
603 else
604 #endif
605 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
606 }
607
608 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
609 {
610 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
611 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
612 if (uart->rts_pin < 0)
613 return;
614
615 if (mctrl & TIOCM_RTS)
616 gpio_set_value(uart->rts_pin, 0);
617 else
618 gpio_set_value(uart->rts_pin, 1);
619 #endif
620 }
621
622 /*
623 * Handle any change of modem status signal since we were last called.
624 */
625 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
626 {
627 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
628 unsigned int status;
629 # ifdef CONFIG_SERIAL_BFIN_DMA
630 struct uart_info *info = uart->port.info;
631 struct tty_struct *tty = info->tty;
632
633 status = bfin_serial_get_mctrl(&uart->port);
634 if (!(status & TIOCM_CTS)) {
635 tty->hw_stopped = 1;
636 } else {
637 tty->hw_stopped = 0;
638 }
639 # else
640 status = bfin_serial_get_mctrl(&uart->port);
641 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
642 if (!(status & TIOCM_CTS))
643 schedule_work(&uart->cts_workqueue);
644 # endif
645 #endif
646 }
647
648 /*
649 * Interrupts are always disabled.
650 */
651 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
652 {
653 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
654 u16 lcr = UART_GET_LCR(uart);
655 if (break_state)
656 lcr |= SB;
657 else
658 lcr &= ~SB;
659 UART_PUT_LCR(uart, lcr);
660 SSYNC();
661 }
662
663 static int bfin_serial_startup(struct uart_port *port)
664 {
665 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
666
667 #ifdef CONFIG_SERIAL_BFIN_DMA
668 dma_addr_t dma_handle;
669
670 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
671 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
672 return -EBUSY;
673 }
674
675 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
676 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
677 free_dma(uart->rx_dma_channel);
678 return -EBUSY;
679 }
680
681 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
682 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
683
684 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
685 uart->rx_dma_buf.head = 0;
686 uart->rx_dma_buf.tail = 0;
687 uart->rx_dma_nrows = 0;
688
689 set_dma_config(uart->rx_dma_channel,
690 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
691 INTR_ON_ROW, DIMENSION_2D,
692 DATA_SIZE_8));
693 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
694 set_dma_x_modify(uart->rx_dma_channel, 1);
695 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
696 set_dma_y_modify(uart->rx_dma_channel, 1);
697 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
698 enable_dma(uart->rx_dma_channel);
699
700 uart->rx_dma_timer.data = (unsigned long)(uart);
701 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
702 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
703 add_timer(&(uart->rx_dma_timer));
704 #else
705 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
706 "BFIN_UART_RX", uart)) {
707 # ifdef CONFIG_KGDB_UART
708 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
709 # endif
710 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
711 return -EBUSY;
712 # ifdef CONFIG_KGDB_UART
713 }
714 # endif
715 }
716
717
718 if (request_irq
719 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
720 "BFIN_UART_TX", uart)) {
721 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
722 free_irq(uart->port.irq, uart);
723 return -EBUSY;
724 }
725 #endif
726 #ifdef CONFIG_BF54x
727 UART_SET_IER(uart, ERBFI);
728 #else
729 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
730 #endif
731 return 0;
732 }
733
734 static void bfin_serial_shutdown(struct uart_port *port)
735 {
736 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
737
738 #ifdef CONFIG_SERIAL_BFIN_DMA
739 disable_dma(uart->tx_dma_channel);
740 free_dma(uart->tx_dma_channel);
741 disable_dma(uart->rx_dma_channel);
742 free_dma(uart->rx_dma_channel);
743 del_timer(&(uart->rx_dma_timer));
744 #else
745 #ifdef CONFIG_KGDB_UART
746 if (uart->port.line != CONFIG_KGDB_UART_PORT)
747 #endif
748 free_irq(uart->port.irq, uart);
749 free_irq(uart->port.irq+1, uart);
750 #endif
751 }
752
753 static void
754 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
755 struct ktermios *old)
756 {
757 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
758 unsigned long flags;
759 unsigned int baud, quot;
760 unsigned short val, ier, lsr, lcr = 0;
761
762 switch (termios->c_cflag & CSIZE) {
763 case CS8:
764 lcr = WLS(8);
765 break;
766 case CS7:
767 lcr = WLS(7);
768 break;
769 case CS6:
770 lcr = WLS(6);
771 break;
772 case CS5:
773 lcr = WLS(5);
774 break;
775 default:
776 printk(KERN_ERR "%s: word lengh not supported\n",
777 __FUNCTION__);
778 }
779
780 if (termios->c_cflag & CSTOPB)
781 lcr |= STB;
782 if (termios->c_cflag & PARENB)
783 lcr |= PEN;
784 if (!(termios->c_cflag & PARODD))
785 lcr |= EPS;
786 if (termios->c_cflag & CMSPAR)
787 lcr |= STP;
788
789 port->read_status_mask = OE;
790 if (termios->c_iflag & INPCK)
791 port->read_status_mask |= (FE | PE);
792 if (termios->c_iflag & (BRKINT | PARMRK))
793 port->read_status_mask |= BI;
794
795 /*
796 * Characters to ignore
797 */
798 port->ignore_status_mask = 0;
799 if (termios->c_iflag & IGNPAR)
800 port->ignore_status_mask |= FE | PE;
801 if (termios->c_iflag & IGNBRK) {
802 port->ignore_status_mask |= BI;
803 /*
804 * If we're ignoring parity and break indicators,
805 * ignore overruns too (for real raw support).
806 */
807 if (termios->c_iflag & IGNPAR)
808 port->ignore_status_mask |= OE;
809 }
810
811 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
812 quot = uart_get_divisor(port, baud);
813 spin_lock_irqsave(&uart->port.lock, flags);
814
815 do {
816 lsr = UART_GET_LSR(uart);
817 } while (!(lsr & TEMT));
818
819 /* Disable UART */
820 ier = UART_GET_IER(uart);
821 #ifdef CONFIG_BF54x
822 UART_CLEAR_IER(uart, 0xF);
823 #else
824 UART_PUT_IER(uart, 0);
825 #endif
826
827 #ifndef CONFIG_BF54x
828 /* Set DLAB in LCR to Access DLL and DLH */
829 val = UART_GET_LCR(uart);
830 val |= DLAB;
831 UART_PUT_LCR(uart, val);
832 SSYNC();
833 #endif
834
835 UART_PUT_DLL(uart, quot & 0xFF);
836 SSYNC();
837 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
838 SSYNC();
839
840 #ifndef CONFIG_BF54x
841 /* Clear DLAB in LCR to Access THR RBR IER */
842 val = UART_GET_LCR(uart);
843 val &= ~DLAB;
844 UART_PUT_LCR(uart, val);
845 SSYNC();
846 #endif
847
848 UART_PUT_LCR(uart, lcr);
849
850 /* Enable UART */
851 #ifdef CONFIG_BF54x
852 UART_SET_IER(uart, ier);
853 #else
854 UART_PUT_IER(uart, ier);
855 #endif
856
857 val = UART_GET_GCTL(uart);
858 val |= UCEN;
859 UART_PUT_GCTL(uart, val);
860
861 spin_unlock_irqrestore(&uart->port.lock, flags);
862 }
863
864 static const char *bfin_serial_type(struct uart_port *port)
865 {
866 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
867
868 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
869 }
870
871 /*
872 * Release the memory region(s) being used by 'port'.
873 */
874 static void bfin_serial_release_port(struct uart_port *port)
875 {
876 }
877
878 /*
879 * Request the memory region(s) being used by 'port'.
880 */
881 static int bfin_serial_request_port(struct uart_port *port)
882 {
883 return 0;
884 }
885
886 /*
887 * Configure/autoconfigure the port.
888 */
889 static void bfin_serial_config_port(struct uart_port *port, int flags)
890 {
891 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
892
893 if (flags & UART_CONFIG_TYPE &&
894 bfin_serial_request_port(&uart->port) == 0)
895 uart->port.type = PORT_BFIN;
896 }
897
898 /*
899 * Verify the new serial_struct (for TIOCSSERIAL).
900 * The only change we allow are to the flags and type, and
901 * even then only between PORT_BFIN and PORT_UNKNOWN
902 */
903 static int
904 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
905 {
906 return 0;
907 }
908
909 static struct uart_ops bfin_serial_pops = {
910 .tx_empty = bfin_serial_tx_empty,
911 .set_mctrl = bfin_serial_set_mctrl,
912 .get_mctrl = bfin_serial_get_mctrl,
913 .stop_tx = bfin_serial_stop_tx,
914 .start_tx = bfin_serial_start_tx,
915 .stop_rx = bfin_serial_stop_rx,
916 .enable_ms = bfin_serial_enable_ms,
917 .break_ctl = bfin_serial_break_ctl,
918 .startup = bfin_serial_startup,
919 .shutdown = bfin_serial_shutdown,
920 .set_termios = bfin_serial_set_termios,
921 .type = bfin_serial_type,
922 .release_port = bfin_serial_release_port,
923 .request_port = bfin_serial_request_port,
924 .config_port = bfin_serial_config_port,
925 .verify_port = bfin_serial_verify_port,
926 };
927
928 static void __init bfin_serial_init_ports(void)
929 {
930 static int first = 1;
931 int i;
932
933 if (!first)
934 return;
935 first = 0;
936
937 for (i = 0; i < nr_ports; i++) {
938 bfin_serial_ports[i].port.uartclk = get_sclk();
939 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
940 bfin_serial_ports[i].port.line = i;
941 bfin_serial_ports[i].port.iotype = UPIO_MEM;
942 bfin_serial_ports[i].port.membase =
943 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
944 bfin_serial_ports[i].port.mapbase =
945 bfin_serial_resource[i].uart_base_addr;
946 bfin_serial_ports[i].port.irq =
947 bfin_serial_resource[i].uart_irq;
948 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
949 #ifdef CONFIG_SERIAL_BFIN_DMA
950 bfin_serial_ports[i].tx_done = 1;
951 bfin_serial_ports[i].tx_count = 0;
952 bfin_serial_ports[i].tx_dma_channel =
953 bfin_serial_resource[i].uart_tx_dma_channel;
954 bfin_serial_ports[i].rx_dma_channel =
955 bfin_serial_resource[i].uart_rx_dma_channel;
956 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
957 #else
958 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
959 #endif
960 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
961 bfin_serial_ports[i].cts_pin =
962 bfin_serial_resource[i].uart_cts_pin;
963 bfin_serial_ports[i].rts_pin =
964 bfin_serial_resource[i].uart_rts_pin;
965 #endif
966 bfin_serial_hw_init(&bfin_serial_ports[i]);
967 }
968
969 }
970
971 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
972 /*
973 * If the port was already initialised (eg, by a boot loader),
974 * try to determine the current setup.
975 */
976 static void __init
977 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
978 int *parity, int *bits)
979 {
980 unsigned short status;
981
982 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
983 if (status == (ERBFI | ETBEI)) {
984 /* ok, the port was enabled */
985 unsigned short lcr, val;
986 unsigned short dlh, dll;
987
988 lcr = UART_GET_LCR(uart);
989
990 *parity = 'n';
991 if (lcr & PEN) {
992 if (lcr & EPS)
993 *parity = 'e';
994 else
995 *parity = 'o';
996 }
997 switch (lcr & 0x03) {
998 case 0: *bits = 5; break;
999 case 1: *bits = 6; break;
1000 case 2: *bits = 7; break;
1001 case 3: *bits = 8; break;
1002 }
1003 #ifndef CONFIG_BF54x
1004 /* Set DLAB in LCR to Access DLL and DLH */
1005 val = UART_GET_LCR(uart);
1006 val |= DLAB;
1007 UART_PUT_LCR(uart, val);
1008 #endif
1009
1010 dll = UART_GET_DLL(uart);
1011 dlh = UART_GET_DLH(uart);
1012
1013 #ifndef CONFIG_BF54x
1014 /* Clear DLAB in LCR to Access THR RBR IER */
1015 val = UART_GET_LCR(uart);
1016 val &= ~DLAB;
1017 UART_PUT_LCR(uart, val);
1018 #endif
1019
1020 *baud = get_sclk() / (16*(dll | dlh << 8));
1021 }
1022 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1023 }
1024 #endif
1025
1026 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1027 static struct uart_driver bfin_serial_reg;
1028
1029 static int __init
1030 bfin_serial_console_setup(struct console *co, char *options)
1031 {
1032 struct bfin_serial_port *uart;
1033 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1034 int baud = 57600;
1035 int bits = 8;
1036 int parity = 'n';
1037 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1038 int flow = 'r';
1039 # else
1040 int flow = 'n';
1041 # endif
1042 # endif
1043
1044 /*
1045 * Check whether an invalid uart number has been specified, and
1046 * if so, search for the first available port that does have
1047 * console support.
1048 */
1049 if (co->index == -1 || co->index >= nr_ports)
1050 co->index = 0;
1051 uart = &bfin_serial_ports[co->index];
1052
1053 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1054 if (options)
1055 uart_parse_options(options, &baud, &parity, &bits, &flow);
1056 else
1057 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1058
1059 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1060 # else
1061 return 0;
1062 # endif
1063 }
1064 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1065 defined (CONFIG_EARLY_PRINTK) */
1066
1067 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1068 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1069 {
1070 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1071 while (!(UART_GET_LSR(uart) & THRE))
1072 barrier();
1073 UART_PUT_CHAR(uart, ch);
1074 SSYNC();
1075 }
1076
1077 /*
1078 * Interrupts are disabled on entering
1079 */
1080 static void
1081 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1082 {
1083 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1084 int flags = 0;
1085
1086 spin_lock_irqsave(&uart->port.lock, flags);
1087 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1088 spin_unlock_irqrestore(&uart->port.lock, flags);
1089
1090 }
1091
1092 static struct console bfin_serial_console = {
1093 .name = BFIN_SERIAL_NAME,
1094 .write = bfin_serial_console_write,
1095 .device = uart_console_device,
1096 .setup = bfin_serial_console_setup,
1097 .flags = CON_PRINTBUFFER,
1098 .index = -1,
1099 .data = &bfin_serial_reg,
1100 };
1101
1102 static int __init bfin_serial_rs_console_init(void)
1103 {
1104 bfin_serial_init_ports();
1105 register_console(&bfin_serial_console);
1106 #ifdef CONFIG_KGDB_UART
1107 kgdb_entry_state = 0;
1108 init_kgdb_uart();
1109 #endif
1110 return 0;
1111 }
1112 console_initcall(bfin_serial_rs_console_init);
1113
1114 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1115 #else
1116 #define BFIN_SERIAL_CONSOLE NULL
1117 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1118
1119
1120 #ifdef CONFIG_EARLY_PRINTK
1121 static __init void early_serial_putc(struct uart_port *port, int ch)
1122 {
1123 unsigned timeout = 0xffff;
1124 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1125
1126 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1127 cpu_relax();
1128 UART_PUT_CHAR(uart, ch);
1129 }
1130
1131 static __init void early_serial_write(struct console *con, const char *s,
1132 unsigned int n)
1133 {
1134 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1135 unsigned int i;
1136
1137 for (i = 0; i < n; i++, s++) {
1138 if (*s == '\n')
1139 early_serial_putc(&uart->port, '\r');
1140 early_serial_putc(&uart->port, *s);
1141 }
1142 }
1143
1144 static struct __init console bfin_early_serial_console = {
1145 .name = "early_BFuart",
1146 .write = early_serial_write,
1147 .device = uart_console_device,
1148 .flags = CON_PRINTBUFFER,
1149 .setup = bfin_serial_console_setup,
1150 .index = -1,
1151 .data = &bfin_serial_reg,
1152 };
1153
1154 struct console __init *bfin_earlyserial_init(unsigned int port,
1155 unsigned int cflag)
1156 {
1157 struct bfin_serial_port *uart;
1158 struct ktermios t;
1159
1160 if (port == -1 || port >= nr_ports)
1161 port = 0;
1162 bfin_serial_init_ports();
1163 bfin_early_serial_console.index = port;
1164 uart = &bfin_serial_ports[port];
1165 t.c_cflag = cflag;
1166 t.c_iflag = 0;
1167 t.c_oflag = 0;
1168 t.c_lflag = ICANON;
1169 t.c_line = port;
1170 bfin_serial_set_termios(&uart->port, &t, &t);
1171 return &bfin_early_serial_console;
1172 }
1173
1174 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1175
1176 static struct uart_driver bfin_serial_reg = {
1177 .owner = THIS_MODULE,
1178 .driver_name = "bfin-uart",
1179 .dev_name = BFIN_SERIAL_NAME,
1180 .major = BFIN_SERIAL_MAJOR,
1181 .minor = BFIN_SERIAL_MINOR,
1182 .nr = NR_PORTS,
1183 .cons = BFIN_SERIAL_CONSOLE,
1184 };
1185
1186 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1187 {
1188 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1189
1190 if (uart)
1191 uart_suspend_port(&bfin_serial_reg, &uart->port);
1192
1193 return 0;
1194 }
1195
1196 static int bfin_serial_resume(struct platform_device *dev)
1197 {
1198 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1199
1200 if (uart)
1201 uart_resume_port(&bfin_serial_reg, &uart->port);
1202
1203 return 0;
1204 }
1205
1206 static int bfin_serial_probe(struct platform_device *dev)
1207 {
1208 struct resource *res = dev->resource;
1209 int i;
1210
1211 for (i = 0; i < dev->num_resources; i++, res++)
1212 if (res->flags & IORESOURCE_MEM)
1213 break;
1214
1215 if (i < dev->num_resources) {
1216 for (i = 0; i < nr_ports; i++, res++) {
1217 if (bfin_serial_ports[i].port.mapbase != res->start)
1218 continue;
1219 bfin_serial_ports[i].port.dev = &dev->dev;
1220 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1221 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1222 }
1223 }
1224
1225 return 0;
1226 }
1227
1228 static int bfin_serial_remove(struct platform_device *pdev)
1229 {
1230 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1231
1232
1233 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1234 gpio_free(uart->cts_pin);
1235 gpio_free(uart->rts_pin);
1236 #endif
1237
1238 platform_set_drvdata(pdev, NULL);
1239
1240 if (uart)
1241 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1242
1243 return 0;
1244 }
1245
1246 static struct platform_driver bfin_serial_driver = {
1247 .probe = bfin_serial_probe,
1248 .remove = bfin_serial_remove,
1249 .suspend = bfin_serial_suspend,
1250 .resume = bfin_serial_resume,
1251 .driver = {
1252 .name = "bfin-uart",
1253 },
1254 };
1255
1256 static int __init bfin_serial_init(void)
1257 {
1258 int ret;
1259 #ifdef CONFIG_KGDB_UART
1260 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1261 struct ktermios t;
1262 #endif
1263
1264 pr_info("Serial: Blackfin serial driver\n");
1265
1266 bfin_serial_init_ports();
1267
1268 ret = uart_register_driver(&bfin_serial_reg);
1269 if (ret == 0) {
1270 ret = platform_driver_register(&bfin_serial_driver);
1271 if (ret) {
1272 pr_debug("uart register failed\n");
1273 uart_unregister_driver(&bfin_serial_reg);
1274 }
1275 }
1276 #ifdef CONFIG_KGDB_UART
1277 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1278 request_irq(uart->port.irq, bfin_serial_rx_int,
1279 IRQF_DISABLED, "BFIN_UART_RX", uart);
1280 pr_info("Request irq for kgdb uart port\n");
1281 #ifdef CONFIG_BF54x
1282 UART_SET_IER(uart, ERBFI);
1283 #else
1284 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1285 #endif
1286 SSYNC();
1287 t.c_cflag = CS8|B57600;
1288 t.c_iflag = 0;
1289 t.c_oflag = 0;
1290 t.c_lflag = ICANON;
1291 t.c_line = CONFIG_KGDB_UART_PORT;
1292 bfin_serial_set_termios(&uart->port, &t, &t);
1293 }
1294 #endif
1295 return ret;
1296 }
1297
1298 static void __exit bfin_serial_exit(void)
1299 {
1300 platform_driver_unregister(&bfin_serial_driver);
1301 uart_unregister_driver(&bfin_serial_reg);
1302 }
1303
1304 module_init(bfin_serial_init);
1305 module_exit(bfin_serial_exit);
1306
1307 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1308 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1309 MODULE_LICENSE("GPL");
1310 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
Openmoko development kernel tree