arch/arm/mach-s3c2410/mach-vr1000.c

   1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
   2  *
   3  * Copyright (c) 2003-2005 Simtec Electronics
   4  *   Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Machine support for Thorcom VR1000 board. Designed for Thorcom by
   7  * Simtec Electronics, http://www.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13 */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/types.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/list.h>
  19 #include <linux/timer.h>
  20 #include <linux/init.h>
  21 #include <linux/dm9000.h>
  22
  23 #include <linux/serial.h>
  24 #include <linux/tty.h>
  25 #include <linux/serial_8250.h>
  26 #include <linux/serial_reg.h>
  27
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/irq.h>
  31
  32 #include <asm/arch/bast-map.h>
  33 #include <asm/arch/vr1000-map.h>
  34 #include <asm/arch/vr1000-irq.h>
  35 #include <asm/arch/vr1000-cpld.h>
  36
  37 #include <asm/hardware.h>
  38 #include <asm/io.h>
  39 #include <asm/irq.h>
  40 #include <asm/mach-types.h>
  41
  42 #include <asm/plat-s3c/regs-serial.h>
  43 #include <asm/arch/regs-gpio.h>
  44 #include <asm/arch/leds-gpio.h>
  45
  46 #include <asm/plat-s3c24xx/clock.h>
  47 #include <asm/plat-s3c24xx/devs.h>
  48 #include <asm/plat-s3c24xx/cpu.h>
  49
  50 #include "usb-simtec.h"
  51 #include "nor-simtec.h"
  52
  53 /* macros for virtual address mods for the io space entries */
  54 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  55 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  56 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  57 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  58
  59 /* macros to modify the physical addresses for io space */
  60
  61 #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  62 #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  63 #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  64 #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  65
  66 static struct map_desc vr1000_iodesc[] __initdata = {
  67   /* ISA IO areas */
  68   {
  69           .virtual      = (u32)S3C24XX_VA_ISA_BYTE,
  70           .pfn          = PA_CS2(BAST_PA_ISAIO),
  71           .length       = SZ_16M,
  72           .type         = MT_DEVICE,
  73   }, {
  74           .virtual      = (u32)S3C24XX_VA_ISA_WORD,
  75           .pfn          = PA_CS3(BAST_PA_ISAIO),
  76           .length       = SZ_16M,
  77           .type         = MT_DEVICE,
  78   },
  79
  80   /*  CPLD control registers, and external interrupt controls */
  81   {
  82           .virtual      = (u32)VR1000_VA_CTRL1,
  83           .pfn          = __phys_to_pfn(VR1000_PA_CTRL1),
  84           .length       = SZ_1M,
  85           .type         = MT_DEVICE,
  86   }, {
  87           .virtual      = (u32)VR1000_VA_CTRL2,
  88           .pfn          = __phys_to_pfn(VR1000_PA_CTRL2),
  89           .length       = SZ_1M,
  90           .type         = MT_DEVICE,
  91   }, {
  92           .virtual      = (u32)VR1000_VA_CTRL3,
  93           .pfn          = __phys_to_pfn(VR1000_PA_CTRL3),
  94           .length       = SZ_1M,
  95           .type         = MT_DEVICE,
  96   }, {
  97           .virtual      = (u32)VR1000_VA_CTRL4,
  98           .pfn          = __phys_to_pfn(VR1000_PA_CTRL4),
  99           .length       = SZ_1M,
 100           .type         = MT_DEVICE,
 101   },
 102 };
 103
 104 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 105 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 106 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 107
 108 /* uart clock source(s) */
 109
 110 static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
 111         [0] = {
 112                 .name           = "uclk",
 113                 .divisor        = 1,
 114                 .min_baud       = 0,
 115                 .max_baud       = 0,
 116         },
 117         [1] = {
 118                 .name           = "pclk",
 119                 .divisor        = 1,
 120                 .min_baud       = 0,
 121                 .max_baud       = 0.
 122         }
 123 };
 124
 125 static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
 126         [0] = {
 127                 .hwport      = 0,
 128                 .flags       = 0,
 129                 .ucon        = UCON,
 130                 .ulcon       = ULCON,
 131                 .ufcon       = UFCON,
 132                 .clocks      = vr1000_serial_clocks,
 133                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 134         },
 135         [1] = {
 136                 .hwport      = 1,
 137                 .flags       = 0,
 138                 .ucon        = UCON,
 139                 .ulcon       = ULCON,
 140                 .ufcon       = UFCON,
 141                 .clocks      = vr1000_serial_clocks,
 142                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 143         },
 144         /* port 2 is not actually used */
 145         [2] = {
 146                 .hwport      = 2,
 147                 .flags       = 0,
 148                 .ucon        = UCON,
 149                 .ulcon       = ULCON,
 150                 .ufcon       = UFCON,
 151                 .clocks      = vr1000_serial_clocks,
 152                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 153
 154         }
 155 };
 156
 157 /* definitions for the vr1000 extra 16550 serial ports */
 158
 159 #define VR1000_BAUDBASE (3692307)
 160
 161 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
 162
 163 static struct plat_serial8250_port serial_platform_data[] = {
 164         [0] = {
 165                 .mapbase        = VR1000_SERIAL_MAPBASE(0),
 166                 .irq            = IRQ_VR1000_SERIAL + 0,
 167                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 168                 .iotype         = UPIO_MEM,
 169                 .regshift       = 0,
 170                 .uartclk        = VR1000_BAUDBASE,
 171         },
 172         [1] = {
 173                 .mapbase        = VR1000_SERIAL_MAPBASE(1),
 174                 .irq            = IRQ_VR1000_SERIAL + 1,
 175                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 176                 .iotype         = UPIO_MEM,
 177                 .regshift       = 0,
 178                 .uartclk        = VR1000_BAUDBASE,
 179         },
 180         [2] = {
 181                 .mapbase        = VR1000_SERIAL_MAPBASE(2),
 182                 .irq            = IRQ_VR1000_SERIAL + 2,
 183                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 184                 .iotype         = UPIO_MEM,
 185                 .regshift       = 0,
 186                 .uartclk        = VR1000_BAUDBASE,
 187         },
 188         [3] = {
 189                 .mapbase        = VR1000_SERIAL_MAPBASE(3),
 190                 .irq            = IRQ_VR1000_SERIAL + 3,
 191                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 192                 .iotype         = UPIO_MEM,
 193                 .regshift       = 0,
 194                 .uartclk        = VR1000_BAUDBASE,
 195         },
 196         { },
 197 };
 198
 199 static struct platform_device serial_device = {
 200         .name                   = "serial8250",
 201         .id                     = PLAT8250_DEV_PLATFORM,
 202         .dev                    = {
 203                 .platform_data  = serial_platform_data,
 204         },
 205 };
 206
 207 /* DM9000 ethernet devices */
 208
 209 static struct resource vr1000_dm9k0_resource[] = {
 210         [0] = {
 211                 .start = S3C2410_CS5 + VR1000_PA_DM9000,
 212                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
 213                 .flags = IORESOURCE_MEM
 214         },
 215         [1] = {
 216                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
 217                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
 218                 .flags = IORESOURCE_MEM
 219         },
 220         [2] = {
 221                 .start = IRQ_VR1000_DM9000A,
 222                 .end   = IRQ_VR1000_DM9000A,
 223                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 224         }
 225
 226 };
 227
 228 static struct resource vr1000_dm9k1_resource[] = {
 229         [0] = {
 230                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
 231                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
 232                 .flags = IORESOURCE_MEM
 233         },
 234         [1] = {
 235                 .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
 236                 .end   = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
 237                 .flags = IORESOURCE_MEM
 238         },
 239         [2] = {
 240                 .start = IRQ_VR1000_DM9000N,
 241                 .end   = IRQ_VR1000_DM9000N,
 242                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 243         }
 244 };
 245
 246 /* for the moment we limit ourselves to 16bit IO until some
 247  * better IO routines can be written and tested
 248 */
 249
 250 static struct dm9000_plat_data vr1000_dm9k_platdata = {
 251         .flags          = DM9000_PLATF_16BITONLY,
 252 };
 253
 254 static struct platform_device vr1000_dm9k0 = {
 255         .name           = "dm9000",
 256         .id             = 0,
 257         .num_resources  = ARRAY_SIZE(vr1000_dm9k0_resource),
 258         .resource       = vr1000_dm9k0_resource,
 259         .dev            = {
 260                 .platform_data = &vr1000_dm9k_platdata,
 261         }
 262 };
 263
 264 static struct platform_device vr1000_dm9k1 = {
 265         .name           = "dm9000",
 266         .id             = 1,
 267         .num_resources  = ARRAY_SIZE(vr1000_dm9k1_resource),
 268         .resource       = vr1000_dm9k1_resource,
 269         .dev            = {
 270                 .platform_data = &vr1000_dm9k_platdata,
 271         }
 272 };
 273
 274 /* LEDS */
 275
 276 static struct s3c24xx_led_platdata vr1000_led1_pdata = {
 277         .name           = "led1",
 278         .gpio           = S3C2410_GPB0,
 279         .def_trigger    = "",
 280 };
 281
 282 static struct s3c24xx_led_platdata vr1000_led2_pdata = {
 283         .name           = "led2",
 284         .gpio           = S3C2410_GPB1,
 285         .def_trigger    = "",
 286 };
 287
 288 static struct s3c24xx_led_platdata vr1000_led3_pdata = {
 289         .name           = "led3",
 290         .gpio           = S3C2410_GPB2,
 291         .def_trigger    = "",
 292 };
 293
 294 static struct platform_device vr1000_led1 = {
 295         .name           = "s3c24xx_led",
 296         .id             = 1,
 297         .dev            = {
 298                 .platform_data  = &vr1000_led1_pdata,
 299         },
 300 };
 301
 302 static struct platform_device vr1000_led2 = {
 303         .name           = "s3c24xx_led",
 304         .id             = 2,
 305         .dev            = {
 306                 .platform_data  = &vr1000_led2_pdata,
 307         },
 308 };
 309
 310 static struct platform_device vr1000_led3 = {
 311         .name           = "s3c24xx_led",
 312         .id             = 3,
 313         .dev            = {
 314                 .platform_data  = &vr1000_led3_pdata,
 315         },
 316 };
 317
 318 /* devices for this board */
 319
 320 static struct platform_device *vr1000_devices[] __initdata = {
 321         &s3c_device_usb,
 322         &s3c_device_lcd,
 323         &s3c_device_wdt,
 324         &s3c_device_i2c,
 325         &s3c_device_adc,
 326         &serial_device,
 327         &vr1000_dm9k0,
 328         &vr1000_dm9k1,
 329         &vr1000_led1,
 330         &vr1000_led2,
 331         &vr1000_led3,
 332 };
 333
 334 static struct clk *vr1000_clocks[] = {
 335         &s3c24xx_dclk0,
 336         &s3c24xx_dclk1,
 337         &s3c24xx_clkout0,
 338         &s3c24xx_clkout1,
 339         &s3c24xx_uclk,
 340 };
 341
 342 static void vr1000_power_off(void)
 343 {
 344         s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
 345         s3c2410_gpio_setpin(S3C2410_GPB9, 1);
 346 }
 347
 348 static void __init vr1000_map_io(void)
 349 {
 350         /* initialise clock sources */
 351
 352         s3c24xx_dclk0.parent = &clk_upll;
 353         s3c24xx_dclk0.rate   = 12*1000*1000;
 354
 355         s3c24xx_dclk1.parent = NULL;
 356         s3c24xx_dclk1.rate   = 3692307;
 357
 358         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 359         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 360
 361         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 362
 363         s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
 364
 365         pm_power_off = vr1000_power_off;
 366
 367         s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
 368         s3c24xx_init_clocks(0);
 369         s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
 370 }
 371
 372 static void __init vr1000_init(void)
 373 {
 374         platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
 375
 376         nor_simtec_init();
 377 }
 378
 379 MACHINE_START(VR1000, "Thorcom-VR1000")
 380         /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
 381         .phys_io        = S3C2410_PA_UART,
 382         .io_pg_offst    = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
 383         .boot_params    = S3C2410_SDRAM_PA + 0x100,
 384         .map_io         = vr1000_map_io,
 385         .init_machine   = vr1000_init,
 386         .init_irq       = s3c24xx_init_irq,
 387         .timer          = &s3c24xx_timer,
 388 MACHINE_END