1 /* linux/arch/arm/mach-s3c2440/mach-anubis.c
3 * Copyright (c) 2003-2005,2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/list.h>
16 #include <linux/timer.h>
17 #include <linux/init.h>
18 #include <linux/serial_core.h>
19 #include <linux/platform_device.h>
20 #include <linux/ata_platform.h>
21 #include <linux/i2c.h>
23 #include <linux/sm501.h>
24 #include <linux/sm501-regs.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/map.h>
28 #include <asm/mach/irq.h>
30 #include <mach/anubis-map.h>
31 #include <mach/anubis-irq.h>
32 #include <mach/anubis-cpld.h>
34 #include <mach/hardware.h>
36 #include <asm/mach-types.h>
38 #include <plat/regs-serial.h>
39 #include <mach/regs-gpio.h>
40 #include <mach/regs-mem.h>
41 #include <mach/regs-lcd.h>
42 #include <plat/nand.h>
44 #include <linux/mtd/mtd.h>
45 #include <linux/mtd/nand.h>
46 #include <linux/mtd/nand_ecc.h>
47 #include <linux/mtd/partitions.h>
49 #include <net/ax88796.h>
51 #include <plat/clock.h>
52 #include <plat/devs.h>
55 #define COPYRIGHT ", (c) 2005 Simtec Electronics"
57 static struct map_desc anubis_iodesc
[] __initdata
= {
61 .virtual = (u32
)S3C24XX_VA_ISA_BYTE
,
62 .pfn
= __phys_to_pfn(0x0),
66 .virtual = (u32
)S3C24XX_VA_ISA_WORD
,
67 .pfn
= __phys_to_pfn(0x0),
72 /* we could possibly compress the next set down into a set of smaller tables
73 * pagetables, but that would mean using an L2 section, and it still means
74 * we cannot actually feed the same register to an LDR due to 16K spacing
77 /* CPLD control registers */
80 .virtual = (u32
)ANUBIS_VA_CTRL1
,
81 .pfn
= __phys_to_pfn(ANUBIS_PA_CTRL1
),
85 .virtual = (u32
)ANUBIS_VA_IDREG
,
86 .pfn
= __phys_to_pfn(ANUBIS_PA_IDREG
),
92 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
93 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
94 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
96 static struct s3c24xx_uart_clksrc anubis_serial_clocks
[] = {
112 static struct s3c2410_uartcfg anubis_uartcfgs
[] __initdata
= {
119 .clocks
= anubis_serial_clocks
,
120 .clocks_size
= ARRAY_SIZE(anubis_serial_clocks
),
128 .clocks
= anubis_serial_clocks
,
129 .clocks_size
= ARRAY_SIZE(anubis_serial_clocks
),
133 /* NAND Flash on Anubis board */
135 static int external_map
[] = { 2 };
136 static int chip0_map
[] = { 0 };
137 static int chip1_map
[] = { 1 };
139 static struct mtd_partition anubis_default_nand_part
[] = {
141 .name
= "Boot Agent",
147 .size
= SZ_4M
- SZ_16K
,
153 .size
= SZ_32M
- SZ_4M
,
158 .size
= MTDPART_SIZ_FULL
,
162 static struct mtd_partition anubis_default_nand_part_large
[] = {
164 .name
= "Boot Agent",
170 .size
= SZ_4M
- SZ_128K
,
176 .size
= SZ_32M
- SZ_4M
,
181 .size
= MTDPART_SIZ_FULL
,
185 /* the Anubis has 3 selectable slots for nand-flash, the two
186 * on-board chip areas, as well as the external slot.
188 * Note, there is no current hot-plug support for the External
192 static struct s3c2410_nand_set anubis_nand_sets
[] = {
196 .nr_map
= external_map
,
197 .nr_partitions
= ARRAY_SIZE(anubis_default_nand_part
),
198 .partitions
= anubis_default_nand_part
,
204 .nr_partitions
= ARRAY_SIZE(anubis_default_nand_part
),
205 .partitions
= anubis_default_nand_part
,
211 .nr_partitions
= ARRAY_SIZE(anubis_default_nand_part
),
212 .partitions
= anubis_default_nand_part
,
216 static void anubis_nand_select(struct s3c2410_nand_set
*set
, int slot
)
220 slot
= set
->nr_map
[slot
] & 3;
222 pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
223 slot
, set
, set
->nr_map
);
225 tmp
= __raw_readb(ANUBIS_VA_CTRL1
);
226 tmp
&= ~ANUBIS_CTRL1_NANDSEL
;
229 pr_debug("anubis_nand: ctrl1 now %02x\n", tmp
);
231 __raw_writeb(tmp
, ANUBIS_VA_CTRL1
);
234 static struct s3c2410_platform_nand anubis_nand_info
= {
238 .nr_sets
= ARRAY_SIZE(anubis_nand_sets
),
239 .sets
= anubis_nand_sets
,
240 .select_chip
= anubis_nand_select
,
245 struct pata_platform_info anubis_ide_platdata
= {
249 static struct resource anubis_ide0_resource
[] = {
251 .start
= S3C2410_CS3
,
252 .end
= S3C2410_CS3
+ (8*32) - 1,
253 .flags
= IORESOURCE_MEM
,
255 .start
= S3C2410_CS3
+ (1<<26) + (6*32),
256 .end
= S3C2410_CS3
+ (1<<26) + (7*32) - 1,
257 .flags
= IORESOURCE_MEM
,
261 .flags
= IORESOURCE_IRQ
,
265 static struct platform_device anubis_device_ide0
= {
266 .name
= "pata_platform",
268 .num_resources
= ARRAY_SIZE(anubis_ide0_resource
),
269 .resource
= anubis_ide0_resource
,
271 .platform_data
= &anubis_ide_platdata
,
272 .coherent_dma_mask
= ~0,
276 static struct resource anubis_ide1_resource
[] = {
278 .start
= S3C2410_CS4
,
279 .end
= S3C2410_CS4
+ (8*32) - 1,
280 .flags
= IORESOURCE_MEM
,
282 .start
= S3C2410_CS4
+ (1<<26) + (6*32),
283 .end
= S3C2410_CS4
+ (1<<26) + (7*32) - 1,
284 .flags
= IORESOURCE_MEM
,
288 .flags
= IORESOURCE_IRQ
,
292 static struct platform_device anubis_device_ide1
= {
293 .name
= "pata_platform",
295 .num_resources
= ARRAY_SIZE(anubis_ide1_resource
),
296 .resource
= anubis_ide1_resource
,
298 .platform_data
= &anubis_ide_platdata
,
299 .coherent_dma_mask
= ~0,
303 /* Asix AX88796 10/100 ethernet controller */
305 static struct ax_plat_data anubis_asix_platdata
= {
306 .flags
= AXFLG_MAC_FROMDEV
,
312 static struct resource anubis_asix_resource
[] = {
314 .start
= S3C2410_CS5
,
315 .end
= S3C2410_CS5
+ (0x20 * 0x20) -1,
316 .flags
= IORESOURCE_MEM
321 .flags
= IORESOURCE_IRQ
325 static struct platform_device anubis_device_asix
= {
328 .num_resources
= ARRAY_SIZE(anubis_asix_resource
),
329 .resource
= anubis_asix_resource
,
331 .platform_data
= &anubis_asix_platdata
,
337 static struct resource anubis_sm501_resource
[] = {
339 .start
= S3C2410_CS2
,
340 .end
= S3C2410_CS2
+ SZ_8M
,
341 .flags
= IORESOURCE_MEM
,
344 .start
= S3C2410_CS2
+ SZ_64M
- SZ_2M
,
345 .end
= S3C2410_CS2
+ SZ_64M
- 1,
346 .flags
= IORESOURCE_MEM
,
351 .flags
= IORESOURCE_IRQ
,
355 static struct sm501_initdata anubis_sm501_initdata
= {
357 .set
= 0x3F000000, /* 24bit panel */
361 .set
= 0x010100, /* SDRAM timing */
365 .set
= SM501_MISC_PNL_24BIT
,
369 /* set the SDRAM and bus clocks */
374 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c
[] = {
385 static struct sm501_platdata anubis_sm501_platdata
= {
386 .init
= &anubis_sm501_initdata
,
387 .gpio_i2c
= anubis_sm501_gpio_i2c
,
388 .gpio_i2c_nr
= ARRAY_SIZE(anubis_sm501_gpio_i2c
),
391 static struct platform_device anubis_device_sm501
= {
394 .num_resources
= ARRAY_SIZE(anubis_sm501_resource
),
395 .resource
= anubis_sm501_resource
,
397 .platform_data
= &anubis_sm501_platdata
,
401 /* Standard Anubis devices */
403 static struct platform_device
*anubis_devices
[] __initdata
= {
413 &anubis_device_sm501
,
416 static struct clk
*anubis_clocks
[] __initdata
= {
426 static struct i2c_board_info anubis_i2c_devs
[] __initdata
= {
428 I2C_BOARD_INFO("tps65011", 0x48),
433 static void __init
anubis_map_io(void)
435 /* initialise the clocks */
437 s3c24xx_dclk0
.parent
= &clk_upll
;
438 s3c24xx_dclk0
.rate
= 12*1000*1000;
440 s3c24xx_dclk1
.parent
= &clk_upll
;
441 s3c24xx_dclk1
.rate
= 24*1000*1000;
443 s3c24xx_clkout0
.parent
= &s3c24xx_dclk0
;
444 s3c24xx_clkout1
.parent
= &s3c24xx_dclk1
;
446 s3c24xx_uclk
.parent
= &s3c24xx_clkout1
;
448 s3c24xx_register_clocks(anubis_clocks
, ARRAY_SIZE(anubis_clocks
));
450 s3c_device_nand
.dev
.platform_data
= &anubis_nand_info
;
452 s3c24xx_init_io(anubis_iodesc
, ARRAY_SIZE(anubis_iodesc
));
453 s3c24xx_init_clocks(0);
454 s3c24xx_init_uarts(anubis_uartcfgs
, ARRAY_SIZE(anubis_uartcfgs
));
456 /* check for the newer revision boards with large page nand */
458 if ((__raw_readb(ANUBIS_VA_IDREG
) & ANUBIS_IDREG_REVMASK
) >= 4) {
459 printk(KERN_INFO
"ANUBIS-B detected (revision %d)\n",
460 __raw_readb(ANUBIS_VA_IDREG
) & ANUBIS_IDREG_REVMASK
);
461 anubis_nand_sets
[0].partitions
= anubis_default_nand_part_large
;
462 anubis_nand_sets
[0].nr_partitions
= ARRAY_SIZE(anubis_default_nand_part_large
);
464 /* ensure that the GPIO is setup */
465 s3c2410_gpio_setpin(S3C2410_GPA0
, 1);
469 static void __init
anubis_init(void)
471 platform_add_devices(anubis_devices
, ARRAY_SIZE(anubis_devices
));
473 i2c_register_board_info(0, anubis_i2c_devs
,
474 ARRAY_SIZE(anubis_i2c_devs
));
478 MACHINE_START(ANUBIS
, "Simtec-Anubis")
479 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
480 .phys_io
= S3C2410_PA_UART
,
481 .io_pg_offst
= (((u32
)S3C24XX_VA_UART
) >> 18) & 0xfffc,
482 .boot_params
= S3C2410_SDRAM_PA
+ 0x100,
483 .map_io
= anubis_map_io
,
484 .init_machine
= anubis_init
,
485 .init_irq
= s3c24xx_init_irq
,
486 .timer
= &s3c24xx_timer
,