drivers/usb/host/ohci-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ohci fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * History:
  19  *
  20  * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
  21  * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
  22  * 2003/02/24 show registers in sysfs (Kevin Brosius)
  23  *
  24  * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
  25  *      bandwidth accounting; if debugging, show schedules in driverfs
  26  * 2002/07/19 fixes to management of ED and schedule state.
  27  * 2002/06/09 SA-1111 support (Christopher Hoover)
  28  * 2002/06/01 remember frame when HC won't see EDs any more; use that info
  29  *      to fix urb unlink races caused by interrupt latency assumptions;
  30  *      minor ED field and function naming updates
  31  * 2002/01/18 package as a patch for 2.5.3; this should match the
  32  *      2.4.17 kernel modulo some bugs being fixed.
  33  *
  34  * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
  35  *      from post-2.4.5 patches.
  36  * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
  37  * 2001/09/07 match PCI PM changes, errnos from Linus' tree
  38  * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
  39  *      pbook pci quirks gone (please fix pbook pci sw!) (db)
  40  *
  41  * 2001/04/08 Identify version on module load (gb)
  42  * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
  43         pci_map_single (db)
  44  * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
  45  * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
  46  *
  47  * 2000/09/26 fixed races in removing the private portion of the urb
  48  * 2000/09/07 disable bulk and control lists when unlinking the last
  49  *      endpoint descriptor in order to avoid unrecoverable errors on
  50  *      the Lucent chips. (rwc@sgi)
  51  * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
  52  *      urb unlink probs, indentation fixes
  53  * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
  54  *      device unplugs.
  55  * 2000/06/28 use PCI hotplug framework, for better power management
  56  *      and for Cardbus support (David Brownell)
  57  * 2000/earlier:  fixes for NEC/Lucent chips; suspend/resume handling
  58  *      when the controller loses power; handle UE; cleanup; ...
  59  *
  60  * v5.2 1999/12/07 URB 3rd preview,
  61  * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
  62  * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
  63  *      i386: HUB, Keyboard, Mouse, Printer
  64  *
  65  * v4.3 1999/10/27 multiple HCs, bulk_request
  66  * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
  67  * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
  68  * v4.0 1999/08/18
  69  * v3.0 1999/06/25
  70  * v2.1 1999/05/09  code clean up
  71  * v2.0 1999/05/04
  72  * v1.0 1999/04/27 initial release
  73  *
  74  * This file is licenced under the GPL.
  75  */
  76
  77 #include <linux/module.h>
  78 #include <linux/moduleparam.h>
  79 #include <linux/pci.h>
  80 #include <linux/kernel.h>
  81 #include <linux/delay.h>
  82 #include <linux/ioport.h>
  83 #include <linux/sched.h>
  84 #include <linux/slab.h>
  85 #include <linux/smp_lock.h>
  86 #include <linux/errno.h>
  87 #include <linux/init.h>
  88 #include <linux/timer.h>
  89 #include <linux/list.h>
  90 #include <linux/usb.h>
  91 #include <linux/usb/otg.h>
  92 #include <linux/dma-mapping.h>
  93 #include <linux/dmapool.h>
  94 #include <linux/reboot.h>
  95
  96 #include <asm/io.h>
  97 #include <asm/irq.h>
  98 #include <asm/system.h>
  99 #include <asm/unaligned.h>
 100 #include <asm/byteorder.h>
 101
 102 #include "../core/hcd.h"
 103
 104 #define DRIVER_VERSION "2006 August 04"
 105 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
 106 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
 107
 108 /*-------------------------------------------------------------------------*/
 109
 110 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
 111
 112 /* For initializing controller (mask in an HCFS mode too) */
 113 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
 114 #define OHCI_INTR_INIT \
 115                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
 116                 | OHCI_INTR_RD | OHCI_INTR_WDH)
 117
 118 #ifdef __hppa__
 119 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
 120 #define IR_DISABLE
 121 #endif
 122
 123 #ifdef CONFIG_ARCH_OMAP
 124 /* OMAP doesn't support IR (no SMM; not needed) */
 125 #define IR_DISABLE
 126 #endif
 127
 128 /*-------------------------------------------------------------------------*/
 129
 130 static const char       hcd_name [] = "ohci_hcd";
 131
 132 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
 133
 134 #include "ohci.h"
 135
 136 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
 137 static int ohci_init (struct ohci_hcd *ohci);
 138 static void ohci_stop (struct usb_hcd *hcd);
 139 static int ohci_reboot (struct notifier_block *, unsigned long , void *);
 140
 141 #include "ohci-hub.c"
 142 #include "ohci-dbg.c"
 143 #include "ohci-mem.c"
 144 #include "ohci-q.c"
 145
 146
 147 /*
 148  * On architectures with edge-triggered interrupts we must never return
 149  * IRQ_NONE.
 150  */
 151 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
 152 #define IRQ_NOTMINE     IRQ_HANDLED
 153 #else
 154 #define IRQ_NOTMINE     IRQ_NONE
 155 #endif
 156
 157
 158 /* Some boards misreport power switching/overcurrent */
 159 static int distrust_firmware = 1;
 160 module_param (distrust_firmware, bool, 0);
 161 MODULE_PARM_DESC (distrust_firmware,
 162         "true to distrust firmware power/overcurrent setup");
 163
 164 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
 165 static int no_handshake = 0;
 166 module_param (no_handshake, bool, 0);
 167 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
 168
 169 /*-------------------------------------------------------------------------*/
 170
 171 /*
 172  * queue up an urb for anything except the root hub
 173  */
 174 static int ohci_urb_enqueue (
 175         struct usb_hcd  *hcd,
 176         struct usb_host_endpoint *ep,
 177         struct urb      *urb,
 178         gfp_t           mem_flags
 179 ) {
 180         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
 181         struct ed       *ed;
 182         urb_priv_t      *urb_priv;
 183         unsigned int    pipe = urb->pipe;
 184         int             i, size = 0;
 185         unsigned long   flags;
 186         int             retval = 0;
 187
 188 #ifdef OHCI_VERBOSE_DEBUG
 189         urb_print (urb, "SUB", usb_pipein (pipe));
 190 #endif
 191
 192         /* every endpoint has a ed, locate and maybe (re)initialize it */
 193         if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
 194                 return -ENOMEM;
 195
 196         /* for the private part of the URB we need the number of TDs (size) */
 197         switch (ed->type) {
 198                 case PIPE_CONTROL:
 199                         /* td_submit_urb() doesn't yet handle these */
 200                         if (urb->transfer_buffer_length > 4096)
 201                                 return -EMSGSIZE;
 202
 203                         /* 1 TD for setup, 1 for ACK, plus ... */
 204                         size = 2;
 205                         /* FALLTHROUGH */
 206                 // case PIPE_INTERRUPT:
 207                 // case PIPE_BULK:
 208                 default:
 209                         /* one TD for every 4096 Bytes (can be upto 8K) */
 210                         size += urb->transfer_buffer_length / 4096;
 211                         /* ... and for any remaining bytes ... */
 212                         if ((urb->transfer_buffer_length % 4096) != 0)
 213                                 size++;
 214                         /* ... and maybe a zero length packet to wrap it up */
 215                         if (size == 0)
 216                                 size++;
 217                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 218                                 && (urb->transfer_buffer_length
 219                                         % usb_maxpacket (urb->dev, pipe,
 220                                                 usb_pipeout (pipe))) == 0)
 221                                 size++;
 222                         break;
 223                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
 224                         size = urb->number_of_packets;
 225                         break;
 226         }
 227
 228         /* allocate the private part of the URB */
 229         urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
 230                         mem_flags);
 231         if (!urb_priv)
 232                 return -ENOMEM;
 233         memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
 234         INIT_LIST_HEAD (&urb_priv->pending);
 235         urb_priv->length = size;
 236         urb_priv->ed = ed;
 237
 238         /* allocate the TDs (deferring hash chain updates) */
 239         for (i = 0; i < size; i++) {
 240                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
 241                 if (!urb_priv->td [i]) {
 242                         urb_priv->length = i;
 243                         urb_free_priv (ohci, urb_priv);
 244                         return -ENOMEM;
 245                 }
 246         }
 247
 248         spin_lock_irqsave (&ohci->lock, flags);
 249
 250         /* don't submit to a dead HC */
 251         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 252                 retval = -ENODEV;
 253                 goto fail;
 254         }
 255         if (!HC_IS_RUNNING(hcd->state)) {
 256                 retval = -ENODEV;
 257                 goto fail;
 258         }
 259
 260         /* in case of unlink-during-submit */
 261         spin_lock (&urb->lock);
 262         if (urb->status != -EINPROGRESS) {
 263                 spin_unlock (&urb->lock);
 264                 urb->hcpriv = urb_priv;
 265                 finish_urb (ohci, urb, NULL);
 266                 retval = 0;
 267                 goto fail;
 268         }
 269
 270         /* schedule the ed if needed */
 271         if (ed->state == ED_IDLE) {
 272                 retval = ed_schedule (ohci, ed);
 273                 if (retval < 0)
 274                         goto fail0;
 275                 if (ed->type == PIPE_ISOCHRONOUS) {
 276                         u16     frame = ohci_frame_no(ohci);
 277
 278                         /* delay a few frames before the first TD */
 279                         frame += max_t (u16, 8, ed->interval);
 280                         frame &= ~(ed->interval - 1);
 281                         frame |= ed->branch;
 282                         urb->start_frame = frame;
 283
 284                         /* yes, only URB_ISO_ASAP is supported, and
 285                          * urb->start_frame is never used as input.
 286                          */
 287                 }
 288         } else if (ed->type == PIPE_ISOCHRONOUS)
 289                 urb->start_frame = ed->last_iso + ed->interval;
 290
 291         /* fill the TDs and link them to the ed; and
 292          * enable that part of the schedule, if needed
 293          * and update count of queued periodic urbs
 294          */
 295         urb->hcpriv = urb_priv;
 296         td_submit_urb (ohci, urb);
 297
 298 fail0:
 299         spin_unlock (&urb->lock);
 300 fail:
 301         if (retval)
 302                 urb_free_priv (ohci, urb_priv);
 303         spin_unlock_irqrestore (&ohci->lock, flags);
 304         return retval;
 305 }
 306
 307 /*
 308  * decouple the URB from the HC queues (TDs, urb_priv); it's
 309  * already marked using urb->status.  reporting is always done
 310  * asynchronously, and we might be dealing with an urb that's
 311  * partially transferred, or an ED with other urbs being unlinked.
 312  */
 313 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
 314 {
 315         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 316         unsigned long           flags;
 317
 318 #ifdef OHCI_VERBOSE_DEBUG
 319         urb_print (urb, "UNLINK", 1);
 320 #endif
 321
 322         spin_lock_irqsave (&ohci->lock, flags);
 323         if (HC_IS_RUNNING(hcd->state)) {
 324                 urb_priv_t  *urb_priv;
 325
 326                 /* Unless an IRQ completed the unlink while it was being
 327                  * handed to us, flag it for unlink and giveback, and force
 328                  * some upcoming INTR_SF to call finish_unlinks()
 329                  */
 330                 urb_priv = urb->hcpriv;
 331                 if (urb_priv) {
 332                         if (urb_priv->ed->state == ED_OPER)
 333                                 start_ed_unlink (ohci, urb_priv->ed);
 334                 }
 335         } else {
 336                 /*
 337                  * with HC dead, we won't respect hc queue pointers
 338                  * any more ... just clean up every urb's memory.
 339                  */
 340                 if (urb->hcpriv)
 341                         finish_urb (ohci, urb, NULL);
 342         }
 343         spin_unlock_irqrestore (&ohci->lock, flags);
 344         return 0;
 345 }
 346
 347 /*-------------------------------------------------------------------------*/
 348
 349 /* frees config/altsetting state for endpoints,
 350  * including ED memory, dummy TD, and bulk/intr data toggle
 351  */
 352
 353 static void
 354 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 355 {
 356         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 357         unsigned long           flags;
 358         struct ed               *ed = ep->hcpriv;
 359         unsigned                limit = 1000;
 360
 361         /* ASSERT:  any requests/urbs are being unlinked */
 362         /* ASSERT:  nobody can be submitting urbs for this any more */
 363
 364         if (!ed)
 365                 return;
 366
 367 rescan:
 368         spin_lock_irqsave (&ohci->lock, flags);
 369
 370         if (!HC_IS_RUNNING (hcd->state)) {
 371 sanitize:
 372                 ed->state = ED_IDLE;
 373                 finish_unlinks (ohci, 0, NULL);
 374         }
 375
 376         switch (ed->state) {
 377         case ED_UNLINK:         /* wait for hw to finish? */
 378                 /* major IRQ delivery trouble loses INTR_SF too... */
 379                 if (limit-- == 0) {
 380                         ohci_warn (ohci, "IRQ INTR_SF lossage\n");
 381                         goto sanitize;
 382                 }
 383                 spin_unlock_irqrestore (&ohci->lock, flags);
 384                 schedule_timeout_uninterruptible(1);
 385                 goto rescan;
 386         case ED_IDLE:           /* fully unlinked */
 387                 if (list_empty (&ed->td_list)) {
 388                         td_free (ohci, ed->dummy);
 389                         ed_free (ohci, ed);
 390                         break;
 391                 }
 392                 /* else FALL THROUGH */
 393         default:
 394                 /* caller was supposed to have unlinked any requests;
 395                  * that's not our job.  can't recover; must leak ed.
 396                  */
 397                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
 398                         ed, ep->desc.bEndpointAddress, ed->state,
 399                         list_empty (&ed->td_list) ? "" : " (has tds)");
 400                 td_free (ohci, ed->dummy);
 401                 break;
 402         }
 403         ep->hcpriv = NULL;
 404         spin_unlock_irqrestore (&ohci->lock, flags);
 405         return;
 406 }
 407
 408 static int ohci_get_frame (struct usb_hcd *hcd)
 409 {
 410         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 411
 412         return ohci_frame_no(ohci);
 413 }
 414
 415 static void ohci_usb_reset (struct ohci_hcd *ohci)
 416 {
 417         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
 418         ohci->hc_control &= OHCI_CTRL_RWC;
 419         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 420 }
 421
 422 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
 423  * other cases where the next software may expect clean state from the
 424  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 425  */
 426 static int
 427 ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
 428 {
 429         struct ohci_hcd *ohci;
 430
 431         ohci = container_of (block, struct ohci_hcd, reboot_notifier);
 432         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 433         ohci_usb_reset (ohci);
 434         /* flush the writes */
 435         (void) ohci_readl (ohci, &ohci->regs->control);
 436         return 0;
 437 }
 438
 439 /*-------------------------------------------------------------------------*
 440  * HC functions
 441  *-------------------------------------------------------------------------*/
 442
 443 /* init memory, and kick BIOS/SMM off */
 444
 445 static int ohci_init (struct ohci_hcd *ohci)
 446 {
 447         int ret;
 448         struct usb_hcd *hcd = ohci_to_hcd(ohci);
 449
 450         disable (ohci);
 451         ohci->regs = hcd->regs;
 452
 453         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
 454          * was never needed for most non-PCI systems ... remove the code?
 455          */
 456
 457 #ifndef IR_DISABLE
 458         /* SMM owns the HC?  not for long! */
 459         if (!no_handshake && ohci_readl (ohci,
 460                                         &ohci->regs->control) & OHCI_CTRL_IR) {
 461                 u32 temp;
 462
 463                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
 464
 465                 /* this timeout is arbitrary.  we make it long, so systems
 466                  * depending on usb keyboards may be usable even if the
 467                  * BIOS/SMM code seems pretty broken.
 468                  */
 469                 temp = 500;     /* arbitrary: five seconds */
 470
 471                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
 472                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
 473                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
 474                         msleep (10);
 475                         if (--temp == 0) {
 476                                 ohci_err (ohci, "USB HC takeover failed!"
 477                                         "  (BIOS/SMM bug)\n");
 478                                 return -EBUSY;
 479                         }
 480                 }
 481                 ohci_usb_reset (ohci);
 482         }
 483 #endif
 484
 485         /* Disable HC interrupts */
 486         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 487
 488         /* flush the writes, and save key bits like RWC */
 489         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
 490                 ohci->hc_control |= OHCI_CTRL_RWC;
 491
 492         /* Read the number of ports unless overridden */
 493         if (ohci->num_ports == 0)
 494                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
 495
 496         if (ohci->hcca)
 497                 return 0;
 498
 499         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
 500                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
 501         if (!ohci->hcca)
 502                 return -ENOMEM;
 503
 504         if ((ret = ohci_mem_init (ohci)) < 0)
 505                 ohci_stop (hcd);
 506         else {
 507                 register_reboot_notifier (&ohci->reboot_notifier);
 508                 create_debug_files (ohci);
 509         }
 510
 511         return ret;
 512 }
 513
 514 /*-------------------------------------------------------------------------*/
 515
 516 /* Start an OHCI controller, set the BUS operational
 517  * resets USB and controller
 518  * enable interrupts
 519  */
 520 static int ohci_run (struct ohci_hcd *ohci)
 521 {
 522         u32                     mask, temp;
 523         int                     first = ohci->fminterval == 0;
 524         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
 525
 526         disable (ohci);
 527
 528         /* boot firmware should have set this up (5.1.1.3.1) */
 529         if (first) {
 530
 531                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
 532                 ohci->fminterval = temp & 0x3fff;
 533                 if (ohci->fminterval != FI)
 534                         ohci_dbg (ohci, "fminterval delta %d\n",
 535                                 ohci->fminterval - FI);
 536                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
 537                 /* also: power/overcurrent flags in roothub.a */
 538         }
 539
 540         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
 541          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
 542          * or if bus glue did the same (e.g. for PCI add-in cards with
 543          * PCI PM support).
 544          */
 545         ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
 546                         hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
 547                         ohci_readl (ohci, &ohci->regs->control));
 548         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
 549                         && !device_may_wakeup(hcd->self.controller))
 550                 device_init_wakeup(hcd->self.controller, 1);
 551
 552         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
 553         case OHCI_USB_OPER:
 554                 temp = 0;
 555                 break;
 556         case OHCI_USB_SUSPEND:
 557         case OHCI_USB_RESUME:
 558                 ohci->hc_control &= OHCI_CTRL_RWC;
 559                 ohci->hc_control |= OHCI_USB_RESUME;
 560                 temp = 10 /* msec wait */;
 561                 break;
 562         // case OHCI_USB_RESET:
 563         default:
 564                 ohci->hc_control &= OHCI_CTRL_RWC;
 565                 ohci->hc_control |= OHCI_USB_RESET;
 566                 temp = 50 /* msec wait */;
 567                 break;
 568         }
 569         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 570         // flush the writes
 571         (void) ohci_readl (ohci, &ohci->regs->control);
 572         msleep(temp);
 573         temp = roothub_a (ohci);
 574         if (!(temp & RH_A_NPS)) {
 575                 /* power down each port */
 576                 for (temp = 0; temp < ohci->num_ports; temp++)
 577                         ohci_writel (ohci, RH_PS_LSDA,
 578                                 &ohci->regs->roothub.portstatus [temp]);
 579         }
 580         // flush those writes
 581         (void) ohci_readl (ohci, &ohci->regs->control);
 582         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
 583
 584         /* 2msec timelimit here means no irqs/preempt */
 585         spin_lock_irq (&ohci->lock);
 586
 587 retry:
 588         /* HC Reset requires max 10 us delay */
 589         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
 590         temp = 30;      /* ... allow extra time */
 591         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
 592                 if (--temp == 0) {
 593                         spin_unlock_irq (&ohci->lock);
 594                         ohci_err (ohci, "USB HC reset timed out!\n");
 595                         return -1;
 596                 }
 597                 udelay (1);
 598         }
 599
 600         /* now we're in the SUSPEND state ... must go OPERATIONAL
 601          * within 2msec else HC enters RESUME
 602          *
 603          * ... but some hardware won't init fmInterval "by the book"
 604          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
 605          * this if we write fmInterval after we're OPERATIONAL.
 606          * Unclear about ALi, ServerWorks, and others ... this could
 607          * easily be a longstanding bug in chip init on Linux.
 608          */
 609         if (ohci->flags & OHCI_QUIRK_INITRESET) {
 610                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 611                 // flush those writes
 612                 (void) ohci_readl (ohci, &ohci->regs->control);
 613         }
 614
 615         /* Tell the controller where the control and bulk lists are
 616          * The lists are empty now. */
 617         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
 618         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
 619
 620         /* a reset clears this */
 621         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
 622
 623         periodic_reinit (ohci);
 624
 625         /* some OHCI implementations are finicky about how they init.
 626          * bogus values here mean not even enumeration could work.
 627          */
 628         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
 629                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
 630                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
 631                         ohci->flags |= OHCI_QUIRK_INITRESET;
 632                         ohci_dbg (ohci, "enabling initreset quirk\n");
 633                         goto retry;
 634                 }
 635                 spin_unlock_irq (&ohci->lock);
 636                 ohci_err (ohci, "init err (%08x %04x)\n",
 637                         ohci_readl (ohci, &ohci->regs->fminterval),
 638                         ohci_readl (ohci, &ohci->regs->periodicstart));
 639                 return -EOVERFLOW;
 640         }
 641
 642         /* use rhsc irqs after khubd is fully initialized */
 643         hcd->poll_rh = 1;
 644         hcd->uses_new_polling = 1;
 645
 646         /* start controller operations */
 647         ohci->hc_control &= OHCI_CTRL_RWC;
 648         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
 649         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
 650         hcd->state = HC_STATE_RUNNING;
 651
 652         /* wake on ConnectStatusChange, matching external hubs */
 653         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
 654
 655         /* Choose the interrupts we care about now, others later on demand */
 656         mask = OHCI_INTR_INIT;
 657         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
 658         ohci_writel (ohci, mask, &ohci->regs->intrenable);
 659
 660         /* handle root hub init quirks ... */
 661         temp = roothub_a (ohci);
 662         temp &= ~(RH_A_PSM | RH_A_OCPM);
 663         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
 664                 /* NSC 87560 and maybe others */
 665                 temp |= RH_A_NOCP;
 666                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
 667                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 668         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
 669                 /* hub power always on; required for AMD-756 and some
 670                  * Mac platforms.  ganged overcurrent reporting, if any.
 671                  */
 672                 temp |= RH_A_NPS;
 673                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
 674         }
 675         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
 676         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
 677                                                 &ohci->regs->roothub.b);
 678         // flush those writes
 679         (void) ohci_readl (ohci, &ohci->regs->control);
 680
 681         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 682         spin_unlock_irq (&ohci->lock);
 683
 684         // POTPGT delay is bits 24-31, in 2 ms units.
 685         mdelay ((temp >> 23) & 0x1fe);
 686         hcd->state = HC_STATE_RUNNING;
 687
 688         ohci_dump (ohci, 1);
 689
 690         return 0;
 691 }
 692
 693 /*-------------------------------------------------------------------------*/
 694
 695 /* an interrupt happens */
 696
 697 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
 698 {
 699         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 700         struct ohci_regs __iomem *regs = ohci->regs;
 701         int                     ints;
 702
 703         /* we can eliminate a (slow) ohci_readl()
 704            if _only_ WDH caused this irq */
 705         if ((ohci->hcca->done_head != 0)
 706                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
 707                                 & 0x01)) {
 708                 ints =  OHCI_INTR_WDH;
 709
 710         /* cardbus/... hardware gone before remove() */
 711         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
 712                 disable (ohci);
 713                 ohci_dbg (ohci, "device removed!\n");
 714                 return IRQ_HANDLED;
 715
 716         /* interrupt for some other device? */
 717         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
 718                 return IRQ_NOTMINE;
 719         }
 720
 721         /* NOTE:  vendors didn't always make the same implementation
 722          * choices for RHSC.  Sometimes it triggers on an edge (like
 723          * setting and maybe clearing a port status change bit); and
 724          * it's level-triggered on other silicon, active until khubd
 725          * clears all active port status change bits.  Poll by timer
 726          * til it's fully debounced and the difference won't matter.
 727          */
 728         if (ints & OHCI_INTR_RHSC) {
 729                 ohci_vdbg (ohci, "rhsc\n");
 730                 ohci_writel (ohci, OHCI_INTR_RHSC, &regs->intrdisable);
 731                 hcd->poll_rh = 1;
 732                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
 733                 ohci_writel (ohci, OHCI_INTR_RHSC, &regs->intrstatus);
 734                 usb_hcd_poll_rh_status(hcd);
 735         }
 736
 737         if (ints & OHCI_INTR_UE) {
 738                 disable (ohci);
 739                 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
 740                 // e.g. due to PCI Master/Target Abort
 741
 742                 ohci_dump (ohci, 1);
 743                 ohci_usb_reset (ohci);
 744         }
 745
 746         if (ints & OHCI_INTR_RD) {
 747                 ohci_vdbg (ohci, "resume detect\n");
 748                 ohci_writel (ohci, OHCI_INTR_RD, &regs->intrstatus);
 749                 if (hcd->state != HC_STATE_QUIESCING)
 750                         usb_hcd_resume_root_hub(hcd);
 751         }
 752
 753         if (ints & OHCI_INTR_WDH) {
 754                 if (HC_IS_RUNNING(hcd->state))
 755                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
 756                 spin_lock (&ohci->lock);
 757                 dl_done_list (ohci, ptregs);
 758                 spin_unlock (&ohci->lock);
 759                 if (HC_IS_RUNNING(hcd->state))
 760                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
 761         }
 762
 763         /* could track INTR_SO to reduce available PCI/... bandwidth */
 764
 765         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
 766          * when there's still unlinking to be done (next frame).
 767          */
 768         spin_lock (&ohci->lock);
 769         if (ohci->ed_rm_list)
 770                 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
 771         if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
 772                         && HC_IS_RUNNING(hcd->state))
 773                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
 774         spin_unlock (&ohci->lock);
 775
 776         if (HC_IS_RUNNING(hcd->state)) {
 777                 ohci_writel (ohci, ints, &regs->intrstatus);
 778                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
 779                 // flush those writes
 780                 (void) ohci_readl (ohci, &ohci->regs->control);
 781         }
 782
 783         return IRQ_HANDLED;
 784 }
 785
 786 /*-------------------------------------------------------------------------*/
 787
 788 static void ohci_stop (struct usb_hcd *hcd)
 789 {
 790         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
 791
 792         ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
 793                 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
 794                 hcd->state);
 795         ohci_dump (ohci, 1);
 796
 797         flush_scheduled_work();
 798
 799         ohci_usb_reset (ohci);
 800         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
 801
 802         remove_debug_files (ohci);
 803         unregister_reboot_notifier (&ohci->reboot_notifier);
 804         ohci_mem_cleanup (ohci);
 805         if (ohci->hcca) {
 806                 dma_free_coherent (hcd->self.controller,
 807                                 sizeof *ohci->hcca,
 808                                 ohci->hcca, ohci->hcca_dma);
 809                 ohci->hcca = NULL;
 810                 ohci->hcca_dma = 0;
 811         }
 812 }
 813
 814 /*-------------------------------------------------------------------------*/
 815
 816 /* must not be called from interrupt context */
 817
 818 #ifdef  CONFIG_PM
 819
 820 static int ohci_restart (struct ohci_hcd *ohci)
 821 {
 822         int temp;
 823         int i;
 824         struct urb_priv *priv;
 825
 826         /* mark any devices gone, so they do nothing till khubd disconnects.
 827          * recycle any "live" eds/tds (and urbs) right away.
 828          * later, khubd disconnect processing will recycle the other state,
 829          * (either as disconnect/reconnect, or maybe someday as a reset).
 830          */
 831         spin_lock_irq(&ohci->lock);
 832         disable (ohci);
 833         usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub);
 834         if (!list_empty (&ohci->pending))
 835                 ohci_dbg(ohci, "abort schedule...\n");
 836         list_for_each_entry (priv, &ohci->pending, pending) {
 837                 struct urb      *urb = priv->td[0]->urb;
 838                 struct ed       *ed = priv->ed;
 839
 840                 switch (ed->state) {
 841                 case ED_OPER:
 842                         ed->state = ED_UNLINK;
 843                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
 844                         ed_deschedule (ohci, ed);
 845
 846                         ed->ed_next = ohci->ed_rm_list;
 847                         ed->ed_prev = NULL;
 848                         ohci->ed_rm_list = ed;
 849                         /* FALLTHROUGH */
 850                 case ED_UNLINK:
 851                         break;
 852                 default:
 853                         ohci_dbg(ohci, "bogus ed %p state %d\n",
 854                                         ed, ed->state);
 855                 }
 856
 857                 spin_lock (&urb->lock);
 858                 urb->status = -ESHUTDOWN;
 859                 spin_unlock (&urb->lock);
 860         }
 861         finish_unlinks (ohci, 0, NULL);
 862         spin_unlock_irq(&ohci->lock);
 863
 864         /* paranoia, in case that didn't work: */
 865
 866         /* empty the interrupt branches */
 867         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
 868         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
 869
 870         /* no EDs to remove */
 871         ohci->ed_rm_list = NULL;
 872
 873         /* empty control and bulk lists */
 874         ohci->ed_controltail = NULL;
 875         ohci->ed_bulktail    = NULL;
 876
 877         if ((temp = ohci_run (ohci)) < 0) {
 878                 ohci_err (ohci, "can't restart, %d\n", temp);
 879                 return temp;
 880         } else {
 881                 /* here we "know" root ports should always stay powered,
 882                  * and that if we try to turn them back on the root hub
 883                  * will respond to CSC processing.
 884                  */
 885                 i = ohci->num_ports;
 886                 while (i--)
 887                         ohci_writel (ohci, RH_PS_PSS,
 888                                 &ohci->regs->roothub.portstatus [i]);
 889                 ohci_dbg (ohci, "restart complete\n");
 890         }
 891         return 0;
 892 }
 893 #endif
 894
 895 /*-------------------------------------------------------------------------*/
 896
 897 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
 898
 899 MODULE_AUTHOR (DRIVER_AUTHOR);
 900 MODULE_DESCRIPTION (DRIVER_INFO);
 901 MODULE_LICENSE ("GPL");
 902
 903 #ifdef CONFIG_PCI
 904 #include "ohci-pci.c"
 905 #endif
 906
 907 #ifdef CONFIG_SA1111
 908 #include "ohci-sa1111.c"
 909 #endif
 910
 911 #ifdef CONFIG_ARCH_S3C2410
 912 #include "ohci-s3c2410.c"
 913 #endif
 914
 915 #ifdef CONFIG_ARCH_OMAP
 916 #include "ohci-omap.c"
 917 #endif
 918
 919 #ifdef CONFIG_ARCH_LH7A404
 920 #include "ohci-lh7a404.c"
 921 #endif
 922
 923 #ifdef CONFIG_PXA27x
 924 #include "ohci-pxa27x.c"
 925 #endif
 926
 927 #ifdef CONFIG_ARCH_EP93XX
 928 #include "ohci-ep93xx.c"
 929 #endif
 930
 931 #ifdef CONFIG_SOC_AU1X00
 932 #include "ohci-au1xxx.c"
 933 #endif
 934
 935 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
 936 #include "ohci-ppc-soc.c"
 937 #endif
 938
 939 #if defined(CONFIG_ARCH_AT91RM9200) || defined(CONFIG_ARCH_AT91SAM9261)
 940 #include "ohci-at91.c"
 941 #endif
 942
 943 #ifdef CONFIG_ARCH_PNX4008
 944 #include "ohci-pnx4008.c"
 945 #endif
 946
 947 #if !(defined(CONFIG_PCI) \
 948       || defined(CONFIG_SA1111) \
 949       || defined(CONFIG_ARCH_S3C2410) \
 950       || defined(CONFIG_ARCH_OMAP) \
 951       || defined (CONFIG_ARCH_LH7A404) \
 952       || defined (CONFIG_PXA27x) \
 953       || defined (CONFIG_ARCH_EP93XX) \
 954       || defined (CONFIG_SOC_AU1X00) \
 955       || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
 956       || defined (CONFIG_ARCH_AT91RM9200) \
 957       || defined (CONFIG_ARCH_AT91SAM9261) \
 958       || defined (CONFIG_ARCH_PNX4008) \
 959         )
 960 #error "missing bus glue for ohci-hcd"
 961 #endif