arch/x86/pci/irq.c

   1 /*
   2  *      Low-Level PCI Support for PC -- Routing of Interrupts
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   5  */
   6
   7 #include <linux/types.h>
   8 #include <linux/kernel.h>
   9 #include <linux/pci.h>
  10 #include <linux/init.h>
  11 #include <linux/slab.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/dmi.h>
  14 #include <asm/io.h>
  15 #include <asm/smp.h>
  16 #include <asm/io_apic.h>
  17 #include <linux/irq.h>
  18 #include <linux/acpi.h>
  19
  20 #include "pci.h"
  21
  22 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  23 #define PIRQ_VERSION 0x0100
  24
  25 static int broken_hp_bios_irq9;
  26 static int acer_tm360_irqrouting;
  27
  28 static struct irq_routing_table *pirq_table;
  29
  30 static int pirq_enable_irq(struct pci_dev *dev);
  31
  32 /*
  33  * Never use: 0, 1, 2 (timer, keyboard, and cascade)
  34  * Avoid using: 13, 14 and 15 (FP error and IDE).
  35  * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
  36  */
  37 unsigned int pcibios_irq_mask = 0xfff8;
  38
  39 static int pirq_penalty[16] = {
  40         1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
  41         0, 0, 0, 0, 1000, 100000, 100000, 100000
  42 };
  43
  44 struct irq_router {
  45         char *name;
  46         u16 vendor, device;
  47         int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
  48         int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq, int new);
  49 };
  50
  51 struct irq_router_handler {
  52         u16 vendor;
  53         int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
  54 };
  55
  56 int (*pcibios_enable_irq)(struct pci_dev *dev) = NULL;
  57 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
  58
  59 /*
  60  *  Check passed address for the PCI IRQ Routing Table signature
  61  *  and perform checksum verification.
  62  */
  63
  64 static inline struct irq_routing_table * pirq_check_routing_table(u8 *addr)
  65 {
  66         struct irq_routing_table *rt;
  67         int i;
  68         u8 sum;
  69
  70         rt = (struct irq_routing_table *) addr;
  71         if (rt->signature != PIRQ_SIGNATURE ||
  72             rt->version != PIRQ_VERSION ||
  73             rt->size % 16 ||
  74             rt->size < sizeof(struct irq_routing_table))
  75                 return NULL;
  76         sum = 0;
  77         for (i=0; i < rt->size; i++)
  78                 sum += addr[i];
  79         if (!sum) {
  80                 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);
  81                 return rt;
  82         }
  83         return NULL;
  84 }
  85
  86
  87
  88 /*
  89  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
  90  */
  91
  92 static struct irq_routing_table * __init pirq_find_routing_table(void)
  93 {
  94         u8 *addr;
  95         struct irq_routing_table *rt;
  96
  97         if (pirq_table_addr) {
  98                 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
  99                 if (rt)
 100                         return rt;
 101                 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
 102         }
 103         for(addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
 104                 rt = pirq_check_routing_table(addr);
 105                 if (rt)
 106                         return rt;
 107         }
 108         return NULL;
 109 }
 110
 111 /*
 112  *  If we have a IRQ routing table, use it to search for peer host
 113  *  bridges.  It's a gross hack, but since there are no other known
 114  *  ways how to get a list of buses, we have to go this way.
 115  */
 116
 117 static void __init pirq_peer_trick(void)
 118 {
 119         struct irq_routing_table *rt = pirq_table;
 120         u8 busmap[256];
 121         int i;
 122         struct irq_info *e;
 123
 124         memset(busmap, 0, sizeof(busmap));
 125         for(i=0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
 126                 e = &rt->slots[i];
 127 #ifdef DEBUG
 128                 {
 129                         int j;
 130                         DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
 131                         for(j=0; j<4; j++)
 132                                 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
 133                         DBG("\n");
 134                 }
 135 #endif
 136                 busmap[e->bus] = 1;
 137         }
 138         for(i = 1; i < 256; i++) {
 139                 if (!busmap[i] || pci_find_bus(0, i))
 140                         continue;
 141                 if (pci_scan_bus_with_sysdata(i))
 142                         printk(KERN_INFO "PCI: Discovered primary peer "
 143                                "bus %02x [IRQ]\n", i);
 144         }
 145         pcibios_last_bus = -1;
 146 }
 147
 148 /*
 149  *  Code for querying and setting of IRQ routes on various interrupt routers.
 150  */
 151
 152 void eisa_set_level_irq(unsigned int irq)
 153 {
 154         unsigned char mask = 1 << (irq & 7);
 155         unsigned int port = 0x4d0 + (irq >> 3);
 156         unsigned char val;
 157         static u16 eisa_irq_mask;
 158
 159         if (irq >= 16 || (1 << irq) & eisa_irq_mask)
 160                 return;
 161
 162         eisa_irq_mask |= (1 << irq);
 163         printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
 164         val = inb(port);
 165         if (!(val & mask)) {
 166                 DBG(KERN_DEBUG " -> edge");
 167                 outb(val | mask, port);
 168         }
 169 }
 170
 171 /*
 172  * Common IRQ routing practice: nybbles in config space,
 173  * offset by some magic constant.
 174  */
 175 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
 176 {
 177         u8 x;
 178         unsigned reg = offset + (nr >> 1);
 179
 180         pci_read_config_byte(router, reg, &x);
 181         return (nr & 1) ? (x >> 4) : (x & 0xf);
 182 }
 183
 184 static void write_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr, unsigned int val)
 185 {
 186         u8 x;
 187         unsigned reg = offset + (nr >> 1);
 188
 189         pci_read_config_byte(router, reg, &x);
 190         x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
 191         pci_write_config_byte(router, reg, x);
 192 }
 193
 194 /*
 195  * ALI pirq entries are damn ugly, and completely undocumented.
 196  * This has been figured out from pirq tables, and it's not a pretty
 197  * picture.
 198  */
 199 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 200 {
 201         static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
 202
 203         return irqmap[read_config_nybble(router, 0x48, pirq-1)];
 204 }
 205
 206 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 207 {
 208         static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
 209         unsigned int val = irqmap[irq];
 210
 211         if (val) {
 212                 write_config_nybble(router, 0x48, pirq-1, val);
 213                 return 1;
 214         }
 215         return 0;
 216 }
 217
 218 /*
 219  * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
 220  * just a pointer to the config space.
 221  */
 222 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 223 {
 224         u8 x;
 225
 226         pci_read_config_byte(router, pirq, &x);
 227         return (x < 16) ? x : 0;
 228 }
 229
 230 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 231 {
 232         pci_write_config_byte(router, pirq, irq);
 233         return 1;
 234 }
 235
 236 /*
 237  * The VIA pirq rules are nibble-based, like ALI,
 238  * but without the ugly irq number munging.
 239  * However, PIRQD is in the upper instead of lower 4 bits.
 240  */
 241 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 242 {
 243         return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
 244 }
 245
 246 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 247 {
 248         write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
 249         return 1;
 250 }
 251
 252 /*
 253  * The VIA pirq rules are nibble-based, like ALI,
 254  * but without the ugly irq number munging.
 255  * However, for 82C586, nibble map is different .
 256  */
 257 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 258 {
 259         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 260         return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
 261 }
 262
 263 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 264 {
 265         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 266         write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
 267         return 1;
 268 }
 269
 270 /*
 271  * ITE 8330G pirq rules are nibble-based
 272  * FIXME: pirqmap may be { 1, 0, 3, 2 },
 273  *        2+3 are both mapped to irq 9 on my system
 274  */
 275 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 276 {
 277         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 278         return read_config_nybble(router,0x43, pirqmap[pirq-1]);
 279 }
 280
 281 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 282 {
 283         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 284         write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
 285         return 1;
 286 }
 287
 288 /*
 289  * OPTI: high four bits are nibble pointer..
 290  * I wonder what the low bits do?
 291  */
 292 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 293 {
 294         return read_config_nybble(router, 0xb8, pirq >> 4);
 295 }
 296
 297 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 298 {
 299         write_config_nybble(router, 0xb8, pirq >> 4, irq);
 300         return 1;
 301 }
 302
 303 /*
 304  * Cyrix: nibble offset 0x5C
 305  * 0x5C bits 7:4 is INTB bits 3:0 is INTA
 306  * 0x5D bits 7:4 is INTD bits 3:0 is INTC
 307  */
 308 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 309 {
 310         return read_config_nybble(router, 0x5C, (pirq-1)^1);
 311 }
 312
 313 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 314 {
 315         write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
 316         return 1;
 317 }
 318
 319 /*
 320  *      PIRQ routing for SiS 85C503 router used in several SiS chipsets.
 321  *      We have to deal with the following issues here:
 322  *      - vendors have different ideas about the meaning of link values
 323  *      - some onboard devices (integrated in the chipset) have special
 324  *        links and are thus routed differently (i.e. not via PCI INTA-INTD)
 325  *      - different revision of the router have a different layout for
 326  *        the routing registers, particularly for the onchip devices
 327  *
 328  *      For all routing registers the common thing is we have one byte
 329  *      per routeable link which is defined as:
 330  *               bit 7      IRQ mapping enabled (0) or disabled (1)
 331  *               bits [6:4] reserved (sometimes used for onchip devices)
 332  *               bits [3:0] IRQ to map to
 333  *                   allowed: 3-7, 9-12, 14-15
 334  *                   reserved: 0, 1, 2, 8, 13
 335  *
 336  *      The config-space registers located at 0x41/0x42/0x43/0x44 are
 337  *      always used to route the normal PCI INT A/B/C/D respectively.
 338  *      Apparently there are systems implementing PCI routing table using
 339  *      link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
 340  *      We try our best to handle both link mappings.
 341  *
 342  *      Currently (2003-05-21) it appears most SiS chipsets follow the
 343  *      definition of routing registers from the SiS-5595 southbridge.
 344  *      According to the SiS 5595 datasheets the revision id's of the
 345  *      router (ISA-bridge) should be 0x01 or 0xb0.
 346  *
 347  *      Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
 348  *      Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
 349  *      They seem to work with the current routing code. However there is
 350  *      some concern because of the two USB-OHCI HCs (original SiS 5595
 351  *      had only one). YMMV.
 352  *
 353  *      Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
 354  *
 355  *      0x61:   IDEIRQ:
 356  *              bits [6:5] must be written 01
 357  *              bit 4 channel-select primary (0), secondary (1)
 358  *
 359  *      0x62:   USBIRQ:
 360  *              bit 6 OHCI function disabled (0), enabled (1)
 361  *
 362  *      0x6a:   ACPI/SCI IRQ: bits 4-6 reserved
 363  *
 364  *      0x7e:   Data Acq. Module IRQ - bits 4-6 reserved
 365  *
 366  *      We support USBIRQ (in addition to INTA-INTD) and keep the
 367  *      IDE, ACPI and DAQ routing untouched as set by the BIOS.
 368  *
 369  *      Currently the only reported exception is the new SiS 65x chipset
 370  *      which includes the SiS 69x southbridge. Here we have the 85C503
 371  *      router revision 0x04 and there are changes in the register layout
 372  *      mostly related to the different USB HCs with USB 2.0 support.
 373  *
 374  *      Onchip routing for router rev-id 0x04 (try-and-error observation)
 375  *
 376  *      0x60/0x61/0x62/0x63:    1xEHCI and 3xOHCI (companion) USB-HCs
 377  *                              bit 6-4 are probably unused, not like 5595
 378  */
 379
 380 #define PIRQ_SIS_IRQ_MASK       0x0f
 381 #define PIRQ_SIS_IRQ_DISABLE    0x80
 382 #define PIRQ_SIS_USB_ENABLE     0x40
 383
 384 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 385 {
 386         u8 x;
 387         int reg;
 388
 389         reg = pirq;
 390         if (reg >= 0x01 && reg <= 0x04)
 391                 reg += 0x40;
 392         pci_read_config_byte(router, reg, &x);
 393         return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
 394 }
 395
 396 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 397 {
 398         u8 x;
 399         int reg;
 400
 401         reg = pirq;
 402         if (reg >= 0x01 && reg <= 0x04)
 403                 reg += 0x40;
 404         pci_read_config_byte(router, reg, &x);
 405         x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
 406         x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
 407         pci_write_config_byte(router, reg, x);
 408         return 1;
 409 }
 410
 411
 412 /*
 413  * VLSI: nibble offset 0x74 - educated guess due to routing table and
 414  *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
 415  *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
 416  *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
 417  *       for the busbridge to the docking station.
 418  */
 419
 420 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 421 {
 422         if (pirq > 8) {
 423                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 424                 return 0;
 425         }
 426         return read_config_nybble(router, 0x74, pirq-1);
 427 }
 428
 429 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 430 {
 431         if (pirq > 8) {
 432                 printk(KERN_INFO "VLSI router pirq escape (%d)\n", pirq);
 433                 return 0;
 434         }
 435         write_config_nybble(router, 0x74, pirq-1, irq);
 436         return 1;
 437 }
 438
 439 /*
 440  * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
 441  * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
 442  * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
 443  * register is a straight binary coding of desired PIC IRQ (low nibble).
 444  *
 445  * The 'link' value in the PIRQ table is already in the correct format
 446  * for the Index register.  There are some special index values:
 447  * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
 448  * and 0x03 for SMBus.
 449  */
 450 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 451 {
 452         outb_p(pirq, 0xc00);
 453         return inb(0xc01) & 0xf;
 454 }
 455
 456 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 457 {
 458         outb_p(pirq, 0xc00);
 459         outb_p(irq, 0xc01);
 460         return 1;
 461 }
 462
 463 /* Support for AMD756 PCI IRQ Routing
 464  * Jhon H. Caicedo <jhcaiced@osso.org.co>
 465  * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
 466  * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
 467  * The AMD756 pirq rules are nibble-based
 468  * offset 0x56 0-3 PIRQA  4-7  PIRQB
 469  * offset 0x57 0-3 PIRQC  4-7  PIRQD
 470  */
 471 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 472 {
 473         u8 irq;
 474         irq = 0;
 475         if (pirq <= 4)
 476         {
 477                 irq = read_config_nybble(router, 0x56, pirq - 1);
 478         }
 479         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
 480                 dev->vendor, dev->device, pirq, irq);
 481         return irq;
 482 }
 483
 484 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 485 {
 486         printk(KERN_INFO "AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
 487                 dev->vendor, dev->device, pirq, irq);
 488         if (pirq <= 4)
 489         {
 490                 write_config_nybble(router, 0x56, pirq - 1, irq);
 491         }
 492         return 1;
 493 }
 494
 495 #ifdef CONFIG_PCI_BIOS
 496
 497 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 498 {
 499         struct pci_dev *bridge;
 500         int pin = pci_get_interrupt_pin(dev, &bridge);
 501         return pcibios_set_irq_routing(bridge, pin, irq);
 502 }
 503
 504 #endif
 505
 506 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 507 {
 508         static struct pci_device_id __initdata pirq_440gx[] = {
 509                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
 510                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
 511                 { },
 512         };
 513
 514         /* 440GX has a proprietary PIRQ router -- don't use it */
 515         if (pci_dev_present(pirq_440gx))
 516                 return 0;
 517
 518         switch(device)
 519         {
 520                 case PCI_DEVICE_ID_INTEL_82371FB_0:
 521                 case PCI_DEVICE_ID_INTEL_82371SB_0:
 522                 case PCI_DEVICE_ID_INTEL_82371AB_0:
 523                 case PCI_DEVICE_ID_INTEL_82371MX:
 524                 case PCI_DEVICE_ID_INTEL_82443MX_0:
 525                 case PCI_DEVICE_ID_INTEL_82801AA_0:
 526                 case PCI_DEVICE_ID_INTEL_82801AB_0:
 527                 case PCI_DEVICE_ID_INTEL_82801BA_0:
 528                 case PCI_DEVICE_ID_INTEL_82801BA_10:
 529                 case PCI_DEVICE_ID_INTEL_82801CA_0:
 530                 case PCI_DEVICE_ID_INTEL_82801CA_12:
 531                 case PCI_DEVICE_ID_INTEL_82801DB_0:
 532                 case PCI_DEVICE_ID_INTEL_82801E_0:
 533                 case PCI_DEVICE_ID_INTEL_82801EB_0:
 534                 case PCI_DEVICE_ID_INTEL_ESB_1:
 535                 case PCI_DEVICE_ID_INTEL_ICH6_0:
 536                 case PCI_DEVICE_ID_INTEL_ICH6_1:
 537                 case PCI_DEVICE_ID_INTEL_ICH7_0:
 538                 case PCI_DEVICE_ID_INTEL_ICH7_1:
 539                 case PCI_DEVICE_ID_INTEL_ICH7_30:
 540                 case PCI_DEVICE_ID_INTEL_ICH7_31:
 541                 case PCI_DEVICE_ID_INTEL_ESB2_0:
 542                 case PCI_DEVICE_ID_INTEL_ICH8_0:
 543                 case PCI_DEVICE_ID_INTEL_ICH8_1:
 544                 case PCI_DEVICE_ID_INTEL_ICH8_2:
 545                 case PCI_DEVICE_ID_INTEL_ICH8_3:
 546                 case PCI_DEVICE_ID_INTEL_ICH8_4:
 547                 case PCI_DEVICE_ID_INTEL_ICH9_0:
 548                 case PCI_DEVICE_ID_INTEL_ICH9_1:
 549                 case PCI_DEVICE_ID_INTEL_ICH9_2:
 550                 case PCI_DEVICE_ID_INTEL_ICH9_3:
 551                 case PCI_DEVICE_ID_INTEL_ICH9_4:
 552                 case PCI_DEVICE_ID_INTEL_ICH9_5:
 553                 case PCI_DEVICE_ID_INTEL_TOLAPAI_0:
 554                         r->name = "PIIX/ICH";
 555                         r->get = pirq_piix_get;
 556                         r->set = pirq_piix_set;
 557                         return 1;
 558         }
 559         return 0;
 560 }
 561
 562 static __init int via_router_probe(struct irq_router *r,
 563                                 struct pci_dev *router, u16 device)
 564 {
 565         /* FIXME: We should move some of the quirk fixup stuff here */
 566
 567         /*
 568          * work arounds for some buggy BIOSes
 569          */
 570         if (device == PCI_DEVICE_ID_VIA_82C586_0) {
 571                 switch(router->device) {
 572                 case PCI_DEVICE_ID_VIA_82C686:
 573                         /*
 574                          * Asus k7m bios wrongly reports 82C686A
 575                          * as 586-compatible
 576                          */
 577                         device = PCI_DEVICE_ID_VIA_82C686;
 578                         break;
 579                 case PCI_DEVICE_ID_VIA_8235:
 580                         /**
 581                          * Asus a7v-x bios wrongly reports 8235
 582                          * as 586-compatible
 583                          */
 584                         device = PCI_DEVICE_ID_VIA_8235;
 585                         break;
 586                 }
 587         }
 588
 589         switch(device) {
 590         case PCI_DEVICE_ID_VIA_82C586_0:
 591                 r->name = "VIA";
 592                 r->get = pirq_via586_get;
 593                 r->set = pirq_via586_set;
 594                 return 1;
 595         case PCI_DEVICE_ID_VIA_82C596:
 596         case PCI_DEVICE_ID_VIA_82C686:
 597         case PCI_DEVICE_ID_VIA_8231:
 598         case PCI_DEVICE_ID_VIA_8233A:
 599         case PCI_DEVICE_ID_VIA_8235:
 600         case PCI_DEVICE_ID_VIA_8237:
 601                 /* FIXME: add new ones for 8233/5 */
 602                 r->name = "VIA";
 603                 r->get = pirq_via_get;
 604                 r->set = pirq_via_set;
 605                 return 1;
 606         }
 607         return 0;
 608 }
 609
 610 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 611 {
 612         switch(device)
 613         {
 614                 case PCI_DEVICE_ID_VLSI_82C534:
 615                         r->name = "VLSI 82C534";
 616                         r->get = pirq_vlsi_get;
 617                         r->set = pirq_vlsi_set;
 618                         return 1;
 619         }
 620         return 0;
 621 }
 622
 623
 624 static __init int serverworks_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 625 {
 626         switch(device)
 627         {
 628                 case PCI_DEVICE_ID_SERVERWORKS_OSB4:
 629                 case PCI_DEVICE_ID_SERVERWORKS_CSB5:
 630                         r->name = "ServerWorks";
 631                         r->get = pirq_serverworks_get;
 632                         r->set = pirq_serverworks_set;
 633                         return 1;
 634         }
 635         return 0;
 636 }
 637
 638 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 639 {
 640         if (device != PCI_DEVICE_ID_SI_503)
 641                 return 0;
 642
 643         r->name = "SIS";
 644         r->get = pirq_sis_get;
 645         r->set = pirq_sis_set;
 646         return 1;
 647 }
 648
 649 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 650 {
 651         switch(device)
 652         {
 653                 case PCI_DEVICE_ID_CYRIX_5520:
 654                         r->name = "NatSemi";
 655                         r->get = pirq_cyrix_get;
 656                         r->set = pirq_cyrix_set;
 657                         return 1;
 658         }
 659         return 0;
 660 }
 661
 662 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 663 {
 664         switch(device)
 665         {
 666                 case PCI_DEVICE_ID_OPTI_82C700:
 667                         r->name = "OPTI";
 668                         r->get = pirq_opti_get;
 669                         r->set = pirq_opti_set;
 670                         return 1;
 671         }
 672         return 0;
 673 }
 674
 675 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 676 {
 677         switch(device)
 678         {
 679                 case PCI_DEVICE_ID_ITE_IT8330G_0:
 680                         r->name = "ITE";
 681                         r->get = pirq_ite_get;
 682                         r->set = pirq_ite_set;
 683                         return 1;
 684         }
 685         return 0;
 686 }
 687
 688 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 689 {
 690         switch(device)
 691         {
 692         case PCI_DEVICE_ID_AL_M1533:
 693         case PCI_DEVICE_ID_AL_M1563:
 694                 printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");
 695                 r->name = "ALI";
 696                 r->get = pirq_ali_get;
 697                 r->set = pirq_ali_set;
 698                 return 1;
 699         }
 700         return 0;
 701 }
 702
 703 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 704 {
 705         switch(device)
 706         {
 707                 case PCI_DEVICE_ID_AMD_VIPER_740B:
 708                         r->name = "AMD756";
 709                         break;
 710                 case PCI_DEVICE_ID_AMD_VIPER_7413:
 711                         r->name = "AMD766";
 712                         break;
 713                 case PCI_DEVICE_ID_AMD_VIPER_7443:
 714                         r->name = "AMD768";
 715                         break;
 716                 default:
 717                         return 0;
 718         }
 719         r->get = pirq_amd756_get;
 720         r->set = pirq_amd756_set;
 721         return 1;
 722 }
 723
 724 static __initdata struct irq_router_handler pirq_routers[] = {
 725         { PCI_VENDOR_ID_INTEL, intel_router_probe },
 726         { PCI_VENDOR_ID_AL, ali_router_probe },
 727         { PCI_VENDOR_ID_ITE, ite_router_probe },
 728         { PCI_VENDOR_ID_VIA, via_router_probe },
 729         { PCI_VENDOR_ID_OPTI, opti_router_probe },
 730         { PCI_VENDOR_ID_SI, sis_router_probe },
 731         { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
 732         { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
 733         { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
 734         { PCI_VENDOR_ID_AMD, amd_router_probe },
 735         /* Someone with docs needs to add the ATI Radeon IGP */
 736         { 0, NULL }
 737 };
 738 static struct irq_router pirq_router;
 739 static struct pci_dev *pirq_router_dev;
 740
 741
 742 /*
 743  *      FIXME: should we have an option to say "generic for
 744  *      chipset" ?
 745  */
 746
 747 static void __init pirq_find_router(struct irq_router *r)
 748 {
 749         struct irq_routing_table *rt = pirq_table;
 750         struct irq_router_handler *h;
 751
 752 #ifdef CONFIG_PCI_BIOS
 753         if (!rt->signature) {
 754                 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
 755                 r->set = pirq_bios_set;
 756                 r->name = "BIOS";
 757                 return;
 758         }
 759 #endif
 760
 761         /* Default unless a driver reloads it */
 762         r->name = "default";
 763         r->get = NULL;
 764         r->set = NULL;
 765
 766         DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",
 767             rt->rtr_vendor, rt->rtr_device);
 768
 769         pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
 770         if (!pirq_router_dev) {
 771                 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
 772                         "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
 773                 return;
 774         }
 775
 776         for( h = pirq_routers; h->vendor; h++) {
 777                 /* First look for a router match */
 778                 if (rt->rtr_vendor == h->vendor && h->probe(r, pirq_router_dev, rt->rtr_device))
 779                         break;
 780                 /* Fall back to a device match */
 781                 if (pirq_router_dev->vendor == h->vendor && h->probe(r, pirq_router_dev, pirq_router_dev->device))
 782                         break;
 783         }
 784         printk(KERN_INFO "PCI: Using IRQ router %s [%04x/%04x] at %s\n",
 785                 pirq_router.name,
 786                 pirq_router_dev->vendor,
 787                 pirq_router_dev->device,
 788                 pci_name(pirq_router_dev));
 789
 790         /* The device remains referenced for the kernel lifetime */
 791 }
 792
 793 static struct irq_info *pirq_get_info(struct pci_dev *dev)
 794 {
 795         struct irq_routing_table *rt = pirq_table;
 796         int entries = (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 797         struct irq_info *info;
 798
 799         for (info = rt->slots; entries--; info++)
 800                 if (info->bus == dev->bus->number && PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
 801                         return info;
 802         return NULL;
 803 }
 804
 805 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
 806 {
 807         u8 pin;
 808         struct irq_info *info;
 809         int i, pirq, newirq;
 810         int irq = 0;
 811         u32 mask;
 812         struct irq_router *r = &pirq_router;
 813         struct pci_dev *dev2 = NULL;
 814         char *msg = NULL;
 815
 816         /* Find IRQ pin */
 817         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 818         if (!pin) {
 819                 DBG(KERN_DEBUG " -> no interrupt pin\n");
 820                 return 0;
 821         }
 822         pin = pin - 1;
 823
 824         /* Find IRQ routing entry */
 825
 826         if (!pirq_table)
 827                 return 0;
 828
 829         DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);
 830         info = pirq_get_info(dev);
 831         if (!info) {
 832                 DBG(" -> not found in routing table\n" KERN_DEBUG);
 833                 return 0;
 834         }
 835         pirq = info->irq[pin].link;
 836         mask = info->irq[pin].bitmap;
 837         if (!pirq) {
 838                 DBG(" -> not routed\n" KERN_DEBUG);
 839                 return 0;
 840         }
 841         DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);
 842         mask &= pcibios_irq_mask;
 843
 844         /* Work around broken HP Pavilion Notebooks which assign USB to
 845            IRQ 9 even though it is actually wired to IRQ 11 */
 846
 847         if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
 848                 dev->irq = 11;
 849                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 850                 r->set(pirq_router_dev, dev, pirq, 11);
 851         }
 852
 853         /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
 854         if (acer_tm360_irqrouting && dev->irq == 11 && dev->vendor == PCI_VENDOR_ID_O2) {
 855                 pirq = 0x68;
 856                 mask = 0x400;
 857                 dev->irq = r->get(pirq_router_dev, dev, pirq);
 858                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 859         }
 860
 861         /*
 862          * Find the best IRQ to assign: use the one
 863          * reported by the device if possible.
 864          */
 865         newirq = dev->irq;
 866         if (newirq && !((1 << newirq) & mask)) {
 867                 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;
 868                 else printk("\n" KERN_WARNING
 869                         "PCI: IRQ %i for device %s doesn't match PIRQ mask "
 870                         "- try pci=usepirqmask\n" KERN_DEBUG, newirq,
 871                         pci_name(dev));
 872         }
 873         if (!newirq && assign) {
 874                 for (i = 0; i < 16; i++) {
 875                         if (!(mask & (1 << i)))
 876                                 continue;
 877                         if (pirq_penalty[i] < pirq_penalty[newirq] && can_request_irq(i, IRQF_SHARED))
 878                                 newirq = i;
 879                 }
 880         }
 881         DBG(" -> newirq=%d", newirq);
 882
 883         /* Check if it is hardcoded */
 884         if ((pirq & 0xf0) == 0xf0) {
 885                 irq = pirq & 0xf;
 886                 DBG(" -> hardcoded IRQ %d\n", irq);
 887                 msg = "Hardcoded";
 888         } else if ( r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
 889         ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask)) ) {
 890                 DBG(" -> got IRQ %d\n", irq);
 891                 msg = "Found";
 892                 eisa_set_level_irq(irq);
 893         } else if (newirq && r->set && (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
 894                 DBG(" -> assigning IRQ %d", newirq);
 895                 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
 896                         eisa_set_level_irq(newirq);
 897                         DBG(" ... OK\n");
 898                         msg = "Assigned";
 899                         irq = newirq;
 900                 }
 901         }
 902
 903         if (!irq) {
 904                 DBG(" ... failed\n");
 905                 if (newirq && mask == (1 << newirq)) {
 906                         msg = "Guessed";
 907                         irq = newirq;
 908                 } else
 909                         return 0;
 910         }
 911         printk(KERN_INFO "PCI: %s IRQ %d for device %s\n", msg, irq, pci_name(dev));
 912
 913         /* Update IRQ for all devices with the same pirq value */
 914         while ((dev2 = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev2)) != NULL) {
 915                 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
 916                 if (!pin)
 917                         continue;
 918                 pin--;
 919                 info = pirq_get_info(dev2);
 920                 if (!info)
 921                         continue;
 922                 if (info->irq[pin].link == pirq) {
 923                         /* We refuse to override the dev->irq information. Give a warning! */
 924                         if ( dev2->irq && dev2->irq != irq && \
 925                         (!(pci_probe & PCI_USE_PIRQ_MASK) || \
 926                         ((1 << dev2->irq) & mask)) ) {
 927 #ifndef CONFIG_PCI_MSI
 928                                 printk(KERN_INFO "IRQ routing conflict for %s, have irq %d, want irq %d\n",
 929                                        pci_name(dev2), dev2->irq, irq);
 930 #endif
 931                                 continue;
 932                         }
 933                         dev2->irq = irq;
 934                         pirq_penalty[irq]++;
 935                         if (dev != dev2)
 936                                 printk(KERN_INFO "PCI: Sharing IRQ %d with %s\n", irq, pci_name(dev2));
 937                 }
 938         }
 939         return 1;
 940 }
 941
 942 static void __init pcibios_fixup_irqs(void)
 943 {
 944         struct pci_dev *dev = NULL;
 945         u8 pin;
 946
 947         DBG(KERN_DEBUG "PCI: IRQ fixup\n");
 948         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
 949                 /*
 950                  * If the BIOS has set an out of range IRQ number, just ignore it.
 951                  * Also keep track of which IRQ's are already in use.
 952                  */
 953                 if (dev->irq >= 16) {
 954                         DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);
 955                         dev->irq = 0;
 956                 }
 957                 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
 958                 if (pirq_penalty[dev->irq] >= 100 && pirq_penalty[dev->irq] < 100000)
 959                         pirq_penalty[dev->irq] = 0;
 960                 pirq_penalty[dev->irq]++;
 961         }
 962
 963         dev = NULL;
 964         while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
 965                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 966 #ifdef CONFIG_X86_IO_APIC
 967                 /*
 968                  * Recalculate IRQ numbers if we use the I/O APIC.
 969                  */
 970                 if (io_apic_assign_pci_irqs)
 971                 {
 972                         int irq;
 973
 974                         if (pin) {
 975                                 pin--;          /* interrupt pins are numbered starting from 1 */
 976                                 irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
 977         /*
 978          * Busses behind bridges are typically not listed in the MP-table.
 979          * In this case we have to look up the IRQ based on the parent bus,
 980          * parent slot, and pin number. The SMP code detects such bridged
 981          * busses itself so we should get into this branch reliably.
 982          */
 983                                 if (irq < 0 && dev->bus->parent) { /* go back to the bridge */
 984                                         struct pci_dev * bridge = dev->bus->self;
 985
 986                                         pin = (pin + PCI_SLOT(dev->devfn)) % 4;
 987                                         irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
 988                                                         PCI_SLOT(bridge->devfn), pin);
 989                                         if (irq >= 0)
 990                                                 printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
 991                                                         pci_name(bridge), 'A' + pin, irq);
 992                                 }
 993                                 if (irq >= 0) {
 994                                         printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
 995                                                 pci_name(dev), 'A' + pin, irq);
 996                                         dev->irq = irq;
 997                                 }
 998                         }
 999                 }
1000 #endif
1001                 /*
1002                  * Still no IRQ? Try to lookup one...
1003                  */
1004                 if (pin && !dev->irq)
1005                         pcibios_lookup_irq(dev, 0);
1006         }
1007 }
1008
1009 /*
1010  * Work around broken HP Pavilion Notebooks which assign USB to
1011  * IRQ 9 even though it is actually wired to IRQ 11
1012  */
1013 static int __init fix_broken_hp_bios_irq9(const struct dmi_system_id *d)
1014 {
1015         if (!broken_hp_bios_irq9) {
1016                 broken_hp_bios_irq9 = 1;
1017                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1018         }
1019         return 0;
1020 }
1021
1022 /*
1023  * Work around broken Acer TravelMate 360 Notebooks which assign
1024  * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1025  */
1026 static int __init fix_acer_tm360_irqrouting(const struct dmi_system_id *d)
1027 {
1028         if (!acer_tm360_irqrouting) {
1029                 acer_tm360_irqrouting = 1;
1030                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n", d->ident);
1031         }
1032         return 0;
1033 }
1034
1035 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1036         {
1037                 .callback = fix_broken_hp_bios_irq9,
1038                 .ident = "HP Pavilion N5400 Series Laptop",
1039                 .matches = {
1040                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1041                         DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1042                         DMI_MATCH(DMI_PRODUCT_VERSION, "HP Pavilion Notebook Model GE"),
1043                         DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1044                 },
1045         },
1046         {
1047                 .callback = fix_acer_tm360_irqrouting,
1048                 .ident = "Acer TravelMate 36x Laptop",
1049                 .matches = {
1050                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1051                         DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1052                 },
1053         },
1054         { }
1055 };
1056
1057 static int __init pcibios_irq_init(void)
1058 {
1059         DBG(KERN_DEBUG "PCI: IRQ init\n");
1060
1061         if (pcibios_enable_irq || raw_pci_ops == NULL)
1062                 return 0;
1063
1064         dmi_check_system(pciirq_dmi_table);
1065
1066         pirq_table = pirq_find_routing_table();
1067
1068 #ifdef CONFIG_PCI_BIOS
1069         if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1070                 pirq_table = pcibios_get_irq_routing_table();
1071 #endif
1072         if (pirq_table) {
1073                 pirq_peer_trick();
1074                 pirq_find_router(&pirq_router);
1075                 if (pirq_table->exclusive_irqs) {
1076                         int i;
1077                         for (i=0; i<16; i++)
1078                                 if (!(pirq_table->exclusive_irqs & (1 << i)))
1079                                         pirq_penalty[i] += 100;
1080                 }
1081                 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1082                 if (io_apic_assign_pci_irqs)
1083                         pirq_table = NULL;
1084         }
1085
1086         pcibios_enable_irq = pirq_enable_irq;
1087
1088         pcibios_fixup_irqs();
1089         return 0;
1090 }
1091
1092 subsys_initcall(pcibios_irq_init);
1093
1094
1095 static void pirq_penalize_isa_irq(int irq, int active)
1096 {
1097         /*
1098          *  If any ISAPnP device reports an IRQ in its list of possible
1099          *  IRQ's, we try to avoid assigning it to PCI devices.
1100          */
1101         if (irq < 16) {
1102                 if (active)
1103                         pirq_penalty[irq] += 1000;
1104                 else
1105                         pirq_penalty[irq] += 100;
1106         }
1107 }
1108
1109 void pcibios_penalize_isa_irq(int irq, int active)
1110 {
1111 #ifdef CONFIG_ACPI
1112         if (!acpi_noirq)
1113                 acpi_penalize_isa_irq(irq, active);
1114         else
1115 #endif
1116                 pirq_penalize_isa_irq(irq, active);
1117 }
1118
1119 static int pirq_enable_irq(struct pci_dev *dev)
1120 {
1121         u8 pin;
1122         struct pci_dev *temp_dev;
1123
1124         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1125         if (pin && !pcibios_lookup_irq(dev, 1) && !dev->irq) {
1126                 char *msg = "";
1127
1128                 pin--;          /* interrupt pins are numbered starting from 1 */
1129
1130                 if (io_apic_assign_pci_irqs) {
1131                         int irq;
1132
1133                         irq = IO_APIC_get_PCI_irq_vector(dev->bus->number, PCI_SLOT(dev->devfn), pin);
1134                         /*
1135                          * Busses behind bridges are typically not listed in the MP-table.
1136                          * In this case we have to look up the IRQ based on the parent bus,
1137                          * parent slot, and pin number. The SMP code detects such bridged
1138                          * busses itself so we should get into this branch reliably.
1139                          */
1140                         temp_dev = dev;
1141                         while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1142                                 struct pci_dev * bridge = dev->bus->self;
1143
1144                                 pin = (pin + PCI_SLOT(dev->devfn)) % 4;
1145                                 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1146                                                 PCI_SLOT(bridge->devfn), pin);
1147                                 if (irq >= 0)
1148                                         printk(KERN_WARNING "PCI: using PPB %s[%c] to get irq %d\n",
1149                                                 pci_name(bridge), 'A' + pin, irq);
1150                                 dev = bridge;
1151                         }
1152                         dev = temp_dev;
1153                         if (irq >= 0) {
1154                                 printk(KERN_INFO "PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1155                                         pci_name(dev), 'A' + pin, irq);
1156                                 dev->irq = irq;
1157                                 return 0;
1158                         } else
1159                                 msg = " Probably buggy MP table.";
1160                 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1161                         msg = "";
1162                 else
1163                         msg = " Please try using pci=biosirq.";
1164
1165                 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1166                 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE && !(dev->class & 0x5))
1167                         return 0;
1168
1169                 printk(KERN_WARNING "PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1170                        'A' + pin, pci_name(dev), msg);
1171         }
1172         return 0;
1173 }