1 /* linux/arch/arm/mach-s3c2412/dma.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2412 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sysdev.h>
18 #include <linux/serial_core.h>
27 #include <plat/regs-serial.h>
28 #include <mach/regs-gpio.h>
29 #include <plat/regs-ac97.h>
30 #include <mach/regs-mem.h>
31 #include <mach/regs-lcd.h>
32 #include <mach/regs-sdi.h>
33 #include <asm/plat-s3c24xx/regs-s3c2412-iis.h>
34 #include <asm/plat-s3c24xx/regs-iis.h>
35 #include <plat/regs-spi.h>
37 #define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID }
39 static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings
[] = {
42 .channels
= MAP(S3C2412_DMAREQSEL_XDREQ0
),
43 .channels_rx
= MAP(S3C2412_DMAREQSEL_XDREQ0
),
47 .channels
= MAP(S3C2412_DMAREQSEL_XDREQ1
),
48 .channels_rx
= MAP(S3C2412_DMAREQSEL_XDREQ1
),
52 .channels
= MAP(S3C2412_DMAREQSEL_SDI
),
53 .channels_rx
= MAP(S3C2412_DMAREQSEL_SDI
),
54 .hw_addr
.to
= S3C2410_PA_SDI
+ S3C2410_SDIDATA
,
55 .hw_addr
.from
= S3C2410_PA_SDI
+ S3C2410_SDIDATA
,
59 .channels
= MAP(S3C2412_DMAREQSEL_SPI0TX
),
60 .channels_rx
= MAP(S3C2412_DMAREQSEL_SPI0RX
),
61 .hw_addr
.to
= S3C2410_PA_SPI
+ S3C2410_SPTDAT
,
62 .hw_addr
.from
= S3C2410_PA_SPI
+ S3C2410_SPRDAT
,
66 .channels
= MAP(S3C2412_DMAREQSEL_SPI1TX
),
67 .channels_rx
= MAP(S3C2412_DMAREQSEL_SPI1RX
),
68 .hw_addr
.to
= S3C2410_PA_SPI
+ S3C2412_SPI1
+ S3C2410_SPTDAT
,
69 .hw_addr
.from
= S3C2410_PA_SPI
+ S3C2412_SPI1
+ S3C2410_SPRDAT
,
73 .channels
= MAP(S3C2412_DMAREQSEL_UART0_0
),
74 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART0_0
),
75 .hw_addr
.to
= S3C2410_PA_UART0
+ S3C2410_UTXH
,
76 .hw_addr
.from
= S3C2410_PA_UART0
+ S3C2410_URXH
,
80 .channels
= MAP(S3C2412_DMAREQSEL_UART1_0
),
81 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART1_0
),
82 .hw_addr
.to
= S3C2410_PA_UART1
+ S3C2410_UTXH
,
83 .hw_addr
.from
= S3C2410_PA_UART1
+ S3C2410_URXH
,
87 .channels
= MAP(S3C2412_DMAREQSEL_UART2_0
),
88 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART2_0
),
89 .hw_addr
.to
= S3C2410_PA_UART2
+ S3C2410_UTXH
,
90 .hw_addr
.from
= S3C2410_PA_UART2
+ S3C2410_URXH
,
92 [DMACH_UART0_SRC2
] = {
94 .channels
= MAP(S3C2412_DMAREQSEL_UART0_1
),
95 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART0_1
),
96 .hw_addr
.to
= S3C2410_PA_UART0
+ S3C2410_UTXH
,
97 .hw_addr
.from
= S3C2410_PA_UART0
+ S3C2410_URXH
,
99 [DMACH_UART1_SRC2
] = {
101 .channels
= MAP(S3C2412_DMAREQSEL_UART1_1
),
102 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART1_1
),
103 .hw_addr
.to
= S3C2410_PA_UART1
+ S3C2410_UTXH
,
104 .hw_addr
.from
= S3C2410_PA_UART1
+ S3C2410_URXH
,
106 [DMACH_UART2_SRC2
] = {
108 .channels
= MAP(S3C2412_DMAREQSEL_UART2_1
),
109 .channels_rx
= MAP(S3C2412_DMAREQSEL_UART2_1
),
110 .hw_addr
.to
= S3C2410_PA_UART2
+ S3C2410_UTXH
,
111 .hw_addr
.from
= S3C2410_PA_UART2
+ S3C2410_URXH
,
115 .channels
= MAP(S3C2412_DMAREQSEL_TIMER
),
116 .channels_rx
= MAP(S3C2412_DMAREQSEL_TIMER
),
120 .channels
= MAP(S3C2412_DMAREQSEL_I2SRX
),
121 .channels_rx
= MAP(S3C2412_DMAREQSEL_I2SRX
),
122 .hw_addr
.from
= S3C2410_PA_IIS
+ S3C2412_IISRXD
,
126 .channels
= MAP(S3C2412_DMAREQSEL_I2STX
),
127 .channels_rx
= MAP(S3C2412_DMAREQSEL_I2STX
),
128 .hw_addr
.to
= S3C2410_PA_IIS
+ S3C2412_IISTXD
,
132 .channels
= MAP(S3C2412_DMAREQSEL_USBEP1
),
133 .channels_rx
= MAP(S3C2412_DMAREQSEL_USBEP1
),
137 .channels
= MAP(S3C2412_DMAREQSEL_USBEP2
),
138 .channels_rx
= MAP(S3C2412_DMAREQSEL_USBEP2
),
142 .channels
= MAP(S3C2412_DMAREQSEL_USBEP3
),
143 .channels_rx
= MAP(S3C2412_DMAREQSEL_USBEP3
),
147 .channels
= MAP(S3C2412_DMAREQSEL_USBEP4
),
148 .channels_rx
= MAP(S3C2412_DMAREQSEL_USBEP4
),
152 static void s3c2412_dma_direction(struct s3c2410_dma_chan
*chan
,
153 struct s3c24xx_dma_map
*map
,
154 enum s3c2410_dmasrc dir
)
158 if (dir
== S3C2410_DMASRC_HW
)
159 chsel
= map
->channels_rx
[0];
161 chsel
= map
->channels
[0];
163 chsel
&= ~DMA_CH_VALID
;
164 chsel
|= S3C2412_DMAREQSEL_HW
;
166 writel(chsel
, chan
->regs
+ S3C2412_DMA_DMAREQSEL
);
169 static void s3c2412_dma_select(struct s3c2410_dma_chan
*chan
,
170 struct s3c24xx_dma_map
*map
)
172 s3c2412_dma_direction(chan
, map
, chan
->source
);
175 static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel
= {
176 .select
= s3c2412_dma_select
,
177 .direction
= s3c2412_dma_direction
,
179 .map
= s3c2412_dma_mappings
,
180 .map_size
= ARRAY_SIZE(s3c2412_dma_mappings
),
183 static int __init
s3c2412_dma_add(struct sys_device
*sysdev
)
186 return s3c24xx_dma_init_map(&s3c2412_dma_sel
);
189 static struct sysdev_driver s3c2412_dma_driver
= {
190 .add
= s3c2412_dma_add
,
193 static int __init
s3c2412_dma_init(void)
195 return sysdev_driver_register(&s3c2412_sysclass
, &s3c2412_dma_driver
);
198 arch_initcall(s3c2412_dma_init
);