arch/x86/kernel/i8253.c

   1 /*
   2  * 8253/PIT functions
   3  *
   4  */
   5 #include <linux/clockchips.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/jiffies.h>
   9 #include <linux/module.h>
  10 #include <linux/timex.h>
  11 #include <linux/delay.h>
  12 #include <linux/init.h>
  13 #include <linux/io.h>
  14
  15 #include <asm/i8253.h>
  16 #include <asm/hpet.h>
  17 #include <asm/smp.h>
  18
  19 DEFINE_SPINLOCK(i8253_lock);
  20 EXPORT_SYMBOL(i8253_lock);
  21
  22 #ifdef CONFIG_X86_32
  23 static void pit_disable_clocksource(void);
  24 static void pit_enable_clocksource(void);
  25 #else
  26 static inline void pit_disable_clocksource(void) { }
  27 static inline void pit_enable_clocksource(void) { }
  28 #endif
  29
  30 /*
  31  * HPET replaces the PIT, when enabled. So we need to know, which of
  32  * the two timers is used
  33  */
  34 struct clock_event_device *global_clock_event;
  35
  36 /*
  37  * Initialize the PIT timer.
  38  *
  39  * This is also called after resume to bring the PIT into operation again.
  40  */
  41 static void init_pit_timer(enum clock_event_mode mode,
  42                            struct clock_event_device *evt)
  43 {
  44         spin_lock(&i8253_lock);
  45
  46         switch (mode) {
  47         case CLOCK_EVT_MODE_PERIODIC:
  48                 /* binary, mode 2, LSB/MSB, ch 0 */
  49                 outb_pit(0x34, PIT_MODE);
  50                 outb_pit(LATCH & 0xff , PIT_CH0);       /* LSB */
  51                 outb_pit(LATCH >> 8 , PIT_CH0);         /* MSB */
  52                 break;
  53
  54         case CLOCK_EVT_MODE_SHUTDOWN:
  55         case CLOCK_EVT_MODE_UNUSED:
  56                 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
  57                     evt->mode == CLOCK_EVT_MODE_ONESHOT) {
  58                         outb_pit(0x30, PIT_MODE);
  59                         outb_pit(0, PIT_CH0);
  60                         outb_pit(0, PIT_CH0);
  61                 }
  62                 pit_disable_clocksource();
  63                 break;
  64
  65         case CLOCK_EVT_MODE_ONESHOT:
  66                 /* One shot setup */
  67                 pit_disable_clocksource();
  68                 outb_pit(0x38, PIT_MODE);
  69                 break;
  70
  71         case CLOCK_EVT_MODE_RESUME:
  72                 pit_enable_clocksource();
  73                 break;
  74         }
  75         spin_unlock(&i8253_lock);
  76 }
  77
  78 /*
  79  * Program the next event in oneshot mode
  80  *
  81  * Delta is given in PIT ticks
  82  */
  83 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
  84 {
  85         spin_lock(&i8253_lock);
  86         outb_pit(delta & 0xff , PIT_CH0);       /* LSB */
  87         outb_pit(delta >> 8 , PIT_CH0);         /* MSB */
  88         spin_unlock(&i8253_lock);
  89
  90         return 0;
  91 }
  92
  93 /*
  94  * On UP the PIT can serve all of the possible timer functions. On SMP systems
  95  * it can be solely used for the global tick.
  96  *
  97  * The profiling and update capabilities are switched off once the local apic is
  98  * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
  99  * !using_apic_timer decisions in do_timer_interrupt_hook()
 100  */
 101 static struct clock_event_device pit_ce = {
 102         .name           = "pit",
 103         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 104         .set_mode       = init_pit_timer,
 105         .set_next_event = pit_next_event,
 106         .shift          = 32,
 107         .irq            = 0,
 108 };
 109
 110 /*
 111  * Initialize the conversion factor and the min/max deltas of the clock event
 112  * structure and register the clock event source with the framework.
 113  */
 114 void __init setup_pit_timer(void)
 115 {
 116         /*
 117          * Start pit with the boot cpu mask and make it global after the
 118          * IO_APIC has been initialized.
 119          */
 120         pit_ce.cpumask = cpumask_of(smp_processor_id());
 121         pit_ce.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
 122         pit_ce.max_delta_ns = clockevent_delta2ns(0x7FFF, &pit_ce);
 123         pit_ce.min_delta_ns = clockevent_delta2ns(0xF, &pit_ce);
 124
 125         clockevents_register_device(&pit_ce);
 126         global_clock_event = &pit_ce;
 127 }
 128
 129 #ifndef CONFIG_X86_64
 130 /*
 131  * Since the PIT overflows every tick, its not very useful
 132  * to just read by itself. So use jiffies to emulate a free
 133  * running counter:
 134  */
 135 static cycle_t pit_read(struct clocksource *cs)
 136 {
 137         static int old_count;
 138         static u32 old_jifs;
 139         unsigned long flags;
 140         int count;
 141         u32 jifs;
 142
 143         spin_lock_irqsave(&i8253_lock, flags);
 144         /*
 145          * Although our caller may have the read side of xtime_lock,
 146          * this is now a seqlock, and we are cheating in this routine
 147          * by having side effects on state that we cannot undo if
 148          * there is a collision on the seqlock and our caller has to
 149          * retry.  (Namely, old_jifs and old_count.)  So we must treat
 150          * jiffies as volatile despite the lock.  We read jiffies
 151          * before latching the timer count to guarantee that although
 152          * the jiffies value might be older than the count (that is,
 153          * the counter may underflow between the last point where
 154          * jiffies was incremented and the point where we latch the
 155          * count), it cannot be newer.
 156          */
 157         jifs = jiffies;
 158         outb_pit(0x00, PIT_MODE);       /* latch the count ASAP */
 159         count = inb_pit(PIT_CH0);       /* read the latched count */
 160         count |= inb_pit(PIT_CH0) << 8;
 161
 162         /* VIA686a test code... reset the latch if count > max + 1 */
 163         if (count > LATCH) {
 164                 outb_pit(0x34, PIT_MODE);
 165                 outb_pit(LATCH & 0xff, PIT_CH0);
 166                 outb_pit(LATCH >> 8, PIT_CH0);
 167                 count = LATCH - 1;
 168         }
 169
 170         /*
 171          * It's possible for count to appear to go the wrong way for a
 172          * couple of reasons:
 173          *
 174          *  1. The timer counter underflows, but we haven't handled the
 175          *     resulting interrupt and incremented jiffies yet.
 176          *  2. Hardware problem with the timer, not giving us continuous time,
 177          *     the counter does small "jumps" upwards on some Pentium systems,
 178          *     (see c't 95/10 page 335 for Neptun bug.)
 179          *
 180          * Previous attempts to handle these cases intelligently were
 181          * buggy, so we just do the simple thing now.
 182          */
 183         if (count > old_count && jifs == old_jifs)
 184                 count = old_count;
 185
 186         old_count = count;
 187         old_jifs = jifs;
 188
 189         spin_unlock_irqrestore(&i8253_lock, flags);
 190
 191         count = (LATCH - 1) - count;
 192
 193         return (cycle_t)(jifs * LATCH) + count;
 194 }
 195
 196 static struct clocksource pit_cs = {
 197         .name           = "pit",
 198         .rating         = 110,
 199         .read           = pit_read,
 200         .mask           = CLOCKSOURCE_MASK(32),
 201         .mult           = 0,
 202         .shift          = 20,
 203 };
 204
 205 int pit_cs_registered;
 206 static void pit_disable_clocksource(void)
 207 {
 208         if (pit_cs_registered) {
 209                 clocksource_unregister(&pit_cs);
 210                 pit_cs_registered = 0;
 211         }
 212 }
 213
 214 static void pit_enable_clocksource(void)
 215 {
 216         if (!pit_cs_registered && !clocksource_register(&pit_cs)) {
 217                 pit_cs_registered = 1;
 218         }
 219 }
 220
 221
 222
 223 static int __init init_pit_clocksource(void)
 224 {
 225         int ret;
 226          /*
 227           * Several reasons not to register PIT as a clocksource:
 228           *
 229           * - On SMP PIT does not scale due to i8253_lock
 230           * - when HPET is enabled
 231           * - when local APIC timer is active (PIT is switched off)
 232           */
 233         if (num_possible_cpus() > 1 || is_hpet_enabled() ||
 234             pit_ce.mode != CLOCK_EVT_MODE_PERIODIC)
 235                 return 0;
 236
 237         pit_cs.mult = clocksource_hz2mult(CLOCK_TICK_RATE, pit_cs.shift);
 238
 239         ret = clocksource_register(&pit_cs);
 240         if (!ret)
 241                 pit_cs_registered = 1;
 242         return ret;
 243 }
 244 arch_initcall(init_pit_clocksource);
 245
 246 #endif /* !CONFIG_X86_64 */