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PCI: avoid P2P prefetch window for expansion ROMs
[linux-2.6/mini2440.git] / drivers / char / moxa.c
blobed76f0a127fd759c1679a908681c25fcdfc15064
1 /*****************************************************************************/
2 /*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com.tw).
6 *
7 * This code is loosely based on the Linux serial driver, written by
8 * Linus Torvalds, Theodore T'so and others.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 */
15
16 /*
17 * MOXA Intellio Series Driver
18 * for : LINUX
19 * date : 1999/1/7
20 * version : 5.1
21 */
22
23 #include <linux/module.h>
24 #include <linux/types.h>
25 #include <linux/mm.h>
26 #include <linux/ioport.h>
27 #include <linux/errno.h>
28 #include <linux/signal.h>
29 #include <linux/sched.h>
30 #include <linux/timer.h>
31 #include <linux/interrupt.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/major.h>
35 #include <linux/string.h>
36 #include <linux/fcntl.h>
37 #include <linux/ptrace.h>
38 #include <linux/serial.h>
39 #include <linux/tty_driver.h>
40 #include <linux/delay.h>
41 #include <linux/pci.h>
42 #include <linux/init.h>
43 #include <linux/bitops.h>
44
45 #include <asm/system.h>
46 #include <asm/io.h>
47 #include <asm/uaccess.h>
48
49 #define MOXA_VERSION "5.1k"
50
51 #define MOXAMAJOR 172
52 #define MOXACUMAJOR 173
53
54 #define MAX_BOARDS 4 /* Don't change this value */
55 #define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
56 #define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
57
58 /*
59 * Define the Moxa PCI vendor and device IDs.
60 */
61 #define MOXA_BUS_TYPE_ISA 0
62 #define MOXA_BUS_TYPE_PCI 1
63
64 enum {
65 MOXA_BOARD_C218_PCI = 1,
66 MOXA_BOARD_C218_ISA,
67 MOXA_BOARD_C320_PCI,
68 MOXA_BOARD_C320_ISA,
69 MOXA_BOARD_CP204J,
70 };
71
72 static char *moxa_brdname[] =
73 {
74 "C218 Turbo PCI series",
75 "C218 Turbo ISA series",
76 "C320 Turbo PCI series",
77 "C320 Turbo ISA series",
78 "CP-204J series",
79 };
80
81 #ifdef CONFIG_PCI
82 static struct pci_device_id moxa_pcibrds[] = {
83 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
84 .driver_data = MOXA_BOARD_C218_PCI },
85 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
86 .driver_data = MOXA_BOARD_C320_PCI },
87 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
88 .driver_data = MOXA_BOARD_CP204J },
89 { 0 }
90 };
91 MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
92 #endif /* CONFIG_PCI */
93
94 struct moxa_isa_board_conf {
95 int boardType;
96 int numPorts;
97 unsigned long baseAddr;
98 };
99
100 static struct moxa_isa_board_conf moxa_isa_boards[] =
101 {
102 /* {MOXA_BOARD_C218_ISA,8,0xDC000}, */
103 };
104
105 static struct moxa_board_conf {
106 int boardType;
107 int numPorts;
108 unsigned long baseAddr;
109 int busType;
110
111 int loadstat;
112
113 void __iomem *basemem;
114 void __iomem *intNdx;
115 void __iomem *intPend;
116 void __iomem *intTable;
117 } moxa_boards[MAX_BOARDS];
118
119 struct mxser_mstatus {
120 tcflag_t cflag;
121 int cts;
122 int dsr;
123 int ri;
124 int dcd;
125 };
126
127 struct moxaq_str {
128 int inq;
129 int outq;
130 };
131
132 struct moxa_port {
133 int type;
134 int port;
135 int close_delay;
136 unsigned short closing_wait;
137 int count;
138 int blocked_open;
139 long event; /* long req'd for set_bit --RR */
140 int asyncflags;
141 unsigned long statusflags;
142 struct tty_struct *tty;
143 int cflag;
144 wait_queue_head_t open_wait;
145 wait_queue_head_t close_wait;
146
147 struct timer_list emptyTimer;
148
149 char chkPort;
150 char lineCtrl;
151 void __iomem *tableAddr;
152 long curBaud;
153 char DCDState;
154 char lowChkFlag;
155
156 ushort breakCnt;
157 };
158
159 /* statusflags */
160 #define TXSTOPPED 0x1
161 #define LOWWAIT 0x2
162 #define EMPTYWAIT 0x4
163 #define THROTTLE 0x8
164
165 #define SERIAL_DO_RESTART
166
167 #define WAKEUP_CHARS 256
168
169 static int verbose = 0;
170 static int ttymajor = MOXAMAJOR;
171 /* Variables for insmod */
172 #ifdef MODULE
173 static int baseaddr[4];
174 static int type[4];
175 static int numports[4];
176 #endif
177
178 MODULE_AUTHOR("William Chen");
179 MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
180 MODULE_LICENSE("GPL");
181 #ifdef MODULE
182 module_param_array(type, int, NULL, 0);
183 module_param_array(baseaddr, int, NULL, 0);
184 module_param_array(numports, int, NULL, 0);
185 #endif
186 module_param(ttymajor, int, 0);
187 module_param(verbose, bool, 0644);
188
189 /*
190 * static functions:
191 */
192 static int moxa_open(struct tty_struct *, struct file *);
193 static void moxa_close(struct tty_struct *, struct file *);
194 static int moxa_write(struct tty_struct *, const unsigned char *, int);
195 static int moxa_write_room(struct tty_struct *);
196 static void moxa_flush_buffer(struct tty_struct *);
197 static int moxa_chars_in_buffer(struct tty_struct *);
198 static void moxa_flush_chars(struct tty_struct *);
199 static void moxa_put_char(struct tty_struct *, unsigned char);
200 static int moxa_ioctl(struct tty_struct *, struct file *, unsigned int, unsigned long);
201 static void moxa_throttle(struct tty_struct *);
202 static void moxa_unthrottle(struct tty_struct *);
203 static void moxa_set_termios(struct tty_struct *, struct ktermios *);
204 static void moxa_stop(struct tty_struct *);
205 static void moxa_start(struct tty_struct *);
206 static void moxa_hangup(struct tty_struct *);
207 static int moxa_tiocmget(struct tty_struct *tty, struct file *file);
208 static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
209 unsigned int set, unsigned int clear);
210 static void moxa_poll(unsigned long);
211 static void set_tty_param(struct tty_struct *);
212 static int block_till_ready(struct tty_struct *, struct file *,
213 struct moxa_port *);
214 static void setup_empty_event(struct tty_struct *);
215 static void check_xmit_empty(unsigned long);
216 static void shut_down(struct moxa_port *);
217 static void receive_data(struct moxa_port *);
218 /*
219 * moxa board interface functions:
220 */
221 static void MoxaDriverInit(void);
222 static int MoxaDriverIoctl(unsigned int, unsigned long, int);
223 static int MoxaDriverPoll(void);
224 static int MoxaPortsOfCard(int);
225 static int MoxaPortIsValid(int);
226 static void MoxaPortEnable(int);
227 static void MoxaPortDisable(int);
228 static long MoxaPortGetMaxBaud(int);
229 static long MoxaPortSetBaud(int, long);
230 static int MoxaPortSetTermio(int, struct ktermios *, speed_t);
231 static int MoxaPortGetLineOut(int, int *, int *);
232 static void MoxaPortLineCtrl(int, int, int);
233 static void MoxaPortFlowCtrl(int, int, int, int, int, int);
234 static int MoxaPortLineStatus(int);
235 static int MoxaPortDCDChange(int);
236 static int MoxaPortDCDON(int);
237 static void MoxaPortFlushData(int, int);
238 static int MoxaPortWriteData(int, unsigned char *, int);
239 static int MoxaPortReadData(int, struct tty_struct *tty);
240 static int MoxaPortTxQueue(int);
241 static int MoxaPortRxQueue(int);
242 static int MoxaPortTxFree(int);
243 static void MoxaPortTxDisable(int);
244 static void MoxaPortTxEnable(int);
245 static int MoxaPortResetBrkCnt(int);
246 static void MoxaPortSendBreak(int, int);
247 static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
248 static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
249 static void MoxaSetFifo(int port, int enable);
250
251 static const struct tty_operations moxa_ops = {
252 .open = moxa_open,
253 .close = moxa_close,
254 .write = moxa_write,
255 .write_room = moxa_write_room,
256 .flush_buffer = moxa_flush_buffer,
257 .chars_in_buffer = moxa_chars_in_buffer,
258 .flush_chars = moxa_flush_chars,
259 .put_char = moxa_put_char,
260 .ioctl = moxa_ioctl,
261 .throttle = moxa_throttle,
262 .unthrottle = moxa_unthrottle,
263 .set_termios = moxa_set_termios,
264 .stop = moxa_stop,
265 .start = moxa_start,
266 .hangup = moxa_hangup,
267 .tiocmget = moxa_tiocmget,
268 .tiocmset = moxa_tiocmset,
269 };
270
271 static struct tty_driver *moxaDriver;
272 static struct moxa_port moxa_ports[MAX_PORTS];
273 static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
274 static DEFINE_SPINLOCK(moxa_lock);
275
276 #ifdef CONFIG_PCI
277 static int __devinit moxa_pci_probe(struct pci_dev *pdev,
278 const struct pci_device_id *ent)
279 {
280 struct moxa_board_conf *board;
281 unsigned int i;
282 int board_type = ent->driver_data;
283 int retval;
284
285 retval = pci_enable_device(pdev);
286 if (retval)
287 goto err;
288
289 for (i = 0; i < MAX_BOARDS; i++)
290 if (moxa_boards[i].basemem == NULL)
291 break;
292
293 retval = -ENODEV;
294 if (i >= MAX_BOARDS) {
295 if (verbose)
296 printk("More than %d MOXA Intellio family boards "
297 "found. Board is ignored.\n", MAX_BOARDS);
298 goto err;
299 }
300
301 board = &moxa_boards[i];
302 board->basemem = pci_iomap(pdev, 2, 0x4000);
303 if (board->basemem == NULL)
304 goto err;
305
306 board->boardType = board_type;
307 switch (board_type) {
308 case MOXA_BOARD_C218_ISA:
309 case MOXA_BOARD_C218_PCI:
310 board->numPorts = 8;
311 break;
312
313 case MOXA_BOARD_CP204J:
314 board->numPorts = 4;
315 break;
316 default:
317 board->numPorts = 0;
318 break;
319 }
320 board->busType = MOXA_BUS_TYPE_PCI;
321
322 pci_set_drvdata(pdev, board);
323
324 return (0);
325 err:
326 return retval;
327 }
328
329 static void __devexit moxa_pci_remove(struct pci_dev *pdev)
330 {
331 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
332
333 pci_iounmap(pdev, brd->basemem);
334 brd->basemem = NULL;
335 }
336
337 static struct pci_driver moxa_pci_driver = {
338 .name = "moxa",
339 .id_table = moxa_pcibrds,
340 .probe = moxa_pci_probe,
341 .remove = __devexit_p(moxa_pci_remove)
342 };
343 #endif /* CONFIG_PCI */
344
345 static int __init moxa_init(void)
346 {
347 int i, numBoards, retval = 0;
348 struct moxa_port *ch;
349
350 printk(KERN_INFO "MOXA Intellio family driver version %s\n", MOXA_VERSION);
351 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
352 if (!moxaDriver)
353 return -ENOMEM;
354
355 moxaDriver->owner = THIS_MODULE;
356 moxaDriver->name = "ttyMX";
357 moxaDriver->major = ttymajor;
358 moxaDriver->minor_start = 0;
359 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
360 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
361 moxaDriver->init_termios = tty_std_termios;
362 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
363 moxaDriver->init_termios.c_ispeed = 9600;
364 moxaDriver->init_termios.c_ospeed = 9600;
365 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
366 tty_set_operations(moxaDriver, &moxa_ops);
367
368 for (i = 0, ch = moxa_ports; i < MAX_PORTS; i++, ch++) {
369 ch->type = PORT_16550A;
370 ch->port = i;
371 ch->close_delay = 5 * HZ / 10;
372 ch->closing_wait = 30 * HZ;
373 ch->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
374 init_waitqueue_head(&ch->open_wait);
375 init_waitqueue_head(&ch->close_wait);
376
377 setup_timer(&ch->emptyTimer, check_xmit_empty,
378 (unsigned long)ch);
379 }
380
381 printk("Tty devices major number = %d\n", ttymajor);
382
383 if (tty_register_driver(moxaDriver)) {
384 printk(KERN_ERR "Couldn't install MOXA Smartio family driver !\n");
385 put_tty_driver(moxaDriver);
386 return -1;
387 }
388
389 mod_timer(&moxaTimer, jiffies + HZ / 50);
390
391 /* Find the boards defined in source code */
392 numBoards = 0;
393 for (i = 0; i < MAX_BOARDS; i++) {
394 if ((moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA) ||
395 (moxa_isa_boards[i].boardType == MOXA_BOARD_C320_ISA)) {
396 moxa_boards[numBoards].boardType = moxa_isa_boards[i].boardType;
397 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
398 moxa_boards[numBoards].numPorts = 8;
399 else
400 moxa_boards[numBoards].numPorts = moxa_isa_boards[i].numPorts;
401 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
402 moxa_boards[numBoards].baseAddr = moxa_isa_boards[i].baseAddr;
403 if (verbose)
404 printk("Board %2d: %s board(baseAddr=%lx)\n",
405 numBoards + 1,
406 moxa_brdname[moxa_boards[numBoards].boardType - 1],
407 moxa_boards[numBoards].baseAddr);
408 numBoards++;
409 }
410 }
411 /* Find the boards defined form module args. */
412 #ifdef MODULE
413 for (i = 0; i < MAX_BOARDS; i++) {
414 if ((type[i] == MOXA_BOARD_C218_ISA) ||
415 (type[i] == MOXA_BOARD_C320_ISA)) {
416 if (verbose)
417 printk("Board %2d: %s board(baseAddr=%lx)\n",
418 numBoards + 1,
419 moxa_brdname[type[i] - 1],
420 (unsigned long) baseaddr[i]);
421 if (numBoards >= MAX_BOARDS) {
422 if (verbose)
423 printk("More than %d MOXA Intellio family boards found. Board is ignored.", MAX_BOARDS);
424 continue;
425 }
426 moxa_boards[numBoards].boardType = type[i];
427 if (moxa_isa_boards[i].boardType == MOXA_BOARD_C218_ISA)
428 moxa_boards[numBoards].numPorts = 8;
429 else
430 moxa_boards[numBoards].numPorts = numports[i];
431 moxa_boards[numBoards].busType = MOXA_BUS_TYPE_ISA;
432 moxa_boards[numBoards].baseAddr = baseaddr[i];
433 numBoards++;
434 }
435 }
436 #endif
437
438 #ifdef CONFIG_PCI
439 retval = pci_register_driver(&moxa_pci_driver);
440 if (retval) {
441 printk(KERN_ERR "Can't register moxa pci driver!\n");
442 if (numBoards)
443 retval = 0;
444 }
445 #endif
446
447 for (i = 0; i < numBoards; i++) {
448 moxa_boards[i].basemem = ioremap(moxa_boards[i].baseAddr,
449 0x4000);
450 }
451
452 return retval;
453 }
454
455 static void __exit moxa_exit(void)
456 {
457 int i;
458
459 if (verbose)
460 printk("Unloading module moxa ...\n");
461
462 del_timer_sync(&moxaTimer);
463
464 for (i = 0; i < MAX_PORTS; i++)
465 del_timer_sync(&moxa_ports[i].emptyTimer);
466
467 if (tty_unregister_driver(moxaDriver))
468 printk("Couldn't unregister MOXA Intellio family serial driver\n");
469 put_tty_driver(moxaDriver);
470
471 #ifdef CONFIG_PCI
472 pci_unregister_driver(&moxa_pci_driver);
473 #endif
474
475 for (i = 0; i < MAX_BOARDS; i++)
476 if (moxa_boards[i].basemem)
477 iounmap(moxa_boards[i].basemem);
478
479 if (verbose)
480 printk("Done\n");
481 }
482
483 module_init(moxa_init);
484 module_exit(moxa_exit);
485
486 static int moxa_open(struct tty_struct *tty, struct file *filp)
487 {
488 struct moxa_port *ch;
489 int port;
490 int retval;
491
492 port = tty->index;
493 if (port == MAX_PORTS) {
494 return (0);
495 }
496 if (!MoxaPortIsValid(port)) {
497 tty->driver_data = NULL;
498 return (-ENODEV);
499 }
500
501 ch = &moxa_ports[port];
502 ch->count++;
503 tty->driver_data = ch;
504 ch->tty = tty;
505 if (!(ch->asyncflags & ASYNC_INITIALIZED)) {
506 ch->statusflags = 0;
507 set_tty_param(tty);
508 MoxaPortLineCtrl(ch->port, 1, 1);
509 MoxaPortEnable(ch->port);
510 ch->asyncflags |= ASYNC_INITIALIZED;
511 }
512 retval = block_till_ready(tty, filp, ch);
513
514 moxa_unthrottle(tty);
515
516 if (ch->type == PORT_16550A) {
517 MoxaSetFifo(ch->port, 1);
518 } else {
519 MoxaSetFifo(ch->port, 0);
520 }
521
522 return (retval);
523 }
524
525 static void moxa_close(struct tty_struct *tty, struct file *filp)
526 {
527 struct moxa_port *ch;
528 int port;
529
530 port = tty->index;
531 if (port == MAX_PORTS) {
532 return;
533 }
534 if (!MoxaPortIsValid(port)) {
535 #ifdef SERIAL_DEBUG_CLOSE
536 printk("Invalid portno in moxa_close\n");
537 #endif
538 tty->driver_data = NULL;
539 return;
540 }
541 if (tty->driver_data == NULL) {
542 return;
543 }
544 if (tty_hung_up_p(filp)) {
545 return;
546 }
547 ch = (struct moxa_port *) tty->driver_data;
548
549 if ((tty->count == 1) && (ch->count != 1)) {
550 printk("moxa_close: bad serial port count; tty->count is 1, "
551 "ch->count is %d\n", ch->count);
552 ch->count = 1;
553 }
554 if (--ch->count < 0) {
555 printk("moxa_close: bad serial port count, device=%s\n",
556 tty->name);
557 ch->count = 0;
558 }
559 if (ch->count) {
560 return;
561 }
562 ch->asyncflags |= ASYNC_CLOSING;
563
564 ch->cflag = tty->termios->c_cflag;
565 if (ch->asyncflags & ASYNC_INITIALIZED) {
566 setup_empty_event(tty);
567 tty_wait_until_sent(tty, 30 * HZ); /* 30 seconds timeout */
568 del_timer_sync(&moxa_ports[ch->port].emptyTimer);
569 }
570 shut_down(ch);
571 MoxaPortFlushData(port, 2);
572
573 if (tty->driver->flush_buffer)
574 tty->driver->flush_buffer(tty);
575 tty_ldisc_flush(tty);
576
577 tty->closing = 0;
578 ch->event = 0;
579 ch->tty = NULL;
580 if (ch->blocked_open) {
581 if (ch->close_delay) {
582 msleep_interruptible(jiffies_to_msecs(ch->close_delay));
583 }
584 wake_up_interruptible(&ch->open_wait);
585 }
586 ch->asyncflags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
587 wake_up_interruptible(&ch->close_wait);
588 }
589
590 static int moxa_write(struct tty_struct *tty,
591 const unsigned char *buf, int count)
592 {
593 struct moxa_port *ch;
594 int len, port;
595 unsigned long flags;
596
597 ch = (struct moxa_port *) tty->driver_data;
598 if (ch == NULL)
599 return (0);
600 port = ch->port;
601
602 spin_lock_irqsave(&moxa_lock, flags);
603 len = MoxaPortWriteData(port, (unsigned char *) buf, count);
604 spin_unlock_irqrestore(&moxa_lock, flags);
605
606 /*********************************************
607 if ( !(ch->statusflags & LOWWAIT) &&
608 ((len != count) || (MoxaPortTxFree(port) <= 100)) )
609 ************************************************/
610 ch->statusflags |= LOWWAIT;
611 return (len);
612 }
613
614 static int moxa_write_room(struct tty_struct *tty)
615 {
616 struct moxa_port *ch;
617
618 if (tty->stopped)
619 return (0);
620 ch = (struct moxa_port *) tty->driver_data;
621 if (ch == NULL)
622 return (0);
623 return (MoxaPortTxFree(ch->port));
624 }
625
626 static void moxa_flush_buffer(struct tty_struct *tty)
627 {
628 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
629
630 if (ch == NULL)
631 return;
632 MoxaPortFlushData(ch->port, 1);
633 tty_wakeup(tty);
634 }
635
636 static int moxa_chars_in_buffer(struct tty_struct *tty)
637 {
638 int chars;
639 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
640
641 /*
642 * Sigh...I have to check if driver_data is NULL here, because
643 * if an open() fails, the TTY subsystem eventually calls
644 * tty_wait_until_sent(), which calls the driver's chars_in_buffer()
645 * routine. And since the open() failed, we return 0 here. TDJ
646 */
647 if (ch == NULL)
648 return (0);
649 chars = MoxaPortTxQueue(ch->port);
650 if (chars) {
651 /*
652 * Make it possible to wakeup anything waiting for output
653 * in tty_ioctl.c, etc.
654 */
655 if (!(ch->statusflags & EMPTYWAIT))
656 setup_empty_event(tty);
657 }
658 return (chars);
659 }
660
661 static void moxa_flush_chars(struct tty_struct *tty)
662 {
663 /*
664 * Don't think I need this, because this is called to empty the TX
665 * buffer for the 16450, 16550, etc.
666 */
667 }
668
669 static void moxa_put_char(struct tty_struct *tty, unsigned char c)
670 {
671 struct moxa_port *ch;
672 int port;
673 unsigned long flags;
674
675 ch = (struct moxa_port *) tty->driver_data;
676 if (ch == NULL)
677 return;
678 port = ch->port;
679 spin_lock_irqsave(&moxa_lock, flags);
680 MoxaPortWriteData(port, &c, 1);
681 spin_unlock_irqrestore(&moxa_lock, flags);
682 /************************************************
683 if ( !(ch->statusflags & LOWWAIT) && (MoxaPortTxFree(port) <= 100) )
684 *************************************************/
685 ch->statusflags |= LOWWAIT;
686 }
687
688 static int moxa_tiocmget(struct tty_struct *tty, struct file *file)
689 {
690 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
691 int port;
692 int flag = 0, dtr, rts;
693
694 port = tty->index;
695 if ((port != MAX_PORTS) && (!ch))
696 return (-EINVAL);
697
698 MoxaPortGetLineOut(ch->port, &dtr, &rts);
699 if (dtr)
700 flag |= TIOCM_DTR;
701 if (rts)
702 flag |= TIOCM_RTS;
703 dtr = MoxaPortLineStatus(ch->port);
704 if (dtr & 1)
705 flag |= TIOCM_CTS;
706 if (dtr & 2)
707 flag |= TIOCM_DSR;
708 if (dtr & 4)
709 flag |= TIOCM_CD;
710 return flag;
711 }
712
713 static int moxa_tiocmset(struct tty_struct *tty, struct file *file,
714 unsigned int set, unsigned int clear)
715 {
716 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
717 int port;
718 int dtr, rts;
719
720 port = tty->index;
721 if ((port != MAX_PORTS) && (!ch))
722 return (-EINVAL);
723
724 MoxaPortGetLineOut(ch->port, &dtr, &rts);
725 if (set & TIOCM_RTS)
726 rts = 1;
727 if (set & TIOCM_DTR)
728 dtr = 1;
729 if (clear & TIOCM_RTS)
730 rts = 0;
731 if (clear & TIOCM_DTR)
732 dtr = 0;
733 MoxaPortLineCtrl(ch->port, dtr, rts);
734 return 0;
735 }
736
737 static int moxa_ioctl(struct tty_struct *tty, struct file *file,
738 unsigned int cmd, unsigned long arg)
739 {
740 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
741 register int port;
742 void __user *argp = (void __user *)arg;
743 int retval;
744
745 port = tty->index;
746 if ((port != MAX_PORTS) && (!ch))
747 return (-EINVAL);
748
749 switch (cmd) {
750 case TCSBRK: /* SVID version: non-zero arg --> no break */
751 retval = tty_check_change(tty);
752 if (retval)
753 return (retval);
754 setup_empty_event(tty);
755 tty_wait_until_sent(tty, 0);
756 if (!arg)
757 MoxaPortSendBreak(ch->port, 0);
758 return (0);
759 case TCSBRKP: /* support for POSIX tcsendbreak() */
760 retval = tty_check_change(tty);
761 if (retval)
762 return (retval);
763 setup_empty_event(tty);
764 tty_wait_until_sent(tty, 0);
765 MoxaPortSendBreak(ch->port, arg);
766 return (0);
767 case TIOCGSOFTCAR:
768 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *) argp);
769 case TIOCSSOFTCAR:
770 if(get_user(retval, (unsigned long __user *) argp))
771 return -EFAULT;
772 arg = retval;
773 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) |
774 (arg ? CLOCAL : 0));
775 if (C_CLOCAL(tty))
776 ch->asyncflags &= ~ASYNC_CHECK_CD;
777 else
778 ch->asyncflags |= ASYNC_CHECK_CD;
779 return (0);
780 case TIOCGSERIAL:
781 return moxa_get_serial_info(ch, argp);
782
783 case TIOCSSERIAL:
784 return moxa_set_serial_info(ch, argp);
785 default:
786 retval = MoxaDriverIoctl(cmd, arg, port);
787 }
788 return (retval);
789 }
790
791 static void moxa_throttle(struct tty_struct *tty)
792 {
793 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
794
795 ch->statusflags |= THROTTLE;
796 }
797
798 static void moxa_unthrottle(struct tty_struct *tty)
799 {
800 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
801
802 ch->statusflags &= ~THROTTLE;
803 }
804
805 static void moxa_set_termios(struct tty_struct *tty,
806 struct ktermios *old_termios)
807 {
808 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
809
810 if (ch == NULL)
811 return;
812 set_tty_param(tty);
813 if (!(old_termios->c_cflag & CLOCAL) &&
814 (tty->termios->c_cflag & CLOCAL))
815 wake_up_interruptible(&ch->open_wait);
816 }
817
818 static void moxa_stop(struct tty_struct *tty)
819 {
820 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
821
822 if (ch == NULL)
823 return;
824 MoxaPortTxDisable(ch->port);
825 ch->statusflags |= TXSTOPPED;
826 }
827
828
829 static void moxa_start(struct tty_struct *tty)
830 {
831 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
832
833 if (ch == NULL)
834 return;
835
836 if (!(ch->statusflags & TXSTOPPED))
837 return;
838
839 MoxaPortTxEnable(ch->port);
840 ch->statusflags &= ~TXSTOPPED;
841 }
842
843 static void moxa_hangup(struct tty_struct *tty)
844 {
845 struct moxa_port *ch = (struct moxa_port *) tty->driver_data;
846
847 moxa_flush_buffer(tty);
848 shut_down(ch);
849 ch->event = 0;
850 ch->count = 0;
851 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
852 ch->tty = NULL;
853 wake_up_interruptible(&ch->open_wait);
854 }
855
856 static void moxa_poll(unsigned long ignored)
857 {
858 register int card;
859 struct moxa_port *ch;
860 struct tty_struct *tp;
861 int i, ports;
862
863 del_timer(&moxaTimer);
864
865 if (MoxaDriverPoll() < 0) {
866 mod_timer(&moxaTimer, jiffies + HZ / 50);
867 return;
868 }
869 for (card = 0; card < MAX_BOARDS; card++) {
870 if ((ports = MoxaPortsOfCard(card)) <= 0)
871 continue;
872 ch = &moxa_ports[card * MAX_PORTS_PER_BOARD];
873 for (i = 0; i < ports; i++, ch++) {
874 if ((ch->asyncflags & ASYNC_INITIALIZED) == 0)
875 continue;
876 if (!(ch->statusflags & THROTTLE) &&
877 (MoxaPortRxQueue(ch->port) > 0))
878 receive_data(ch);
879 if ((tp = ch->tty) == 0)
880 continue;
881 if (ch->statusflags & LOWWAIT) {
882 if (MoxaPortTxQueue(ch->port) <= WAKEUP_CHARS) {
883 if (!tp->stopped) {
884 ch->statusflags &= ~LOWWAIT;
885 tty_wakeup(tp);
886 }
887 }
888 }
889 if (!I_IGNBRK(tp) && (MoxaPortResetBrkCnt(ch->port) > 0)) {
890 tty_insert_flip_char(tp, 0, TTY_BREAK);
891 tty_schedule_flip(tp);
892 }
893 if (MoxaPortDCDChange(ch->port)) {
894 if (ch->asyncflags & ASYNC_CHECK_CD) {
895 if (MoxaPortDCDON(ch->port))
896 wake_up_interruptible(&ch->open_wait);
897 else {
898 tty_hangup(tp);
899 wake_up_interruptible(&ch->open_wait);
900 ch->asyncflags &= ~ASYNC_NORMAL_ACTIVE;
901 }
902 }
903 }
904 }
905 }
906
907 mod_timer(&moxaTimer, jiffies + HZ / 50);
908 }
909
910 /******************************************************************************/
911
912 static void set_tty_param(struct tty_struct *tty)
913 {
914 register struct ktermios *ts;
915 struct moxa_port *ch;
916 int rts, cts, txflow, rxflow, xany;
917
918 ch = (struct moxa_port *) tty->driver_data;
919 ts = tty->termios;
920 if (ts->c_cflag & CLOCAL)
921 ch->asyncflags &= ~ASYNC_CHECK_CD;
922 else
923 ch->asyncflags |= ASYNC_CHECK_CD;
924 rts = cts = txflow = rxflow = xany = 0;
925 if (ts->c_cflag & CRTSCTS)
926 rts = cts = 1;
927 if (ts->c_iflag & IXON)
928 txflow = 1;
929 if (ts->c_iflag & IXOFF)
930 rxflow = 1;
931 if (ts->c_iflag & IXANY)
932 xany = 1;
933 MoxaPortFlowCtrl(ch->port, rts, cts, txflow, rxflow, xany);
934 MoxaPortSetTermio(ch->port, ts, tty_get_baud_rate(tty));
935 }
936
937 static int block_till_ready(struct tty_struct *tty, struct file *filp,
938 struct moxa_port *ch)
939 {
940 DECLARE_WAITQUEUE(wait,current);
941 unsigned long flags;
942 int retval;
943 int do_clocal = C_CLOCAL(tty);
944
945 /*
946 * If the device is in the middle of being closed, then block
947 * until it's done, and then try again.
948 */
949 if (tty_hung_up_p(filp) || (ch->asyncflags & ASYNC_CLOSING)) {
950 if (ch->asyncflags & ASYNC_CLOSING)
951 interruptible_sleep_on(&ch->close_wait);
952 #ifdef SERIAL_DO_RESTART
953 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
954 return (-EAGAIN);
955 else
956 return (-ERESTARTSYS);
957 #else
958 return (-EAGAIN);
959 #endif
960 }
961 /*
962 * If non-blocking mode is set, then make the check up front
963 * and then exit.
964 */
965 if (filp->f_flags & O_NONBLOCK) {
966 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
967 return (0);
968 }
969 /*
970 * Block waiting for the carrier detect and the line to become free
971 */
972 retval = 0;
973 add_wait_queue(&ch->open_wait, &wait);
974 #ifdef SERIAL_DEBUG_OPEN
975 printk("block_til_ready before block: ttys%d, count = %d\n",
976 ch->line, ch->count);
977 #endif
978 spin_lock_irqsave(&moxa_lock, flags);
979 if (!tty_hung_up_p(filp))
980 ch->count--;
981 ch->blocked_open++;
982 spin_unlock_irqrestore(&moxa_lock, flags);
983
984 while (1) {
985 set_current_state(TASK_INTERRUPTIBLE);
986 if (tty_hung_up_p(filp) ||
987 !(ch->asyncflags & ASYNC_INITIALIZED)) {
988 #ifdef SERIAL_DO_RESTART
989 if (ch->asyncflags & ASYNC_HUP_NOTIFY)
990 retval = -EAGAIN;
991 else
992 retval = -ERESTARTSYS;
993 #else
994 retval = -EAGAIN;
995 #endif
996 break;
997 }
998 if (!(ch->asyncflags & ASYNC_CLOSING) && (do_clocal ||
999 MoxaPortDCDON(ch->port)))
1000 break;
1001
1002 if (signal_pending(current)) {
1003 retval = -ERESTARTSYS;
1004 break;
1005 }
1006 schedule();
1007 }
1008 set_current_state(TASK_RUNNING);
1009 remove_wait_queue(&ch->open_wait, &wait);
1010
1011 spin_lock_irqsave(&moxa_lock, flags);
1012 if (!tty_hung_up_p(filp))
1013 ch->count++;
1014 ch->blocked_open--;
1015 spin_unlock_irqrestore(&moxa_lock, flags);
1016 #ifdef SERIAL_DEBUG_OPEN
1017 printk("block_til_ready after blocking: ttys%d, count = %d\n",
1018 ch->line, ch->count);
1019 #endif
1020 if (retval)
1021 return (retval);
1022 /* FIXME: review to see if we need to use set_bit on these */
1023 ch->asyncflags |= ASYNC_NORMAL_ACTIVE;
1024 return 0;
1025 }
1026
1027 static void setup_empty_event(struct tty_struct *tty)
1028 {
1029 struct moxa_port *ch = tty->driver_data;
1030 unsigned long flags;
1031
1032 spin_lock_irqsave(&moxa_lock, flags);
1033 ch->statusflags |= EMPTYWAIT;
1034 mod_timer(&moxa_ports[ch->port].emptyTimer, jiffies + HZ);
1035 spin_unlock_irqrestore(&moxa_lock, flags);
1036 }
1037
1038 static void check_xmit_empty(unsigned long data)
1039 {
1040 struct moxa_port *ch;
1041
1042 ch = (struct moxa_port *) data;
1043 del_timer_sync(&moxa_ports[ch->port].emptyTimer);
1044 if (ch->tty && (ch->statusflags & EMPTYWAIT)) {
1045 if (MoxaPortTxQueue(ch->port) == 0) {
1046 ch->statusflags &= ~EMPTYWAIT;
1047 tty_wakeup(ch->tty);
1048 return;
1049 }
1050 mod_timer(&moxa_ports[ch->port].emptyTimer, jiffies + HZ);
1051 } else
1052 ch->statusflags &= ~EMPTYWAIT;
1053 }
1054
1055 static void shut_down(struct moxa_port *ch)
1056 {
1057 struct tty_struct *tp;
1058
1059 if (!(ch->asyncflags & ASYNC_INITIALIZED))
1060 return;
1061
1062 tp = ch->tty;
1063
1064 MoxaPortDisable(ch->port);
1065
1066 /*
1067 * If we're a modem control device and HUPCL is on, drop RTS & DTR.
1068 */
1069 if (tp->termios->c_cflag & HUPCL)
1070 MoxaPortLineCtrl(ch->port, 0, 0);
1071
1072 ch->asyncflags &= ~ASYNC_INITIALIZED;
1073 }
1074
1075 static void receive_data(struct moxa_port *ch)
1076 {
1077 struct tty_struct *tp;
1078 struct ktermios *ts;
1079 unsigned long flags;
1080
1081 ts = NULL;
1082 tp = ch->tty;
1083 if (tp)
1084 ts = tp->termios;
1085 /**************************************************
1086 if ( !tp || !ts || !(ts->c_cflag & CREAD) ) {
1087 *****************************************************/
1088 if (!tp || !ts) {
1089 MoxaPortFlushData(ch->port, 0);
1090 return;
1091 }
1092 spin_lock_irqsave(&moxa_lock, flags);
1093 MoxaPortReadData(ch->port, tp);
1094 spin_unlock_irqrestore(&moxa_lock, flags);
1095 tty_schedule_flip(tp);
1096 }
1097
1098 #define Magic_code 0x404
1099
1100 /*
1101 * System Configuration
1102 */
1103 /*
1104 * for C218 BIOS initialization
1105 */
1106 #define C218_ConfBase 0x800
1107 #define C218_status (C218_ConfBase + 0) /* BIOS running status */
1108 #define C218_diag (C218_ConfBase + 2) /* diagnostic status */
1109 #define C218_key (C218_ConfBase + 4) /* WORD (0x218 for C218) */
1110 #define C218DLoad_len (C218_ConfBase + 6) /* WORD */
1111 #define C218check_sum (C218_ConfBase + 8) /* BYTE */
1112 #define C218chksum_ok (C218_ConfBase + 0x0a) /* BYTE (1:ok) */
1113 #define C218_TestRx (C218_ConfBase + 0x10) /* 8 bytes for 8 ports */
1114 #define C218_TestTx (C218_ConfBase + 0x18) /* 8 bytes for 8 ports */
1115 #define C218_RXerr (C218_ConfBase + 0x20) /* 8 bytes for 8 ports */
1116 #define C218_ErrFlag (C218_ConfBase + 0x28) /* 8 bytes for 8 ports */
1117
1118 #define C218_LoadBuf 0x0F00
1119 #define C218_KeyCode 0x218
1120 #define CP204J_KeyCode 0x204
1121
1122 /*
1123 * for C320 BIOS initialization
1124 */
1125 #define C320_ConfBase 0x800
1126 #define C320_LoadBuf 0x0f00
1127 #define STS_init 0x05 /* for C320_status */
1128
1129 #define C320_status C320_ConfBase + 0 /* BIOS running status */
1130 #define C320_diag C320_ConfBase + 2 /* diagnostic status */
1131 #define C320_key C320_ConfBase + 4 /* WORD (0320H for C320) */
1132 #define C320DLoad_len C320_ConfBase + 6 /* WORD */
1133 #define C320check_sum C320_ConfBase + 8 /* WORD */
1134 #define C320chksum_ok C320_ConfBase + 0x0a /* WORD (1:ok) */
1135 #define C320bapi_len C320_ConfBase + 0x0c /* WORD */
1136 #define C320UART_no C320_ConfBase + 0x0e /* WORD */
1137
1138 #define C320_KeyCode 0x320
1139
1140 #define FixPage_addr 0x0000 /* starting addr of static page */
1141 #define DynPage_addr 0x2000 /* starting addr of dynamic page */
1142 #define C218_start 0x3000 /* starting addr of C218 BIOS prg */
1143 #define Control_reg 0x1ff0 /* select page and reset control */
1144 #define HW_reset 0x80
1145
1146 /*
1147 * Function Codes
1148 */
1149 #define FC_CardReset 0x80
1150 #define FC_ChannelReset 1 /* C320 firmware not supported */
1151 #define FC_EnableCH 2
1152 #define FC_DisableCH 3
1153 #define FC_SetParam 4
1154 #define FC_SetMode 5
1155 #define FC_SetRate 6
1156 #define FC_LineControl 7
1157 #define FC_LineStatus 8
1158 #define FC_XmitControl 9
1159 #define FC_FlushQueue 10
1160 #define FC_SendBreak 11
1161 #define FC_StopBreak 12
1162 #define FC_LoopbackON 13
1163 #define FC_LoopbackOFF 14
1164 #define FC_ClrIrqTable 15
1165 #define FC_SendXon 16
1166 #define FC_SetTermIrq 17 /* C320 firmware not supported */
1167 #define FC_SetCntIrq 18 /* C320 firmware not supported */
1168 #define FC_SetBreakIrq 19
1169 #define FC_SetLineIrq 20
1170 #define FC_SetFlowCtl 21
1171 #define FC_GenIrq 22
1172 #define FC_InCD180 23
1173 #define FC_OutCD180 24
1174 #define FC_InUARTreg 23
1175 #define FC_OutUARTreg 24
1176 #define FC_SetXonXoff 25
1177 #define FC_OutCD180CCR 26
1178 #define FC_ExtIQueue 27
1179 #define FC_ExtOQueue 28
1180 #define FC_ClrLineIrq 29
1181 #define FC_HWFlowCtl 30
1182 #define FC_GetClockRate 35
1183 #define FC_SetBaud 36
1184 #define FC_SetDataMode 41
1185 #define FC_GetCCSR 43
1186 #define FC_GetDataError 45
1187 #define FC_RxControl 50
1188 #define FC_ImmSend 51
1189 #define FC_SetXonState 52
1190 #define FC_SetXoffState 53
1191 #define FC_SetRxFIFOTrig 54
1192 #define FC_SetTxFIFOCnt 55
1193 #define FC_UnixRate 56
1194 #define FC_UnixResetTimer 57
1195
1196 #define RxFIFOTrig1 0
1197 #define RxFIFOTrig4 1
1198 #define RxFIFOTrig8 2
1199 #define RxFIFOTrig14 3
1200
1201 /*
1202 * Dual-Ported RAM
1203 */
1204 #define DRAM_global 0
1205 #define INT_data (DRAM_global + 0)
1206 #define Config_base (DRAM_global + 0x108)
1207
1208 #define IRQindex (INT_data + 0)
1209 #define IRQpending (INT_data + 4)
1210 #define IRQtable (INT_data + 8)
1211
1212 /*
1213 * Interrupt Status
1214 */
1215 #define IntrRx 0x01 /* receiver data O.K. */
1216 #define IntrTx 0x02 /* transmit buffer empty */
1217 #define IntrFunc 0x04 /* function complete */
1218 #define IntrBreak 0x08 /* received break */
1219 #define IntrLine 0x10 /* line status change
1220 for transmitter */
1221 #define IntrIntr 0x20 /* received INTR code */
1222 #define IntrQuit 0x40 /* received QUIT code */
1223 #define IntrEOF 0x80 /* received EOF code */
1224
1225 #define IntrRxTrigger 0x100 /* rx data count reach tigger value */
1226 #define IntrTxTrigger 0x200 /* tx data count below trigger value */
1227
1228 #define Magic_no (Config_base + 0)
1229 #define Card_model_no (Config_base + 2)
1230 #define Total_ports (Config_base + 4)
1231 #define Module_cnt (Config_base + 8)
1232 #define Module_no (Config_base + 10)
1233 #define Timer_10ms (Config_base + 14)
1234 #define Disable_IRQ (Config_base + 20)
1235 #define TMS320_PORT1 (Config_base + 22)
1236 #define TMS320_PORT2 (Config_base + 24)
1237 #define TMS320_CLOCK (Config_base + 26)
1238
1239 /*
1240 * DATA BUFFER in DRAM
1241 */
1242 #define Extern_table 0x400 /* Base address of the external table
1243 (24 words * 64) total 3K bytes
1244 (24 words * 128) total 6K bytes */
1245 #define Extern_size 0x60 /* 96 bytes */
1246 #define RXrptr 0x00 /* read pointer for RX buffer */
1247 #define RXwptr 0x02 /* write pointer for RX buffer */
1248 #define TXrptr 0x04 /* read pointer for TX buffer */
1249 #define TXwptr 0x06 /* write pointer for TX buffer */
1250 #define HostStat 0x08 /* IRQ flag and general flag */
1251 #define FlagStat 0x0A
1252 #define FlowControl 0x0C /* B7 B6 B5 B4 B3 B2 B1 B0 */
1253 /* x x x x | | | | */
1254 /* | | | + CTS flow */
1255 /* | | +--- RTS flow */
1256 /* | +------ TX Xon/Xoff */
1257 /* +--------- RX Xon/Xoff */
1258 #define Break_cnt 0x0E /* received break count */
1259 #define CD180TXirq 0x10 /* if non-0: enable TX irq */
1260 #define RX_mask 0x12
1261 #define TX_mask 0x14
1262 #define Ofs_rxb 0x16
1263 #define Ofs_txb 0x18
1264 #define Page_rxb 0x1A
1265 #define Page_txb 0x1C
1266 #define EndPage_rxb 0x1E
1267 #define EndPage_txb 0x20
1268 #define Data_error 0x22
1269 #define RxTrigger 0x28
1270 #define TxTrigger 0x2a
1271
1272 #define rRXwptr 0x34
1273 #define Low_water 0x36
1274
1275 #define FuncCode 0x40
1276 #define FuncArg 0x42
1277 #define FuncArg1 0x44
1278
1279 #define C218rx_size 0x2000 /* 8K bytes */
1280 #define C218tx_size 0x8000 /* 32K bytes */
1281
1282 #define C218rx_mask (C218rx_size - 1)
1283 #define C218tx_mask (C218tx_size - 1)
1284
1285 #define C320p8rx_size 0x2000
1286 #define C320p8tx_size 0x8000
1287 #define C320p8rx_mask (C320p8rx_size - 1)
1288 #define C320p8tx_mask (C320p8tx_size - 1)
1289
1290 #define C320p16rx_size 0x2000
1291 #define C320p16tx_size 0x4000
1292 #define C320p16rx_mask (C320p16rx_size - 1)
1293 #define C320p16tx_mask (C320p16tx_size - 1)
1294
1295 #define C320p24rx_size 0x2000
1296 #define C320p24tx_size 0x2000
1297 #define C320p24rx_mask (C320p24rx_size - 1)
1298 #define C320p24tx_mask (C320p24tx_size - 1)
1299
1300 #define C320p32rx_size 0x1000
1301 #define C320p32tx_size 0x1000
1302 #define C320p32rx_mask (C320p32rx_size - 1)
1303 #define C320p32tx_mask (C320p32tx_size - 1)
1304
1305 #define Page_size 0x2000
1306 #define Page_mask (Page_size - 1)
1307 #define C218rx_spage 3
1308 #define C218tx_spage 4
1309 #define C218rx_pageno 1
1310 #define C218tx_pageno 4
1311 #define C218buf_pageno 5
1312
1313 #define C320p8rx_spage 3
1314 #define C320p8tx_spage 4
1315 #define C320p8rx_pgno 1
1316 #define C320p8tx_pgno 4
1317 #define C320p8buf_pgno 5
1318
1319 #define C320p16rx_spage 3
1320 #define C320p16tx_spage 4
1321 #define C320p16rx_pgno 1
1322 #define C320p16tx_pgno 2
1323 #define C320p16buf_pgno 3
1324
1325 #define C320p24rx_spage 3
1326 #define C320p24tx_spage 4
1327 #define C320p24rx_pgno 1
1328 #define C320p24tx_pgno 1
1329 #define C320p24buf_pgno 2
1330
1331 #define C320p32rx_spage 3
1332 #define C320p32tx_ofs C320p32rx_size
1333 #define C320p32tx_spage 3
1334 #define C320p32buf_pgno 1
1335
1336 /*
1337 * Host Status
1338 */
1339 #define WakeupRx 0x01
1340 #define WakeupTx 0x02
1341 #define WakeupBreak 0x08
1342 #define WakeupLine 0x10
1343 #define WakeupIntr 0x20
1344 #define WakeupQuit 0x40
1345 #define WakeupEOF 0x80 /* used in VTIME control */
1346 #define WakeupRxTrigger 0x100
1347 #define WakeupTxTrigger 0x200
1348 /*
1349 * Flag status
1350 */
1351 #define Rx_over 0x01
1352 #define Xoff_state 0x02
1353 #define Tx_flowOff 0x04
1354 #define Tx_enable 0x08
1355 #define CTS_state 0x10
1356 #define DSR_state 0x20
1357 #define DCD_state 0x80
1358 /*
1359 * FlowControl
1360 */
1361 #define CTS_FlowCtl 1
1362 #define RTS_FlowCtl 2
1363 #define Tx_FlowCtl 4
1364 #define Rx_FlowCtl 8
1365 #define IXM_IXANY 0x10
1366
1367 #define LowWater 128
1368
1369 #define DTR_ON 1
1370 #define RTS_ON 2
1371 #define CTS_ON 1
1372 #define DSR_ON 2
1373 #define DCD_ON 8
1374
1375 /* mode definition */
1376 #define MX_CS8 0x03
1377 #define MX_CS7 0x02
1378 #define MX_CS6 0x01
1379 #define MX_CS5 0x00
1380
1381 #define MX_STOP1 0x00
1382 #define MX_STOP15 0x04
1383 #define MX_STOP2 0x08
1384
1385 #define MX_PARNONE 0x00
1386 #define MX_PAREVEN 0x40
1387 #define MX_PARODD 0xC0
1388
1389 /*
1390 * Query
1391 */
1392
1393 struct mon_str {
1394 int tick;
1395 int rxcnt[MAX_PORTS];
1396 int txcnt[MAX_PORTS];
1397 };
1398
1399 #define DCD_changed 0x01
1400 #define DCD_oldstate 0x80
1401
1402 static unsigned char moxaBuff[10240];
1403 static int moxaLowWaterChk;
1404 static int moxaCard;
1405 static struct mon_str moxaLog;
1406 static int moxaFuncTout = HZ / 2;
1407
1408 static void moxafunc(void __iomem *, int, ushort);
1409 static void wait_finish(void __iomem *);
1410 static void low_water_check(void __iomem *);
1411 static int moxaloadbios(int, unsigned char __user *, int);
1412 static int moxafindcard(int);
1413 static int moxaload320b(int, unsigned char __user *, int);
1414 static int moxaloadcode(int, unsigned char __user *, int);
1415 static int moxaloadc218(int, void __iomem *, int);
1416 static int moxaloadc320(int, void __iomem *, int, int *);
1417
1418 /*****************************************************************************
1419 * Driver level functions: *
1420 * 1. MoxaDriverInit(void); *
1421 * 2. MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port); *
1422 * 3. MoxaDriverPoll(void); *
1423 *****************************************************************************/
1424 void MoxaDriverInit(void)
1425 {
1426 struct moxa_port *p;
1427 unsigned int i;
1428
1429 moxaFuncTout = HZ / 2; /* 500 mini-seconds */
1430 moxaCard = 0;
1431 moxaLog.tick = 0;
1432 moxaLowWaterChk = 0;
1433 for (i = 0; i < MAX_PORTS; i++) {
1434 p = &moxa_ports[i];
1435 p->chkPort = 0;
1436 p->lowChkFlag = 0;
1437 p->lineCtrl = 0;
1438 moxaLog.rxcnt[i] = 0;
1439 moxaLog.txcnt[i] = 0;
1440 }
1441 }
1442
1443 #define MOXA 0x400
1444 #define MOXA_GET_IQUEUE (MOXA + 1) /* get input buffered count */
1445 #define MOXA_GET_OQUEUE (MOXA + 2) /* get output buffered count */
1446 #define MOXA_INIT_DRIVER (MOXA + 6) /* moxaCard=0 */
1447 #define MOXA_LOAD_BIOS (MOXA + 9) /* download BIOS */
1448 #define MOXA_FIND_BOARD (MOXA + 10) /* Check if MOXA card exist? */
1449 #define MOXA_LOAD_C320B (MOXA + 11) /* download 320B firmware */
1450 #define MOXA_LOAD_CODE (MOXA + 12) /* download firmware */
1451 #define MOXA_GETDATACOUNT (MOXA + 23)
1452 #define MOXA_GET_IOQUEUE (MOXA + 27)
1453 #define MOXA_FLUSH_QUEUE (MOXA + 28)
1454 #define MOXA_GET_CONF (MOXA + 35) /* configuration */
1455 #define MOXA_GET_MAJOR (MOXA + 63)
1456 #define MOXA_GET_CUMAJOR (MOXA + 64)
1457 #define MOXA_GETMSTATUS (MOXA + 65)
1458
1459 struct dl_str {
1460 char __user *buf;
1461 int len;
1462 int cardno;
1463 };
1464
1465 static struct dl_str dltmp;
1466
1467 void MoxaPortFlushData(int port, int mode)
1468 {
1469 void __iomem *ofsAddr;
1470 if ((mode < 0) || (mode > 2))
1471 return;
1472 ofsAddr = moxa_ports[port].tableAddr;
1473 moxafunc(ofsAddr, FC_FlushQueue, mode);
1474 if (mode != 1) {
1475 moxa_ports[port].lowChkFlag = 0;
1476 low_water_check(ofsAddr);
1477 }
1478 }
1479
1480 int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port)
1481 {
1482 int i;
1483 int status;
1484 int MoxaPortTxQueue(int), MoxaPortRxQueue(int);
1485 void __user *argp = (void __user *)arg;
1486
1487 if (port == MAX_PORTS) {
1488 if ((cmd != MOXA_GET_CONF) && (cmd != MOXA_INIT_DRIVER) &&
1489 (cmd != MOXA_LOAD_BIOS) && (cmd != MOXA_FIND_BOARD) && (cmd != MOXA_LOAD_C320B) &&
1490 (cmd != MOXA_LOAD_CODE) && (cmd != MOXA_GETDATACOUNT) &&
1491 (cmd != MOXA_GET_IOQUEUE) && (cmd != MOXA_GET_MAJOR) &&
1492 (cmd != MOXA_GET_CUMAJOR) && (cmd != MOXA_GETMSTATUS))
1493 return (-EINVAL);
1494 }
1495 switch (cmd) {
1496 case MOXA_GET_CONF:
1497 if(copy_to_user(argp, &moxa_boards, MAX_BOARDS *
1498 sizeof(struct moxa_board_conf)))
1499 return -EFAULT;
1500 return (0);
1501 case MOXA_INIT_DRIVER:
1502 if ((int) arg == 0x404)
1503 MoxaDriverInit();
1504 return (0);
1505 case MOXA_GETDATACOUNT:
1506 moxaLog.tick = jiffies;
1507 if(copy_to_user(argp, &moxaLog, sizeof(struct mon_str)))
1508 return -EFAULT;
1509 return (0);
1510 case MOXA_FLUSH_QUEUE:
1511 MoxaPortFlushData(port, arg);
1512 return (0);
1513 case MOXA_GET_IOQUEUE: {
1514 struct moxaq_str __user *argm = argp;
1515 struct moxaq_str tmp;
1516
1517 for (i = 0; i < MAX_PORTS; i++, argm++) {
1518 memset(&tmp, 0, sizeof(tmp));
1519 if (moxa_ports[i].chkPort) {
1520 tmp.inq = MoxaPortRxQueue(i);
1521 tmp.outq = MoxaPortTxQueue(i);
1522 }
1523 if (copy_to_user(argm, &tmp, sizeof(tmp)))
1524 return -EFAULT;
1525 }
1526 return (0);
1527 } case MOXA_GET_OQUEUE:
1528 i = MoxaPortTxQueue(port);
1529 return put_user(i, (unsigned long __user *)argp);
1530 case MOXA_GET_IQUEUE:
1531 i = MoxaPortRxQueue(port);
1532 return put_user(i, (unsigned long __user *)argp);
1533 case MOXA_GET_MAJOR:
1534 if(copy_to_user(argp, &ttymajor, sizeof(int)))
1535 return -EFAULT;
1536 return 0;
1537 case MOXA_GET_CUMAJOR:
1538 i = 0;
1539 if(copy_to_user(argp, &i, sizeof(int)))
1540 return -EFAULT;
1541 return 0;
1542 case MOXA_GETMSTATUS: {
1543 struct mxser_mstatus __user *argm = argp;
1544 struct mxser_mstatus tmp;
1545 struct moxa_port *p;
1546
1547 for (i = 0; i < MAX_PORTS; i++, argm++) {
1548 p = &moxa_ports[i];
1549 memset(&tmp, 0, sizeof(tmp));
1550 if (!p->chkPort) {
1551 goto copy;
1552 } else {
1553 status = MoxaPortLineStatus(p->port);
1554 if (status & 1)
1555 tmp.cts = 1;
1556 if (status & 2)
1557 tmp.dsr = 1;
1558 if (status & 4)
1559 tmp.dcd = 1;
1560 }
1561
1562 if (!p->tty || !p->tty->termios)
1563 tmp.cflag = p->cflag;
1564 else
1565 tmp.cflag = p->tty->termios->c_cflag;
1566 copy:
1567 if (copy_to_user(argm, &tmp, sizeof(tmp)))
1568 return -EFAULT;
1569 }
1570 return 0;
1571 } default:
1572 return (-ENOIOCTLCMD);
1573 case MOXA_LOAD_BIOS:
1574 case MOXA_FIND_BOARD:
1575 case MOXA_LOAD_C320B:
1576 case MOXA_LOAD_CODE:
1577 if (!capable(CAP_SYS_RAWIO))
1578 return -EPERM;
1579 break;
1580 }
1581
1582 if(copy_from_user(&dltmp, argp, sizeof(struct dl_str)))
1583 return -EFAULT;
1584 if(dltmp.cardno < 0 || dltmp.cardno >= MAX_BOARDS || dltmp.len < 0)
1585 return -EINVAL;
1586
1587 switch(cmd)
1588 {
1589 case MOXA_LOAD_BIOS:
1590 i = moxaloadbios(dltmp.cardno, dltmp.buf, dltmp.len);
1591 return (i);
1592 case MOXA_FIND_BOARD:
1593 return moxafindcard(dltmp.cardno);
1594 case MOXA_LOAD_C320B:
1595 moxaload320b(dltmp.cardno, dltmp.buf, dltmp.len);
1596 default: /* to keep gcc happy */
1597 return (0);
1598 case MOXA_LOAD_CODE:
1599 i = moxaloadcode(dltmp.cardno, dltmp.buf, dltmp.len);
1600 if (i == -1)
1601 return (-EFAULT);
1602 return (i);
1603
1604 }
1605 }
1606
1607 int MoxaDriverPoll(void)
1608 {
1609 struct moxa_board_conf *brd;
1610 register ushort temp;
1611 register int card;
1612 void __iomem *ofsAddr;
1613 void __iomem *ip;
1614 int port, p, ports;
1615
1616 if (moxaCard == 0)
1617 return (-1);
1618 for (card = 0; card < MAX_BOARDS; card++) {
1619 brd = &moxa_boards[card];
1620 if (brd->loadstat == 0)
1621 continue;
1622 if ((ports = brd->numPorts) == 0)
1623 continue;
1624 if (readb(brd->intPend) == 0xff) {
1625 ip = brd->intTable + readb(brd->intNdx);
1626 p = card * MAX_PORTS_PER_BOARD;
1627 ports <<= 1;
1628 for (port = 0; port < ports; port += 2, p++) {
1629 if ((temp = readw(ip + port)) != 0) {
1630 writew(0, ip + port);
1631 ofsAddr = moxa_ports[p].tableAddr;
1632 if (temp & IntrTx)
1633 writew(readw(ofsAddr + HostStat) & ~WakeupTx, ofsAddr + HostStat);
1634 if (temp & IntrBreak) {
1635 moxa_ports[p].breakCnt++;
1636 }
1637 if (temp & IntrLine) {
1638 if (readb(ofsAddr + FlagStat) & DCD_state) {
1639 if ((moxa_ports[p].DCDState & DCD_oldstate) == 0)
1640 moxa_ports[p].DCDState = (DCD_oldstate |
1641 DCD_changed);
1642 } else {
1643 if (moxa_ports[p].DCDState & DCD_oldstate)
1644 moxa_ports[p].DCDState = DCD_changed;
1645 }
1646 }
1647 }
1648 }
1649 writeb(0, brd->intPend);
1650 }
1651 if (moxaLowWaterChk) {
1652 p = card * MAX_PORTS_PER_BOARD;
1653 for (port = 0; port < ports; port++, p++) {
1654 if (moxa_ports[p].lowChkFlag) {
1655 moxa_ports[p].lowChkFlag = 0;
1656 ofsAddr = moxa_ports[p].tableAddr;
1657 low_water_check(ofsAddr);
1658 }
1659 }
1660 }
1661 }
1662 moxaLowWaterChk = 0;
1663 return (0);
1664 }
1665
1666 /*****************************************************************************
1667 * Card level function: *
1668 * 1. MoxaPortsOfCard(int cardno); *
1669 *****************************************************************************/
1670 int MoxaPortsOfCard(int cardno)
1671 {
1672
1673 if (moxa_boards[cardno].boardType == 0)
1674 return (0);
1675 return (moxa_boards[cardno].numPorts);
1676 }
1677
1678 /*****************************************************************************
1679 * Port level functions: *
1680 * 1. MoxaPortIsValid(int port); *
1681 * 2. MoxaPortEnable(int port); *
1682 * 3. MoxaPortDisable(int port); *
1683 * 4. MoxaPortGetMaxBaud(int port); *
1684 * 6. MoxaPortSetBaud(int port, long baud); *
1685 * 8. MoxaPortSetTermio(int port, unsigned char *termio); *
1686 * 9. MoxaPortGetLineOut(int port, int *dtrState, int *rtsState); *
1687 * 10. MoxaPortLineCtrl(int port, int dtrState, int rtsState); *
1688 * 11. MoxaPortFlowCtrl(int port, int rts, int cts, int rx, int tx,int xany); *
1689 * 12. MoxaPortLineStatus(int port); *
1690 * 13. MoxaPortDCDChange(int port); *
1691 * 14. MoxaPortDCDON(int port); *
1692 * 15. MoxaPortFlushData(int port, int mode); *
1693 * 16. MoxaPortWriteData(int port, unsigned char * buffer, int length); *
1694 * 17. MoxaPortReadData(int port, struct tty_struct *tty); *
1695 * 20. MoxaPortTxQueue(int port); *
1696 * 21. MoxaPortTxFree(int port); *
1697 * 22. MoxaPortRxQueue(int port); *
1698 * 24. MoxaPortTxDisable(int port); *
1699 * 25. MoxaPortTxEnable(int port); *
1700 * 27. MoxaPortResetBrkCnt(int port); *
1701 * 30. MoxaPortSendBreak(int port, int ticks); *
1702 *****************************************************************************/
1703 /*
1704 * Moxa Port Number Description:
1705 *
1706 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1707 * the port number using in MOXA driver functions will be 0 to 31 for
1708 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1709 * to 127 for fourth. For example, if you setup three MOXA boards,
1710 * first board is C218, second board is C320-16 and third board is
1711 * C320-32. The port number of first board (C218 - 8 ports) is from
1712 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1713 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1714 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1715 * 127 will be invalid.
1716 *
1717 *
1718 * Moxa Functions Description:
1719 *
1720 * Function 1: Driver initialization routine, this routine must be
1721 * called when initialized driver.
1722 * Syntax:
1723 * void MoxaDriverInit();
1724 *
1725 *
1726 * Function 2: Moxa driver private IOCTL command processing.
1727 * Syntax:
1728 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1729 *
1730 * unsigned int cmd : IOCTL command
1731 * unsigned long arg : IOCTL argument
1732 * int port : port number (0 - 127)
1733 *
1734 * return: 0 (OK)
1735 * -EINVAL
1736 * -ENOIOCTLCMD
1737 *
1738 *
1739 * Function 3: Moxa driver polling process routine.
1740 * Syntax:
1741 * int MoxaDriverPoll(void);
1742 *
1743 * return: 0 ; polling O.K.
1744 * -1 : no any Moxa card.
1745 *
1746 *
1747 * Function 4: Get the ports of this card.
1748 * Syntax:
1749 * int MoxaPortsOfCard(int cardno);
1750 *
1751 * int cardno : card number (0 - 3)
1752 *
1753 * return: 0 : this card is invalid
1754 * 8/16/24/32
1755 *
1756 *
1757 * Function 5: Check this port is valid or invalid
1758 * Syntax:
1759 * int MoxaPortIsValid(int port);
1760 * int port : port number (0 - 127, ref port description)
1761 *
1762 * return: 0 : this port is invalid
1763 * 1 : this port is valid
1764 *
1765 *
1766 * Function 6: Enable this port to start Tx/Rx data.
1767 * Syntax:
1768 * void MoxaPortEnable(int port);
1769 * int port : port number (0 - 127)
1770 *
1771 *
1772 * Function 7: Disable this port
1773 * Syntax:
1774 * void MoxaPortDisable(int port);
1775 * int port : port number (0 - 127)
1776 *
1777 *
1778 * Function 8: Get the maximun available baud rate of this port.
1779 * Syntax:
1780 * long MoxaPortGetMaxBaud(int port);
1781 * int port : port number (0 - 127)
1782 *
1783 * return: 0 : this port is invalid
1784 * 38400/57600/115200 bps
1785 *
1786 *
1787 * Function 10: Setting baud rate of this port.
1788 * Syntax:
1789 * long MoxaPortSetBaud(int port, long baud);
1790 * int port : port number (0 - 127)
1791 * long baud : baud rate (50 - 115200)
1792 *
1793 * return: 0 : this port is invalid or baud < 50
1794 * 50 - 115200 : the real baud rate set to the port, if
1795 * the argument baud is large than maximun
1796 * available baud rate, the real setting
1797 * baud rate will be the maximun baud rate.
1798 *
1799 *
1800 * Function 12: Configure the port.
1801 * Syntax:
1802 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1803 * int port : port number (0 - 127)
1804 * struct ktermios * termio : termio structure pointer
1805 * speed_t baud : baud rate
1806 *
1807 * return: -1 : this port is invalid or termio == NULL
1808 * 0 : setting O.K.
1809 *
1810 *
1811 * Function 13: Get the DTR/RTS state of this port.
1812 * Syntax:
1813 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1814 * int port : port number (0 - 127)
1815 * int * dtrState : pointer to INT to receive the current DTR
1816 * state. (if NULL, this function will not
1817 * write to this address)
1818 * int * rtsState : pointer to INT to receive the current RTS
1819 * state. (if NULL, this function will not
1820 * write to this address)
1821 *
1822 * return: -1 : this port is invalid
1823 * 0 : O.K.
1824 *
1825 *
1826 * Function 14: Setting the DTR/RTS output state of this port.
1827 * Syntax:
1828 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1829 * int port : port number (0 - 127)
1830 * int dtrState : DTR output state (0: off, 1: on)
1831 * int rtsState : RTS output state (0: off, 1: on)
1832 *
1833 *
1834 * Function 15: Setting the flow control of this port.
1835 * Syntax:
1836 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1837 * int txFlow,int xany);
1838 * int port : port number (0 - 127)
1839 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1840 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1841 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1842 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1843 * int xany : S/W XANY flow control (0: no, 1: yes)
1844 *
1845 *
1846 * Function 16: Get ths line status of this port
1847 * Syntax:
1848 * int MoxaPortLineStatus(int port);
1849 * int port : port number (0 - 127)
1850 *
1851 * return: Bit 0 - CTS state (0: off, 1: on)
1852 * Bit 1 - DSR state (0: off, 1: on)
1853 * Bit 2 - DCD state (0: off, 1: on)
1854 *
1855 *
1856 * Function 17: Check the DCD state has changed since the last read
1857 * of this function.
1858 * Syntax:
1859 * int MoxaPortDCDChange(int port);
1860 * int port : port number (0 - 127)
1861 *
1862 * return: 0 : no changed
1863 * 1 : DCD has changed
1864 *
1865 *
1866 * Function 18: Check ths current DCD state is ON or not.
1867 * Syntax:
1868 * int MoxaPortDCDON(int port);
1869 * int port : port number (0 - 127)
1870 *
1871 * return: 0 : DCD off
1872 * 1 : DCD on
1873 *
1874 *
1875 * Function 19: Flush the Rx/Tx buffer data of this port.
1876 * Syntax:
1877 * void MoxaPortFlushData(int port, int mode);
1878 * int port : port number (0 - 127)
1879 * int mode
1880 * 0 : flush the Rx buffer
1881 * 1 : flush the Tx buffer
1882 * 2 : flush the Rx and Tx buffer
1883 *
1884 *
1885 * Function 20: Write data.
1886 * Syntax:
1887 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1888 * int port : port number (0 - 127)
1889 * unsigned char * buffer : pointer to write data buffer.
1890 * int length : write data length
1891 *
1892 * return: 0 - length : real write data length
1893 *
1894 *
1895 * Function 21: Read data.
1896 * Syntax:
1897 * int MoxaPortReadData(int port, struct tty_struct *tty);
1898 * int port : port number (0 - 127)
1899 * struct tty_struct *tty : tty for data
1900 *
1901 * return: 0 - length : real read data length
1902 *
1903 *
1904 * Function 24: Get the Tx buffer current queued data bytes
1905 * Syntax:
1906 * int MoxaPortTxQueue(int port);
1907 * int port : port number (0 - 127)
1908 *
1909 * return: .. : Tx buffer current queued data bytes
1910 *
1911 *
1912 * Function 25: Get the Tx buffer current free space
1913 * Syntax:
1914 * int MoxaPortTxFree(int port);
1915 * int port : port number (0 - 127)
1916 *
1917 * return: .. : Tx buffer current free space
1918 *
1919 *
1920 * Function 26: Get the Rx buffer current queued data bytes
1921 * Syntax:
1922 * int MoxaPortRxQueue(int port);
1923 * int port : port number (0 - 127)
1924 *
1925 * return: .. : Rx buffer current queued data bytes
1926 *
1927 *
1928 * Function 28: Disable port data transmission.
1929 * Syntax:
1930 * void MoxaPortTxDisable(int port);
1931 * int port : port number (0 - 127)
1932 *
1933 *
1934 * Function 29: Enable port data transmission.
1935 * Syntax:
1936 * void MoxaPortTxEnable(int port);
1937 * int port : port number (0 - 127)
1938 *
1939 *
1940 * Function 31: Get the received BREAK signal count and reset it.
1941 * Syntax:
1942 * int MoxaPortResetBrkCnt(int port);
1943 * int port : port number (0 - 127)
1944 *
1945 * return: 0 - .. : BREAK signal count
1946 *
1947 *
1948 * Function 34: Send out a BREAK signal.
1949 * Syntax:
1950 * void MoxaPortSendBreak(int port, int ms100);
1951 * int port : port number (0 - 127)
1952 * int ms100 : break signal time interval.
1953 * unit: 100 mini-second. if ms100 == 0, it will
1954 * send out a about 250 ms BREAK signal.
1955 *
1956 */
1957 int MoxaPortIsValid(int port)
1958 {
1959
1960 if (moxaCard == 0)
1961 return (0);
1962 if (moxa_ports[port].chkPort == 0)
1963 return (0);
1964 return (1);
1965 }
1966
1967 void MoxaPortEnable(int port)
1968 {
1969 void __iomem *ofsAddr;
1970 int MoxaPortLineStatus(int);
1971 short lowwater = 512;
1972
1973 ofsAddr = moxa_ports[port].tableAddr;
1974 writew(lowwater, ofsAddr + Low_water);
1975 moxa_ports[port].breakCnt = 0;
1976 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
1977 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
1978 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
1979 } else {
1980 writew(readw(ofsAddr + HostStat) | WakeupBreak, ofsAddr + HostStat);
1981 }
1982
1983 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1984 moxafunc(ofsAddr, FC_FlushQueue, 2);
1985
1986 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1987 MoxaPortLineStatus(port);
1988 }
1989
1990 void MoxaPortDisable(int port)
1991 {
1992 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
1993
1994 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1995 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1996 writew(0, ofsAddr + HostStat);
1997 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1998 }
1999
2000 long MoxaPortGetMaxBaud(int port)
2001 {
2002 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2003 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI))
2004 return (460800L);
2005 else
2006 return (921600L);
2007 }
2008
2009
2010 long MoxaPortSetBaud(int port, long baud)
2011 {
2012 void __iomem *ofsAddr;
2013 long max, clock;
2014 unsigned int val;
2015
2016 if ((baud < 50L) || ((max = MoxaPortGetMaxBaud(port)) == 0))
2017 return (0);
2018 ofsAddr = moxa_ports[port].tableAddr;
2019 if (baud > max)
2020 baud = max;
2021 if (max == 38400L)
2022 clock = 614400L; /* for 9.8304 Mhz : max. 38400 bps */
2023 else if (max == 57600L)
2024 clock = 691200L; /* for 11.0592 Mhz : max. 57600 bps */
2025 else
2026 clock = 921600L; /* for 14.7456 Mhz : max. 115200 bps */
2027 val = clock / baud;
2028 moxafunc(ofsAddr, FC_SetBaud, val);
2029 baud = clock / val;
2030 moxa_ports[port].curBaud = baud;
2031 return (baud);
2032 }
2033
2034 int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud)
2035 {
2036 void __iomem *ofsAddr;
2037 tcflag_t cflag;
2038 tcflag_t mode = 0;
2039
2040 if (moxa_ports[port].chkPort == 0 || termio == 0)
2041 return (-1);
2042 ofsAddr = moxa_ports[port].tableAddr;
2043 cflag = termio->c_cflag; /* termio->c_cflag */
2044
2045 mode = termio->c_cflag & CSIZE;
2046 if (mode == CS5)
2047 mode = MX_CS5;
2048 else if (mode == CS6)
2049 mode = MX_CS6;
2050 else if (mode == CS7)
2051 mode = MX_CS7;
2052 else if (mode == CS8)
2053 mode = MX_CS8;
2054
2055 if (termio->c_cflag & CSTOPB) {
2056 if (mode == MX_CS5)
2057 mode |= MX_STOP15;
2058 else
2059 mode |= MX_STOP2;
2060 } else
2061 mode |= MX_STOP1;
2062
2063 if (termio->c_cflag & PARENB) {
2064 if (termio->c_cflag & PARODD)
2065 mode |= MX_PARODD;
2066 else
2067 mode |= MX_PAREVEN;
2068 } else
2069 mode |= MX_PARNONE;
2070
2071 moxafunc(ofsAddr, FC_SetDataMode, (ushort) mode);
2072
2073 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2074 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
2075 if (baud >= 921600L)
2076 return (-1);
2077 }
2078 MoxaPortSetBaud(port, baud);
2079
2080 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
2081 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
2082 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
2083 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
2084 wait_finish(ofsAddr);
2085
2086 }
2087 return (0);
2088 }
2089
2090 int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState)
2091 {
2092
2093 if (!MoxaPortIsValid(port))
2094 return (-1);
2095 if (dtrState) {
2096 if (moxa_ports[port].lineCtrl & DTR_ON)
2097 *dtrState = 1;
2098 else
2099 *dtrState = 0;
2100 }
2101 if (rtsState) {
2102 if (moxa_ports[port].lineCtrl & RTS_ON)
2103 *rtsState = 1;
2104 else
2105 *rtsState = 0;
2106 }
2107 return (0);
2108 }
2109
2110 void MoxaPortLineCtrl(int port, int dtr, int rts)
2111 {
2112 void __iomem *ofsAddr;
2113 int mode;
2114
2115 ofsAddr = moxa_ports[port].tableAddr;
2116 mode = 0;
2117 if (dtr)
2118 mode |= DTR_ON;
2119 if (rts)
2120 mode |= RTS_ON;
2121 moxa_ports[port].lineCtrl = mode;
2122 moxafunc(ofsAddr, FC_LineControl, mode);
2123 }
2124
2125 void MoxaPortFlowCtrl(int port, int rts, int cts, int txflow, int rxflow, int txany)
2126 {
2127 void __iomem *ofsAddr;
2128 int mode;
2129
2130 ofsAddr = moxa_ports[port].tableAddr;
2131 mode = 0;
2132 if (rts)
2133 mode |= RTS_FlowCtl;
2134 if (cts)
2135 mode |= CTS_FlowCtl;
2136 if (txflow)
2137 mode |= Tx_FlowCtl;
2138 if (rxflow)
2139 mode |= Rx_FlowCtl;
2140 if (txany)
2141 mode |= IXM_IXANY;
2142 moxafunc(ofsAddr, FC_SetFlowCtl, mode);
2143 }
2144
2145 int MoxaPortLineStatus(int port)
2146 {
2147 void __iomem *ofsAddr;
2148 int val;
2149
2150 ofsAddr = moxa_ports[port].tableAddr;
2151 if ((moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_ISA) ||
2152 (moxa_boards[port / MAX_PORTS_PER_BOARD].boardType == MOXA_BOARD_C320_PCI)) {
2153 moxafunc(ofsAddr, FC_LineStatus, 0);
2154 val = readw(ofsAddr + FuncArg);
2155 } else {
2156 val = readw(ofsAddr + FlagStat) >> 4;
2157 }
2158 val &= 0x0B;
2159 if (val & 8) {
2160 val |= 4;
2161 if ((moxa_ports[port].DCDState & DCD_oldstate) == 0)
2162 moxa_ports[port].DCDState = (DCD_oldstate | DCD_changed);
2163 } else {
2164 if (moxa_ports[port].DCDState & DCD_oldstate)
2165 moxa_ports[port].DCDState = DCD_changed;
2166 }
2167 val &= 7;
2168 return (val);
2169 }
2170
2171 int MoxaPortDCDChange(int port)
2172 {
2173 int n;
2174
2175 if (moxa_ports[port].chkPort == 0)
2176 return (0);
2177 n = moxa_ports[port].DCDState;
2178 moxa_ports[port].DCDState &= ~DCD_changed;
2179 n &= DCD_changed;
2180 return (n);
2181 }
2182
2183 int MoxaPortDCDON(int port)
2184 {
2185 int n;
2186
2187 if (moxa_ports[port].chkPort == 0)
2188 return (0);
2189 if (moxa_ports[port].DCDState & DCD_oldstate)
2190 n = 1;
2191 else
2192 n = 0;
2193 return (n);
2194 }
2195
2196 int MoxaPortWriteData(int port, unsigned char * buffer, int len)
2197 {
2198 int c, total, i;
2199 ushort tail;
2200 int cnt;
2201 ushort head, tx_mask, spage, epage;
2202 ushort pageno, pageofs, bufhead;
2203 void __iomem *baseAddr, *ofsAddr, *ofs;
2204
2205 ofsAddr = moxa_ports[port].tableAddr;
2206 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
2207 tx_mask = readw(ofsAddr + TX_mask);
2208 spage = readw(ofsAddr + Page_txb);
2209 epage = readw(ofsAddr + EndPage_txb);
2210 tail = readw(ofsAddr + TXwptr);
2211 head = readw(ofsAddr + TXrptr);
2212 c = (head > tail) ? (head - tail - 1)
2213 : (head - tail + tx_mask);
2214 if (c > len)
2215 c = len;
2216 moxaLog.txcnt[port] += c;
2217 total = c;
2218 if (spage == epage) {
2219 bufhead = readw(ofsAddr + Ofs_txb);
2220 writew(spage, baseAddr + Control_reg);
2221 while (c > 0) {
2222 if (head > tail)
2223 len = head - tail - 1;
2224 else
2225 len = tx_mask + 1 - tail;
2226 len = (c > len) ? len : c;
2227 ofs = baseAddr + DynPage_addr + bufhead + tail;
2228 for (i = 0; i < len; i++)
2229 writeb(*buffer++, ofs + i);
2230 tail = (tail + len) & tx_mask;
2231 c -= len;
2232 }
2233 writew(tail, ofsAddr + TXwptr);
2234 } else {
2235 len = c;
2236 pageno = spage + (tail >> 13);
2237 pageofs = tail & Page_mask;
2238 do {
2239 cnt = Page_size - pageofs;
2240 if (cnt > c)
2241 cnt = c;
2242 c -= cnt;
2243 writeb(pageno, baseAddr + Control_reg);
2244 ofs = baseAddr + DynPage_addr + pageofs;
2245 for (i = 0; i < cnt; i++)
2246 writeb(*buffer++, ofs + i);
2247 if (c == 0) {
2248 writew((tail + len) & tx_mask, ofsAddr + TXwptr);
2249 break;
2250 }
2251 if (++pageno == epage)
2252 pageno = spage;
2253 pageofs = 0;
2254 } while (1);
2255 }
2256 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2257 return (total);
2258 }
2259
2260 int MoxaPortReadData(int port, struct tty_struct *tty)
2261 {
2262 register ushort head, pageofs;
2263 int i, count, cnt, len, total, remain;
2264 ushort tail, rx_mask, spage, epage;
2265 ushort pageno, bufhead;
2266 void __iomem *baseAddr, *ofsAddr, *ofs;
2267
2268 ofsAddr = moxa_ports[port].tableAddr;
2269 baseAddr = moxa_boards[port / MAX_PORTS_PER_BOARD].basemem;
2270 head = readw(ofsAddr + RXrptr);
2271 tail = readw(ofsAddr + RXwptr);
2272 rx_mask = readw(ofsAddr + RX_mask);
2273 spage = readw(ofsAddr + Page_rxb);
2274 epage = readw(ofsAddr + EndPage_rxb);
2275 count = (tail >= head) ? (tail - head)
2276 : (tail - head + rx_mask + 1);
2277 if (count == 0)
2278 return 0;
2279
2280 total = count;
2281 remain = count - total;
2282 moxaLog.rxcnt[port] += total;
2283 count = total;
2284 if (spage == epage) {
2285 bufhead = readw(ofsAddr + Ofs_rxb);
2286 writew(spage, baseAddr + Control_reg);
2287 while (count > 0) {
2288 if (tail >= head)
2289 len = tail - head;
2290 else
2291 len = rx_mask + 1 - head;
2292 len = (count > len) ? len : count;
2293 ofs = baseAddr + DynPage_addr + bufhead + head;
2294 for (i = 0; i < len; i++)
2295 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
2296 head = (head + len) & rx_mask;
2297 count -= len;
2298 }
2299 writew(head, ofsAddr + RXrptr);
2300 } else {
2301 len = count;
2302 pageno = spage + (head >> 13);
2303 pageofs = head & Page_mask;
2304 do {
2305 cnt = Page_size - pageofs;
2306 if (cnt > count)
2307 cnt = count;
2308 count -= cnt;
2309 writew(pageno, baseAddr + Control_reg);
2310 ofs = baseAddr + DynPage_addr + pageofs;
2311 for (i = 0; i < cnt; i++)
2312 tty_insert_flip_char(tty, readb(ofs + i), TTY_NORMAL);
2313 if (count == 0) {
2314 writew((head + len) & rx_mask, ofsAddr + RXrptr);
2315 break;
2316 }
2317 if (++pageno == epage)
2318 pageno = spage;
2319 pageofs = 0;
2320 } while (1);
2321 }
2322 if ((readb(ofsAddr + FlagStat) & Xoff_state) && (remain < LowWater)) {
2323 moxaLowWaterChk = 1;
2324 moxa_ports[port].lowChkFlag = 1;
2325 }
2326 return (total);
2327 }
2328
2329
2330 int MoxaPortTxQueue(int port)
2331 {
2332 void __iomem *ofsAddr;
2333 ushort rptr, wptr, mask;
2334 int len;
2335
2336 ofsAddr = moxa_ports[port].tableAddr;
2337 rptr = readw(ofsAddr + TXrptr);
2338 wptr = readw(ofsAddr + TXwptr);
2339 mask = readw(ofsAddr + TX_mask);
2340 len = (wptr - rptr) & mask;
2341 return (len);
2342 }
2343
2344 int MoxaPortTxFree(int port)
2345 {
2346 void __iomem *ofsAddr;
2347 ushort rptr, wptr, mask;
2348 int len;
2349
2350 ofsAddr = moxa_ports[port].tableAddr;
2351 rptr = readw(ofsAddr + TXrptr);
2352 wptr = readw(ofsAddr + TXwptr);
2353 mask = readw(ofsAddr + TX_mask);
2354 len = mask - ((wptr - rptr) & mask);
2355 return (len);
2356 }
2357
2358 int MoxaPortRxQueue(int port)
2359 {
2360 void __iomem *ofsAddr;
2361 ushort rptr, wptr, mask;
2362 int len;
2363
2364 ofsAddr = moxa_ports[port].tableAddr;
2365 rptr = readw(ofsAddr + RXrptr);
2366 wptr = readw(ofsAddr + RXwptr);
2367 mask = readw(ofsAddr + RX_mask);
2368 len = (wptr - rptr) & mask;
2369 return (len);
2370 }
2371
2372
2373 void MoxaPortTxDisable(int port)
2374 {
2375 void __iomem *ofsAddr;
2376
2377 ofsAddr = moxa_ports[port].tableAddr;
2378 moxafunc(ofsAddr, FC_SetXoffState, Magic_code);
2379 }
2380
2381 void MoxaPortTxEnable(int port)
2382 {
2383 void __iomem *ofsAddr;
2384
2385 ofsAddr = moxa_ports[port].tableAddr;
2386 moxafunc(ofsAddr, FC_SetXonState, Magic_code);
2387 }
2388
2389
2390 int MoxaPortResetBrkCnt(int port)
2391 {
2392 ushort cnt;
2393 cnt = moxa_ports[port].breakCnt;
2394 moxa_ports[port].breakCnt = 0;
2395 return (cnt);
2396 }
2397
2398
2399 void MoxaPortSendBreak(int port, int ms100)
2400 {
2401 void __iomem *ofsAddr;
2402
2403 ofsAddr = moxa_ports[port].tableAddr;
2404 if (ms100) {
2405 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2406 msleep(ms100 * 10);
2407 } else {
2408 moxafunc(ofsAddr, FC_SendBreak, Magic_code);
2409 msleep(250);
2410 }
2411 moxafunc(ofsAddr, FC_StopBreak, Magic_code);
2412 }
2413
2414 static int moxa_get_serial_info(struct moxa_port *info,
2415 struct serial_struct __user *retinfo)
2416 {
2417 struct serial_struct tmp;
2418
2419 memset(&tmp, 0, sizeof(tmp));
2420 tmp.type = info->type;
2421 tmp.line = info->port;
2422 tmp.port = 0;
2423 tmp.irq = 0;
2424 tmp.flags = info->asyncflags;
2425 tmp.baud_base = 921600;
2426 tmp.close_delay = info->close_delay;
2427 tmp.closing_wait = info->closing_wait;
2428 tmp.custom_divisor = 0;
2429 tmp.hub6 = 0;
2430 if(copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2431 return -EFAULT;
2432 return (0);
2433 }
2434
2435
2436 static int moxa_set_serial_info(struct moxa_port *info,
2437 struct serial_struct __user *new_info)
2438 {
2439 struct serial_struct new_serial;
2440
2441 if(copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2442 return -EFAULT;
2443
2444 if ((new_serial.irq != 0) ||
2445 (new_serial.port != 0) ||
2446 // (new_serial.type != info->type) ||
2447 (new_serial.custom_divisor != 0) ||
2448 (new_serial.baud_base != 921600))
2449 return (-EPERM);
2450
2451 if (!capable(CAP_SYS_ADMIN)) {
2452 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
2453 (info->asyncflags & ~ASYNC_USR_MASK)))
2454 return (-EPERM);
2455 } else {
2456 info->close_delay = new_serial.close_delay * HZ / 100;
2457 info->closing_wait = new_serial.closing_wait * HZ / 100;
2458 }
2459
2460 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
2461 new_serial.flags |= (info->asyncflags & ASYNC_FLAGS);
2462
2463 if (new_serial.type == PORT_16550A) {
2464 MoxaSetFifo(info->port, 1);
2465 } else {
2466 MoxaSetFifo(info->port, 0);
2467 }
2468
2469 info->type = new_serial.type;
2470 return (0);
2471 }
2472
2473
2474
2475 /*****************************************************************************
2476 * Static local functions: *
2477 *****************************************************************************/
2478 static void moxafunc(void __iomem *ofsAddr, int cmd, ushort arg)
2479 {
2480
2481 writew(arg, ofsAddr + FuncArg);
2482 writew(cmd, ofsAddr + FuncCode);
2483 wait_finish(ofsAddr);
2484 }
2485
2486 static void wait_finish(void __iomem *ofsAddr)
2487 {
2488 unsigned long i, j;
2489
2490 i = jiffies;
2491 while (readw(ofsAddr + FuncCode) != 0) {
2492 j = jiffies;
2493 if ((j - i) > moxaFuncTout) {
2494 return;
2495 }
2496 }
2497 }
2498
2499 static void low_water_check(void __iomem *ofsAddr)
2500 {
2501 int len;
2502 ushort rptr, wptr, mask;
2503
2504 if (readb(ofsAddr + FlagStat) & Xoff_state) {
2505 rptr = readw(ofsAddr + RXrptr);
2506 wptr = readw(ofsAddr + RXwptr);
2507 mask = readw(ofsAddr + RX_mask);
2508 len = (wptr - rptr) & mask;
2509 if (len <= Low_water)
2510 moxafunc(ofsAddr, FC_SendXon, 0);
2511 }
2512 }
2513
2514 static int moxaloadbios(int cardno, unsigned char __user *tmp, int len)
2515 {
2516 void __iomem *baseAddr;
2517 int i;
2518
2519 if(len < 0 || len > sizeof(moxaBuff))
2520 return -EINVAL;
2521 if(copy_from_user(moxaBuff, tmp, len))
2522 return -EFAULT;
2523 baseAddr = moxa_boards[cardno].basemem;
2524 writeb(HW_reset, baseAddr + Control_reg); /* reset */
2525 msleep(10);
2526 for (i = 0; i < 4096; i++)
2527 writeb(0, baseAddr + i); /* clear fix page */
2528 for (i = 0; i < len; i++)
2529 writeb(moxaBuff[i], baseAddr + i); /* download BIOS */
2530 writeb(0, baseAddr + Control_reg); /* restart */
2531 return (0);
2532 }
2533
2534 static int moxafindcard(int cardno)
2535 {
2536 void __iomem *baseAddr;
2537 ushort tmp;
2538
2539 baseAddr = moxa_boards[cardno].basemem;
2540 switch (moxa_boards[cardno].boardType) {
2541 case MOXA_BOARD_C218_ISA:
2542 case MOXA_BOARD_C218_PCI:
2543 if ((tmp = readw(baseAddr + C218_key)) != C218_KeyCode) {
2544 return (-1);
2545 }
2546 break;
2547 case MOXA_BOARD_CP204J:
2548 if ((tmp = readw(baseAddr + C218_key)) != CP204J_KeyCode) {
2549 return (-1);
2550 }
2551 break;
2552 default:
2553 if ((tmp = readw(baseAddr + C320_key)) != C320_KeyCode) {
2554 return (-1);
2555 }
2556 if ((tmp = readw(baseAddr + C320_status)) != STS_init) {
2557 return (-2);
2558 }
2559 }
2560 return (0);
2561 }
2562
2563 static int moxaload320b(int cardno, unsigned char __user *tmp, int len)
2564 {
2565 void __iomem *baseAddr;
2566 int i;
2567
2568 if(len < 0 || len > sizeof(moxaBuff))
2569 return -EINVAL;
2570 if(copy_from_user(moxaBuff, tmp, len))
2571 return -EFAULT;
2572 baseAddr = moxa_boards[cardno].basemem;
2573 writew(len - 7168 - 2, baseAddr + C320bapi_len);
2574 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
2575 for (i = 0; i < 7168; i++)
2576 writeb(moxaBuff[i], baseAddr + DynPage_addr + i);
2577 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
2578 for (i = 0; i < (len - 7168); i++)
2579 writeb(moxaBuff[i + 7168], baseAddr + DynPage_addr + i);
2580 return (0);
2581 }
2582
2583 static int moxaloadcode(int cardno, unsigned char __user *tmp, int len)
2584 {
2585 void __iomem *baseAddr, *ofsAddr;
2586 int retval, port, i;
2587
2588 if(len < 0 || len > sizeof(moxaBuff))
2589 return -EINVAL;
2590 if(copy_from_user(moxaBuff, tmp, len))
2591 return -EFAULT;
2592 baseAddr = moxa_boards[cardno].basemem;
2593 switch (moxa_boards[cardno].boardType) {
2594 case MOXA_BOARD_C218_ISA:
2595 case MOXA_BOARD_C218_PCI:
2596 case MOXA_BOARD_CP204J:
2597 retval = moxaloadc218(cardno, baseAddr, len);
2598 if (retval)
2599 return (retval);
2600 port = cardno * MAX_PORTS_PER_BOARD;
2601 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
2602 struct moxa_port *p = &moxa_ports[port];
2603
2604 p->chkPort = 1;
2605 p->curBaud = 9600L;
2606 p->DCDState = 0;
2607 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2608 ofsAddr = p->tableAddr;
2609 writew(C218rx_mask, ofsAddr + RX_mask);
2610 writew(C218tx_mask, ofsAddr + TX_mask);
2611 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
2612 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
2613
2614 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
2615 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
2616
2617 }
2618 break;
2619 default:
2620 retval = moxaloadc320(cardno, baseAddr, len,
2621 &moxa_boards[cardno].numPorts);
2622 if (retval)
2623 return (retval);
2624 port = cardno * MAX_PORTS_PER_BOARD;
2625 for (i = 0; i < moxa_boards[cardno].numPorts; i++, port++) {
2626 struct moxa_port *p = &moxa_ports[port];
2627
2628 p->chkPort = 1;
2629 p->curBaud = 9600L;
2630 p->DCDState = 0;
2631 p->tableAddr = baseAddr + Extern_table + Extern_size * i;
2632 ofsAddr = p->tableAddr;
2633 if (moxa_boards[cardno].numPorts == 8) {
2634 writew(C320p8rx_mask, ofsAddr + RX_mask);
2635 writew(C320p8tx_mask, ofsAddr + TX_mask);
2636 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
2637 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
2638 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
2639 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
2640
2641 } else if (moxa_boards[cardno].numPorts == 16) {
2642 writew(C320p16rx_mask, ofsAddr + RX_mask);
2643 writew(C320p16tx_mask, ofsAddr + TX_mask);
2644 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
2645 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
2646 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
2647 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
2648
2649 } else if (moxa_boards[cardno].numPorts == 24) {
2650 writew(C320p24rx_mask, ofsAddr + RX_mask);
2651 writew(C320p24tx_mask, ofsAddr + TX_mask);
2652 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
2653 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
2654 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
2655 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2656 } else if (moxa_boards[cardno].numPorts == 32) {
2657 writew(C320p32rx_mask, ofsAddr + RX_mask);
2658 writew(C320p32tx_mask, ofsAddr + TX_mask);
2659 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
2660 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
2661 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
2662 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
2663 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
2664 }
2665 }
2666 break;
2667 }
2668 moxa_boards[cardno].loadstat = 1;
2669 return (0);
2670 }
2671
2672 static int moxaloadc218(int cardno, void __iomem *baseAddr, int len)
2673 {
2674 char retry;
2675 int i, j, len1, len2;
2676 ushort usum, *ptr, keycode;
2677
2678 if (moxa_boards[cardno].boardType == MOXA_BOARD_CP204J)
2679 keycode = CP204J_KeyCode;
2680 else
2681 keycode = C218_KeyCode;
2682 usum = 0;
2683 len1 = len >> 1;
2684 ptr = (ushort *) moxaBuff;
2685 for (i = 0; i < len1; i++)
2686 usum += le16_to_cpu(*(ptr + i));
2687 retry = 0;
2688 do {
2689 len1 = len >> 1;
2690 j = 0;
2691 while (len1) {
2692 len2 = (len1 > 2048) ? 2048 : len1;
2693 len1 -= len2;
2694 for (i = 0; i < len2 << 1; i++)
2695 writeb(moxaBuff[i + j], baseAddr + C218_LoadBuf + i);
2696 j += i;
2697
2698 writew(len2, baseAddr + C218DLoad_len);
2699 writew(0, baseAddr + C218_key);
2700 for (i = 0; i < 100; i++) {
2701 if (readw(baseAddr + C218_key) == keycode)
2702 break;
2703 msleep(10);
2704 }
2705 if (readw(baseAddr + C218_key) != keycode) {
2706 return (-1);
2707 }
2708 }
2709 writew(0, baseAddr + C218DLoad_len);
2710 writew(usum, baseAddr + C218check_sum);
2711 writew(0, baseAddr + C218_key);
2712 for (i = 0; i < 100; i++) {
2713 if (readw(baseAddr + C218_key) == keycode)
2714 break;
2715 msleep(10);
2716 }
2717 retry++;
2718 } while ((readb(baseAddr + C218chksum_ok) != 1) && (retry < 3));
2719 if (readb(baseAddr + C218chksum_ok) != 1) {
2720 return (-1);
2721 }
2722 writew(0, baseAddr + C218_key);
2723 for (i = 0; i < 100; i++) {
2724 if (readw(baseAddr + Magic_no) == Magic_code)
2725 break;
2726 msleep(10);
2727 }
2728 if (readw(baseAddr + Magic_no) != Magic_code) {
2729 return (-1);
2730 }
2731 writew(1, baseAddr + Disable_IRQ);
2732 writew(0, baseAddr + Magic_no);
2733 for (i = 0; i < 100; i++) {
2734 if (readw(baseAddr + Magic_no) == Magic_code)
2735 break;
2736 msleep(10);
2737 }
2738 if (readw(baseAddr + Magic_no) != Magic_code) {
2739 return (-1);
2740 }
2741 moxaCard = 1;
2742 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2743 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2744 moxa_boards[cardno].intTable = baseAddr + IRQtable;
2745 return (0);
2746 }
2747
2748 static int moxaloadc320(int cardno, void __iomem *baseAddr, int len, int *numPorts)
2749 {
2750 ushort usum;
2751 int i, j, wlen, len2, retry;
2752 ushort *uptr;
2753
2754 usum = 0;
2755 wlen = len >> 1;
2756 uptr = (ushort *) moxaBuff;
2757 for (i = 0; i < wlen; i++)
2758 usum += le16_to_cpu(uptr[i]);
2759 retry = 0;
2760 j = 0;
2761 do {
2762 while (wlen) {
2763 if (wlen > 2048)
2764 len2 = 2048;
2765 else
2766 len2 = wlen;
2767 wlen -= len2;
2768 len2 <<= 1;
2769 for (i = 0; i < len2; i++)
2770 writeb(moxaBuff[j + i], baseAddr + C320_LoadBuf + i);
2771 len2 >>= 1;
2772 j += i;
2773 writew(len2, baseAddr + C320DLoad_len);
2774 writew(0, baseAddr + C320_key);
2775 for (i = 0; i < 10; i++) {
2776 if (readw(baseAddr + C320_key) == C320_KeyCode)
2777 break;
2778 msleep(10);
2779 }
2780 if (readw(baseAddr + C320_key) != C320_KeyCode)
2781 return (-1);
2782 }
2783 writew(0, baseAddr + C320DLoad_len);
2784 writew(usum, baseAddr + C320check_sum);
2785 writew(0, baseAddr + C320_key);
2786 for (i = 0; i < 10; i++) {
2787 if (readw(baseAddr + C320_key) == C320_KeyCode)
2788 break;
2789 msleep(10);
2790 }
2791 retry++;
2792 } while ((readb(baseAddr + C320chksum_ok) != 1) && (retry < 3));
2793 if (readb(baseAddr + C320chksum_ok) != 1)
2794 return (-1);
2795 writew(0, baseAddr + C320_key);
2796 for (i = 0; i < 600; i++) {
2797 if (readw(baseAddr + Magic_no) == Magic_code)
2798 break;
2799 msleep(10);
2800 }
2801 if (readw(baseAddr + Magic_no) != Magic_code)
2802 return (-100);
2803
2804 if (moxa_boards[cardno].busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
2805 writew(0x3800, baseAddr + TMS320_PORT1);
2806 writew(0x3900, baseAddr + TMS320_PORT2);
2807 writew(28499, baseAddr + TMS320_CLOCK);
2808 } else {
2809 writew(0x3200, baseAddr + TMS320_PORT1);
2810 writew(0x3400, baseAddr + TMS320_PORT2);
2811 writew(19999, baseAddr + TMS320_CLOCK);
2812 }
2813 writew(1, baseAddr + Disable_IRQ);
2814 writew(0, baseAddr + Magic_no);
2815 for (i = 0; i < 500; i++) {
2816 if (readw(baseAddr + Magic_no) == Magic_code)
2817 break;
2818 msleep(10);
2819 }
2820 if (readw(baseAddr + Magic_no) != Magic_code)
2821 return (-102);
2822
2823 j = readw(baseAddr + Module_cnt);
2824 if (j <= 0)
2825 return (-101);
2826 *numPorts = j * 8;
2827 writew(j, baseAddr + Module_no);
2828 writew(0, baseAddr + Magic_no);
2829 for (i = 0; i < 600; i++) {
2830 if (readw(baseAddr + Magic_no) == Magic_code)
2831 break;
2832 msleep(10);
2833 }
2834 if (readw(baseAddr + Magic_no) != Magic_code)
2835 return (-102);
2836 moxaCard = 1;
2837 moxa_boards[cardno].intNdx = baseAddr + IRQindex;
2838 moxa_boards[cardno].intPend = baseAddr + IRQpending;
2839 moxa_boards[cardno].intTable = baseAddr + IRQtable;
2840 return (0);
2841 }
2842
2843 static void MoxaSetFifo(int port, int enable)
2844 {
2845 void __iomem *ofsAddr = moxa_ports[port].tableAddr;
2846
2847 if (!enable) {
2848 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2849 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2850 } else {
2851 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2852 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2853 }
2854 }
Support for the Chinese Samsung S3C2440 based development boards