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USB: Add support for Olimex arm-usb-ocd JTAG interface serial port
[linux-2.6/mini2440.git] / drivers / serial / serial_txx9.c
blob1deb5764326d089aabe09f4b54fae1290e72be2a
1 /*
2 * drivers/serial/serial_txx9.c
3 *
4 * Derived from many drivers using generic_serial interface,
5 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
6 * (was in Linux/VR tree) by Jim Pick.
7 *
8 * Copyright (C) 1999 Harald Koerfgen
9 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
10 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
11 * Copyright (C) 2000-2002 Toshiba Corporation
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
18 */
19
20 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
21 #define SUPPORT_SYSRQ
22 #endif
23
24 #include <linux/module.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/pci.h>
32 #include <linux/tty.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/mutex.h>
37
38 #include <asm/io.h>
39
40 static char *serial_version = "1.09";
41 static char *serial_name = "TX39/49 Serial driver";
42
43 #define PASS_LIMIT 256
44
45 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
46 /* "ttyS" is used for standard serial driver */
47 #define TXX9_TTY_NAME "ttyTX"
48 #define TXX9_TTY_MINOR_START 196
49 #define TXX9_TTY_MAJOR 204
50 #else
51 /* acts like standard serial driver */
52 #define TXX9_TTY_NAME "ttyS"
53 #define TXX9_TTY_MINOR_START 64
54 #define TXX9_TTY_MAJOR TTY_MAJOR
55 #endif
56
57 /* flag aliases */
58 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
59 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
60
61 #ifdef CONFIG_PCI
62 /* support for Toshiba TC86C001 SIO */
63 #define ENABLE_SERIAL_TXX9_PCI
64 #endif
65
66 /*
67 * Number of serial ports
68 */
69 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
70
71 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
72
73 struct uart_txx9_port {
74 struct uart_port port;
75 /* No additional info for now */
76 };
77
78 #define TXX9_REGION_SIZE 0x24
79
80 /* TXX9 Serial Registers */
81 #define TXX9_SILCR 0x00
82 #define TXX9_SIDICR 0x04
83 #define TXX9_SIDISR 0x08
84 #define TXX9_SICISR 0x0c
85 #define TXX9_SIFCR 0x10
86 #define TXX9_SIFLCR 0x14
87 #define TXX9_SIBGR 0x18
88 #define TXX9_SITFIFO 0x1c
89 #define TXX9_SIRFIFO 0x20
90
91 /* SILCR : Line Control */
92 #define TXX9_SILCR_SCS_MASK 0x00000060
93 #define TXX9_SILCR_SCS_IMCLK 0x00000000
94 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
95 #define TXX9_SILCR_SCS_SCLK 0x00000040
96 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
97 #define TXX9_SILCR_UEPS 0x00000010
98 #define TXX9_SILCR_UPEN 0x00000008
99 #define TXX9_SILCR_USBL_MASK 0x00000004
100 #define TXX9_SILCR_USBL_1BIT 0x00000000
101 #define TXX9_SILCR_USBL_2BIT 0x00000004
102 #define TXX9_SILCR_UMODE_MASK 0x00000003
103 #define TXX9_SILCR_UMODE_8BIT 0x00000000
104 #define TXX9_SILCR_UMODE_7BIT 0x00000001
105
106 /* SIDICR : DMA/Int. Control */
107 #define TXX9_SIDICR_TDE 0x00008000
108 #define TXX9_SIDICR_RDE 0x00004000
109 #define TXX9_SIDICR_TIE 0x00002000
110 #define TXX9_SIDICR_RIE 0x00001000
111 #define TXX9_SIDICR_SPIE 0x00000800
112 #define TXX9_SIDICR_CTSAC 0x00000600
113 #define TXX9_SIDICR_STIE_MASK 0x0000003f
114 #define TXX9_SIDICR_STIE_OERS 0x00000020
115 #define TXX9_SIDICR_STIE_CTSS 0x00000010
116 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
117 #define TXX9_SIDICR_STIE_TRDY 0x00000004
118 #define TXX9_SIDICR_STIE_TXALS 0x00000002
119 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
120
121 /* SIDISR : DMA/Int. Status */
122 #define TXX9_SIDISR_UBRK 0x00008000
123 #define TXX9_SIDISR_UVALID 0x00004000
124 #define TXX9_SIDISR_UFER 0x00002000
125 #define TXX9_SIDISR_UPER 0x00001000
126 #define TXX9_SIDISR_UOER 0x00000800
127 #define TXX9_SIDISR_ERI 0x00000400
128 #define TXX9_SIDISR_TOUT 0x00000200
129 #define TXX9_SIDISR_TDIS 0x00000100
130 #define TXX9_SIDISR_RDIS 0x00000080
131 #define TXX9_SIDISR_STIS 0x00000040
132 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
133
134 /* SICISR : Change Int. Status */
135 #define TXX9_SICISR_OERS 0x00000020
136 #define TXX9_SICISR_CTSS 0x00000010
137 #define TXX9_SICISR_RBRKD 0x00000008
138 #define TXX9_SICISR_TRDY 0x00000004
139 #define TXX9_SICISR_TXALS 0x00000002
140 #define TXX9_SICISR_UBRKD 0x00000001
141
142 /* SIFCR : FIFO Control */
143 #define TXX9_SIFCR_SWRST 0x00008000
144 #define TXX9_SIFCR_RDIL_MASK 0x00000180
145 #define TXX9_SIFCR_RDIL_1 0x00000000
146 #define TXX9_SIFCR_RDIL_4 0x00000080
147 #define TXX9_SIFCR_RDIL_8 0x00000100
148 #define TXX9_SIFCR_RDIL_12 0x00000180
149 #define TXX9_SIFCR_RDIL_MAX 0x00000180
150 #define TXX9_SIFCR_TDIL_MASK 0x00000018
151 #define TXX9_SIFCR_TDIL_MASK 0x00000018
152 #define TXX9_SIFCR_TDIL_1 0x00000000
153 #define TXX9_SIFCR_TDIL_4 0x00000001
154 #define TXX9_SIFCR_TDIL_8 0x00000010
155 #define TXX9_SIFCR_TDIL_MAX 0x00000010
156 #define TXX9_SIFCR_TFRST 0x00000004
157 #define TXX9_SIFCR_RFRST 0x00000002
158 #define TXX9_SIFCR_FRSTE 0x00000001
159 #define TXX9_SIO_TX_FIFO 8
160 #define TXX9_SIO_RX_FIFO 16
161
162 /* SIFLCR : Flow Control */
163 #define TXX9_SIFLCR_RCS 0x00001000
164 #define TXX9_SIFLCR_TES 0x00000800
165 #define TXX9_SIFLCR_RTSSC 0x00000200
166 #define TXX9_SIFLCR_RSDE 0x00000100
167 #define TXX9_SIFLCR_TSDE 0x00000080
168 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
169 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
170 #define TXX9_SIFLCR_TBRK 0x00000001
171
172 /* SIBGR : Baudrate Control */
173 #define TXX9_SIBGR_BCLK_MASK 0x00000300
174 #define TXX9_SIBGR_BCLK_T0 0x00000000
175 #define TXX9_SIBGR_BCLK_T2 0x00000100
176 #define TXX9_SIBGR_BCLK_T4 0x00000200
177 #define TXX9_SIBGR_BCLK_T6 0x00000300
178 #define TXX9_SIBGR_BRD_MASK 0x000000ff
179
180 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
181 {
182 switch (up->port.iotype) {
183 default:
184 return __raw_readl(up->port.membase + offset);
185 case UPIO_PORT:
186 return inl(up->port.iobase + offset);
187 }
188 }
189
190 static inline void
191 sio_out(struct uart_txx9_port *up, int offset, int value)
192 {
193 switch (up->port.iotype) {
194 default:
195 __raw_writel(value, up->port.membase + offset);
196 break;
197 case UPIO_PORT:
198 outl(value, up->port.iobase + offset);
199 break;
200 }
201 }
202
203 static inline void
204 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
205 {
206 sio_out(up, offset, sio_in(up, offset) & ~value);
207 }
208 static inline void
209 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
210 {
211 sio_out(up, offset, sio_in(up, offset) | value);
212 }
213
214 static inline void
215 sio_quot_set(struct uart_txx9_port *up, int quot)
216 {
217 quot >>= 1;
218 if (quot < 256)
219 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
220 else if (quot < (256 << 2))
221 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
222 else if (quot < (256 << 4))
223 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
224 else if (quot < (256 << 6))
225 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
226 else
227 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
228 }
229
230 static void serial_txx9_stop_tx(struct uart_port *port)
231 {
232 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
233 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
234 }
235
236 static void serial_txx9_start_tx(struct uart_port *port)
237 {
238 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
239 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
240 }
241
242 static void serial_txx9_stop_rx(struct uart_port *port)
243 {
244 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
245 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
246 }
247
248 static void serial_txx9_enable_ms(struct uart_port *port)
249 {
250 /* TXX9-SIO can not control DTR... */
251 }
252
253 static void serial_txx9_initialize(struct uart_port *port)
254 {
255 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
256 unsigned int tmout = 10000;
257
258 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
259 /* TX4925 BUG WORKAROUND. Accessing SIOC register
260 * immediately after soft reset causes bus error. */
261 mmiowb();
262 udelay(1);
263 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
264 udelay(1);
265 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
266 sio_set(up, TXX9_SIFCR,
267 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
268 /* initial settings */
269 sio_out(up, TXX9_SILCR,
270 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
271 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
272 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
273 sio_quot_set(up, uart_get_divisor(port, 9600));
274 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
275 sio_out(up, TXX9_SIDICR, 0);
276 }
277
278 static inline void
279 receive_chars(struct uart_txx9_port *up, unsigned int *status)
280 {
281 struct tty_struct *tty = up->port.info->tty;
282 unsigned char ch;
283 unsigned int disr = *status;
284 int max_count = 256;
285 char flag;
286 unsigned int next_ignore_status_mask;
287
288 do {
289 ch = sio_in(up, TXX9_SIRFIFO);
290 flag = TTY_NORMAL;
291 up->port.icount.rx++;
292
293 /* mask out RFDN_MASK bit added by previous overrun */
294 next_ignore_status_mask =
295 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
296 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
297 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
298 /*
299 * For statistics only
300 */
301 if (disr & TXX9_SIDISR_UBRK) {
302 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
303 up->port.icount.brk++;
304 /*
305 * We do the SysRQ and SAK checking
306 * here because otherwise the break
307 * may get masked by ignore_status_mask
308 * or read_status_mask.
309 */
310 if (uart_handle_break(&up->port))
311 goto ignore_char;
312 } else if (disr & TXX9_SIDISR_UPER)
313 up->port.icount.parity++;
314 else if (disr & TXX9_SIDISR_UFER)
315 up->port.icount.frame++;
316 if (disr & TXX9_SIDISR_UOER) {
317 up->port.icount.overrun++;
318 /*
319 * The receiver read buffer still hold
320 * a char which caused overrun.
321 * Ignore next char by adding RFDN_MASK
322 * to ignore_status_mask temporarily.
323 */
324 next_ignore_status_mask |=
325 TXX9_SIDISR_RFDN_MASK;
326 }
327
328 /*
329 * Mask off conditions which should be ingored.
330 */
331 disr &= up->port.read_status_mask;
332
333 if (disr & TXX9_SIDISR_UBRK) {
334 flag = TTY_BREAK;
335 } else if (disr & TXX9_SIDISR_UPER)
336 flag = TTY_PARITY;
337 else if (disr & TXX9_SIDISR_UFER)
338 flag = TTY_FRAME;
339 }
340 if (uart_handle_sysrq_char(&up->port, ch))
341 goto ignore_char;
342
343 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
344
345 ignore_char:
346 up->port.ignore_status_mask = next_ignore_status_mask;
347 disr = sio_in(up, TXX9_SIDISR);
348 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
349 spin_unlock(&up->port.lock);
350 tty_flip_buffer_push(tty);
351 spin_lock(&up->port.lock);
352 *status = disr;
353 }
354
355 static inline void transmit_chars(struct uart_txx9_port *up)
356 {
357 struct circ_buf *xmit = &up->port.info->xmit;
358 int count;
359
360 if (up->port.x_char) {
361 sio_out(up, TXX9_SITFIFO, up->port.x_char);
362 up->port.icount.tx++;
363 up->port.x_char = 0;
364 return;
365 }
366 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
367 serial_txx9_stop_tx(&up->port);
368 return;
369 }
370
371 count = TXX9_SIO_TX_FIFO;
372 do {
373 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
374 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
375 up->port.icount.tx++;
376 if (uart_circ_empty(xmit))
377 break;
378 } while (--count > 0);
379
380 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
381 uart_write_wakeup(&up->port);
382
383 if (uart_circ_empty(xmit))
384 serial_txx9_stop_tx(&up->port);
385 }
386
387 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
388 {
389 int pass_counter = 0;
390 struct uart_txx9_port *up = dev_id;
391 unsigned int status;
392
393 while (1) {
394 spin_lock(&up->port.lock);
395 status = sio_in(up, TXX9_SIDISR);
396 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
397 status &= ~TXX9_SIDISR_TDIS;
398 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
399 TXX9_SIDISR_TOUT))) {
400 spin_unlock(&up->port.lock);
401 break;
402 }
403
404 if (status & TXX9_SIDISR_RDIS)
405 receive_chars(up, &status);
406 if (status & TXX9_SIDISR_TDIS)
407 transmit_chars(up);
408 /* Clear TX/RX Int. Status */
409 sio_mask(up, TXX9_SIDISR,
410 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
411 TXX9_SIDISR_TOUT);
412 spin_unlock(&up->port.lock);
413
414 if (pass_counter++ > PASS_LIMIT)
415 break;
416 }
417
418 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
419 }
420
421 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
422 {
423 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
424 unsigned long flags;
425 unsigned int ret;
426
427 spin_lock_irqsave(&up->port.lock, flags);
428 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
429 spin_unlock_irqrestore(&up->port.lock, flags);
430
431 return ret;
432 }
433
434 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
435 {
436 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
437 unsigned int ret;
438
439 ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
440 | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
441
442 return ret;
443 }
444
445 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
446 {
447 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
448
449 if (mctrl & TIOCM_RTS)
450 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
451 else
452 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
453 }
454
455 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
456 {
457 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
458 unsigned long flags;
459
460 spin_lock_irqsave(&up->port.lock, flags);
461 if (break_state == -1)
462 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
463 else
464 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
465 spin_unlock_irqrestore(&up->port.lock, flags);
466 }
467
468 static int serial_txx9_startup(struct uart_port *port)
469 {
470 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
471 unsigned long flags;
472 int retval;
473
474 /*
475 * Clear the FIFO buffers and disable them.
476 * (they will be reenabled in set_termios())
477 */
478 sio_set(up, TXX9_SIFCR,
479 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
480 /* clear reset */
481 sio_mask(up, TXX9_SIFCR,
482 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
483 sio_out(up, TXX9_SIDICR, 0);
484
485 /*
486 * Clear the interrupt registers.
487 */
488 sio_out(up, TXX9_SIDISR, 0);
489
490 retval = request_irq(up->port.irq, serial_txx9_interrupt,
491 IRQF_SHARED, "serial_txx9", up);
492 if (retval)
493 return retval;
494
495 /*
496 * Now, initialize the UART
497 */
498 spin_lock_irqsave(&up->port.lock, flags);
499 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
500 spin_unlock_irqrestore(&up->port.lock, flags);
501
502 /* Enable RX/TX */
503 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
504
505 /*
506 * Finally, enable interrupts.
507 */
508 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
509
510 return 0;
511 }
512
513 static void serial_txx9_shutdown(struct uart_port *port)
514 {
515 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
516 unsigned long flags;
517
518 /*
519 * Disable interrupts from this port
520 */
521 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
522
523 spin_lock_irqsave(&up->port.lock, flags);
524 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
525 spin_unlock_irqrestore(&up->port.lock, flags);
526
527 /*
528 * Disable break condition
529 */
530 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
531
532 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
533 if (up->port.cons && up->port.line == up->port.cons->index) {
534 free_irq(up->port.irq, up);
535 return;
536 }
537 #endif
538 /* reset FIFOs */
539 sio_set(up, TXX9_SIFCR,
540 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
541 /* clear reset */
542 sio_mask(up, TXX9_SIFCR,
543 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
544
545 /* Disable RX/TX */
546 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
547
548 free_irq(up->port.irq, up);
549 }
550
551 static void
552 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
553 struct ktermios *old)
554 {
555 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
556 unsigned int cval, fcr = 0;
557 unsigned long flags;
558 unsigned int baud, quot;
559
560 cval = sio_in(up, TXX9_SILCR);
561 /* byte size and parity */
562 cval &= ~TXX9_SILCR_UMODE_MASK;
563 switch (termios->c_cflag & CSIZE) {
564 case CS7:
565 cval |= TXX9_SILCR_UMODE_7BIT;
566 break;
567 default:
568 case CS5: /* not supported */
569 case CS6: /* not supported */
570 case CS8:
571 cval |= TXX9_SILCR_UMODE_8BIT;
572 break;
573 }
574
575 cval &= ~TXX9_SILCR_USBL_MASK;
576 if (termios->c_cflag & CSTOPB)
577 cval |= TXX9_SILCR_USBL_2BIT;
578 else
579 cval |= TXX9_SILCR_USBL_1BIT;
580 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
581 if (termios->c_cflag & PARENB)
582 cval |= TXX9_SILCR_UPEN;
583 if (!(termios->c_cflag & PARODD))
584 cval |= TXX9_SILCR_UEPS;
585
586 /*
587 * Ask the core to calculate the divisor for us.
588 */
589 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
590 quot = uart_get_divisor(port, baud);
591
592 /* Set up FIFOs */
593 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
594 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
595
596 /*
597 * Ok, we're now changing the port state. Do it with
598 * interrupts disabled.
599 */
600 spin_lock_irqsave(&up->port.lock, flags);
601
602 /*
603 * Update the per-port timeout.
604 */
605 uart_update_timeout(port, termios->c_cflag, baud);
606
607 up->port.read_status_mask = TXX9_SIDISR_UOER |
608 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
609 if (termios->c_iflag & INPCK)
610 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
611 if (termios->c_iflag & (BRKINT | PARMRK))
612 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
613
614 /*
615 * Characteres to ignore
616 */
617 up->port.ignore_status_mask = 0;
618 if (termios->c_iflag & IGNPAR)
619 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
620 if (termios->c_iflag & IGNBRK) {
621 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
622 /*
623 * If we're ignoring parity and break indicators,
624 * ignore overruns too (for real raw support).
625 */
626 if (termios->c_iflag & IGNPAR)
627 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
628 }
629
630 /*
631 * ignore all characters if CREAD is not set
632 */
633 if ((termios->c_cflag & CREAD) == 0)
634 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
635
636 /* CTS flow control flag */
637 if ((termios->c_cflag & CRTSCTS) &&
638 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
639 sio_set(up, TXX9_SIFLCR,
640 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
641 } else {
642 sio_mask(up, TXX9_SIFLCR,
643 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
644 }
645
646 sio_out(up, TXX9_SILCR, cval);
647 sio_quot_set(up, quot);
648 sio_out(up, TXX9_SIFCR, fcr);
649
650 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
651 spin_unlock_irqrestore(&up->port.lock, flags);
652 }
653
654 static void
655 serial_txx9_pm(struct uart_port *port, unsigned int state,
656 unsigned int oldstate)
657 {
658 if (state == 0)
659 serial_txx9_initialize(port);
660 }
661
662 static int serial_txx9_request_resource(struct uart_txx9_port *up)
663 {
664 unsigned int size = TXX9_REGION_SIZE;
665 int ret = 0;
666
667 switch (up->port.iotype) {
668 default:
669 if (!up->port.mapbase)
670 break;
671
672 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
673 ret = -EBUSY;
674 break;
675 }
676
677 if (up->port.flags & UPF_IOREMAP) {
678 up->port.membase = ioremap(up->port.mapbase, size);
679 if (!up->port.membase) {
680 release_mem_region(up->port.mapbase, size);
681 ret = -ENOMEM;
682 }
683 }
684 break;
685
686 case UPIO_PORT:
687 if (!request_region(up->port.iobase, size, "serial_txx9"))
688 ret = -EBUSY;
689 break;
690 }
691 return ret;
692 }
693
694 static void serial_txx9_release_resource(struct uart_txx9_port *up)
695 {
696 unsigned int size = TXX9_REGION_SIZE;
697
698 switch (up->port.iotype) {
699 default:
700 if (!up->port.mapbase)
701 break;
702
703 if (up->port.flags & UPF_IOREMAP) {
704 iounmap(up->port.membase);
705 up->port.membase = NULL;
706 }
707
708 release_mem_region(up->port.mapbase, size);
709 break;
710
711 case UPIO_PORT:
712 release_region(up->port.iobase, size);
713 break;
714 }
715 }
716
717 static void serial_txx9_release_port(struct uart_port *port)
718 {
719 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
720 serial_txx9_release_resource(up);
721 }
722
723 static int serial_txx9_request_port(struct uart_port *port)
724 {
725 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
726 return serial_txx9_request_resource(up);
727 }
728
729 static void serial_txx9_config_port(struct uart_port *port, int uflags)
730 {
731 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
732 int ret;
733
734 /*
735 * Find the region that we can probe for. This in turn
736 * tells us whether we can probe for the type of port.
737 */
738 ret = serial_txx9_request_resource(up);
739 if (ret < 0)
740 return;
741 port->type = PORT_TXX9;
742 up->port.fifosize = TXX9_SIO_TX_FIFO;
743
744 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
745 if (up->port.line == up->port.cons->index)
746 return;
747 #endif
748 serial_txx9_initialize(port);
749 }
750
751 static int
752 serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
753 {
754 unsigned long new_port = ser->port;
755 if (HIGH_BITS_OFFSET)
756 new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
757 if (ser->type != port->type ||
758 ser->irq != port->irq ||
759 ser->io_type != port->iotype ||
760 new_port != port->iobase ||
761 (unsigned long)ser->iomem_base != port->mapbase)
762 return -EINVAL;
763 return 0;
764 }
765
766 static const char *
767 serial_txx9_type(struct uart_port *port)
768 {
769 return "txx9";
770 }
771
772 static struct uart_ops serial_txx9_pops = {
773 .tx_empty = serial_txx9_tx_empty,
774 .set_mctrl = serial_txx9_set_mctrl,
775 .get_mctrl = serial_txx9_get_mctrl,
776 .stop_tx = serial_txx9_stop_tx,
777 .start_tx = serial_txx9_start_tx,
778 .stop_rx = serial_txx9_stop_rx,
779 .enable_ms = serial_txx9_enable_ms,
780 .break_ctl = serial_txx9_break_ctl,
781 .startup = serial_txx9_startup,
782 .shutdown = serial_txx9_shutdown,
783 .set_termios = serial_txx9_set_termios,
784 .pm = serial_txx9_pm,
785 .type = serial_txx9_type,
786 .release_port = serial_txx9_release_port,
787 .request_port = serial_txx9_request_port,
788 .config_port = serial_txx9_config_port,
789 .verify_port = serial_txx9_verify_port,
790 };
791
792 static struct uart_txx9_port serial_txx9_ports[UART_NR];
793
794 static void __init serial_txx9_register_ports(struct uart_driver *drv,
795 struct device *dev)
796 {
797 int i;
798
799 for (i = 0; i < UART_NR; i++) {
800 struct uart_txx9_port *up = &serial_txx9_ports[i];
801
802 up->port.line = i;
803 up->port.ops = &serial_txx9_pops;
804 up->port.dev = dev;
805 if (up->port.iobase || up->port.mapbase)
806 uart_add_one_port(drv, &up->port);
807 }
808 }
809
810 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
811
812 /*
813 * Wait for transmitter & holding register to empty
814 */
815 static inline void wait_for_xmitr(struct uart_txx9_port *up)
816 {
817 unsigned int tmout = 10000;
818
819 /* Wait up to 10ms for the character(s) to be sent. */
820 while (--tmout &&
821 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
822 udelay(1);
823
824 /* Wait up to 1s for flow control if necessary */
825 if (up->port.flags & UPF_CONS_FLOW) {
826 tmout = 1000000;
827 while (--tmout &&
828 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
829 udelay(1);
830 }
831 }
832
833 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
834 {
835 struct uart_txx9_port *up = (struct uart_txx9_port *)port;
836
837 wait_for_xmitr(up);
838 sio_out(up, TXX9_SITFIFO, ch);
839 }
840
841 /*
842 * Print a string to the serial port trying not to disturb
843 * any possible real use of the port...
844 *
845 * The console_lock must be held when we get here.
846 */
847 static void
848 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
849 {
850 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
851 unsigned int ier, flcr;
852
853 /*
854 * First save the UER then disable the interrupts
855 */
856 ier = sio_in(up, TXX9_SIDICR);
857 sio_out(up, TXX9_SIDICR, 0);
858 /*
859 * Disable flow-control if enabled (and unnecessary)
860 */
861 flcr = sio_in(up, TXX9_SIFLCR);
862 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
863 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
864
865 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
866
867 /*
868 * Finally, wait for transmitter to become empty
869 * and restore the IER
870 */
871 wait_for_xmitr(up);
872 sio_out(up, TXX9_SIFLCR, flcr);
873 sio_out(up, TXX9_SIDICR, ier);
874 }
875
876 static int __init serial_txx9_console_setup(struct console *co, char *options)
877 {
878 struct uart_port *port;
879 struct uart_txx9_port *up;
880 int baud = 9600;
881 int bits = 8;
882 int parity = 'n';
883 int flow = 'n';
884
885 /*
886 * Check whether an invalid uart number has been specified, and
887 * if so, search for the first available port that does have
888 * console support.
889 */
890 if (co->index >= UART_NR)
891 co->index = 0;
892 up = &serial_txx9_ports[co->index];
893 port = &up->port;
894 if (!port->ops)
895 return -ENODEV;
896
897 serial_txx9_initialize(&up->port);
898
899 if (options)
900 uart_parse_options(options, &baud, &parity, &bits, &flow);
901
902 return uart_set_options(port, co, baud, parity, bits, flow);
903 }
904
905 static struct uart_driver serial_txx9_reg;
906 static struct console serial_txx9_console = {
907 .name = TXX9_TTY_NAME,
908 .write = serial_txx9_console_write,
909 .device = uart_console_device,
910 .setup = serial_txx9_console_setup,
911 .flags = CON_PRINTBUFFER,
912 .index = -1,
913 .data = &serial_txx9_reg,
914 };
915
916 static int __init serial_txx9_console_init(void)
917 {
918 register_console(&serial_txx9_console);
919 return 0;
920 }
921 console_initcall(serial_txx9_console_init);
922
923 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
924 #else
925 #define SERIAL_TXX9_CONSOLE NULL
926 #endif
927
928 static struct uart_driver serial_txx9_reg = {
929 .owner = THIS_MODULE,
930 .driver_name = "serial_txx9",
931 .dev_name = TXX9_TTY_NAME,
932 .major = TXX9_TTY_MAJOR,
933 .minor = TXX9_TTY_MINOR_START,
934 .nr = UART_NR,
935 .cons = SERIAL_TXX9_CONSOLE,
936 };
937
938 int __init early_serial_txx9_setup(struct uart_port *port)
939 {
940 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
941 return -ENODEV;
942
943 serial_txx9_ports[port->line].port = *port;
944 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
945 serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
946 return 0;
947 }
948
949 static DEFINE_MUTEX(serial_txx9_mutex);
950
951 /**
952 * serial_txx9_register_port - register a serial port
953 * @port: serial port template
954 *
955 * Configure the serial port specified by the request.
956 *
957 * The port is then probed and if necessary the IRQ is autodetected
958 * If this fails an error is returned.
959 *
960 * On success the port is ready to use and the line number is returned.
961 */
962 static int __devinit serial_txx9_register_port(struct uart_port *port)
963 {
964 int i;
965 struct uart_txx9_port *uart;
966 int ret = -ENOSPC;
967
968 mutex_lock(&serial_txx9_mutex);
969 for (i = 0; i < UART_NR; i++) {
970 uart = &serial_txx9_ports[i];
971 if (uart_match_port(&uart->port, port)) {
972 uart_remove_one_port(&serial_txx9_reg, &uart->port);
973 break;
974 }
975 }
976 if (i == UART_NR) {
977 /* Find unused port */
978 for (i = 0; i < UART_NR; i++) {
979 uart = &serial_txx9_ports[i];
980 if (!(uart->port.iobase || uart->port.mapbase))
981 break;
982 }
983 }
984 if (i < UART_NR) {
985 uart->port.iobase = port->iobase;
986 uart->port.membase = port->membase;
987 uart->port.irq = port->irq;
988 uart->port.uartclk = port->uartclk;
989 uart->port.iotype = port->iotype;
990 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
991 uart->port.mapbase = port->mapbase;
992 if (port->dev)
993 uart->port.dev = port->dev;
994 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
995 if (ret == 0)
996 ret = uart->port.line;
997 }
998 mutex_unlock(&serial_txx9_mutex);
999 return ret;
1000 }
1001
1002 /**
1003 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1004 * @line: serial line number
1005 *
1006 * Remove one serial port. This may not be called from interrupt
1007 * context. We hand the port back to the our control.
1008 */
1009 static void __devexit serial_txx9_unregister_port(int line)
1010 {
1011 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1012
1013 mutex_lock(&serial_txx9_mutex);
1014 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1015 uart->port.flags = 0;
1016 uart->port.type = PORT_UNKNOWN;
1017 uart->port.iobase = 0;
1018 uart->port.mapbase = 0;
1019 uart->port.membase = NULL;
1020 uart->port.dev = NULL;
1021 mutex_unlock(&serial_txx9_mutex);
1022 }
1023
1024 /*
1025 * Register a set of serial devices attached to a platform device.
1026 */
1027 static int __devinit serial_txx9_probe(struct platform_device *dev)
1028 {
1029 struct uart_port *p = dev->dev.platform_data;
1030 struct uart_port port;
1031 int ret, i;
1032
1033 memset(&port, 0, sizeof(struct uart_port));
1034 for (i = 0; p && p->uartclk != 0; p++, i++) {
1035 port.iobase = p->iobase;
1036 port.membase = p->membase;
1037 port.irq = p->irq;
1038 port.uartclk = p->uartclk;
1039 port.iotype = p->iotype;
1040 port.flags = p->flags;
1041 port.mapbase = p->mapbase;
1042 port.dev = &dev->dev;
1043 ret = serial_txx9_register_port(&port);
1044 if (ret < 0) {
1045 dev_err(&dev->dev, "unable to register port at index %d "
1046 "(IO%x MEM%lx IRQ%d): %d\n", i,
1047 p->iobase, p->mapbase, p->irq, ret);
1048 }
1049 }
1050 return 0;
1051 }
1052
1053 /*
1054 * Remove serial ports registered against a platform device.
1055 */
1056 static int __devexit serial_txx9_remove(struct platform_device *dev)
1057 {
1058 int i;
1059
1060 for (i = 0; i < UART_NR; i++) {
1061 struct uart_txx9_port *up = &serial_txx9_ports[i];
1062
1063 if (up->port.dev == &dev->dev)
1064 serial_txx9_unregister_port(i);
1065 }
1066 return 0;
1067 }
1068
1069 #ifdef CONFIG_PM
1070 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1071 {
1072 int i;
1073
1074 for (i = 0; i < UART_NR; i++) {
1075 struct uart_txx9_port *up = &serial_txx9_ports[i];
1076
1077 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1078 uart_suspend_port(&serial_txx9_reg, &up->port);
1079 }
1080
1081 return 0;
1082 }
1083
1084 static int serial_txx9_resume(struct platform_device *dev)
1085 {
1086 int i;
1087
1088 for (i = 0; i < UART_NR; i++) {
1089 struct uart_txx9_port *up = &serial_txx9_ports[i];
1090
1091 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1092 uart_resume_port(&serial_txx9_reg, &up->port);
1093 }
1094
1095 return 0;
1096 }
1097 #endif
1098
1099 static struct platform_driver serial_txx9_plat_driver = {
1100 .probe = serial_txx9_probe,
1101 .remove = __devexit_p(serial_txx9_remove),
1102 #ifdef CONFIG_PM
1103 .suspend = serial_txx9_suspend,
1104 .resume = serial_txx9_resume,
1105 #endif
1106 .driver = {
1107 .name = "serial_txx9",
1108 .owner = THIS_MODULE,
1109 },
1110 };
1111
1112 #ifdef ENABLE_SERIAL_TXX9_PCI
1113 /*
1114 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1115 * to the arrangement of serial ports on a PCI card.
1116 */
1117 static int __devinit
1118 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1119 {
1120 struct uart_port port;
1121 int line;
1122 int rc;
1123
1124 rc = pci_enable_device(dev);
1125 if (rc)
1126 return rc;
1127
1128 memset(&port, 0, sizeof(port));
1129 port.ops = &serial_txx9_pops;
1130 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1131 port.uartclk = 66670000;
1132 port.irq = dev->irq;
1133 port.iotype = UPIO_PORT;
1134 port.iobase = pci_resource_start(dev, 1);
1135 port.dev = &dev->dev;
1136 line = serial_txx9_register_port(&port);
1137 if (line < 0) {
1138 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1139 pci_disable_device(dev);
1140 return line;
1141 }
1142 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1143
1144 return 0;
1145 }
1146
1147 static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
1148 {
1149 struct uart_txx9_port *up = pci_get_drvdata(dev);
1150
1151 pci_set_drvdata(dev, NULL);
1152
1153 if (up) {
1154 serial_txx9_unregister_port(up->port.line);
1155 pci_disable_device(dev);
1156 }
1157 }
1158
1159 #ifdef CONFIG_PM
1160 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1161 {
1162 struct uart_txx9_port *up = pci_get_drvdata(dev);
1163
1164 if (up)
1165 uart_suspend_port(&serial_txx9_reg, &up->port);
1166 pci_save_state(dev);
1167 pci_set_power_state(dev, pci_choose_state(dev, state));
1168 return 0;
1169 }
1170
1171 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1172 {
1173 struct uart_txx9_port *up = pci_get_drvdata(dev);
1174
1175 pci_set_power_state(dev, PCI_D0);
1176 pci_restore_state(dev);
1177 if (up)
1178 uart_resume_port(&serial_txx9_reg, &up->port);
1179 return 0;
1180 }
1181 #endif
1182
1183 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1184 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1185 { 0, }
1186 };
1187
1188 static struct pci_driver serial_txx9_pci_driver = {
1189 .name = "serial_txx9",
1190 .probe = pciserial_txx9_init_one,
1191 .remove = __devexit_p(pciserial_txx9_remove_one),
1192 #ifdef CONFIG_PM
1193 .suspend = pciserial_txx9_suspend_one,
1194 .resume = pciserial_txx9_resume_one,
1195 #endif
1196 .id_table = serial_txx9_pci_tbl,
1197 };
1198
1199 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1200 #endif /* ENABLE_SERIAL_TXX9_PCI */
1201
1202 static struct platform_device *serial_txx9_plat_devs;
1203
1204 static int __init serial_txx9_init(void)
1205 {
1206 int ret;
1207
1208 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1209
1210 ret = uart_register_driver(&serial_txx9_reg);
1211 if (ret)
1212 goto out;
1213
1214 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1215 if (!serial_txx9_plat_devs) {
1216 ret = -ENOMEM;
1217 goto unreg_uart_drv;
1218 }
1219
1220 ret = platform_device_add(serial_txx9_plat_devs);
1221 if (ret)
1222 goto put_dev;
1223
1224 serial_txx9_register_ports(&serial_txx9_reg,
1225 &serial_txx9_plat_devs->dev);
1226
1227 ret = platform_driver_register(&serial_txx9_plat_driver);
1228 if (ret)
1229 goto del_dev;
1230
1231 #ifdef ENABLE_SERIAL_TXX9_PCI
1232 ret = pci_register_driver(&serial_txx9_pci_driver);
1233 #endif
1234 if (ret == 0)
1235 goto out;
1236
1237 del_dev:
1238 platform_device_del(serial_txx9_plat_devs);
1239 put_dev:
1240 platform_device_put(serial_txx9_plat_devs);
1241 unreg_uart_drv:
1242 uart_unregister_driver(&serial_txx9_reg);
1243 out:
1244 return ret;
1245 }
1246
1247 static void __exit serial_txx9_exit(void)
1248 {
1249 int i;
1250
1251 #ifdef ENABLE_SERIAL_TXX9_PCI
1252 pci_unregister_driver(&serial_txx9_pci_driver);
1253 #endif
1254 platform_driver_unregister(&serial_txx9_plat_driver);
1255 platform_device_unregister(serial_txx9_plat_devs);
1256 for (i = 0; i < UART_NR; i++) {
1257 struct uart_txx9_port *up = &serial_txx9_ports[i];
1258 if (up->port.iobase || up->port.mapbase)
1259 uart_remove_one_port(&serial_txx9_reg, &up->port);
1260 }
1261
1262 uart_unregister_driver(&serial_txx9_reg);
1263 }
1264
1265 module_init(serial_txx9_init);
1266 module_exit(serial_txx9_exit);
1267
1268 MODULE_LICENSE("GPL");
1269 MODULE_DESCRIPTION("TX39/49 serial driver");
1270
1271 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);
Support for the Chinese Samsung S3C2440 based development boards