arch/x86_64/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  * $Id: setup64.c,v 1.12 2002/03/21 10:09:17 ak Exp $
   7  */
   8 #include <linux/config.h>
   9 #include <linux/init.h>
  10 #include <linux/kernel.h>
  11 #include <linux/sched.h>
  12 #include <linux/string.h>
  13 #include <linux/bootmem.h>
  14 #include <linux/bitops.h>
  15 #include <asm/bootsetup.h>
  16 #include <asm/pda.h>
  17 #include <asm/pgtable.h>
  18 #include <asm/processor.h>
  19 #include <asm/desc.h>
  20 #include <asm/atomic.h>
  21 #include <asm/mmu_context.h>
  22 #include <asm/smp.h>
  23 #include <asm/i387.h>
  24 #include <asm/percpu.h>
  25 #include <asm/mtrr.h>
  26 #include <asm/proto.h>
  27 #include <asm/mman.h>
  28 #include <asm/numa.h>
  29
  30 char x86_boot_params[BOOT_PARAM_SIZE] __initdata = {0,};
  31
  32 cpumask_t cpu_initialized __initdata = CPU_MASK_NONE;
  33
  34 struct x8664_pda cpu_pda[NR_CPUS] __cacheline_aligned;
  35
  36 extern struct task_struct init_task;
  37
  38 extern unsigned char __per_cpu_start[], __per_cpu_end[];
  39
  40 extern struct desc_ptr cpu_gdt_descr[];
  41 struct desc_ptr idt_descr = { 256 * 16, (unsigned long) idt_table };
  42
  43 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  44
  45 unsigned long __supported_pte_mask = ~0UL;
  46 static int do_not_nx __initdata = 0;
  47
  48 /* noexec=on|off
  49 Control non executable mappings for 64bit processes.
  50
  51 on      Enable(default)
  52 off     Disable
  53 */
  54 int __init nonx_setup(char *str)
  55 {
  56         if (!strncmp(str, "on", 2)) {
  57                 __supported_pte_mask |= _PAGE_NX;
  58                 do_not_nx = 0;
  59         } else if (!strncmp(str, "off", 3)) {
  60                 do_not_nx = 1;
  61                 __supported_pte_mask &= ~_PAGE_NX;
  62         }
  63         return 0;
  64 }
  65 __setup("noexec=", nonx_setup); /* parsed early actually */
  66
  67 int force_personality32 = READ_IMPLIES_EXEC;
  68
  69 /* noexec32=on|off
  70 Control non executable heap for 32bit processes.
  71 To control the stack too use noexec=off
  72
  73 on      PROT_READ does not imply PROT_EXEC for 32bit processes
  74 off     PROT_READ implies PROT_EXEC (default)
  75 */
  76 static int __init nonx32_setup(char *str)
  77 {
  78         if (!strcmp(str, "on"))
  79                 force_personality32 &= ~READ_IMPLIES_EXEC;
  80         else if (!strcmp(str, "off"))
  81                 force_personality32 |= READ_IMPLIES_EXEC;
  82         return 0;
  83 }
  84 __setup("noexec32=", nonx32_setup);
  85
  86 /*
  87  * Great future plan:
  88  * Declare PDA itself and support (irqstack,tss,pgd) as per cpu data.
  89  * Always point %gs to its beginning
  90  */
  91 void __init setup_per_cpu_areas(void)
  92 {
  93         int i;
  94         unsigned long size;
  95
  96         /* Copy section for each CPU (we discard the original) */
  97         size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
  98 #ifdef CONFIG_MODULES
  99         if (size < PERCPU_ENOUGH_ROOM)
 100                 size = PERCPU_ENOUGH_ROOM;
 101 #endif
 102
 103         for (i = 0; i < NR_CPUS; i++) {
 104                 unsigned char *ptr;
 105
 106                 if (!NODE_DATA(cpu_to_node(i))) {
 107                         printk("cpu with no node %d, num_online_nodes %d\n",
 108                                i, num_online_nodes());
 109                         ptr = alloc_bootmem(size);
 110                 } else {
 111                         ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
 112                 }
 113                 if (!ptr)
 114                         panic("Cannot allocate cpu data for CPU %d\n", i);
 115                 cpu_pda[i].data_offset = ptr - __per_cpu_start;
 116                 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
 117         }
 118 }
 119
 120 void pda_init(int cpu)
 121 {
 122         struct x8664_pda *pda = &cpu_pda[cpu];
 123
 124         /* Setup up data that may be needed in __get_free_pages early */
 125         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
 126         wrmsrl(MSR_GS_BASE, cpu_pda + cpu);
 127
 128         pda->me = pda;
 129         pda->cpunumber = cpu;
 130         pda->irqcount = -1;
 131         pda->kernelstack =
 132                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 133         pda->active_mm = &init_mm;
 134         pda->mmu_state = 0;
 135
 136         if (cpu == 0) {
 137                 /* others are initialized in smpboot.c */
 138                 pda->pcurrent = &init_task;
 139                 pda->irqstackptr = boot_cpu_stack;
 140         } else {
 141                 pda->irqstackptr = (char *)
 142                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 143                 if (!pda->irqstackptr)
 144                         panic("cannot allocate irqstack for cpu %d", cpu);
 145         }
 146
 147         asm volatile("movq %0,%%cr3" :: "r" (__pa_symbol(&init_level4_pgt)));
 148
 149         pda->irqstackptr += IRQSTACKSIZE-64;
 150 }
 151
 152 char boot_exception_stacks[N_EXCEPTION_STACKS * EXCEPTION_STKSZ]
 153 __attribute__((section(".bss.page_aligned")));
 154
 155 /* May not be marked __init: used by software suspend */
 156 void syscall_init(void)
 157 {
 158         /*
 159          * LSTAR and STAR live in a bit strange symbiosis.
 160          * They both write to the same internal register. STAR allows to set CS/DS
 161          * but only a 32bit target. LSTAR sets the 64bit rip.
 162          */
 163         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 164         wrmsrl(MSR_LSTAR, system_call);
 165
 166 #ifdef CONFIG_IA32_EMULATION
 167         syscall32_cpu_init ();
 168 #endif
 169
 170         /* Flags to clear on syscall */
 171         wrmsrl(MSR_SYSCALL_MASK, EF_TF|EF_DF|EF_IE|0x3000);
 172 }
 173
 174 void __init check_efer(void)
 175 {
 176         unsigned long efer;
 177
 178         rdmsrl(MSR_EFER, efer);
 179         if (!(efer & EFER_NX) || do_not_nx) {
 180                 __supported_pte_mask &= ~_PAGE_NX;
 181         }
 182 }
 183
 184 /*
 185  * cpu_init() initializes state that is per-CPU. Some data is already
 186  * initialized (naturally) in the bootstrap process, such as the GDT
 187  * and IDT. We reload them nevertheless, this function acts as a
 188  * 'CPU state barrier', nothing should get across.
 189  * A lot of state is already set up in PDA init.
 190  */
 191 void __init cpu_init (void)
 192 {
 193 #ifdef CONFIG_SMP
 194         int cpu = stack_smp_processor_id();
 195 #else
 196         int cpu = smp_processor_id();
 197 #endif
 198         struct tss_struct *t = &per_cpu(init_tss, cpu);
 199         unsigned long v;
 200         char *estacks = NULL;
 201         struct task_struct *me;
 202         int i;
 203
 204         /* CPU 0 is initialised in head64.c */
 205         if (cpu != 0) {
 206                 pda_init(cpu);
 207         } else
 208                 estacks = boot_exception_stacks;
 209
 210         me = current;
 211
 212         if (cpu_test_and_set(cpu, cpu_initialized))
 213                 panic("CPU#%d already initialized!\n", cpu);
 214
 215         printk("Initializing CPU#%d\n", cpu);
 216
 217                 clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 218
 219         /*
 220          * Initialize the per-CPU GDT with the boot GDT,
 221          * and set up the GDT descriptor:
 222          */
 223         if (cpu) {
 224                 memcpy(cpu_gdt_table[cpu], cpu_gdt_table[0], GDT_SIZE);
 225         }
 226
 227         cpu_gdt_descr[cpu].size = GDT_SIZE;
 228         cpu_gdt_descr[cpu].address = (unsigned long)cpu_gdt_table[cpu];
 229         asm volatile("lgdt %0" :: "m" (cpu_gdt_descr[cpu]));
 230         asm volatile("lidt %0" :: "m" (idt_descr));
 231
 232         memcpy(me->thread.tls_array, cpu_gdt_table[cpu], GDT_ENTRY_TLS_ENTRIES * 8);
 233
 234         /*
 235          * Delete NT
 236          */
 237
 238         asm volatile("pushfq ; popq %%rax ; btr $14,%%rax ; pushq %%rax ; popfq" ::: "eax");
 239
 240         syscall_init();
 241
 242         wrmsrl(MSR_FS_BASE, 0);
 243         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 244         barrier();
 245
 246         check_efer();
 247
 248         /*
 249          * set up and load the per-CPU TSS
 250          */
 251         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 252                 if (cpu) {
 253                         estacks = (char *)__get_free_pages(GFP_ATOMIC,
 254                                                    EXCEPTION_STACK_ORDER);
 255                         if (!estacks)
 256                                 panic("Cannot allocate exception stack %ld %d\n",
 257                                       v, cpu);
 258                 }
 259                 estacks += EXCEPTION_STKSZ;
 260                 t->ist[v] = (unsigned long)estacks;
 261         }
 262
 263         t->io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 264         /*
 265          * <= is required because the CPU will access up to
 266          * 8 bits beyond the end of the IO permission bitmap.
 267          */
 268         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 269                 t->io_bitmap[i] = ~0UL;
 270
 271         atomic_inc(&init_mm.mm_count);
 272         me->active_mm = &init_mm;
 273         if (me->mm)
 274                 BUG();
 275         enter_lazy_tlb(&init_mm, me);
 276
 277         set_tss_desc(cpu, t);
 278         load_TR_desc();
 279         load_LDT(&init_mm.context);
 280
 281         /*
 282          * Clear all 6 debug registers:
 283          */
 284
 285         set_debug(0UL, 0);
 286         set_debug(0UL, 1);
 287         set_debug(0UL, 2);
 288         set_debug(0UL, 3);
 289         set_debug(0UL, 6);
 290         set_debug(0UL, 7);
 291
 292         fpu_init();
 293 }