ath5k: fix buffer overrun in rate debug code
[linux-2.6/mini2440.git] / drivers / net / wireless / ath9k / beacon.c
blob3ab0b43aaf93f79c6b8af3859f7cf0ea9990e3db
1 /*
2 * Copyright (c) 2008 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include "core.h"
20 * This function will modify certain transmit queue properties depending on
21 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
22 * settings and channel width min/max
24 static int ath_beaconq_config(struct ath_softc *sc)
26 struct ath_hal *ah = sc->sc_ah;
27 struct ath9k_tx_queue_info qi;
29 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
30 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
31 /* Always burst out beacon and CAB traffic. */
32 qi.tqi_aifs = 1;
33 qi.tqi_cwmin = 0;
34 qi.tqi_cwmax = 0;
35 } else {
36 /* Adhoc mode; important thing is to use 2x cwmin. */
37 qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
38 qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
39 qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
42 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
43 DPRINTF(sc, ATH_DBG_FATAL,
44 "unable to update h/w beacon queue parameters\n");
45 return 0;
46 } else {
47 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); /* push to h/w */
48 return 1;
52 static void ath_bstuck_process(struct ath_softc *sc)
54 DPRINTF(sc, ATH_DBG_BEACON,
55 "stuck beacon; resetting (bmiss count %u)\n",
56 sc->beacon.bmisscnt);
57 ath_reset(sc, false);
61 * Associates the beacon frame buffer with a transmit descriptor. Will set
62 * up all required antenna switch parameters, rate codes, and channel flags.
63 * Beacons are always sent out at the lowest rate, and are not retried.
65 static void ath_beacon_setup(struct ath_softc *sc,
66 struct ath_vap *avp, struct ath_buf *bf)
68 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
69 struct ath_hal *ah = sc->sc_ah;
70 struct ath_desc *ds;
71 struct ath9k_11n_rate_series series[4];
72 struct ath_rate_table *rt;
73 int flags, antenna;
74 u8 rix, rate;
75 int ctsrate = 0;
76 int ctsduration = 0;
78 DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
80 /* setup descriptors */
81 ds = bf->bf_desc;
83 flags = ATH9K_TXDESC_NOACK;
85 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
86 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
87 ds->ds_link = bf->bf_daddr; /* self-linked */
88 flags |= ATH9K_TXDESC_VEOL;
89 /* Let hardware handle antenna switching. */
90 antenna = 0;
91 } else {
92 ds->ds_link = 0;
94 * Switch antenna every beacon.
95 * Should only switch every beacon period, not for every
96 * SWBA's
97 * XXX assumes two antenna
99 antenna = ((sc->beacon.ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
102 ds->ds_data = bf->bf_buf_addr;
105 * Calculate rate code.
106 * XXX everything at min xmit rate
108 rix = 0;
109 rt = sc->cur_rate_table;
110 rate = rt->info[rix].ratecode;
111 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
112 rate |= rt->info[rix].short_preamble;
114 ath9k_hw_set11n_txdesc(ah, ds,
115 skb->len + FCS_LEN, /* frame length */
116 ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
117 MAX_RATE_POWER, /* FIXME */
118 ATH9K_TXKEYIX_INVALID, /* no encryption */
119 ATH9K_KEY_TYPE_CLEAR, /* no encryption */
120 flags /* no ack,
121 veol for beacons */
124 /* NB: beacon's BufLen must be a multiple of 4 bytes */
125 ath9k_hw_filltxdesc(ah, ds,
126 roundup(skb->len, 4), /* buffer length */
127 true, /* first segment */
128 true, /* last segment */
129 ds /* first descriptor */
132 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
133 series[0].Tries = 1;
134 series[0].Rate = rate;
135 series[0].ChSel = sc->sc_tx_chainmask;
136 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
137 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
138 ctsrate, ctsduration, series, 4, 0);
141 /* Generate beacon frame and queue cab data for a vap */
142 static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
144 struct ath_buf *bf;
145 struct ath_vap *avp;
146 struct sk_buff *skb;
147 struct ath_txq *cabq;
148 struct ieee80211_vif *vif;
149 struct ieee80211_tx_info *info;
150 int cabq_depth;
152 vif = sc->sc_vaps[if_id];
153 ASSERT(vif);
155 avp = (void *)vif->drv_priv;
156 cabq = sc->beacon.cabq;
158 if (avp->av_bcbuf == NULL) {
159 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
160 avp, avp->av_bcbuf);
161 return NULL;
164 bf = avp->av_bcbuf;
165 skb = (struct sk_buff *)bf->bf_mpdu;
166 if (skb) {
167 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
168 skb->len,
169 PCI_DMA_TODEVICE);
170 dev_kfree_skb_any(skb);
173 skb = ieee80211_beacon_get(sc->hw, vif);
174 bf->bf_mpdu = skb;
175 if (skb == NULL)
176 return NULL;
178 info = IEEE80211_SKB_CB(skb);
179 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
181 * TODO: make sure the seq# gets assigned properly (vs. other
182 * TX frames)
184 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
185 sc->tx.seq_no += 0x10;
186 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
187 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
190 bf->bf_buf_addr = bf->bf_dmacontext =
191 pci_map_single(sc->pdev, skb->data,
192 skb->len,
193 PCI_DMA_TODEVICE);
194 if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
195 dev_kfree_skb_any(skb);
196 bf->bf_mpdu = NULL;
197 DPRINTF(sc, ATH_DBG_CONFIG,
198 "pci_dma_mapping_error() on beaconing\n");
199 return NULL;
202 skb = ieee80211_get_buffered_bc(sc->hw, vif);
205 * if the CABQ traffic from previous DTIM is pending and the current
206 * beacon is also a DTIM.
207 * 1) if there is only one vap let the cab traffic continue.
208 * 2) if there are more than one vap and we are using staggered
209 * beacons, then drain the cabq by dropping all the frames in
210 * the cabq so that the current vaps cab traffic can be scheduled.
212 spin_lock_bh(&cabq->axq_lock);
213 cabq_depth = cabq->axq_depth;
214 spin_unlock_bh(&cabq->axq_lock);
216 if (skb && cabq_depth) {
218 * Unlock the cabq lock as ath_tx_draintxq acquires
219 * the lock again which is a common function and that
220 * acquires txq lock inside.
222 if (sc->sc_nvaps > 1) {
223 ath_tx_draintxq(sc, cabq, false);
224 DPRINTF(sc, ATH_DBG_BEACON,
225 "flush previous cabq traffic\n");
229 /* Construct tx descriptor. */
230 ath_beacon_setup(sc, avp, bf);
233 * Enable the CAB queue before the beacon queue to
234 * insure cab frames are triggered by this beacon.
236 while (skb) {
237 ath_tx_cabq(sc, skb);
238 skb = ieee80211_get_buffered_bc(sc->hw, vif);
241 return bf;
245 * Startup beacon transmission for adhoc mode when they are sent entirely
246 * by the hardware using the self-linked descriptor + veol trick.
248 static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
250 struct ieee80211_vif *vif;
251 struct ath_hal *ah = sc->sc_ah;
252 struct ath_buf *bf;
253 struct ath_vap *avp;
254 struct sk_buff *skb;
256 vif = sc->sc_vaps[if_id];
257 ASSERT(vif);
259 avp = (void *)vif->drv_priv;
261 if (avp->av_bcbuf == NULL) {
262 DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
263 avp, avp != NULL ? avp->av_bcbuf : NULL);
264 return;
266 bf = avp->av_bcbuf;
267 skb = (struct sk_buff *) bf->bf_mpdu;
269 /* Construct tx descriptor. */
270 ath_beacon_setup(sc, avp, bf);
272 /* NB: caller is known to have already stopped tx dma */
273 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
274 ath9k_hw_txstart(ah, sc->beacon.beaconq);
275 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
276 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
279 int ath_beaconq_setup(struct ath_hal *ah)
281 struct ath9k_tx_queue_info qi;
283 memset(&qi, 0, sizeof(qi));
284 qi.tqi_aifs = 1;
285 qi.tqi_cwmin = 0;
286 qi.tqi_cwmax = 0;
287 /* NB: don't enable any interrupts */
288 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
291 int ath_beacon_alloc(struct ath_softc *sc, int if_id)
293 struct ieee80211_vif *vif;
294 struct ath_vap *avp;
295 struct ieee80211_hdr *hdr;
296 struct ath_buf *bf;
297 struct sk_buff *skb;
298 __le64 tstamp;
300 vif = sc->sc_vaps[if_id];
301 ASSERT(vif);
303 avp = (void *)vif->drv_priv;
305 /* Allocate a beacon descriptor if we haven't done so. */
306 if (!avp->av_bcbuf) {
307 /* Allocate beacon state for hostap/ibss. We know
308 * a buffer is available. */
309 avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
310 struct ath_buf, list);
311 list_del(&avp->av_bcbuf->list);
313 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
314 !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
315 int slot;
317 * Assign the vap to a beacon xmit slot. As
318 * above, this cannot fail to find one.
320 avp->av_bslot = 0;
321 for (slot = 0; slot < ATH_BCBUF; slot++)
322 if (sc->beacon.bslot[slot] == ATH_IF_ID_ANY) {
324 * XXX hack, space out slots to better
325 * deal with misses
327 if (slot+1 < ATH_BCBUF &&
328 sc->beacon.bslot[slot+1] ==
329 ATH_IF_ID_ANY) {
330 avp->av_bslot = slot+1;
331 break;
333 avp->av_bslot = slot;
334 /* NB: keep looking for a double slot */
336 BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY);
337 sc->beacon.bslot[avp->av_bslot] = if_id;
338 sc->sc_nbcnvaps++;
342 /* release the previous beacon frame , if it already exists. */
343 bf = avp->av_bcbuf;
344 if (bf->bf_mpdu != NULL) {
345 skb = (struct sk_buff *)bf->bf_mpdu;
346 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
347 skb->len,
348 PCI_DMA_TODEVICE);
349 dev_kfree_skb_any(skb);
350 bf->bf_mpdu = NULL;
354 * NB: the beacon data buffer must be 32-bit aligned.
355 * FIXME: Fill avp->av_btxctl.txpower and
356 * avp->av_btxctl.shortPreamble
358 skb = ieee80211_beacon_get(sc->hw, vif);
359 if (skb == NULL) {
360 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
361 return -ENOMEM;
364 tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
365 sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
368 * Calculate a TSF adjustment factor required for
369 * staggered beacons. Note that we assume the format
370 * of the beacon frame leaves the tstamp field immediately
371 * following the header.
373 if (avp->av_bslot > 0) {
374 u64 tsfadjust;
375 __le64 val;
376 int intval;
378 intval = sc->hw->conf.beacon_int ?
379 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
382 * The beacon interval is in TU's; the TSF in usecs.
383 * We figure out how many TU's to add to align the
384 * timestamp then convert to TSF units and handle
385 * byte swapping before writing it in the frame.
386 * The hardware will then add this each time a beacon
387 * frame is sent. Note that we align vap's 1..N
388 * and leave vap 0 untouched. This means vap 0
389 * has a timestamp in one beacon interval while the
390 * others get a timestamp aligned to the next interval.
392 tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
393 val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
395 DPRINTF(sc, ATH_DBG_BEACON,
396 "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
397 avp->av_bslot, intval, (unsigned long long)tsfadjust);
399 hdr = (struct ieee80211_hdr *)skb->data;
400 memcpy(&hdr[1], &val, sizeof(val));
403 bf->bf_mpdu = skb;
404 bf->bf_buf_addr = bf->bf_dmacontext =
405 pci_map_single(sc->pdev, skb->data,
406 skb->len,
407 PCI_DMA_TODEVICE);
408 if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
409 dev_kfree_skb_any(skb);
410 bf->bf_mpdu = NULL;
411 DPRINTF(sc, ATH_DBG_CONFIG,
412 "pci_dma_mapping_error() on beacon alloc\n");
413 return -ENOMEM;
416 return 0;
419 void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
421 if (avp->av_bcbuf != NULL) {
422 struct ath_buf *bf;
424 if (avp->av_bslot != -1) {
425 sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY;
426 sc->sc_nbcnvaps--;
429 bf = avp->av_bcbuf;
430 if (bf->bf_mpdu != NULL) {
431 struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
432 pci_unmap_single(sc->pdev, bf->bf_dmacontext,
433 skb->len,
434 PCI_DMA_TODEVICE);
435 dev_kfree_skb_any(skb);
436 bf->bf_mpdu = NULL;
438 list_add_tail(&bf->list, &sc->beacon.bbuf);
440 avp->av_bcbuf = NULL;
444 void ath9k_beacon_tasklet(unsigned long data)
446 struct ath_softc *sc = (struct ath_softc *)data;
447 struct ath_hal *ah = sc->sc_ah;
448 struct ath_buf *bf = NULL;
449 int slot, if_id;
450 u32 bfaddr;
451 u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
452 u32 show_cycles = 0;
453 u32 bc = 0; /* beacon count */
454 u64 tsf;
455 u32 tsftu;
456 u16 intval;
458 if (sc->sc_flags & SC_OP_NO_RESET) {
459 show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
460 &rx_clear, &rx_frame, &tx_frame);
464 * Check if the previous beacon has gone out. If
465 * not don't try to post another, skip this period
466 * and wait for the next. Missed beacons indicate
467 * a problem and should not occur. If we miss too
468 * many consecutive beacons reset the device.
470 * FIXME: Clean up this mess !!
472 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
473 sc->beacon.bmisscnt++;
474 /* XXX: doth needs the chanchange IE countdown decremented.
475 * We should consider adding a mac80211 call to indicate
476 * a beacon miss so appropriate action could be taken
477 * (in that layer).
479 if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
480 if (sc->sc_flags & SC_OP_NO_RESET) {
481 DPRINTF(sc, ATH_DBG_BEACON,
482 "missed %u consecutive beacons\n",
483 sc->beacon.bmisscnt);
484 if (show_cycles) {
486 * Display cycle counter stats from HW
487 * to aide in debug of stickiness.
489 DPRINTF(sc, ATH_DBG_BEACON,
490 "busy times: rx_clear=%d, "
491 "rx_frame=%d, tx_frame=%d\n",
492 rx_clear, rx_frame,
493 tx_frame);
494 } else {
495 DPRINTF(sc, ATH_DBG_BEACON,
496 "unable to obtain "
497 "busy times\n");
499 } else {
500 DPRINTF(sc, ATH_DBG_BEACON,
501 "missed %u consecutive beacons\n",
502 sc->beacon.bmisscnt);
504 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
505 if (sc->sc_flags & SC_OP_NO_RESET) {
506 if (sc->beacon.bmisscnt == BSTUCK_THRESH) {
507 DPRINTF(sc, ATH_DBG_BEACON,
508 "beacon is officially "
509 "stuck\n");
511 } else {
512 DPRINTF(sc, ATH_DBG_BEACON,
513 "beacon is officially stuck\n");
514 ath_bstuck_process(sc);
517 return;
520 if (sc->beacon.bmisscnt != 0) {
521 if (sc->sc_flags & SC_OP_NO_RESET) {
522 DPRINTF(sc, ATH_DBG_BEACON,
523 "resume beacon xmit after %u misses\n",
524 sc->beacon.bmisscnt);
525 } else {
526 DPRINTF(sc, ATH_DBG_BEACON,
527 "resume beacon xmit after %u misses\n",
528 sc->beacon.bmisscnt);
530 sc->beacon.bmisscnt = 0;
534 * Generate beacon frames. we are sending frames
535 * staggered so calculate the slot for this frame based
536 * on the tsf to safeguard against missing an swba.
539 intval = sc->hw->conf.beacon_int ?
540 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
542 tsf = ath9k_hw_gettsf64(ah);
543 tsftu = TSF_TO_TU(tsf>>32, tsf);
544 slot = ((tsftu % intval) * ATH_BCBUF) / intval;
545 if_id = sc->beacon.bslot[(slot + 1) % ATH_BCBUF];
547 DPRINTF(sc, ATH_DBG_BEACON,
548 "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
549 slot, (unsigned long long)tsf, tsftu,
550 intval, if_id);
552 bfaddr = 0;
553 if (if_id != ATH_IF_ID_ANY) {
554 bf = ath_beacon_generate(sc, if_id);
555 if (bf != NULL) {
556 bfaddr = bf->bf_daddr;
557 bc = 1;
561 * Handle slot time change when a non-ERP station joins/leaves
562 * an 11g network. The 802.11 layer notifies us via callback,
563 * we mark updateslot, then wait one beacon before effecting
564 * the change. This gives associated stations at least one
565 * beacon interval to note the state change.
567 * NB: The slot time change state machine is clocked according
568 * to whether we are bursting or staggering beacons. We
569 * recognize the request to update and record the current
570 * slot then don't transition until that slot is reached
571 * again. If we miss a beacon for that slot then we'll be
572 * slow to transition but we'll be sure at least one beacon
573 * interval has passed. When bursting slot is always left
574 * set to ATH_BCBUF so this check is a noop.
576 /* XXX locking */
577 if (sc->beacon.updateslot == UPDATE) {
578 sc->beacon.updateslot = COMMIT; /* commit next beacon */
579 sc->beacon.slotupdate = slot;
580 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
581 ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
582 sc->beacon.updateslot = OK;
584 if (bfaddr != 0) {
586 * Stop any current dma and put the new frame(s) on the queue.
587 * This should never fail since we check above that no frames
588 * are still pending on the queue.
590 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
591 DPRINTF(sc, ATH_DBG_FATAL,
592 "beacon queue %u did not stop?\n", sc->beacon.beaconq);
593 /* NB: the HAL still stops DMA, so proceed */
596 /* NB: cabq traffic should already be queued and primed */
597 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
598 ath9k_hw_txstart(ah, sc->beacon.beaconq);
600 sc->beacon.ast_be_xmit += bc; /* XXX per-vap? */
605 * Configure the beacon and sleep timers.
607 * When operating as an AP this resets the TSF and sets
608 * up the hardware to notify us when we need to issue beacons.
610 * When operating in station mode this sets up the beacon
611 * timers according to the timestamp of the last received
612 * beacon and the current TSF, configures PCF and DTIM
613 * handling, programs the sleep registers so the hardware
614 * will wakeup in time to receive beacons, and configures
615 * the beacon miss handling so we'll receive a BMISS
616 * interrupt when we stop seeing beacons from the AP
617 * we've associated with.
619 void ath_beacon_config(struct ath_softc *sc, int if_id)
621 struct ieee80211_vif *vif;
622 struct ath_hal *ah = sc->sc_ah;
623 struct ath_beacon_config conf;
624 struct ath_vap *avp;
625 enum nl80211_iftype opmode;
626 u32 nexttbtt, intval;
628 if (if_id != ATH_IF_ID_ANY) {
629 vif = sc->sc_vaps[if_id];
630 ASSERT(vif);
631 avp = (void *)vif->drv_priv;
632 opmode = avp->av_opmode;
633 } else {
634 opmode = sc->sc_ah->ah_opmode;
637 memset(&conf, 0, sizeof(struct ath_beacon_config));
639 conf.beacon_interval = sc->hw->conf.beacon_int ?
640 sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
641 conf.listen_interval = 1;
642 conf.dtim_period = conf.beacon_interval;
643 conf.dtim_count = 1;
644 conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
646 /* extract tstamp from last beacon and convert to TU */
647 nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
649 /* XXX conditionalize multi-bss support? */
650 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
652 * For multi-bss ap support beacons are either staggered
653 * evenly over N slots or burst together. For the former
654 * arrange for the SWBA to be delivered for each slot.
655 * Slots that are not occupied will generate nothing.
657 /* NB: the beacon interval is kept internally in TU's */
658 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
659 intval /= ATH_BCBUF; /* for staggered beacons */
660 } else {
661 intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
664 if (nexttbtt == 0) /* e.g. for ap mode */
665 nexttbtt = intval;
666 else if (intval) /* NB: can be 0 for monitor mode */
667 nexttbtt = roundup(nexttbtt, intval);
669 DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
670 nexttbtt, intval, conf.beacon_interval);
672 /* Check for NL80211_IFTYPE_AP and sc_nostabeacons for WDS client */
673 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) {
674 struct ath9k_beacon_state bs;
675 u64 tsf;
676 u32 tsftu;
677 int dtimperiod, dtimcount, sleepduration;
678 int cfpperiod, cfpcount;
681 * Setup dtim and cfp parameters according to
682 * last beacon we received (which may be none).
684 dtimperiod = conf.dtim_period;
685 if (dtimperiod <= 0) /* NB: 0 if not known */
686 dtimperiod = 1;
687 dtimcount = conf.dtim_count;
688 if (dtimcount >= dtimperiod) /* NB: sanity check */
689 dtimcount = 0;
690 cfpperiod = 1; /* NB: no PCF support yet */
691 cfpcount = 0;
693 sleepduration = conf.listen_interval * intval;
694 if (sleepduration <= 0)
695 sleepduration = intval;
697 #define FUDGE 2
699 * Pull nexttbtt forward to reflect the current
700 * TSF and calculate dtim+cfp state for the result.
702 tsf = ath9k_hw_gettsf64(ah);
703 tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
704 do {
705 nexttbtt += intval;
706 if (--dtimcount < 0) {
707 dtimcount = dtimperiod - 1;
708 if (--cfpcount < 0)
709 cfpcount = cfpperiod - 1;
711 } while (nexttbtt < tsftu);
712 #undef FUDGE
713 memset(&bs, 0, sizeof(bs));
714 bs.bs_intval = intval;
715 bs.bs_nexttbtt = nexttbtt;
716 bs.bs_dtimperiod = dtimperiod*intval;
717 bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
718 bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
719 bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
720 bs.bs_cfpmaxduration = 0;
723 * Calculate the number of consecutive beacons to miss
724 * before taking a BMISS interrupt. The configuration
725 * is specified in TU so we only need calculate based
726 * on the beacon interval. Note that we clamp the
727 * result to at most 15 beacons.
729 if (sleepduration > intval) {
730 bs.bs_bmissthreshold = conf.listen_interval *
731 ATH_DEFAULT_BMISS_LIMIT / 2;
732 } else {
733 bs.bs_bmissthreshold =
734 DIV_ROUND_UP(conf.bmiss_timeout, intval);
735 if (bs.bs_bmissthreshold > 15)
736 bs.bs_bmissthreshold = 15;
737 else if (bs.bs_bmissthreshold <= 0)
738 bs.bs_bmissthreshold = 1;
742 * Calculate sleep duration. The configuration is
743 * given in ms. We insure a multiple of the beacon
744 * period is used. Also, if the sleep duration is
745 * greater than the DTIM period then it makes senses
746 * to make it a multiple of that.
748 * XXX fixed at 100ms
751 bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100),
752 sleepduration);
753 if (bs.bs_sleepduration > bs.bs_dtimperiod)
754 bs.bs_sleepduration = bs.bs_dtimperiod;
756 DPRINTF(sc, ATH_DBG_BEACON,
757 "tsf %llu "
758 "tsf:tu %u "
759 "intval %u "
760 "nexttbtt %u "
761 "dtim %u "
762 "nextdtim %u "
763 "bmiss %u "
764 "sleep %u "
765 "cfp:period %u "
766 "maxdur %u "
767 "next %u "
768 "timoffset %u\n",
769 (unsigned long long)tsf, tsftu,
770 bs.bs_intval,
771 bs.bs_nexttbtt,
772 bs.bs_dtimperiod,
773 bs.bs_nextdtim,
774 bs.bs_bmissthreshold,
775 bs.bs_sleepduration,
776 bs.bs_cfpperiod,
777 bs.bs_cfpmaxduration,
778 bs.bs_cfpnext,
779 bs.bs_timoffset
782 ath9k_hw_set_interrupts(ah, 0);
783 ath9k_hw_set_sta_beacon_timers(ah, &bs);
784 sc->sc_imask |= ATH9K_INT_BMISS;
785 ath9k_hw_set_interrupts(ah, sc->sc_imask);
786 } else {
787 u64 tsf;
788 u32 tsftu;
789 ath9k_hw_set_interrupts(ah, 0);
790 if (nexttbtt == intval)
791 intval |= ATH9K_BEACON_RESET_TSF;
792 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
794 * Pull nexttbtt forward to reflect the current
795 * TSF
797 #define FUDGE 2
798 if (!(intval & ATH9K_BEACON_RESET_TSF)) {
799 tsf = ath9k_hw_gettsf64(ah);
800 tsftu = TSF_TO_TU((u32)(tsf>>32),
801 (u32)tsf) + FUDGE;
802 do {
803 nexttbtt += intval;
804 } while (nexttbtt < tsftu);
806 #undef FUDGE
807 DPRINTF(sc, ATH_DBG_BEACON,
808 "IBSS nexttbtt %u intval %u (%u)\n",
809 nexttbtt,
810 intval & ~ATH9K_BEACON_RESET_TSF,
811 conf.beacon_interval);
814 * In IBSS mode enable the beacon timers but only
815 * enable SWBA interrupts if we need to manually
816 * prepare beacon frames. Otherwise we use a
817 * self-linked tx descriptor and let the hardware
818 * deal with things.
820 intval |= ATH9K_BEACON_ENA;
821 if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
822 sc->sc_imask |= ATH9K_INT_SWBA;
823 ath_beaconq_config(sc);
824 } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
826 * In AP mode we enable the beacon timers and
827 * SWBA interrupts to prepare beacon frames.
829 intval |= ATH9K_BEACON_ENA;
830 sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */
831 ath_beaconq_config(sc);
833 ath9k_hw_beaconinit(ah, nexttbtt, intval);
834 sc->beacon.bmisscnt = 0;
835 ath9k_hw_set_interrupts(ah, sc->sc_imask);
837 * When using a self-linked beacon descriptor in
838 * ibss mode load it once here.
840 if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
841 (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
842 ath_beacon_start_adhoc(sc, 0);
846 void ath_beacon_sync(struct ath_softc *sc, int if_id)
849 * Resync beacon timers using the tsf of the
850 * beacon frame we just received.
852 ath_beacon_config(sc, if_id);
853 sc->sc_flags |= SC_OP_BEACONS;