include/asm-x86/i387.h

   1 /*
   2  * Copyright (C) 1994 Linus Torvalds
   3  *
   4  * Pentium III FXSR, SSE support
   5  * General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  * x86-64 work by Andi Kleen 2002
   8  */
   9
  10 #ifndef _ASM_X86_I387_H
  11 #define _ASM_X86_I387_H
  12
  13 #include <linux/sched.h>
  14 #include <linux/kernel_stat.h>
  15 #include <linux/regset.h>
  16 #include <asm/asm.h>
  17 #include <asm/processor.h>
  18 #include <asm/sigcontext.h>
  19 #include <asm/user.h>
  20 #include <asm/uaccess.h>
  21
  22 extern void fpu_init(void);
  23 extern unsigned int mxcsr_feature_mask;
  24 extern void mxcsr_feature_mask_init(void);
  25 extern void init_fpu(struct task_struct *child);
  26 extern asmlinkage void math_state_restore(void);
  27
  28 extern user_regset_active_fn fpregs_active, xfpregs_active;
  29 extern user_regset_get_fn fpregs_get, xfpregs_get, fpregs_soft_get;
  30 extern user_regset_set_fn fpregs_set, xfpregs_set, fpregs_soft_set;
  31
  32 #ifdef CONFIG_IA32_EMULATION
  33 struct _fpstate_ia32;
  34 extern int save_i387_ia32(struct _fpstate_ia32 __user *buf);
  35 extern int restore_i387_ia32(struct _fpstate_ia32 __user *buf);
  36 #endif
  37
  38 #ifdef CONFIG_X86_64
  39
  40 /* Ignore delayed exceptions from user space */
  41 static inline void tolerant_fwait(void)
  42 {
  43         asm volatile("1: fwait\n"
  44                      "2:\n"
  45                      _ASM_EXTABLE(1b,2b));
  46 }
  47
  48 static inline int restore_fpu_checking(struct i387_fxsave_struct *fx)
  49 {
  50         int err;
  51
  52         asm volatile("1:  rex64/fxrstor (%[fx])\n\t"
  53                      "2:\n"
  54                      ".section .fixup,\"ax\"\n"
  55                      "3:  movl $-1,%[err]\n"
  56                      "    jmp  2b\n"
  57                      ".previous\n"
  58                      _ASM_EXTABLE(1b,3b)
  59                      : [err] "=r" (err)
  60 #if 0 /* See comment in __save_init_fpu() below. */
  61                      : [fx] "r" (fx), "m" (*fx), "0" (0));
  62 #else
  63                      : [fx] "cdaSDb" (fx), "m" (*fx), "0" (0));
  64 #endif
  65         if (unlikely(err))
  66                 init_fpu(current);
  67         return err;
  68 }
  69
  70 #define X87_FSW_ES (1 << 7)     /* Exception Summary */
  71
  72 /* AMD CPUs don't save/restore FDP/FIP/FOP unless an exception
  73    is pending. Clear the x87 state here by setting it to fixed
  74    values. The kernel data segment can be sometimes 0 and sometimes
  75    new user value. Both should be ok.
  76    Use the PDA as safe address because it should be already in L1. */
  77 static inline void clear_fpu_state(struct i387_fxsave_struct *fx)
  78 {
  79         if (unlikely(fx->swd & X87_FSW_ES))
  80                  asm volatile("fnclex");
  81         alternative_input(ASM_NOP8 ASM_NOP2,
  82                      "    emms\n"               /* clear stack tags */
  83                      "    fildl %%gs:0",        /* load to clear state */
  84                      X86_FEATURE_FXSAVE_LEAK);
  85 }
  86
  87 static inline int save_i387_checking(struct i387_fxsave_struct __user *fx)
  88 {
  89         int err;
  90
  91         asm volatile("1:  rex64/fxsave (%[fx])\n\t"
  92                      "2:\n"
  93                      ".section .fixup,\"ax\"\n"
  94                      "3:  movl $-1,%[err]\n"
  95                      "    jmp  2b\n"
  96                      ".previous\n"
  97                      _ASM_EXTABLE(1b,3b)
  98                      : [err] "=r" (err), "=m" (*fx)
  99 #if 0 /* See comment in __fxsave_clear() below. */
 100                      : [fx] "r" (fx), "0" (0));
 101 #else
 102                      : [fx] "cdaSDb" (fx), "0" (0));
 103 #endif
 104         if (unlikely(err) && __clear_user(fx, sizeof(struct i387_fxsave_struct)))
 105                 err = -EFAULT;
 106         /* No need to clear here because the caller clears USED_MATH */
 107         return err;
 108 }
 109
 110 static inline void __save_init_fpu(struct task_struct *tsk)
 111 {
 112         /* Using "rex64; fxsave %0" is broken because, if the memory operand
 113            uses any extended registers for addressing, a second REX prefix
 114            will be generated (to the assembler, rex64 followed by semicolon
 115            is a separate instruction), and hence the 64-bitness is lost. */
 116 #if 0
 117         /* Using "fxsaveq %0" would be the ideal choice, but is only supported
 118            starting with gas 2.16. */
 119         __asm__ __volatile__("fxsaveq %0"
 120                              : "=m" (tsk->thread.i387.fxsave));
 121 #elif 0
 122         /* Using, as a workaround, the properly prefixed form below isn't
 123            accepted by any binutils version so far released, complaining that
 124            the same type of prefix is used twice if an extended register is
 125            needed for addressing (fix submitted to mainline 2005-11-21). */
 126         __asm__ __volatile__("rex64/fxsave %0"
 127                              : "=m" (tsk->thread.i387.fxsave));
 128 #else
 129         /* This, however, we can work around by forcing the compiler to select
 130            an addressing mode that doesn't require extended registers. */
 131         __asm__ __volatile__("rex64/fxsave %P2(%1)"
 132                              : "=m" (tsk->thread.i387.fxsave)
 133                              : "cdaSDb" (tsk),
 134                                 "i" (offsetof(__typeof__(*tsk),
 135                                               thread.i387.fxsave)));
 136 #endif
 137         clear_fpu_state(&tsk->thread.i387.fxsave);
 138         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 139 }
 140
 141 /*
 142  * Signal frame handlers.
 143  */
 144
 145 static inline int save_i387(struct _fpstate __user *buf)
 146 {
 147         struct task_struct *tsk = current;
 148         int err = 0;
 149
 150         BUILD_BUG_ON(sizeof(struct user_i387_struct) !=
 151                         sizeof(tsk->thread.i387.fxsave));
 152
 153         if ((unsigned long)buf % 16)
 154                 printk("save_i387: bad fpstate %p\n", buf);
 155
 156         if (!used_math())
 157                 return 0;
 158         clear_used_math(); /* trigger finit */
 159         if (task_thread_info(tsk)->status & TS_USEDFPU) {
 160                 err = save_i387_checking((struct i387_fxsave_struct __user *)buf);
 161                 if (err) return err;
 162                 task_thread_info(tsk)->status &= ~TS_USEDFPU;
 163                 stts();
 164         } else {
 165                 if (__copy_to_user(buf, &tsk->thread.i387.fxsave,
 166                                    sizeof(struct i387_fxsave_struct)))
 167                         return -1;
 168         }
 169         return 1;
 170 }
 171
 172 /*
 173  * This restores directly out of user space. Exceptions are handled.
 174  */
 175 static inline int restore_i387(struct _fpstate __user *buf)
 176 {
 177         set_used_math();
 178         if (!(task_thread_info(current)->status & TS_USEDFPU)) {
 179                 clts();
 180                 task_thread_info(current)->status |= TS_USEDFPU;
 181         }
 182         return restore_fpu_checking((__force struct i387_fxsave_struct *)buf);
 183 }
 184
 185 #else  /* CONFIG_X86_32 */
 186
 187 static inline void tolerant_fwait(void)
 188 {
 189         asm volatile("fnclex ; fwait");
 190 }
 191
 192 static inline void restore_fpu(struct task_struct *tsk)
 193 {
 194         /*
 195          * The "nop" is needed to make the instructions the same
 196          * length.
 197          */
 198         alternative_input(
 199                 "nop ; frstor %1",
 200                 "fxrstor %1",
 201                 X86_FEATURE_FXSR,
 202                 "m" ((tsk)->thread.i387.fxsave));
 203 }
 204
 205 /* We need a safe address that is cheap to find and that is already
 206    in L1 during context switch. The best choices are unfortunately
 207    different for UP and SMP */
 208 #ifdef CONFIG_SMP
 209 #define safe_address (__per_cpu_offset[0])
 210 #else
 211 #define safe_address (kstat_cpu(0).cpustat.user)
 212 #endif
 213
 214 /*
 215  * These must be called with preempt disabled
 216  */
 217 static inline void __save_init_fpu(struct task_struct *tsk)
 218 {
 219         /* Use more nops than strictly needed in case the compiler
 220            varies code */
 221         alternative_input(
 222                 "fnsave %[fx] ;fwait;" GENERIC_NOP8 GENERIC_NOP4,
 223                 "fxsave %[fx]\n"
 224                 "bt $7,%[fsw] ; jnc 1f ; fnclex\n1:",
 225                 X86_FEATURE_FXSR,
 226                 [fx] "m" (tsk->thread.i387.fxsave),
 227                 [fsw] "m" (tsk->thread.i387.fxsave.swd) : "memory");
 228         /* AMD K7/K8 CPUs don't save/restore FDP/FIP/FOP unless an exception
 229            is pending.  Clear the x87 state here by setting it to fixed
 230            values. safe_address is a random variable that should be in L1 */
 231         alternative_input(
 232                 GENERIC_NOP8 GENERIC_NOP2,
 233                 "emms\n\t"              /* clear stack tags */
 234                 "fildl %[addr]",        /* set F?P to defined value */
 235                 X86_FEATURE_FXSAVE_LEAK,
 236                 [addr] "m" (safe_address));
 237         task_thread_info(tsk)->status &= ~TS_USEDFPU;
 238 }
 239
 240 /*
 241  * Signal frame handlers...
 242  */
 243 extern int save_i387(struct _fpstate __user *buf);
 244 extern int restore_i387(struct _fpstate __user *buf);
 245
 246 #endif  /* CONFIG_X86_64 */
 247
 248 static inline void __unlazy_fpu(struct task_struct *tsk)
 249 {
 250         if (task_thread_info(tsk)->status & TS_USEDFPU) {
 251                 __save_init_fpu(tsk);
 252                 stts();
 253         } else
 254                 tsk->fpu_counter = 0;
 255 }
 256
 257 static inline void __clear_fpu(struct task_struct *tsk)
 258 {
 259         if (task_thread_info(tsk)->status & TS_USEDFPU) {
 260                 tolerant_fwait();
 261                 task_thread_info(tsk)->status &= ~TS_USEDFPU;
 262                 stts();
 263         }
 264 }
 265
 266 static inline void kernel_fpu_begin(void)
 267 {
 268         struct thread_info *me = current_thread_info();
 269         preempt_disable();
 270         if (me->status & TS_USEDFPU)
 271                 __save_init_fpu(me->task);
 272         else
 273                 clts();
 274 }
 275
 276 static inline void kernel_fpu_end(void)
 277 {
 278         stts();
 279         preempt_enable();
 280 }
 281
 282 #ifdef CONFIG_X86_64
 283
 284 static inline void save_init_fpu(struct task_struct *tsk)
 285 {
 286         __save_init_fpu(tsk);
 287         stts();
 288 }
 289
 290 #define unlazy_fpu      __unlazy_fpu
 291 #define clear_fpu       __clear_fpu
 292
 293 #else  /* CONFIG_X86_32 */
 294
 295 /*
 296  * These disable preemption on their own and are safe
 297  */
 298 static inline void save_init_fpu(struct task_struct *tsk)
 299 {
 300         preempt_disable();
 301         __save_init_fpu(tsk);
 302         stts();
 303         preempt_enable();
 304 }
 305
 306 static inline void unlazy_fpu(struct task_struct *tsk)
 307 {
 308         preempt_disable();
 309         __unlazy_fpu(tsk);
 310         preempt_enable();
 311 }
 312
 313 static inline void clear_fpu(struct task_struct *tsk)
 314 {
 315         preempt_disable();
 316         __clear_fpu(tsk);
 317         preempt_enable();
 318 }
 319
 320 #endif  /* CONFIG_X86_64 */
 321
 322 /*
 323  * i387 state interaction
 324  */
 325 static inline unsigned short get_fpu_cwd(struct task_struct *tsk)
 326 {
 327         if (cpu_has_fxsr) {
 328                 return tsk->thread.i387.fxsave.cwd;
 329         } else {
 330                 return (unsigned short)tsk->thread.i387.fsave.cwd;
 331         }
 332 }
 333
 334 static inline unsigned short get_fpu_swd(struct task_struct *tsk)
 335 {
 336         if (cpu_has_fxsr) {
 337                 return tsk->thread.i387.fxsave.swd;
 338         } else {
 339                 return (unsigned short)tsk->thread.i387.fsave.swd;
 340         }
 341 }
 342
 343 static inline unsigned short get_fpu_mxcsr(struct task_struct *tsk)
 344 {
 345         if (cpu_has_xmm) {
 346                 return tsk->thread.i387.fxsave.mxcsr;
 347         } else {
 348                 return MXCSR_DEFAULT;
 349         }
 350 }
 351
 352 #endif  /* _ASM_X86_I387_H */