include/asm-arm/plat-s3c24xx/irq.h

   1 /* linux/include/asm-arm/plat-s3c24xx/irq.h
   2  *
   3  * Copyright (c) 2004-2005 Simtec Electronics
   4  *      Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Header file for S3C24XX CPU IRQ support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #define irqdbf(x...)
  14 #define irqdbf2(x...)
  15
  16 #define EXTINT_OFF (IRQ_EINT4 - 4)
  17
  18 /* these are exported for arch/arm/mach-* usage */
  19 extern struct irq_chip s3c_irq_level_chip;
  20 extern struct irq_chip s3c_irq_chip;
  21
  22 static inline void
  23 s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit,
  24                 int subcheck)
  25 {
  26         unsigned long mask;
  27         unsigned long submask;
  28
  29         submask = __raw_readl(S3C2410_INTSUBMSK);
  30         mask = __raw_readl(S3C2410_INTMSK);
  31
  32         submask |= (1UL << (irqno - IRQ_S3CUART_RX0));
  33
  34         /* check to see if we need to mask the parent IRQ */
  35
  36         if ((submask  & subcheck) == subcheck) {
  37                 __raw_writel(mask | parentbit, S3C2410_INTMSK);
  38         }
  39
  40         /* write back masks */
  41         __raw_writel(submask, S3C2410_INTSUBMSK);
  42
  43 }
  44
  45 static inline void
  46 s3c_irqsub_unmask(unsigned int irqno, unsigned int parentbit)
  47 {
  48         unsigned long mask;
  49         unsigned long submask;
  50
  51         submask = __raw_readl(S3C2410_INTSUBMSK);
  52         mask = __raw_readl(S3C2410_INTMSK);
  53
  54         submask &= ~(1UL << (irqno - IRQ_S3CUART_RX0));
  55         mask &= ~parentbit;
  56
  57         /* write back masks */
  58         __raw_writel(submask, S3C2410_INTSUBMSK);
  59         __raw_writel(mask, S3C2410_INTMSK);
  60 }
  61
  62
  63 static inline void
  64 s3c_irqsub_maskack(unsigned int irqno, unsigned int parentmask, unsigned int group)
  65 {
  66         unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  67
  68         s3c_irqsub_mask(irqno, parentmask, group);
  69
  70         __raw_writel(bit, S3C2410_SUBSRCPND);
  71
  72         /* only ack parent if we've got all the irqs (seems we must
  73          * ack, all and hope that the irq system retriggers ok when
  74          * the interrupt goes off again)
  75          */
  76
  77         if (1) {
  78                 __raw_writel(parentmask, S3C2410_SRCPND);
  79                 __raw_writel(parentmask, S3C2410_INTPND);
  80         }
  81 }
  82
  83 static inline void
  84 s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group)
  85 {
  86         unsigned int bit = 1UL << (irqno - IRQ_S3CUART_RX0);
  87
  88         __raw_writel(bit, S3C2410_SUBSRCPND);
  89
  90         /* only ack parent if we've got all the irqs (seems we must
  91          * ack, all and hope that the irq system retriggers ok when
  92          * the interrupt goes off again)
  93          */
  94
  95         if (1) {
  96                 __raw_writel(parentmask, S3C2410_SRCPND);
  97                 __raw_writel(parentmask, S3C2410_INTPND);
  98         }
  99 }
 100
 101 /* exported for use in arch/arm/mach-s3c2410 */
 102
 103 #ifdef CONFIG_PM
 104 extern int s3c_irq_wake(unsigned int irqno, unsigned int state);
 105 #else
 106 #define s3c_irq_wake NULL
 107 #endif
 108
 109 extern int s3c_irqext_type(unsigned int irq, unsigned int type);