drivers/staging/sep/sep_driver_config.h

   1 /*
   2  *
   3  *  sep_driver_config.h - Security Processor Driver configuration
   4  *
   5  *  Copyright(c) 2009 Intel Corporation. All rights reserved.
   6  *  Copyright(c) 2009 Discretix. All rights reserved.
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License as published by the Free
  10  *  Software Foundation; either version 2 of the License, or (at your option)
  11  *  any later version.
  12  *
  13  *  This program is distributed in the hope that it will be useful, but WITHOUT
  14  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  16  *  more details.
  17  *
  18  *  You should have received a copy of the GNU General Public License along with
  19  *  this program; if not, write to the Free Software Foundation, Inc., 59
  20  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  21  *
  22  *  CONTACTS:
  23  *
  24  *  Mark Allyn          mark.a.allyn@intel.com
  25  *
  26  *  CHANGES:
  27  *
  28  *  2009.06.26  Initial publish
  29  *
  30  */
  31
  32 #ifndef __SEP_DRIVER_CONFIG_H__
  33 #define __SEP_DRIVER_CONFIG_H__
  34
  35
  36 /*--------------------------------------
  37   DRIVER CONFIGURATION FLAGS
  38   -------------------------------------*/
  39
  40 /* if flag is on , then the driver is running in polling and
  41         not interrupt mode */
  42 #define SEP_DRIVER_POLLING_MODE                         1
  43
  44 /* flag which defines if the shared area address should be
  45         reconfiged (send to SEP anew) during init of the driver */
  46 #define SEP_DRIVER_RECONFIG_MESSAGE_AREA                0
  47
  48 /* the mode for running on the ARM1172 Evaluation platform (flag is 1) */
  49 #define SEP_DRIVER_ARM_DEBUG_MODE                       0
  50
  51 /*-------------------------------------------
  52         INTERNAL DATA CONFIGURATION
  53         -------------------------------------------*/
  54
  55 /* flag for the input array */
  56 #define SEP_DRIVER_IN_FLAG                              0
  57
  58 /* flag for output array */
  59 #define SEP_DRIVER_OUT_FLAG                             1
  60
  61 /* maximum number of entries in one LLI tables */
  62 #define SEP_DRIVER_ENTRIES_PER_TABLE_IN_SEP             8
  63
  64
  65 /*--------------------------------------------------------
  66         SHARED AREA  memory total size is 36K
  67         it is divided is following:
  68
  69         SHARED_MESSAGE_AREA                     8K         }
  70                                                                         }
  71         STATIC_POOL_AREA                        4K         } MAPPED AREA ( 24 K)
  72                                                                         }
  73         DATA_POOL_AREA                          12K        }
  74
  75         SYNCHRONIC_DMA_TABLES_AREA              5K
  76
  77         FLOW_DMA_TABLES_AREA                    4K
  78
  79         SYSTEM_MEMORY_AREA                      3k
  80
  81         SYSTEM_MEMORY total size is 3k
  82         it is divided as following:
  83
  84         TIME_MEMORY_AREA                     8B
  85 -----------------------------------------------------------*/
  86
  87
  88
  89 /*
  90         the maximum length of the message - the rest of the message shared
  91         area will be dedicated to the dma lli tables
  92 */
  93 #define SEP_DRIVER_MAX_MESSAGE_SIZE_IN_BYTES                  (8 * 1024)
  94
  95 /* the size of the message shared area in pages */
  96 #define SEP_DRIVER_MESSAGE_SHARED_AREA_SIZE_IN_BYTES          (8 * 1024)
  97
  98 /* the size of the data pool static area in pages */
  99 #define SEP_DRIVER_STATIC_AREA_SIZE_IN_BYTES                  (4 * 1024)
 100
 101 /* the size of the data pool shared area size in pages */
 102 #define SEP_DRIVER_DATA_POOL_SHARED_AREA_SIZE_IN_BYTES        (12 * 1024)
 103
 104 /* the size of the message shared area in pages */
 105 #define SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_SIZE_IN_BYTES   (1024 * 5)
 106
 107
 108 /* the size of the data pool shared area size in pages */
 109 #define SEP_DRIVER_FLOW_DMA_TABLES_AREA_SIZE_IN_BYTES         (1024 * 4)
 110
 111 /* system data (time, caller id etc') pool */
 112 #define SEP_DRIVER_SYSTEM_DATA_MEMORY_SIZE_IN_BYTES           100
 113
 114
 115 /* area size that is mapped  - we map the MESSAGE AREA, STATIC POOL and
 116         DATA POOL areas. area must be module 4k */
 117 #define SEP_DRIVER_MMMAP_AREA_SIZE                            (1024 * 24)
 118
 119
 120 /*-----------------------------------------------
 121         offsets of the areas starting from the shared area start address
 122 */
 123
 124 /* message area offset */
 125 #define SEP_DRIVER_MESSAGE_AREA_OFFSET_IN_BYTES               0
 126
 127 /* static pool area offset */
 128 #define SEP_DRIVER_STATIC_AREA_OFFSET_IN_BYTES \
 129                 (SEP_DRIVER_MESSAGE_SHARED_AREA_SIZE_IN_BYTES)
 130
 131 /* data pool area offset */
 132 #define SEP_DRIVER_DATA_POOL_AREA_OFFSET_IN_BYTES \
 133         (SEP_DRIVER_STATIC_AREA_OFFSET_IN_BYTES + \
 134         SEP_DRIVER_STATIC_AREA_SIZE_IN_BYTES)
 135
 136 /* synhronic dma tables area offset */
 137 #define SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_OFFSET_IN_BYTES \
 138         (SEP_DRIVER_DATA_POOL_AREA_OFFSET_IN_BYTES + \
 139         SEP_DRIVER_DATA_POOL_SHARED_AREA_SIZE_IN_BYTES)
 140
 141 /* sep driver flow dma tables area offset */
 142 #define SEP_DRIVER_FLOW_DMA_TABLES_AREA_OFFSET_IN_BYTES \
 143         (SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_OFFSET_IN_BYTES + \
 144         SEP_DRIVER_SYNCHRONIC_DMA_TABLES_AREA_SIZE_IN_BYTES)
 145
 146 /* system memory offset in bytes */
 147 #define SEP_DRIVER_SYSTEM_DATA_MEMORY_OFFSET_IN_BYTES \
 148         (SEP_DRIVER_FLOW_DMA_TABLES_AREA_OFFSET_IN_BYTES + \
 149         SEP_DRIVER_FLOW_DMA_TABLES_AREA_SIZE_IN_BYTES)
 150
 151 /* offset of the time area */
 152 #define SEP_DRIVER_SYSTEM_TIME_MEMORY_OFFSET_IN_BYTES \
 153         (SEP_DRIVER_SYSTEM_DATA_MEMORY_OFFSET_IN_BYTES)
 154
 155
 156
 157 /* start physical address of the SEP registers memory in HOST */
 158 #define SEP_IO_MEM_REGION_START_ADDRESS                       0x80000000
 159
 160 /* size of the SEP registers memory region  in HOST (for now 100 registers) */
 161 #define SEP_IO_MEM_REGION_SIZE                                (2 * 0x100000)
 162
 163 /* define the number of IRQ for SEP interrupts */
 164 #define SEP_DIRVER_IRQ_NUM                                    1
 165
 166 /* maximum number of add buffers */
 167 #define SEP_MAX_NUM_ADD_BUFFERS                               100
 168
 169 /* number of flows */
 170 #define SEP_DRIVER_NUM_FLOWS                                  4
 171
 172 /* maximum number of entries in flow table */
 173 #define SEP_DRIVER_MAX_FLOW_NUM_ENTRIES_IN_TABLE              25
 174
 175 /* offset of the num entries in the block length entry of the LLI */
 176 #define SEP_NUM_ENTRIES_OFFSET_IN_BITS                        24
 177
 178 /* offset of the interrupt flag in the block length entry of the LLI */
 179 #define SEP_INT_FLAG_OFFSET_IN_BITS                           31
 180
 181 /* mask for extracting data size from LLI */
 182 #define SEP_TABLE_DATA_SIZE_MASK                              0xFFFFFF
 183
 184 /* mask for entries after being shifted left */
 185 #define SEP_NUM_ENTRIES_MASK                                  0x7F
 186
 187 /* default flow id */
 188 #define SEP_FREE_FLOW_ID                                      0xFFFFFFFF
 189
 190 /* temp flow id used during cretiong of new flow until receiving
 191         real flow id from sep */
 192 #define SEP_TEMP_FLOW_ID                   (SEP_DRIVER_NUM_FLOWS + 1)
 193
 194 /* maximum add buffers message length in bytes */
 195 #define SEP_MAX_ADD_MESSAGE_LENGTH_IN_BYTES                   (7 * 4)
 196
 197 /* maximum number of concurrent virtual buffers */
 198 #define SEP_MAX_VIRT_BUFFERS_CONCURRENT                       100
 199
 200 /* the token that defines the start of time address */
 201 #define SEP_TIME_VAL_TOKEN                                    0x12345678
 202 /* DEBUG LEVEL MASKS */
 203 #define SEP_DEBUG_LEVEL_BASIC       0x1
 204
 205 #define SEP_DEBUG_LEVEL_REGISTERS   0x2
 206
 207 #define SEP_DEBUG_LEVEL_EXTENDED    0x4
 208
 209
 210 /* FUNCTIONAL MACROS */
 211
 212 /* debug macro without paramaters */
 213 #define DEBUG_PRINT_0(DEBUG_LEVEL , info) \
 214 do { \
 215         if (DEBUG_LEVEL & sepDebug) \
 216                 printk(KERN_WARNING info); \
 217 } while (0)
 218
 219 /* debug macro with 1 paramater */
 220 #define DEBUG_PRINT_1(DEBUG_LEVEL , info , param1) \
 221 do { \
 222         if (DEBUG_LEVEL & sepDebug) \
 223                 printk(KERN_WARNING info, param1); \
 224 } while (0)
 225
 226 /* debug macro with 2 paramaters */
 227 #define DEBUG_PRINT_2(DEBUG_LEVEL, info, param1, param2) \
 228 do { \
 229         if (DEBUG_LEVEL & sepDebug) \
 230                 printk(KERN_WARNING info , param1, param2); \
 231 } while (0)
 232
 233 /* debug macro with 3 paramaters */
 234 #define DEBUG_PRINT_3(DEBUG_LEVEL, info, param1, param2, param3) \
 235 do { \
 236         if (DEBUG_LEVEL & sepDebug) \
 237                 printk(KERN_WARNING info , param1, param2 , param3); \
 238 } while (0)
 239
 240 /* debug macro with 4 paramaters */
 241 #define DEBUG_PRINT_4(DEBUG_LEVEL, info, param1, param2, param3, param4) \
 242 do { \
 243         if (DEBUG_LEVEL & sepDebug) \
 244                 printk(KERN_WARNING info, param1, param2, param3, param4); \
 245 } while (0)
 246
 247 #if 0
 248 /* write register macro with option for debug print */
 249 #define SEP_WRITE_REGISTER(address, value) \
 250 do { \
 251         if (sepDebug & SEP_DEBUG_LEVEL_REGISTERS) \
 252                 printk(KERN_WARNING "Write Register: address %lu value %lu\n", \
 253                 (unsigned long)(address), (unsigned long)(value)); \
 254         writel((value), (void *)(address)); \
 255 } while (0)
 256
 257 /* read register macro with option for debug print */
 258 #define SEP_READ_REGISTER(address , value) \
 259 do { \
 260         (value) = readl((void *)(address)); \
 261         if (sepDebug & SEP_DEBUG_LEVEL_REGISTERS) \
 262                 printk(KERN_WARNING "Read Register: address %lu value %lu\n", \
 263                 (address), (value)); \
 264 } while (0)
 265 #else
 266
 267 #if 1
 268
 269 #define SEP_WRITE_REGISTER(address, value)  writel((value), (void *)(address))
 270 #define SEP_READ_REGISTER(address, value)  (value) = readl((void *)(address))
 271 #endif
 272
 273 #endif
 274
 275 #if 0
 276 #define SEP_WRITE_ROM(address, value)  writel((value), (void *)(address))
 277
 278 #define SEP_WRITE_REGISTER(address, value) \
 279 do { \
 280         unsigned long i; \
 281         for (i = 0; i < 1000; i++); \
 282                 writel((value), (void *)(address)); \
 283 } while (0)
 284
 285
 286 #define SEP_READ_REGISTER(address , value) \
 287 do { \
 288         unsigned long i; \
 289         for (i = 0; i < 1000; i++); \
 290                 (value) = readl((void *) (address)); \
 291 } while (0)
 292
 293 #endif
 294
 295 /* wait for SRAM write complete(indirect write */
 296 #define SEP_WAIT_SRAM_WRITE_COMPLETE() \
 297 do { \
 298         unsigned long  reg_val; \
 299         do { \
 300                 SEP_READ_REGISTER(sep_dev->reg_base_address + \
 301                 HW_SRAM_DATA_READY_REG_ADDR, (reg_val)); \
 302         } while (!(reg_val & 0x1)); \
 303 } while (0)
 304
 305 #endif