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Staging: SLICOSS: remove duplicated #include's
[linux-2.6/mini2440.git] / drivers / staging / slicoss / slicoss.c
blob69f3ea2419bbc2bbbe54ea801dda019e2d13a101
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57 #include <linux/version.h>
58
59 #define SLIC_DUMP_ENABLED 0
60 #define KLUDGE_FOR_4GB_BOUNDARY 1
61 #define DEBUG_MICROCODE 1
62 #define SLIC_PRODUCTION_BUILD 1
63 #define SLIC_FAILURE_RESET 1
64 #define DBG 1
65 #define SLIC_ASSERT_ENABLED 1
66 #define SLIC_GET_STATS_ENABLED 1
67 #define SLIC_GET_STATS_TIMER_ENABLED 0
68 #define SLIC_PING_TIMER_ENABLED 1
69 #define SLIC_POWER_MANAGEMENT_ENABLED 0
70 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
71 #define LINUX_FREES_ADAPTER_RESOURCES 1
72 #define SLIC_OFFLOAD_IP_CHECKSUM 1
73 #define STATS_TIMER_INTERVAL 2
74 #define PING_TIMER_INTERVAL 1
75
76 #include <linux/kernel.h>
77 #include <linux/string.h>
78 #include <linux/errno.h>
79 #include <linux/ioport.h>
80 #include <linux/slab.h>
81 #include <linux/interrupt.h>
82 #include <linux/timer.h>
83 #include <linux/pci.h>
84 #include <linux/spinlock.h>
85 #include <linux/init.h>
86 #include <linux/bitops.h>
87 #include <linux/io.h>
88 #include <linux/netdevice.h>
89 #include <linux/etherdevice.h>
90 #include <linux/skbuff.h>
91 #include <linux/delay.h>
92 #include <linux/debugfs.h>
93 #include <linux/seq_file.h>
94 #include <linux/kthread.h>
95 #include <linux/module.h>
96 #include <linux/moduleparam.h>
97
98 #include <linux/types.h>
99 #include <linux/dma-mapping.h>
100 #include <linux/mii.h>
101 #include <linux/if_vlan.h>
102 #include <asm/unaligned.h>
103
104 #include <linux/ethtool.h>
105 #define SLIC_ETHTOOL_SUPPORT 1
106
107 #include <linux/uaccess.h>
108 #include "slicinc.h"
109 #include "gbdownload.h"
110 #include "gbrcvucode.h"
111 #include "oasisrcvucode.h"
112
113 #ifdef DEBUG_MICROCODE
114 #include "oasisdbgdownload.h"
115 #else
116 #include "oasisdownload.h"
117 #endif
118
119 #if SLIC_DUMP_ENABLED
120 #include "slicdump.h"
121 #endif
122
123 #define SLIC_POWER_MANAGEMENT 0
124
125 static uint slic_first_init = 1;
126 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
127 "and Storage Accelerator (Non-Accelerated)\n";
128
129 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
130 static char *slic_product_name = "SLIC Technology(tm) Server "\
131 "and Storage Accelerator (Non-Accelerated)";
132 static char *slic_vendor = "Alacritech, Inc.";
133
134 static int slic_debug = 1;
135 static int debug = -1;
136 static struct net_device *head_netdevice;
137
138 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
139 static int intagg_delay = 100;
140 static u32 dynamic_intagg;
141 static int errormsg;
142 static int goodmsg;
143 static unsigned int rcv_count;
144 static struct dentry *slic_debugfs;
145
146 #define DRV_NAME "slicoss"
147 #define DRV_VERSION "2.0.1"
148 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
149 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
150 "Non-Accelerated Driver"
151 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
152 "All rights reserved."
153 #define PFX DRV_NAME " "
154
155 MODULE_AUTHOR(DRV_AUTHOR);
156 MODULE_DESCRIPTION(DRV_DESCRIPTION);
157 MODULE_LICENSE("Dual BSD/GPL");
158
159 module_param(dynamic_intagg, int, 0);
160 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
161 module_param(intagg_delay, int, 0);
162 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
163
164 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
165 {PCI_VENDOR_ID_ALACRITECH,
166 SLIC_1GB_DEVICE_ID,
167 PCI_ANY_ID, PCI_ANY_ID,},
168 {PCI_VENDOR_ID_ALACRITECH,
169 SLIC_2GB_DEVICE_ID,
170 PCI_ANY_ID, PCI_ANY_ID,},
171 {0,}
172 };
173
174 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
175
176 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
177 { \
178 spin_lock_irqsave(&_adapter->handle_lock.lock, \
179 _adapter->handle_lock.flags); \
180 _pslic_handle = _adapter->pfree_slic_handles; \
181 if (_pslic_handle) { \
182 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
183 _adapter->pfree_slic_handles = _pslic_handle->next; \
184 } \
185 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
186 _adapter->handle_lock.flags); \
187 }
188
189 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
190 { \
191 _pslic_handle->type = SLIC_HANDLE_FREE; \
192 spin_lock_irqsave(&_adapter->handle_lock.lock, \
193 _adapter->handle_lock.flags); \
194 _pslic_handle->next = _adapter->pfree_slic_handles; \
195 _adapter->pfree_slic_handles = _pslic_handle; \
196 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
197 _adapter->handle_lock.flags); \
198 }
199
200 static void slic_debug_init(void);
201 static void slic_debug_cleanup(void);
202 static void slic_debug_adapter_create(struct adapter *adapter);
203 static void slic_debug_adapter_destroy(struct adapter *adapter);
204 static void slic_debug_card_create(struct sliccard *card);
205 static void slic_debug_card_destroy(struct sliccard *card);
206
207 static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush)
208 {
209 writel(value, reg);
210 if (flush)
211 mb();
212 }
213
214 static inline void slic_reg64_write(struct adapter *adapter,
215 void __iomem *reg,
216 u32 value,
217 void __iomem *regh, u32 paddrh, uint flush)
218 {
219 spin_lock_irqsave(&adapter->bit64reglock.lock,
220 adapter->bit64reglock.flags);
221 if (paddrh != adapter->curaddrupper) {
222 adapter->curaddrupper = paddrh;
223 writel(paddrh, regh);
224 }
225 writel(value, reg);
226 if (flush)
227 mb();
228 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
229 adapter->bit64reglock.flags);
230 }
231
232 static void slic_init_driver(void)
233 {
234 if (slic_first_init) {
235 DBG_MSG("slicoss: %s slic_first_init set jiffies[%lx]\n",
236 __func__, jiffies);
237 slic_first_init = 0;
238 spin_lock_init(&slic_global.driver_lock.lock);
239 slic_debug_init();
240 }
241 }
242
243 static void slic_dbg_macaddrs(struct adapter *adapter)
244 {
245 DBG_MSG(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
246 adapter->netdev->name, adapter->currmacaddr[0],
247 adapter->currmacaddr[1], adapter->currmacaddr[2],
248 adapter->currmacaddr[3], adapter->currmacaddr[4],
249 adapter->currmacaddr[5]);
250 DBG_MSG(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
251 adapter->netdev->name, adapter->macaddr[0],
252 adapter->macaddr[1], adapter->macaddr[2],
253 adapter->macaddr[3], adapter->macaddr[4], adapter->macaddr[5]);
254 return;
255 }
256
257 #ifdef DEBUG_REGISTER_TRACE
258 static void slic_dbg_register_trace(struct adapter *adapter,
259 struct sliccard *card)
260 {
261 uint i;
262
263 DBG_ERROR("Dump Register Write Trace: curr_ix == %d\n", card->debug_ix);
264 for (i = 0; i < 32; i++) {
265 DBG_ERROR("%2d %d %4x %x %x\n",
266 i, card->reg_type[i], card->reg_offset[i],
267 card->reg_value[i], card->reg_valueh[i]);
268 }
269 }
270 #endif
271
272 static void slic_init_adapter(struct net_device *netdev,
273 struct pci_dev *pcidev,
274 const struct pci_device_id *pci_tbl_entry,
275 void __iomem *memaddr, int chip_idx)
276 {
277 ushort index;
278 struct slic_handle *pslic_handle;
279 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
280 /*
281 DBG_MSG("slicoss: %s (%s)\n netdev [%p]\n adapter[%p]\n "
282 "pcidev [%p]\n", __func__, netdev->name, netdev, adapter, pcidev);*/
283 /* adapter->pcidev = pcidev;*/
284 adapter->vendid = pci_tbl_entry->vendor;
285 adapter->devid = pci_tbl_entry->device;
286 adapter->subsysid = pci_tbl_entry->subdevice;
287 adapter->busnumber = pcidev->bus->number;
288 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
289 adapter->functionnumber = (pcidev->devfn & 0x7);
290 adapter->memorylength = pci_resource_len(pcidev, 0);
291 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
292 adapter->irq = pcidev->irq;
293 /* adapter->netdev = netdev;*/
294 adapter->next_netdevice = head_netdevice;
295 head_netdevice = netdev;
296 adapter->chipid = chip_idx;
297 adapter->port = 0; /*adapter->functionnumber;*/
298 adapter->cardindex = adapter->port;
299 adapter->memorybase = memaddr;
300 spin_lock_init(&adapter->upr_lock.lock);
301 spin_lock_init(&adapter->bit64reglock.lock);
302 spin_lock_init(&adapter->adapter_lock.lock);
303 spin_lock_init(&adapter->reset_lock.lock);
304 spin_lock_init(&adapter->handle_lock.lock);
305
306 adapter->card_size = 1;
307 /*
308 Initialize slic_handle array
309 */
310 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
311 /*
312 Start with 1. 0 is an invalid host handle.
313 */
314 for (index = 1, pslic_handle = &adapter->slic_handles[1];
315 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
316
317 pslic_handle->token.handle_index = index;
318 pslic_handle->type = SLIC_HANDLE_FREE;
319 pslic_handle->next = adapter->pfree_slic_handles;
320 adapter->pfree_slic_handles = pslic_handle;
321 }
322 /*
323 DBG_MSG(".........\nix[%d] phandle[%p] pfree[%p] next[%p]\n",
324 index, pslic_handle, adapter->pfree_slic_handles, pslic_handle->next);*/
325 adapter->pshmem = (struct slic_shmem *)
326 pci_alloc_consistent(adapter->pcidev,
327 sizeof(struct slic_shmem *),
328 &adapter->
329 phys_shmem);
330 /*
331 DBG_MSG("slicoss: %s (%s)\n pshmem [%p]\n phys_shmem[%p]\n"\
332 "slic_regs [%p]\n", __func__, netdev->name, adapter->pshmem,
333 (void *)adapter->phys_shmem, adapter->slic_regs);
334 */
335 ASSERT(adapter->pshmem);
336
337 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
338
339 return;
340 }
341
342 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
343 const struct pci_device_id *pci_tbl_entry)
344 {
345 static int cards_found;
346 static int did_version;
347 int err;
348 struct net_device *netdev;
349 struct adapter *adapter;
350 void __iomem *memmapped_ioaddr = NULL;
351 u32 status = 0;
352 ulong mmio_start = 0;
353 ulong mmio_len = 0;
354 struct sliccard *card = NULL;
355
356 DBG_MSG("slicoss: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n",
357 __func__, jiffies, smp_processor_id());
358
359 slic_global.dynamic_intagg = dynamic_intagg;
360
361 err = pci_enable_device(pcidev);
362
363 DBG_MSG("Call pci_enable_device(%p) status[%x]\n", pcidev, err);
364 if (err)
365 return err;
366
367 if (slic_debug > 0 && did_version++ == 0) {
368 printk(slic_banner);
369 printk(slic_proc_version);
370 }
371
372 err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
373 if (!err) {
374 DBG_MSG("pci_set_dma_mask(DMA_64BIT_MASK) successful\n");
375 } else {
376 err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
377 if (err) {
378 DBG_MSG
379 ("No usable DMA configuration, aborting err[%x]\n",
380 err);
381 return err;
382 }
383 DBG_MSG("pci_set_dma_mask(DMA_32BIT_MASK) successful\n");
384 }
385
386 DBG_MSG("Call pci_request_regions\n");
387
388 err = pci_request_regions(pcidev, DRV_NAME);
389 if (err) {
390 DBG_MSG("pci_request_regions FAILED err[%x]\n", err);
391 return err;
392 }
393
394 DBG_MSG("call pci_set_master\n");
395 pci_set_master(pcidev);
396
397 DBG_MSG("call alloc_etherdev\n");
398 netdev = alloc_etherdev(sizeof(struct adapter));
399 if (!netdev) {
400 err = -ENOMEM;
401 goto err_out_exit_slic_probe;
402 }
403 DBG_MSG("alloc_etherdev for slic netdev[%p]\n", netdev);
404
405 SET_NETDEV_DEV(netdev, &pcidev->dev);
406
407 pci_set_drvdata(pcidev, netdev);
408 adapter = netdev_priv(netdev);
409 adapter->netdev = netdev;
410 adapter->pcidev = pcidev;
411
412 mmio_start = pci_resource_start(pcidev, 0);
413 mmio_len = pci_resource_len(pcidev, 0);
414
415 DBG_MSG("slicoss: call ioremap(mmio_start[%lx], mmio_len[%lx])\n",
416 mmio_start, mmio_len);
417
418 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
419 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
420 DBG_MSG("slicoss: %s MEMMAPPED_IOADDR [%p]\n", __func__,
421 memmapped_ioaddr);
422 if (!memmapped_ioaddr) {
423 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
424 __func__, mmio_len, mmio_start);
425 goto err_out_free_mmio_region;
426 }
427
428 DBG_MSG
429 ("slicoss: %s found Alacritech SLICOSS PCI, MMIO at %p, "\
430 "start[%lx] len[%lx], IRQ %d.\n",
431 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
432
433 slic_config_pci(pcidev);
434
435 slic_init_driver();
436
437 slic_init_adapter(netdev,
438 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
439
440 status = slic_card_locate(adapter);
441 if (status) {
442 DBG_ERROR("%s cannot locate card\n", __func__);
443 goto err_out_free_mmio_region;
444 }
445
446 card = adapter->card;
447
448 if (!adapter->allocated) {
449 card->adapters_allocated++;
450 adapter->allocated = 1;
451 }
452
453 DBG_MSG("slicoss: %s card: %p\n", __func__,
454 adapter->card);
455 DBG_MSG("slicoss: %s card->adapter[%d] == [%p]\n", __func__,
456 (uint) adapter->port, adapter);
457 DBG_MSG("slicoss: %s card->adapters_allocated [%d]\n", __func__,
458 card->adapters_allocated);
459 DBG_MSG("slicoss: %s card->adapters_activated [%d]\n", __func__,
460 card->adapters_activated);
461
462 status = slic_card_init(card, adapter);
463
464 if (status != STATUS_SUCCESS) {
465 card->state = CARD_FAIL;
466 adapter->state = ADAPT_FAIL;
467 adapter->linkstate = LINK_DOWN;
468 DBG_ERROR("slic_card_init FAILED status[%x]\n", status);
469 } else {
470 slic_adapter_set_hwaddr(adapter);
471 }
472
473 netdev->base_addr = (unsigned long)adapter->memorybase;
474 netdev->irq = adapter->irq;
475 netdev->open = slic_entry_open;
476 netdev->stop = slic_entry_halt;
477 netdev->hard_start_xmit = slic_xmit_start;
478 netdev->do_ioctl = slic_ioctl;
479 netdev->set_mac_address = slic_mac_set_address;
480 #if SLIC_GET_STATS_ENABLED
481 netdev->get_stats = slic_get_stats;
482 #endif
483 netdev->set_multicast_list = slic_mcast_set_list;
484
485 slic_debug_adapter_create(adapter);
486
487 strcpy(netdev->name, "eth%d");
488 err = register_netdev(netdev);
489 if (err) {
490 DBG_ERROR("Cannot register net device, aborting.\n");
491 goto err_out_unmap;
492 }
493
494 DBG_MSG
495 ("slicoss: addr 0x%lx, irq %d, MAC addr "\
496 "%02X:%02X:%02X:%02X:%02X:%02X\n",
497 mmio_start, /*pci_resource_start(pcidev, 0), */ pcidev->irq,
498 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
499 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
500
501 cards_found++;
502 DBG_MSG("slicoss: %s EXIT status[%x] jiffies[%lx] cpu %d\n",
503 __func__, status, jiffies, smp_processor_id());
504
505 return status;
506
507 err_out_unmap:
508 iounmap(memmapped_ioaddr);
509
510 err_out_free_mmio_region:
511 release_mem_region(mmio_start, mmio_len);
512
513 err_out_exit_slic_probe:
514 pci_release_regions(pcidev);
515 DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies,
516 smp_processor_id());
517
518 return -ENODEV;
519 }
520
521 static int slic_entry_open(struct net_device *dev)
522 {
523 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
524 struct sliccard *card = adapter->card;
525 u32 locked = 0;
526 int status;
527
528 ASSERT(adapter);
529 ASSERT(card);
530 DBG_MSG
531 ("slicoss: %s adapter->activated[%d] card->adapters[%x] "\
532 "allocd[%x]\n", __func__, adapter->activated,
533 card->adapters_activated,
534 card->adapters_allocated);
535 DBG_MSG
536 ("slicoss: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] "\
537 "port[%d] card[%p]\n",
538 __func__, adapter->netdev->name, jiffies, smp_processor_id(),
539 adapter->netdev, adapter, adapter->port, card);
540
541 netif_stop_queue(adapter->netdev);
542
543 spin_lock_irqsave(&slic_global.driver_lock.lock,
544 slic_global.driver_lock.flags);
545 locked = 1;
546 if (!adapter->activated) {
547 card->adapters_activated++;
548 slic_global.num_slic_ports_active++;
549 adapter->activated = 1;
550 }
551 status = slic_if_init(adapter);
552
553 if (status != STATUS_SUCCESS) {
554 if (adapter->activated) {
555 card->adapters_activated--;
556 slic_global.num_slic_ports_active--;
557 adapter->activated = 0;
558 }
559 if (locked) {
560 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
561 slic_global.driver_lock.flags);
562 locked = 0;
563 }
564 return status;
565 }
566 DBG_MSG("slicoss: %s set card->master[%p] adapter[%p]\n", __func__,
567 card->master, adapter);
568 if (!card->master)
569 card->master = adapter;
570 #if SLIC_DUMP_ENABLED
571 if (!(card->dumpthread_running))
572 init_waitqueue_head(&card->dump_wq);
573 #endif
574
575 if (locked) {
576 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
577 slic_global.driver_lock.flags);
578 locked = 0;
579 }
580 #if SLIC_DUMP_ENABLED
581 if (!(card->dumpthread_running)) {
582 DBG_MSG("attempt to initialize dump thread\n");
583 status = slic_init_dump_thread(card);
584 /*
585 Even if the dump thread fails, we will continue at this point
586 */
587 }
588 #endif
589
590 return STATUS_SUCCESS;
591 }
592
593 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
594 {
595 struct net_device *dev = pci_get_drvdata(pcidev);
596 u32 mmio_start = 0;
597 uint mmio_len = 0;
598 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
599 struct sliccard *card;
600
601 ASSERT(adapter);
602 DBG_MSG("slicoss: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
603 adapter);
604 slic_adapter_freeresources(adapter);
605 slic_unmap_mmio_space(adapter);
606 DBG_MSG("slicoss: %s unregister_netdev\n", __func__);
607 unregister_netdev(dev);
608
609 mmio_start = pci_resource_start(pcidev, 0);
610 mmio_len = pci_resource_len(pcidev, 0);
611
612 DBG_MSG("slicoss: %s rel_region(0) start[%x] len[%x]\n", __func__,
613 mmio_start, mmio_len);
614 release_mem_region(mmio_start, mmio_len);
615
616 DBG_MSG("slicoss: %s iounmap dev->base_addr[%x]\n", __func__,
617 (uint) dev->base_addr);
618 iounmap((void __iomem *)dev->base_addr);
619 ASSERT(adapter->card);
620 card = adapter->card;
621 ASSERT(card->adapters_allocated);
622 card->adapters_allocated--;
623 adapter->allocated = 0;
624 DBG_MSG
625 ("slicoss: %s init[%x] alloc[%x] card[%p] adapter[%p]\n",
626 __func__, card->adapters_activated, card->adapters_allocated,
627 card, adapter);
628 if (!card->adapters_allocated) {
629 struct sliccard *curr_card = slic_global.slic_card;
630 if (curr_card == card) {
631 slic_global.slic_card = card->next;
632 } else {
633 while (curr_card->next != card)
634 curr_card = curr_card->next;
635 ASSERT(curr_card);
636 curr_card->next = card->next;
637 }
638 ASSERT(slic_global.num_slic_cards);
639 slic_global.num_slic_cards--;
640 slic_card_cleanup(card);
641 }
642 DBG_MSG("slicoss: %s deallocate device\n", __func__);
643 kfree(dev);
644 pci_release_regions(pcidev);
645 DBG_MSG("slicoss: %s EXIT\n", __func__);
646 }
647
648 static int slic_entry_halt(struct net_device *dev)
649 {
650 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
651 struct sliccard *card = adapter->card;
652 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
653
654 spin_lock_irqsave(&slic_global.driver_lock.lock,
655 slic_global.driver_lock.flags);
656 ASSERT(card);
657 DBG_MSG("slicoss: %s (%s) ENTER\n", __func__, dev->name);
658 DBG_MSG("slicoss: %s (%s) actvtd[%d] alloc[%d] state[%x] adapt[%p]\n",
659 __func__, dev->name, card->adapters_activated,
660 card->adapters_allocated, card->state, adapter);
661 slic_if_stop_queue(adapter);
662 adapter->state = ADAPT_DOWN;
663 adapter->linkstate = LINK_DOWN;
664 adapter->upr_list = NULL;
665 adapter->upr_busy = 0;
666 adapter->devflags_prev = 0;
667 DBG_MSG("slicoss: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n",
668 __func__, dev->name, adapter, adapter->state);
669 ASSERT(card->adapter[adapter->cardindex] == adapter);
670 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
671 adapter->all_reg_writes++;
672 adapter->icr_reg_writes++;
673 slic_config_clear(adapter);
674 DBG_MSG("slicoss: %s (%s) dev[%p] adapt[%p] card[%p]\n",
675 __func__, dev->name, dev, adapter, card);
676 if (adapter->activated) {
677 card->adapters_activated--;
678 slic_global.num_slic_ports_active--;
679 adapter->activated = 0;
680 }
681 #ifdef AUTOMATIC_RESET
682 WRITE_REG(slic_regs->slic_reset_iface, 0, FLUSH);
683 #endif
684 /*
685 * Reset the adapter's rsp, cmd, and rcv queues
686 */
687 slic_cmdq_reset(adapter);
688 slic_rspqueue_reset(adapter);
689 slic_rcvqueue_reset(adapter);
690
691 #ifdef AUTOMATIC_RESET
692 if (!card->adapters_activated) {
693
694 #if SLIC_DUMP_ENABLED
695 if (card->dumpthread_running) {
696 uint status;
697 DBG_MSG("attempt to terminate dump thread pid[%x]\n",
698 card->dump_task_id);
699 status = kill_proc(card->dump_task_id->pid, SIGKILL, 1);
700
701 if (!status) {
702 int count = 10 * 100;
703 while (card->dumpthread_running && --count) {
704 current->state = TASK_INTERRUPTIBLE;
705 schedule_timeout(1);
706 }
707
708 if (!count) {
709 DBG_MSG
710 ("slicmon thread cleanup FAILED \
711 pid[%x]\n",
712 card->dump_task_id->pid);
713 }
714 }
715 }
716 #endif
717 DBG_MSG("slicoss: %s (%s) initiate CARD_HALT\n", __func__,
718 dev->name);
719
720 slic_card_init(card, adapter);
721 }
722 #endif
723
724 DBG_MSG("slicoss: %s (%s) EXIT\n", __func__, dev->name);
725 DBG_MSG("slicoss: %s EXIT\n", __func__);
726 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
727 slic_global.driver_lock.flags);
728 return STATUS_SUCCESS;
729 }
730
731 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
732 {
733 ASSERT(rq);
734 /*
735 DBG_MSG("slicoss: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);
736 */
737 switch (cmd) {
738 case SIOCSLICSETINTAGG:
739 {
740 struct adapter *adapter = (struct adapter *)
741 netdev_priv(dev);
742 u32 data[7];
743 u32 intagg;
744
745 if (copy_from_user(data, rq->ifr_data, 28)) {
746 DBG_ERROR
747 ("copy_from_user FAILED getting initial \
748 params\n");
749 return -EFAULT;
750 }
751 intagg = data[0];
752 printk(KERN_EMERG
753 "%s: set interrupt aggregation to %d\n",
754 __func__, intagg);
755 slic_intagg_set(adapter, intagg);
756 return 0;
757 }
758 #ifdef SLIC_USER_REQUEST_DUMP_ENABLED
759 case SIOCSLICDUMPCARD:
760 {
761 struct adapter *adapter = (struct adapter *)
762 dev->priv;
763 struct sliccard *card;
764
765 ASSERT(adapter);
766 ASSERT(adapter->card)
767 card = adapter->card;
768
769 DBG_IOCTL("slic_ioctl SIOCSLIC_DUMP_CARD\n");
770
771 if (card->dump_requested == SLIC_DUMP_DONE) {
772 printk(SLICLEVEL
773 "SLIC Card dump to be overwritten\n");
774 card->dump_requested = SLIC_DUMP_REQUESTED;
775 } else if ((card->dump_requested == SLIC_DUMP_REQUESTED)
776 || (card->dump_requested ==
777 SLIC_DUMP_IN_PROGRESS)) {
778 printk(SLICLEVEL
779 "SLIC Card dump Requested but already \
780 in progress... ignore\n");
781 } else {
782 printk(SLICLEVEL
783 "SLIC Card #%d Dump Requested\n",
784 card->cardnum);
785 card->dump_requested = SLIC_DUMP_REQUESTED;
786 }
787 return 0;
788 }
789 #endif
790
791 #ifdef SLIC_TRACE_DUMP_ENABLED
792 case SIOCSLICTRACEDUMP:
793 {
794 ulong data[7];
795 ulong value;
796
797 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
798
799 if (copy_from_user(data, rq->ifr_data, 28)) {
800 PRINT_ERROR
801 ("slic: copy_from_user FAILED getting \
802 initial simba param\n");
803 return -EFAULT;
804 }
805
806 value = data[0];
807 if (tracemon_request == SLIC_DUMP_DONE) {
808 PRINT_ERROR
809 ("ATK Diagnostic Trace Dump Requested\n");
810 tracemon_request = SLIC_DUMP_REQUESTED;
811 tracemon_request_type = value;
812 tracemon_timestamp = jiffies;
813 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
814 (tracemon_request ==
815 SLIC_DUMP_IN_PROGRESS)) {
816 PRINT_ERROR
817 ("ATK Diagnostic Trace Dump Requested but \
818 already in progress... ignore\n");
819 } else {
820 PRINT_ERROR
821 ("ATK Diagnostic Trace Dump Requested\n");
822 tracemon_request = SLIC_DUMP_REQUESTED;
823 tracemon_request_type = value;
824 tracemon_timestamp = jiffies;
825 }
826 return 0;
827 }
828 #endif
829 #if SLIC_ETHTOOL_SUPPORT
830 case SIOCETHTOOL:
831 {
832 struct adapter *adapter = (struct adapter *)
833 netdev_priv(dev);
834 struct ethtool_cmd data;
835 struct ethtool_cmd ecmd;
836
837 ASSERT(adapter);
838 /* DBG_MSG("slicoss: %s SIOCETHTOOL\n", __func__); */
839 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
840 return -EFAULT;
841
842 if (ecmd.cmd == ETHTOOL_GSET) {
843 data.supported =
844 (SUPPORTED_10baseT_Half |
845 SUPPORTED_10baseT_Full |
846 SUPPORTED_100baseT_Half |
847 SUPPORTED_100baseT_Full |
848 SUPPORTED_Autoneg | SUPPORTED_MII);
849 data.port = PORT_MII;
850 data.transceiver = XCVR_INTERNAL;
851 data.phy_address = 0;
852 if (adapter->linkspeed == LINK_100MB)
853 data.speed = SPEED_100;
854 else if (adapter->linkspeed == LINK_10MB)
855 data.speed = SPEED_10;
856 else
857 data.speed = 0;
858
859 if (adapter->linkduplex == LINK_FULLD)
860 data.duplex = DUPLEX_FULL;
861 else
862 data.duplex = DUPLEX_HALF;
863
864 data.autoneg = AUTONEG_ENABLE;
865 data.maxtxpkt = 1;
866 data.maxrxpkt = 1;
867 if (copy_to_user
868 (rq->ifr_data, &data, sizeof(data)))
869 return -EFAULT;
870
871 } else if (ecmd.cmd == ETHTOOL_SSET) {
872 if (!capable(CAP_NET_ADMIN))
873 return -EPERM;
874
875 if (adapter->linkspeed == LINK_100MB)
876 data.speed = SPEED_100;
877 else if (adapter->linkspeed == LINK_10MB)
878 data.speed = SPEED_10;
879 else
880 data.speed = 0;
881
882 if (adapter->linkduplex == LINK_FULLD)
883 data.duplex = DUPLEX_FULL;
884 else
885 data.duplex = DUPLEX_HALF;
886
887 data.autoneg = AUTONEG_ENABLE;
888 data.maxtxpkt = 1;
889 data.maxrxpkt = 1;
890 if ((ecmd.speed != data.speed) ||
891 (ecmd.duplex != data.duplex)) {
892 u32 speed;
893 u32 duplex;
894
895 if (ecmd.speed == SPEED_10) {
896 speed = 0;
897 SLIC_DISPLAY
898 ("%s: slic ETHTOOL set \
899 link speed==10MB",
900 dev->name);
901 } else {
902 speed = PCR_SPEED_100;
903 SLIC_DISPLAY
904 ("%s: slic ETHTOOL set \
905 link speed==100MB",
906 dev->name);
907 }
908 if (ecmd.duplex == DUPLEX_FULL) {
909 duplex = PCR_DUPLEX_FULL;
910 SLIC_DISPLAY
911 (": duplex==FULL\n");
912 } else {
913 duplex = 0;
914 SLIC_DISPLAY
915 (": duplex==HALF\n");
916 }
917 slic_link_config(adapter,
918 speed, duplex);
919 slic_link_event_handler(adapter);
920 }
921 }
922 return 0;
923 }
924 #endif
925 default:
926 /* DBG_MSG("slicoss: %s UNSUPPORTED[%x]\n", __func__, cmd); */
927 return -EOPNOTSUPP;
928 }
929 }
930
931 #define XMIT_FAIL_LINK_STATE 1
932 #define XMIT_FAIL_ZERO_LENGTH 2
933 #define XMIT_FAIL_HOSTCMD_FAIL 3
934
935 static void slic_xmit_build_request(struct adapter *adapter,
936 struct slic_hostcmd *hcmd, struct sk_buff *skb)
937 {
938 struct slic_host64_cmd *ihcmd;
939 ulong phys_addr;
940
941 ihcmd = &hcmd->cmd64;
942
943 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
944 ihcmd->command = IHCMD_XMT_REQ;
945 ihcmd->u.slic_buffers.totlen = skb->len;
946 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
947 PCI_DMA_TODEVICE);
948 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
949 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
950 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
951 #if defined(CONFIG_X86_64)
952 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
953 (u64) hcmd) + 31) >> 5);
954 #elif defined(CONFIG_X86)
955 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
956 (u32) hcmd) + 31) >> 5);
957 #else
958 Stop Compilation;
959 #endif
960 }
961
962 #define NORMAL_ETHFRAME 0
963
964 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
965 {
966 struct sliccard *card;
967 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
968 struct slic_hostcmd *hcmd = NULL;
969 u32 status = 0;
970 u32 skbtype = NORMAL_ETHFRAME;
971 void *offloadcmd = NULL;
972
973 card = adapter->card;
974 ASSERT(card);
975 /*
976 DBG_ERROR("xmit_start (%s) ENTER skb[%p] len[%d] linkstate[%x] state[%x]\n",
977 adapter->netdev->name, skb, skb->len, adapter->linkstate,
978 adapter->state);
979 */
980 if ((adapter->linkstate != LINK_UP) ||
981 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
982 status = XMIT_FAIL_LINK_STATE;
983 goto xmit_fail;
984
985 } else if (skb->len == 0) {
986 status = XMIT_FAIL_ZERO_LENGTH;
987 goto xmit_fail;
988 }
989
990 if (skbtype == NORMAL_ETHFRAME) {
991 hcmd = slic_cmdq_getfree(adapter);
992 if (!hcmd) {
993 adapter->xmitq_full = 1;
994 status = XMIT_FAIL_HOSTCMD_FAIL;
995 goto xmit_fail;
996 }
997 ASSERT(hcmd->pslic_handle);
998 ASSERT(hcmd->cmd64.hosthandle ==
999 hcmd->pslic_handle->token.handle_token);
1000 hcmd->skb = skb;
1001 hcmd->busy = 1;
1002 hcmd->type = SLIC_CMD_DUMB;
1003 if (skbtype == NORMAL_ETHFRAME)
1004 slic_xmit_build_request(adapter, hcmd, skb);
1005 }
1006 adapter->stats.tx_packets++;
1007 adapter->stats.tx_bytes += skb->len;
1008
1009 #ifdef DEBUG_DUMP
1010 if (adapter->kill_card) {
1011 struct slic_host64_cmd ihcmd;
1012
1013 ihcmd = &hcmd->cmd64;
1014
1015 ihcmd->flags |= 0x40;
1016 adapter->kill_card = 0; /* only do this once */
1017 }
1018 #endif
1019 if (hcmd->paddrh == 0) {
1020 WRITE_REG(adapter->slic_regs->slic_cbar,
1021 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
1022 } else {
1023 WRITE_REG64(adapter,
1024 adapter->slic_regs->slic_cbar64,
1025 (hcmd->paddrl | hcmd->cmdsize),
1026 adapter->slic_regs->slic_addr_upper,
1027 hcmd->paddrh, DONT_FLUSH);
1028 }
1029 xmit_done:
1030 return 0;
1031 xmit_fail:
1032 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
1033 goto xmit_done;
1034 }
1035
1036 static void slic_xmit_fail(struct adapter *adapter,
1037 struct sk_buff *skb,
1038 void *cmd, u32 skbtype, u32 status)
1039 {
1040 if (adapter->xmitq_full)
1041 slic_if_stop_queue(adapter);
1042 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1043 switch (status) {
1044 case XMIT_FAIL_LINK_STATE:
1045 DBG_ERROR
1046 ("(%s) reject xmit skb[%p: %x] linkstate[%s] \
1047 adapter[%s:%d] card[%s:%d]\n",
1048 adapter->netdev->name, skb, skb->pkt_type,
1049 SLIC_LINKSTATE(adapter->linkstate),
1050 SLIC_ADAPTER_STATE(adapter->state), adapter->state,
1051 SLIC_CARD_STATE(adapter->card->state),
1052 adapter->card->state);
1053 break;
1054 case XMIT_FAIL_ZERO_LENGTH:
1055 DBG_ERROR
1056 ("xmit_start skb->len == 0 skb[%p] type[%x]!!!! \n",
1057 skb, skb->pkt_type);
1058 break;
1059 case XMIT_FAIL_HOSTCMD_FAIL:
1060 DBG_ERROR
1061 ("xmit_start skb[%p] type[%x] No host commands \
1062 available !!!! \n",
1063 skb, skb->pkt_type);
1064 break;
1065 default:
1066 ASSERT(0);
1067 }
1068 }
1069 dev_kfree_skb(skb);
1070 adapter->stats.tx_dropped++;
1071 }
1072
1073 static void slic_rcv_handle_error(struct adapter *adapter,
1074 struct slic_rcvbuf *rcvbuf)
1075 {
1076 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1077
1078 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1079 if (hdr->frame_status14 & VRHSTAT_802OE)
1080 adapter->if_events.oflow802++;
1081 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1082 adapter->if_events.Tprtoflow++;
1083 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1084 adapter->if_events.uflow802++;
1085 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1086 adapter->if_events.rcvearly++;
1087 adapter->stats.rx_fifo_errors++;
1088 }
1089 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1090 adapter->if_events.Bufov++;
1091 adapter->stats.rx_over_errors++;
1092 }
1093 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1094 adapter->if_events.Carre++;
1095 adapter->stats.tx_carrier_errors++;
1096 }
1097 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1098 adapter->if_events.Longe++;
1099 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1100 adapter->if_events.Invp++;
1101 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1102 adapter->if_events.Crc++;
1103 adapter->stats.rx_crc_errors++;
1104 }
1105 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1106 adapter->if_events.Drbl++;
1107 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1108 adapter->if_events.Code++;
1109 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1110 adapter->if_events.TpCsum++;
1111 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1112 adapter->if_events.TpHlen++;
1113 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1114 adapter->if_events.IpCsum++;
1115 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1116 adapter->if_events.IpLen++;
1117 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1118 adapter->if_events.IpHlen++;
1119 } else {
1120 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1121 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1122
1123 if (xerr == VGBSTAT_XCSERR)
1124 adapter->if_events.TpCsum++;
1125 if (xerr == VGBSTAT_XUFLOW)
1126 adapter->if_events.Tprtoflow++;
1127 if (xerr == VGBSTAT_XHLEN)
1128 adapter->if_events.TpHlen++;
1129 }
1130 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1131 u32 nerr =
1132 (hdr->
1133 frame_statusGB >> VGBSTAT_NERRSHFT) &
1134 VGBSTAT_NERRMSK;
1135 if (nerr == VGBSTAT_NCSERR)
1136 adapter->if_events.IpCsum++;
1137 if (nerr == VGBSTAT_NUFLOW)
1138 adapter->if_events.IpLen++;
1139 if (nerr == VGBSTAT_NHLEN)
1140 adapter->if_events.IpHlen++;
1141 }
1142 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1143 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1144
1145 if (lerr == VGBSTAT_LDEARLY)
1146 adapter->if_events.rcvearly++;
1147 if (lerr == VGBSTAT_LBOFLO)
1148 adapter->if_events.Bufov++;
1149 if (lerr == VGBSTAT_LCODERR)
1150 adapter->if_events.Code++;
1151 if (lerr == VGBSTAT_LDBLNBL)
1152 adapter->if_events.Drbl++;
1153 if (lerr == VGBSTAT_LCRCERR)
1154 adapter->if_events.Crc++;
1155 if (lerr == VGBSTAT_LOFLO)
1156 adapter->if_events.oflow802++;
1157 if (lerr == VGBSTAT_LUFLO)
1158 adapter->if_events.uflow802++;
1159 }
1160 }
1161 return;
1162 }
1163
1164 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1165 #define M_FAST_PATH 0x0040
1166
1167 static void slic_rcv_handler(struct adapter *adapter)
1168 {
1169 struct sk_buff *skb;
1170 struct slic_rcvbuf *rcvbuf;
1171 u32 frames = 0;
1172
1173 while ((skb = slic_rcvqueue_getnext(adapter))) {
1174 u32 rx_bytes;
1175
1176 ASSERT(skb->head);
1177 rcvbuf = (struct slic_rcvbuf *)skb->head;
1178 adapter->card->events++;
1179 if (rcvbuf->status & IRHDDR_ERR) {
1180 adapter->rx_errors++;
1181 slic_rcv_handle_error(adapter, rcvbuf);
1182 slic_rcvqueue_reinsert(adapter, skb);
1183 continue;
1184 }
1185
1186 if (!slic_mac_filter(adapter, (struct ether_header *)
1187 rcvbuf->data)) {
1188 #if 0
1189 DBG_MSG
1190 ("slicoss: %s (%s) drop frame due to mac filter\n",
1191 __func__, adapter->netdev->name);
1192 #endif
1193 slic_rcvqueue_reinsert(adapter, skb);
1194 continue;
1195 }
1196 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1197 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1198 skb_put(skb, rx_bytes);
1199 adapter->stats.rx_packets++;
1200 adapter->stats.rx_bytes += rx_bytes;
1201 #if SLIC_OFFLOAD_IP_CHECKSUM
1202 skb->ip_summed = CHECKSUM_UNNECESSARY;
1203 #endif
1204
1205 skb->dev = adapter->netdev;
1206 skb->protocol = eth_type_trans(skb, skb->dev);
1207 netif_rx(skb);
1208
1209 ++frames;
1210 #if SLIC_INTERRUPT_PROCESS_LIMIT
1211 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1212 adapter->rcv_interrupt_yields++;
1213 break;
1214 }
1215 #endif
1216 }
1217 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1218 }
1219
1220 static void slic_xmit_complete(struct adapter *adapter)
1221 {
1222 struct slic_hostcmd *hcmd;
1223 struct slic_rspbuf *rspbuf;
1224 u32 frames = 0;
1225 struct slic_handle_word slic_handle_word;
1226
1227 do {
1228 rspbuf = slic_rspqueue_getnext(adapter);
1229 if (!rspbuf)
1230 break;
1231 adapter->xmit_completes++;
1232 adapter->card->events++;
1233 /*
1234 Get the complete host command buffer
1235 */
1236 slic_handle_word.handle_token = rspbuf->hosthandle;
1237 ASSERT(slic_handle_word.handle_index);
1238 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1239 hcmd =
1240 (struct slic_hostcmd *)
1241 adapter->slic_handles[slic_handle_word.handle_index].
1242 address;
1243 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1244 ASSERT(hcmd);
1245 ASSERT(hcmd->pslic_handle ==
1246 &adapter->slic_handles[slic_handle_word.handle_index]);
1247 /*
1248 DBG_ERROR("xmit_complete (%s) hcmd[%p] hosthandle[%x]\n",
1249 adapter->netdev->name, hcmd, hcmd->cmd64.hosthandle);
1250 DBG_ERROR(" skb[%p] len %d hcmdtype[%x]\n", hcmd->skb,
1251 hcmd->skb->len, hcmd->type);
1252 */
1253 if (hcmd->type == SLIC_CMD_DUMB) {
1254 if (hcmd->skb)
1255 dev_kfree_skb_irq(hcmd->skb);
1256 slic_cmdq_putdone_irq(adapter, hcmd);
1257 }
1258 rspbuf->status = 0;
1259 rspbuf->hosthandle = 0;
1260 frames++;
1261 } while (1);
1262 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1263 }
1264
1265 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1266 {
1267 struct net_device *dev = (struct net_device *)dev_id;
1268 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1269 u32 isr;
1270
1271 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1272 WRITE_REG(adapter->slic_regs->slic_icr, ICR_INT_MASK, FLUSH);
1273 isr = adapter->isrcopy = adapter->pshmem->isr;
1274 adapter->pshmem->isr = 0;
1275 adapter->num_isrs++;
1276 switch (adapter->card->state) {
1277 case CARD_UP:
1278 if (isr & ~ISR_IO) {
1279 if (isr & ISR_ERR) {
1280 adapter->error_interrupts++;
1281 if (isr & ISR_RMISS) {
1282 int count;
1283 int pre_count;
1284 int errors;
1285
1286 struct slic_rcvqueue *rcvq =
1287 &adapter->rcvqueue;
1288
1289 adapter->
1290 error_rmiss_interrupts++;
1291 if (!rcvq->errors)
1292 rcv_count = rcvq->count;
1293 pre_count = rcvq->count;
1294 errors = rcvq->errors;
1295
1296 while (rcvq->count <
1297 SLIC_RCVQ_FILLTHRESH) {
1298 count =
1299 slic_rcvqueue_fill
1300 (adapter);
1301 if (!count)
1302 break;
1303 }
1304 DBG_MSG
1305 ("(%s): [%x] ISR_RMISS \
1306 initial[%x] pre[%x] \
1307 errors[%x] \
1308 post_count[%x]\n",
1309 adapter->netdev->name,
1310 isr, rcv_count, pre_count,
1311 errors, rcvq->count);
1312 } else if (isr & ISR_XDROP) {
1313 DBG_ERROR
1314 ("isr & ISR_ERR [%x] \
1315 ISR_XDROP \n",
1316 isr);
1317 } else {
1318 DBG_ERROR
1319 ("isr & ISR_ERR [%x]\n",
1320 isr);
1321 }
1322 }
1323
1324 if (isr & ISR_LEVENT) {
1325 /*DBG_MSG("%s (%s) ISR_LEVENT \n",
1326 __func__, adapter->netdev->name);*/
1327 adapter->linkevent_interrupts++;
1328 slic_link_event_handler(adapter);
1329 }
1330
1331 if ((isr & ISR_UPC) ||
1332 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1333 adapter->upr_interrupts++;
1334 slic_upr_request_complete(adapter, isr);
1335 }
1336 }
1337
1338 if (isr & ISR_RCV) {
1339 adapter->rcv_interrupts++;
1340 slic_rcv_handler(adapter);
1341 }
1342
1343 if (isr & ISR_CMD) {
1344 adapter->xmit_interrupts++;
1345 slic_xmit_complete(adapter);
1346 }
1347 break;
1348
1349 case CARD_DOWN:
1350 if ((isr & ISR_UPC) ||
1351 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1352 adapter->upr_interrupts++;
1353 slic_upr_request_complete(adapter, isr);
1354 }
1355 break;
1356
1357 default:
1358 break;
1359 }
1360
1361 adapter->isrcopy = 0;
1362 adapter->all_reg_writes += 2;
1363 adapter->isr_reg_writes++;
1364 WRITE_REG(adapter->slic_regs->slic_isr, 0, FLUSH);
1365 } else {
1366 adapter->false_interrupts++;
1367 }
1368 return IRQ_HANDLED;
1369 }
1370
1371 /*
1372 * slic_link_event_handler -
1373 *
1374 * Initiate a link configuration sequence. The link configuration begins
1375 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1376 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1377 * routine will follow it up witha UP configuration write command, which
1378 * will also complete asynchronously.
1379 *
1380 */
1381 static void slic_link_event_handler(struct adapter *adapter)
1382 {
1383 int status;
1384 struct slic_shmem *pshmem;
1385
1386 if (adapter->state != ADAPT_UP) {
1387 /* Adapter is not operational. Ignore. */
1388 return;
1389 }
1390
1391 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1392
1393 #if defined(CONFIG_X86_64)
1394 /*
1395 DBG_MSG("slic_event_handler pshmem->linkstatus[%x] pshmem[%p]\n \
1396 &linkstatus[%p] &isr[%p]\n", adapter->pshmem->linkstatus, pshmem,
1397 &pshmem->linkstatus, &pshmem->isr);
1398 */
1399 status = slic_upr_request(adapter,
1400 SLIC_UPR_RLSR,
1401 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1402 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1403 0, 0);
1404 #elif defined(CONFIG_X86)
1405 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1406 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1407 0, 0, 0);
1408 #else
1409 Stop compilation;
1410 #endif
1411 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1412 }
1413
1414 static void slic_init_cleanup(struct adapter *adapter)
1415 {
1416 DBG_MSG("slicoss: %s ENTER adapter[%p] ", __func__, adapter);
1417 if (adapter->intrregistered) {
1418 DBG_MSG("FREE_IRQ ");
1419 adapter->intrregistered = 0;
1420 free_irq(adapter->netdev->irq, adapter->netdev);
1421
1422 }
1423 if (adapter->pshmem) {
1424 DBG_MSG("FREE_SHMEM ");
1425 DBG_MSG("adapter[%p] port %d pshmem[%p] FreeShmem ",
1426 adapter, adapter->port, (void *) adapter->pshmem);
1427 pci_free_consistent(adapter->pcidev,
1428 sizeof(struct slic_shmem *),
1429 adapter->pshmem, adapter->phys_shmem);
1430 adapter->pshmem = NULL;
1431 adapter->phys_shmem = (dma_addr_t) NULL;
1432 }
1433 #if SLIC_GET_STATS_TIMER_ENABLED
1434 if (adapter->statstimerset) {
1435 DBG_MSG("statstimer ");
1436 adapter->statstimerset = 0;
1437 del_timer(&adapter->statstimer);
1438 }
1439 #endif
1440 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1441 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1442 if (adapter->pingtimerset) {
1443 DBG_MSG("pingtimer ");
1444 adapter->pingtimerset = 0;
1445 del_timer(&adapter->pingtimer);
1446 }
1447 #endif
1448 slic_rspqueue_free(adapter);
1449 slic_cmdq_free(adapter);
1450 slic_rcvqueue_free(adapter);
1451
1452 DBG_MSG("\n");
1453 }
1454
1455 #if SLIC_GET_STATS_ENABLED
1456 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1457 {
1458 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1459 struct net_device_stats *stats;
1460
1461 ASSERT(adapter);
1462 stats = &adapter->stats;
1463 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1464 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1465 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1466 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1467 stats->tx_heartbeat_errors = 0;
1468 stats->tx_aborted_errors = 0;
1469 stats->tx_window_errors = 0;
1470 stats->tx_fifo_errors = 0;
1471 stats->rx_frame_errors = 0;
1472 stats->rx_length_errors = 0;
1473 return &adapter->stats;
1474 }
1475 #endif
1476
1477 /*
1478 * Allocate a mcast_address structure to hold the multicast address.
1479 * Link it in.
1480 */
1481 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1482 {
1483 struct mcast_address *mcaddr, *mlist;
1484 bool equaladdr;
1485
1486 /* Check to see if it already exists */
1487 mlist = adapter->mcastaddrs;
1488 while (mlist) {
1489 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1490 if (equaladdr)
1491 return STATUS_SUCCESS;
1492 mlist = mlist->next;
1493 }
1494
1495 /* Doesn't already exist. Allocate a structure to hold it */
1496 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1497 if (mcaddr == NULL)
1498 return 1;
1499
1500 memcpy(mcaddr->address, address, 6);
1501
1502 mcaddr->next = adapter->mcastaddrs;
1503 adapter->mcastaddrs = mcaddr;
1504
1505 return STATUS_SUCCESS;
1506 }
1507
1508 /*
1509 * Functions to obtain the CRC corresponding to the destination mac address.
1510 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1511 * the polynomial:
1512 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1513 * x^4 + x^2 + x^1.
1514 *
1515 * After the CRC for the 6 bytes is generated (but before the value is
1516 * complemented),
1517 * we must then transpose the value and return bits 30-23.
1518 *
1519 */
1520 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1521 static u32 slic_crc_init; /* Is table initialized */
1522
1523 /*
1524 * Contruct the CRC32 table
1525 */
1526 static void slic_mcast_init_crc32(void)
1527 {
1528 u32 c; /* CRC shit reg */
1529 u32 e = 0; /* Poly X-or pattern */
1530 int i; /* counter */
1531 int k; /* byte being shifted into crc */
1532
1533 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1534
1535 for (i = 0; i < sizeof(p) / sizeof(int); i++)
1536 e |= 1L << (31 - p[i]);
1537
1538 for (i = 1; i < 256; i++) {
1539 c = i;
1540 for (k = 8; k; k--)
1541 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1542 slic_crc_table[i] = c;
1543 }
1544 }
1545
1546 /*
1547 * Return the MAC hast as described above.
1548 */
1549 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1550 {
1551 u32 crc;
1552 char *p;
1553 int i;
1554 unsigned char machash = 0;
1555
1556 if (!slic_crc_init) {
1557 slic_mcast_init_crc32();
1558 slic_crc_init = 1;
1559 }
1560
1561 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1562 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1563 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1564
1565 /* Return bits 1-8, transposed */
1566 for (i = 1; i < 9; i++)
1567 machash |= (((crc >> i) & 1) << (8 - i));
1568
1569 return machash;
1570 }
1571
1572 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1573 {
1574 unsigned char crcpoly;
1575
1576 /* Get the CRC polynomial for the mac address */
1577 crcpoly = slic_mcast_get_mac_hash(address);
1578
1579 /* We only have space on the SLIC for 64 entries. Lop
1580 * off the top two bits. (2^6 = 64)
1581 */
1582 crcpoly &= 0x3F;
1583
1584 /* OR in the new bit into our 64 bit mask. */
1585 adapter->mcastmask |= (u64) 1 << crcpoly;
1586 }
1587
1588 static void slic_mcast_set_list(struct net_device *dev)
1589 {
1590 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1591 int status = STATUS_SUCCESS;
1592 int i;
1593 char *addresses;
1594 struct dev_mc_list *mc_list = dev->mc_list;
1595 int mc_count = dev->mc_count;
1596
1597 ASSERT(adapter);
1598
1599 for (i = 1; i <= mc_count; i++) {
1600 addresses = (char *) &mc_list->dmi_addr;
1601 if (mc_list->dmi_addrlen == 6) {
1602 status = slic_mcast_add_list(adapter, addresses);
1603 if (status != STATUS_SUCCESS)
1604 break;
1605 } else {
1606 status = -EINVAL;
1607 break;
1608 }
1609 slic_mcast_set_bit(adapter, addresses);
1610 mc_list = mc_list->next;
1611 }
1612
1613 DBG_MSG("%s a->devflags_prev[%x] dev->flags[%x] status[%x]\n",
1614 __func__, adapter->devflags_prev, dev->flags, status);
1615 if (adapter->devflags_prev != dev->flags) {
1616 adapter->macopts = MAC_DIRECTED;
1617 if (dev->flags) {
1618 if (dev->flags & IFF_BROADCAST)
1619 adapter->macopts |= MAC_BCAST;
1620 if (dev->flags & IFF_PROMISC)
1621 adapter->macopts |= MAC_PROMISC;
1622 if (dev->flags & IFF_ALLMULTI)
1623 adapter->macopts |= MAC_ALLMCAST;
1624 if (dev->flags & IFF_MULTICAST)
1625 adapter->macopts |= MAC_MCAST;
1626 }
1627 adapter->devflags_prev = dev->flags;
1628 DBG_MSG("%s call slic_config_set adapter->macopts[%x]\n",
1629 __func__, adapter->macopts);
1630 slic_config_set(adapter, TRUE);
1631 } else {
1632 if (status == STATUS_SUCCESS)
1633 slic_mcast_set_mask(adapter);
1634 }
1635 return;
1636 }
1637
1638 static void slic_mcast_set_mask(struct adapter *adapter)
1639 {
1640 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1641
1642 DBG_MSG("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__,
1643 adapter->netdev->name, (uint) adapter->macopts,
1644 adapter->mcastmask);
1645
1646 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1647 /* Turn on all multicast addresses. We have to do this for
1648 * promiscuous mode as well as ALLMCAST mode. It saves the
1649 * Microcode from having to keep state about the MAC
1650 * configuration.
1651 */
1652 /* DBG_MSG("slicoss: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n\
1653 SLUT MODE!!!\n",__func__); */
1654 WRITE_REG(slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1655 WRITE_REG(slic_regs->slic_mcasthigh, 0xFFFFFFFF, FLUSH);
1656 /* DBG_MSG("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",
1657 _func__, adapter->netdev->name); */
1658 } else {
1659 /* Commit our multicast mast to the SLIC by writing to the
1660 * multicast address mask registers
1661 */
1662 DBG_MSG("%s (%s) WRITE mcastlow[%x] mcasthigh[%x]\n",
1663 __func__, adapter->netdev->name,
1664 ((ulong) (adapter->mcastmask & 0xFFFFFFFF)),
1665 ((ulong) ((adapter->mcastmask >> 32) & 0xFFFFFFFF)));
1666
1667 WRITE_REG(slic_regs->slic_mcastlow,
1668 (u32) (adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1669 WRITE_REG(slic_regs->slic_mcasthigh,
1670 (u32) ((adapter->mcastmask >> 32) & 0xFFFFFFFF),
1671 FLUSH);
1672 }
1673 }
1674
1675 static void slic_timer_ping(ulong dev)
1676 {
1677 struct adapter *adapter;
1678 struct sliccard *card;
1679
1680 ASSERT(dev);
1681 adapter = (struct adapter *)((struct net_device *) dev)->priv;
1682 ASSERT(adapter);
1683 card = adapter->card;
1684 ASSERT(card);
1685 #if !SLIC_DUMP_ENABLED
1686 /*#if SLIC_DUMP_ENABLED*/
1687 if ((adapter->state == ADAPT_UP) && (card->state == CARD_UP)) {
1688 int status;
1689
1690 if (card->pingstatus != ISR_PINGMASK) {
1691 if (errormsg++ < 5) {
1692 DBG_MSG
1693 ("%s (%s) CARD HAS CRASHED PING_status == \
1694 %x ERRORMSG# %d\n",
1695 __func__, adapter->netdev->name,
1696 card->pingstatus, errormsg);
1697 }
1698 /* ASSERT(card->pingstatus == ISR_PINGMASK); */
1699 } else {
1700 if (goodmsg++ < 5) {
1701 DBG_MSG
1702 ("slicoss: %s (%s) PING_status == %x \
1703 GOOD!!!!!!!! msg# %d\n",
1704 __func__, adapter->netdev->name,
1705 card->pingstatus, errormsg);
1706 }
1707 }
1708 card->pingstatus = 0;
1709 status = slic_upr_request(adapter, SLIC_UPR_PING, 0, 0, 0, 0);
1710
1711 ASSERT(status == 0);
1712 } else {
1713 DBG_MSG("slicoss %s (%s) adapter[%p] NOT UP!!!!\n",
1714 __func__, adapter->netdev->name, adapter);
1715 }
1716 #endif
1717 adapter->pingtimer.expires =
1718 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1719 add_timer(&adapter->pingtimer);
1720 }
1721
1722 static void slic_if_stop_queue(struct adapter *adapter)
1723 {
1724 netif_stop_queue(adapter->netdev);
1725 }
1726
1727 static void slic_if_start_queue(struct adapter *adapter)
1728 {
1729 netif_start_queue(adapter->netdev);
1730 }
1731
1732 /*
1733 * slic_if_init
1734 *
1735 * Perform initialization of our slic interface.
1736 *
1737 */
1738 static int slic_if_init(struct adapter *adapter)
1739 {
1740 struct sliccard *card = adapter->card;
1741 struct net_device *dev = adapter->netdev;
1742 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1743 struct slic_shmem *pshmem;
1744 int status = 0;
1745
1746 ASSERT(card);
1747 DBG_MSG("slicoss: %s (%s) ENTER states[%d:%d:%d:%d] flags[%x]\n",
1748 __func__, adapter->netdev->name,
1749 adapter->queues_initialized, adapter->state, adapter->linkstate,
1750 card->state, dev->flags);
1751
1752 /* adapter should be down at this point */
1753 if (adapter->state != ADAPT_DOWN) {
1754 DBG_ERROR("slic_if_init adapter->state != ADAPT_DOWN\n");
1755 return -EIO;
1756 }
1757 ASSERT(adapter->linkstate == LINK_DOWN);
1758
1759 adapter->devflags_prev = dev->flags;
1760 adapter->macopts = MAC_DIRECTED;
1761 if (dev->flags) {
1762 DBG_MSG("slicoss: %s (%s) Set MAC options: ", __func__,
1763 adapter->netdev->name);
1764 if (dev->flags & IFF_BROADCAST) {
1765 adapter->macopts |= MAC_BCAST;
1766 DBG_MSG("BCAST ");
1767 }
1768 if (dev->flags & IFF_PROMISC) {
1769 adapter->macopts |= MAC_PROMISC;
1770 DBG_MSG("PROMISC ");
1771 }
1772 if (dev->flags & IFF_ALLMULTI) {
1773 adapter->macopts |= MAC_ALLMCAST;
1774 DBG_MSG("ALL_MCAST ");
1775 }
1776 if (dev->flags & IFF_MULTICAST) {
1777 adapter->macopts |= MAC_MCAST;
1778 DBG_MSG("MCAST ");
1779 }
1780 DBG_MSG("\n");
1781 }
1782 status = slic_adapter_allocresources(adapter);
1783 if (status != STATUS_SUCCESS) {
1784 DBG_ERROR
1785 ("slic_if_init: slic_adapter_allocresources FAILED %x\n",
1786 status);
1787 slic_adapter_freeresources(adapter);
1788 return status;
1789 }
1790
1791 if (!adapter->queues_initialized) {
1792 DBG_MSG("slicoss: %s call slic_rspqueue_init\n", __func__);
1793 if (slic_rspqueue_init(adapter))
1794 return -ENOMEM;
1795 DBG_MSG
1796 ("slicoss: %s call slic_cmdq_init adapter[%p] port %d \n",
1797 __func__, adapter, adapter->port);
1798 if (slic_cmdq_init(adapter))
1799 return -ENOMEM;
1800 DBG_MSG
1801 ("slicoss: %s call slic_rcvqueue_init adapter[%p] \
1802 port %d \n", __func__, adapter, adapter->port);
1803 if (slic_rcvqueue_init(adapter))
1804 return -ENOMEM;
1805 adapter->queues_initialized = 1;
1806 }
1807 DBG_MSG("slicoss: %s disable interrupts(slic)\n", __func__);
1808
1809 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1810 mdelay(1);
1811
1812 if (!adapter->isp_initialized) {
1813 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1814
1815 spin_lock_irqsave(&adapter->bit64reglock.lock,
1816 adapter->bit64reglock.flags);
1817
1818 #if defined(CONFIG_X86_64)
1819 WRITE_REG(slic_regs->slic_addr_upper,
1820 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1821 WRITE_REG(slic_regs->slic_isp,
1822 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1823 #elif defined(CONFIG_X86)
1824 WRITE_REG(slic_regs->slic_addr_upper, (u32) 0, DONT_FLUSH);
1825 WRITE_REG(slic_regs->slic_isp, (u32) &pshmem->isr, FLUSH);
1826 #else
1827 Stop Compilations
1828 #endif
1829 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1830 adapter->bit64reglock.flags);
1831 adapter->isp_initialized = 1;
1832 }
1833
1834 adapter->state = ADAPT_UP;
1835 if (!card->loadtimerset) {
1836 init_timer(&card->loadtimer);
1837 card->loadtimer.expires =
1838 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
1839 card->loadtimer.data = (ulong) card;
1840 card->loadtimer.function = &slic_timer_load_check;
1841 add_timer(&card->loadtimer);
1842
1843 card->loadtimerset = 1;
1844 }
1845 #if SLIC_GET_STATS_TIMER_ENABLED
1846 if (!adapter->statstimerset) {
1847 DBG_MSG("slicoss: %s start getstats_timer(slic)\n",
1848 __func__);
1849 init_timer(&adapter->statstimer);
1850 adapter->statstimer.expires =
1851 jiffies + SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
1852 adapter->statstimer.data = (ulong) adapter->netdev;
1853 adapter->statstimer.function = &slic_timer_get_stats;
1854 add_timer(&adapter->statstimer);
1855 adapter->statstimerset = 1;
1856 }
1857 #endif
1858 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1859 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1860 if (!adapter->pingtimerset) {
1861 DBG_MSG("slicoss: %s start card_ping_timer(slic)\n",
1862 __func__);
1863 init_timer(&adapter->pingtimer);
1864 adapter->pingtimer.expires =
1865 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1866 adapter->pingtimer.data = (ulong) dev;
1867 adapter->pingtimer.function = &slic_timer_ping;
1868 add_timer(&adapter->pingtimer);
1869 adapter->pingtimerset = 1;
1870 adapter->card->pingstatus = ISR_PINGMASK;
1871 }
1872 #endif
1873
1874 /*
1875 * clear any pending events, then enable interrupts
1876 */
1877 DBG_MSG("slicoss: %s ENABLE interrupts(slic)\n", __func__);
1878 adapter->isrcopy = 0;
1879 adapter->pshmem->isr = 0;
1880 WRITE_REG(slic_regs->slic_isr, 0, FLUSH);
1881 WRITE_REG(slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1882
1883 DBG_MSG("slicoss: %s call slic_link_config(slic)\n", __func__);
1884 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1885 slic_link_event_handler(adapter);
1886
1887 DBG_MSG("slicoss: %s EXIT\n", __func__);
1888 return STATUS_SUCCESS;
1889 }
1890
1891 static void slic_unmap_mmio_space(struct adapter *adapter)
1892 {
1893 #if LINUX_FREES_ADAPTER_RESOURCES
1894 if (adapter->slic_regs)
1895 iounmap(adapter->slic_regs);
1896 adapter->slic_regs = NULL;
1897 #endif
1898 }
1899
1900 static int slic_adapter_allocresources(struct adapter *adapter)
1901 {
1902 if (!adapter->intrregistered) {
1903 int retval;
1904
1905 DBG_MSG
1906 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1907 phys_shmem[%p] dev->irq[%x] %x\n",
1908 __func__, adapter, adapter->pshmem,
1909 (void *)adapter->phys_shmem, adapter->netdev->irq,
1910 NR_IRQS);
1911
1912 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1913 slic_global.driver_lock.flags);
1914
1915 retval = request_irq(adapter->netdev->irq,
1916 &slic_interrupt,
1917 IRQF_SHARED,
1918 adapter->netdev->name, adapter->netdev);
1919
1920 spin_lock_irqsave(&slic_global.driver_lock.lock,
1921 slic_global.driver_lock.flags);
1922
1923 if (retval) {
1924 DBG_ERROR("slicoss: request_irq (%s) FAILED [%x]\n",
1925 adapter->netdev->name, retval);
1926 return retval;
1927 }
1928 adapter->intrregistered = 1;
1929 DBG_MSG
1930 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1931 pshmem[%p] dev->irq[%x]\n",
1932 __func__, adapter, adapter->pshmem,
1933 (void *)adapter->pshmem, adapter->netdev->irq);
1934 }
1935 return STATUS_SUCCESS;
1936 }
1937
1938 static void slic_config_pci(struct pci_dev *pcidev)
1939 {
1940 u16 pci_command;
1941 u16 new_command;
1942
1943 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1944 DBG_MSG("slicoss: %s PCI command[%4.4x]\n", __func__, pci_command);
1945
1946 new_command = pci_command | PCI_COMMAND_MASTER
1947 | PCI_COMMAND_MEMORY
1948 | PCI_COMMAND_INVALIDATE
1949 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1950 if (pci_command != new_command) {
1951 DBG_MSG("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
1952 __func__, pci_command, new_command);
1953 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1954 }
1955 }
1956
1957 static void slic_adapter_freeresources(struct adapter *adapter)
1958 {
1959 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
1960 slic_init_cleanup(adapter);
1961 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1962 adapter->error_interrupts = 0;
1963 adapter->rcv_interrupts = 0;
1964 adapter->xmit_interrupts = 0;
1965 adapter->linkevent_interrupts = 0;
1966 adapter->upr_interrupts = 0;
1967 adapter->num_isrs = 0;
1968 adapter->xmit_completes = 0;
1969 adapter->rcv_broadcasts = 0;
1970 adapter->rcv_multicasts = 0;
1971 adapter->rcv_unicasts = 0;
1972 DBG_MSG("slicoss: %s EXIT\n", __func__);
1973 }
1974
1975 /*
1976 * slic_link_config
1977 *
1978 * Write phy control to configure link duplex/speed
1979 *
1980 */
1981 static void slic_link_config(struct adapter *adapter,
1982 u32 linkspeed, u32 linkduplex)
1983 {
1984 u32 speed;
1985 u32 duplex;
1986 u32 phy_config;
1987 u32 phy_advreg;
1988 u32 phy_gctlreg;
1989
1990 if (adapter->state != ADAPT_UP) {
1991 DBG_MSG
1992 ("%s (%s) ADAPT Not up yet, Return! speed[%x] duplex[%x]\n",
1993 __func__, adapter->netdev->name, linkspeed,
1994 linkduplex);
1995 return;
1996 }
1997 DBG_MSG("slicoss: %s (%s) slic_link_config: speed[%x] duplex[%x]\n",
1998 __func__, adapter->netdev->name, linkspeed, linkduplex);
1999
2000 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2001 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2002
2003 if (linkspeed > LINK_1000MB)
2004 linkspeed = LINK_AUTOSPEED;
2005 if (linkduplex > LINK_AUTOD)
2006 linkduplex = LINK_AUTOD;
2007
2008 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
2009 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
2010 /* We've got a fiber gigabit interface, and register
2011 * 4 is different in fiber mode than in copper mode
2012 */
2013
2014 /* advertise FD only @1000 Mb */
2015 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
2016 /* enable PAUSE frames */
2017 phy_advreg |= PAR_ASYMPAUSE_FIBER;
2018 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2019 FLUSH);
2020
2021 if (linkspeed == LINK_AUTOSPEED) {
2022 /* reset phy, enable auto-neg */
2023 phy_config =
2024 (MIICR_REG_PCR |
2025 (PCR_RESET | PCR_AUTONEG |
2026 PCR_AUTONEG_RST));
2027 WRITE_REG(adapter->slic_regs->slic_wphy,
2028 phy_config, FLUSH);
2029 } else { /* forced 1000 Mb FD*/
2030 /* power down phy to break link
2031 this may not work) */
2032 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
2033 WRITE_REG(adapter->slic_regs->slic_wphy,
2034 phy_config, FLUSH);
2035 /* wait, Marvell says 1 sec,
2036 try to get away with 10 ms */
2037 mdelay(10);
2038
2039 /* disable auto-neg, set speed/duplex,
2040 soft reset phy, powerup */
2041 phy_config =
2042 (MIICR_REG_PCR |
2043 (PCR_RESET | PCR_SPEED_1000 |
2044 PCR_DUPLEX_FULL));
2045 WRITE_REG(adapter->slic_regs->slic_wphy,
2046 phy_config, FLUSH);
2047 }
2048 } else { /* copper gigabit */
2049
2050 /* Auto-Negotiate or 1000 Mb must be auto negotiated
2051 * We've got a copper gigabit interface, and
2052 * register 4 is different in copper mode than
2053 * in fiber mode
2054 */
2055 if (linkspeed == LINK_AUTOSPEED) {
2056 /* advertise 10/100 Mb modes */
2057 phy_advreg =
2058 (MIICR_REG_4 |
2059 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
2060 | PAR_ADV10HD));
2061 } else {
2062 /* linkspeed == LINK_1000MB -
2063 don't advertise 10/100 Mb modes */
2064 phy_advreg = MIICR_REG_4;
2065 }
2066 /* enable PAUSE frames */
2067 phy_advreg |= PAR_ASYMPAUSE;
2068 /* required by the Cicada PHY */
2069 phy_advreg |= PAR_802_3;
2070 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2071 FLUSH);
2072 /* advertise FD only @1000 Mb */
2073 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
2074 WRITE_REG(adapter->slic_regs->slic_wphy, phy_gctlreg,
2075 FLUSH);
2076
2077 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2078 /* if a Marvell PHY
2079 enable auto crossover */
2080 phy_config =
2081 (MIICR_REG_16 | (MRV_REG16_XOVERON));
2082 WRITE_REG(adapter->slic_regs->slic_wphy,
2083 phy_config, FLUSH);
2084
2085 /* reset phy, enable auto-neg */
2086 phy_config =
2087 (MIICR_REG_PCR |
2088 (PCR_RESET | PCR_AUTONEG |
2089 PCR_AUTONEG_RST));
2090 WRITE_REG(adapter->slic_regs->slic_wphy,
2091 phy_config, FLUSH);
2092 } else { /* it's a Cicada PHY */
2093 /* enable and restart auto-neg (don't reset) */
2094 phy_config =
2095 (MIICR_REG_PCR |
2096 (PCR_AUTONEG | PCR_AUTONEG_RST));
2097 WRITE_REG(adapter->slic_regs->slic_wphy,
2098 phy_config, FLUSH);
2099 }
2100 }
2101 } else {
2102 /* Forced 10/100 */
2103 if (linkspeed == LINK_10MB)
2104 speed = 0;
2105 else
2106 speed = PCR_SPEED_100;
2107 if (linkduplex == LINK_HALFD)
2108 duplex = 0;
2109 else
2110 duplex = PCR_DUPLEX_FULL;
2111
2112 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2113 /* if a Marvell PHY
2114 disable auto crossover */
2115 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
2116 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2117 FLUSH);
2118 }
2119
2120 /* power down phy to break link (this may not work) */
2121 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
2122 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config, FLUSH);
2123
2124 /* wait, Marvell says 1 sec, try to get away with 10 ms */
2125 mdelay(10);
2126
2127 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2128 /* if a Marvell PHY
2129 disable auto-neg, set speed,
2130 soft reset phy, powerup */
2131 phy_config =
2132 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
2133 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2134 FLUSH);
2135 } else { /* it's a Cicada PHY */
2136 /* disable auto-neg, set speed, powerup */
2137 phy_config = (MIICR_REG_PCR | (speed | duplex));
2138 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2139 FLUSH);
2140 }
2141 }
2142
2143 DBG_MSG
2144 ("slicoss: %s (%s) EXIT slic_link_config : state[%d] \
2145 phy_config[%x]\n", __func__, adapter->netdev->name, adapter->state,
2146 phy_config);
2147 }
2148
2149 static void slic_card_cleanup(struct sliccard *card)
2150 {
2151 DBG_MSG("slicoss: %s ENTER\n", __func__);
2152
2153 #if SLIC_DUMP_ENABLED
2154 if (card->dumpbuffer) {
2155 card->dumpbuffer_phys = 0;
2156 card->dumpbuffer_physl = 0;
2157 card->dumpbuffer_physh = 0;
2158 kfree(card->dumpbuffer);
2159 card->dumpbuffer = NULL;
2160 }
2161 if (card->cmdbuffer) {
2162 card->cmdbuffer_phys = 0;
2163 card->cmdbuffer_physl = 0;
2164 card->cmdbuffer_physh = 0;
2165 kfree(card->cmdbuffer);
2166 card->cmdbuffer = NULL;
2167 }
2168 #endif
2169
2170 if (card->loadtimerset) {
2171 card->loadtimerset = 0;
2172 del_timer(&card->loadtimer);
2173 }
2174
2175 slic_debug_card_destroy(card);
2176
2177 kfree(card);
2178 DBG_MSG("slicoss: %s EXIT\n", __func__);
2179 }
2180
2181 static int slic_card_download_gbrcv(struct adapter *adapter)
2182 {
2183 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2184 u32 codeaddr;
2185 unsigned char *instruction = NULL;
2186 u32 rcvucodelen = 0;
2187
2188 switch (adapter->devid) {
2189 case SLIC_2GB_DEVICE_ID:
2190 instruction = (unsigned char *)&OasisRcvUCode[0];
2191 rcvucodelen = OasisRcvUCodeLen;
2192 break;
2193 case SLIC_1GB_DEVICE_ID:
2194 instruction = (unsigned char *)&GBRcvUCode[0];
2195 rcvucodelen = GBRcvUCodeLen;
2196 break;
2197 default:
2198 ASSERT(0);
2199 break;
2200 }
2201
2202 /* start download */
2203 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
2204
2205 /* download the rcv sequencer ucode */
2206 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
2207 /* write out instruction address */
2208 WRITE_REG(slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
2209
2210 /* write out the instruction data low addr */
2211 WRITE_REG(slic_regs->slic_rcv_wcs,
2212 (u32) *(u32 *) instruction, FLUSH);
2213 instruction += 4;
2214
2215 /* write out the instruction data high addr */
2216 WRITE_REG(slic_regs->slic_rcv_wcs, (u32) *instruction,
2217 FLUSH);
2218 instruction += 1;
2219 }
2220
2221 /* download finished */
2222 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
2223
2224 return 0;
2225 }
2226
2227 static int slic_card_download(struct adapter *adapter)
2228 {
2229 u32 section;
2230 int thissectionsize;
2231 int codeaddr;
2232 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2233 u32 *instruction = NULL;
2234 u32 *lastinstruct = NULL;
2235 u32 *startinstruct = NULL;
2236 unsigned char *nextinstruct;
2237 u32 baseaddress;
2238 u32 failure;
2239 u32 i;
2240 u32 numsects = 0;
2241 u32 sectsize[3];
2242 u32 sectstart[3];
2243
2244 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x] \
2245 jiffies[%lx] cpu %d\n", __func__, adapter->netdev->name, adapter,
2246 adapter->card, adapter->devid,jiffies, smp_processor_id()); */
2247
2248 switch (adapter->devid) {
2249 case SLIC_2GB_DEVICE_ID:
2250 /* DBG_MSG ("slicoss: %s devid==SLIC_2GB_DEVICE_ID sections[%x]\n",
2251 __func__, (uint) ONumSections); */
2252 numsects = ONumSections;
2253 for (i = 0; i < numsects; i++) {
2254 sectsize[i] = OSectionSize[i];
2255 sectstart[i] = OSectionStart[i];
2256 }
2257 break;
2258 case SLIC_1GB_DEVICE_ID:
2259 /* DBG_MSG ("slicoss: %s devid==SLIC_1GB_DEVICE_ID sections[%x]\n",
2260 __func__, (uint) MNumSections); */
2261 numsects = MNumSections;
2262 for (i = 0; i < numsects; i++) {
2263 sectsize[i] = MSectionSize[i];
2264 sectstart[i] = MSectionStart[i];
2265 }
2266 break;
2267 default:
2268 ASSERT(0);
2269 break;
2270 }
2271
2272 ASSERT(numsects <= 3);
2273
2274 for (section = 0; section < numsects; section++) {
2275 switch (adapter->devid) {
2276 case SLIC_2GB_DEVICE_ID:
2277 instruction = (u32 *) &OasisUCode[section][0];
2278 baseaddress = sectstart[section];
2279 thissectionsize = sectsize[section] >> 3;
2280 lastinstruct =
2281 (u32 *) &OasisUCode[section][sectsize[section] -
2282 8];
2283 break;
2284 case SLIC_1GB_DEVICE_ID:
2285 instruction = (u32 *) &MojaveUCode[section][0];
2286 baseaddress = sectstart[section];
2287 thissectionsize = sectsize[section] >> 3;
2288 lastinstruct =
2289 (u32 *) &MojaveUCode[section][sectsize[section]
2290 - 8];
2291 break;
2292 default:
2293 ASSERT(0);
2294 break;
2295 }
2296
2297 baseaddress = sectstart[section];
2298 thissectionsize = sectsize[section] >> 3;
2299
2300 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2301 startinstruct = instruction;
2302 nextinstruct = ((unsigned char *)instruction) + 8;
2303 /* Write out instruction address */
2304 WRITE_REG(slic_regs->slic_wcs, baseaddress + codeaddr,
2305 FLUSH);
2306 /* Write out instruction to low addr */
2307 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2308 #ifdef CONFIG_X86_64
2309 instruction = (u32 *)((unsigned char *)instruction + 4);
2310 #else
2311 instruction++;
2312 #endif
2313 /* Write out instruction to high addr */
2314 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2315 #ifdef CONFIG_X86_64
2316 instruction = (u32 *)((unsigned char *)instruction + 4);
2317 #else
2318 instruction++;
2319 #endif
2320 }
2321 }
2322
2323 for (section = 0; section < numsects; section++) {
2324 switch (adapter->devid) {
2325 case SLIC_2GB_DEVICE_ID:
2326 instruction = (u32 *)&OasisUCode[section][0];
2327 break;
2328 case SLIC_1GB_DEVICE_ID:
2329 instruction = (u32 *)&MojaveUCode[section][0];
2330 break;
2331 default:
2332 ASSERT(0);
2333 break;
2334 }
2335
2336 baseaddress = sectstart[section];
2337 if (baseaddress < 0x8000)
2338 continue;
2339 thissectionsize = sectsize[section] >> 3;
2340
2341 /* DBG_MSG ("slicoss: COMPARE secton[%x] baseaddr[%x] sectnsize[%x]\n",
2342 (uint)section,baseaddress,thissectionsize);*/
2343
2344 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2345 /* Write out instruction address */
2346 WRITE_REG(slic_regs->slic_wcs,
2347 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
2348 FLUSH);
2349 /* Write out instruction to low addr */
2350 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2351 #ifdef CONFIG_X86_64
2352 instruction = (u32 *)((unsigned char *)instruction + 4);
2353 #else
2354 instruction++;
2355 #endif
2356 /* Write out instruction to high addr */
2357 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2358 #ifdef CONFIG_X86_64
2359 instruction = (u32 *)((unsigned char *)instruction + 4);
2360 #else
2361 instruction++;
2362 #endif
2363 /* Check SRAM location zero. If it is non-zero. Abort.*/
2364 failure = readl((u32 __iomem *)&slic_regs->slic_reset);
2365 if (failure) {
2366 DBG_MSG
2367 ("slicoss: %s FAILURE EXIT codeaddr[%x] \
2368 thissectionsize[%x] failure[%x]\n",
2369 __func__, codeaddr, thissectionsize,
2370 failure);
2371
2372 return -EIO;
2373 }
2374 }
2375 }
2376 /* DBG_MSG ("slicoss: Compare done\n");*/
2377
2378 /* Everything OK, kick off the card */
2379 mdelay(10);
2380 WRITE_REG(slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
2381
2382 /* stall for 20 ms, long enough for ucode to init card
2383 and reach mainloop */
2384 mdelay(20);
2385
2386 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p] card[%p]\n",
2387 __func__, adapter->netdev->name, adapter, adapter->card);
2388
2389 return STATUS_SUCCESS;
2390 }
2391
2392 static void slic_adapter_set_hwaddr(struct adapter *adapter)
2393 {
2394 struct sliccard *card = adapter->card;
2395
2396 /* DBG_MSG ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n",
2397 __func__, card->config_set, adapter->port, adapter->physport,
2398 adapter->functionnumber);
2399
2400 slic_dbg_macaddrs(adapter); */
2401
2402 if ((adapter->card) && (card->config_set)) {
2403 memcpy(adapter->macaddr,
2404 card->config.MacInfo[adapter->functionnumber].macaddrA,
2405 sizeof(struct slic_config_mac));
2406 /* DBG_MSG ("%s AFTER copying from config.macinfo into currmacaddr\n",
2407 __func__);
2408 slic_dbg_macaddrs(adapter);*/
2409 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
2410 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
2411 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
2412 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
2413 }
2414 if (adapter->netdev) {
2415 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
2416 6);
2417 }
2418 }
2419 /* DBG_MSG ("%s EXIT port %d\n", __func__, adapter->port);
2420 slic_dbg_macaddrs(adapter); */
2421 }
2422
2423 static void slic_intagg_set(struct adapter *adapter, u32 value)
2424 {
2425 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2426
2427 WRITE_REG(slic_regs->slic_intagg, value, FLUSH);
2428 adapter->card->loadlevel_current = value;
2429 }
2430
2431 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2432 {
2433 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2434 struct slic_eeprom *peeprom;
2435 struct oslic_eeprom *pOeeprom;
2436 dma_addr_t phys_config;
2437 u32 phys_configh;
2438 u32 phys_configl;
2439 u32 i = 0;
2440 struct slic_shmem *pshmem;
2441 int status;
2442 uint macaddrs = card->card_size;
2443 ushort eecodesize;
2444 ushort dramsize;
2445 ushort ee_chksum;
2446 ushort calc_chksum;
2447 struct slic_config_mac *pmac;
2448 unsigned char fruformat;
2449 unsigned char oemfruformat;
2450 struct atk_fru *patkfru;
2451 union oemfru *poemfru;
2452
2453 DBG_MSG
2454 ("slicoss: %s ENTER card[%p] adapter[%p] card->state[%x] \
2455 size[%d]\n", __func__, card, adapter, card->state, card->card_size);
2456
2457 /* Reset everything except PCI configuration space */
2458 slic_soft_reset(adapter);
2459
2460 /* Download the microcode */
2461 status = slic_card_download(adapter);
2462
2463 if (status != STATUS_SUCCESS) {
2464 DBG_ERROR("SLIC download failed bus %d slot %d\n",
2465 (uint) adapter->busnumber,
2466 (uint) adapter->slotnumber);
2467 return status;
2468 }
2469
2470 if (!card->config_set) {
2471 peeprom = pci_alloc_consistent(adapter->pcidev,
2472 sizeof(struct slic_eeprom),
2473 &phys_config);
2474
2475 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2476 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2477
2478 DBG_MSG("slicoss: %s Eeprom info adapter [%p]\n "
2479 "size [%x]\n peeprom [%p]\n "
2480 "phys_config [%p]\n phys_configl[%x]\n "
2481 "phys_configh[%x]\n",
2482 __func__, adapter,
2483 (u32)sizeof(struct slic_eeprom),
2484 peeprom, (void *) phys_config, phys_configl,
2485 phys_configh);
2486 if (!peeprom) {
2487 DBG_ERROR
2488 ("SLIC eeprom read failed to get memory bus %d \
2489 slot %d\n",
2490 (uint) adapter->busnumber,
2491 (uint) adapter->slotnumber);
2492 return -ENOMEM;
2493 } else {
2494 memset(peeprom, 0, sizeof(struct slic_eeprom));
2495 }
2496 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2497 mdelay(1);
2498 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2499
2500 spin_lock_irqsave(&adapter->bit64reglock.lock,
2501 adapter->bit64reglock.flags);
2502 WRITE_REG(slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2503 WRITE_REG(slic_regs->slic_isp,
2504 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2505 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2506 adapter->bit64reglock.flags);
2507
2508 slic_config_get(adapter, phys_configl, phys_configh);
2509
2510 for (;;) {
2511 if (adapter->pshmem->isr) {
2512 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2513 __func__, adapter->pshmem,
2514 adapter->pshmem->isr);
2515
2516 if (adapter->pshmem->isr & ISR_UPC) {
2517 adapter->pshmem->isr = 0;
2518 WRITE_REG64(adapter,
2519 slic_regs->slic_isp,
2520 0,
2521 slic_regs->slic_addr_upper,
2522 0, FLUSH);
2523 WRITE_REG(slic_regs->slic_isr, 0,
2524 FLUSH);
2525
2526 slic_upr_request_complete(adapter, 0);
2527 break;
2528 } else {
2529 adapter->pshmem->isr = 0;
2530 WRITE_REG(slic_regs->slic_isr, 0,
2531 FLUSH);
2532 }
2533 } else {
2534 mdelay(1);
2535 i++;
2536 if (i > 5000) {
2537 DBG_ERROR
2538 ("SLIC: %d config data fetch timed\
2539 out!\n", adapter->port);
2540 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2541 __func__, adapter->pshmem,
2542 adapter->pshmem->isr);
2543 WRITE_REG64(adapter,
2544 slic_regs->slic_isp, 0,
2545 slic_regs->slic_addr_upper,
2546 0, FLUSH);
2547 return -EINVAL;
2548 }
2549 }
2550 }
2551
2552 switch (adapter->devid) {
2553 /* Oasis card */
2554 case SLIC_2GB_DEVICE_ID:
2555 /* extract EEPROM data and pointers to EEPROM data */
2556 pOeeprom = (struct oslic_eeprom *) peeprom;
2557 eecodesize = pOeeprom->EecodeSize;
2558 dramsize = pOeeprom->DramSize;
2559 pmac = pOeeprom->MacInfo;
2560 fruformat = pOeeprom->FruFormat;
2561 patkfru = &pOeeprom->AtkFru;
2562 oemfruformat = pOeeprom->OemFruFormat;
2563 poemfru = &pOeeprom->OemFru;
2564 macaddrs = 2;
2565 /* Minor kludge for Oasis card
2566 get 2 MAC addresses from the
2567 EEPROM to ensure that function 1
2568 gets the Port 1 MAC address */
2569 break;
2570 default:
2571 /* extract EEPROM data and pointers to EEPROM data */
2572 eecodesize = peeprom->EecodeSize;
2573 dramsize = peeprom->DramSize;
2574 pmac = peeprom->u2.mac.MacInfo;
2575 fruformat = peeprom->FruFormat;
2576 patkfru = &peeprom->AtkFru;
2577 oemfruformat = peeprom->OemFruFormat;
2578 poemfru = &peeprom->OemFru;
2579 break;
2580 }
2581
2582 card->config.EepromValid = FALSE;
2583
2584 /* see if the EEPROM is valid by checking it's checksum */
2585 if ((eecodesize <= MAX_EECODE_SIZE) &&
2586 (eecodesize >= MIN_EECODE_SIZE)) {
2587
2588 ee_chksum =
2589 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2590 /*
2591 calculate the EEPROM checksum
2592 */
2593 calc_chksum =
2594 ~slic_eeprom_cksum((char *) peeprom,
2595 (eecodesize - 2));
2596 /*
2597 if the ucdoe chksum flag bit worked,
2598 we wouldn't need this shit
2599 */
2600 if (ee_chksum == calc_chksum)
2601 card->config.EepromValid = TRUE;
2602 }
2603 /* copy in the DRAM size */
2604 card->config.DramSize = dramsize;
2605
2606 /* copy in the MAC address(es) */
2607 for (i = 0; i < macaddrs; i++) {
2608 memcpy(&card->config.MacInfo[i],
2609 &pmac[i], sizeof(struct slic_config_mac));
2610 }
2611 /* DBG_MSG ("%s EEPROM Checksum Good? %d MacAddress\n",__func__,
2612 card->config.EepromValid); */
2613
2614 /* copy the Alacritech FRU information */
2615 card->config.FruFormat = fruformat;
2616 memcpy(&card->config.AtkFru, patkfru,
2617 sizeof(struct atk_fru));
2618
2619 pci_free_consistent(adapter->pcidev,
2620 sizeof(struct slic_eeprom),
2621 peeprom, phys_config);
2622 DBG_MSG
2623 ("slicoss: %s adapter%d [%p] size[%x] FREE peeprom[%p] \
2624 phys_config[%p]\n",
2625 __func__, adapter->port, adapter,
2626 (u32) sizeof(struct slic_eeprom), peeprom,
2627 (void *) phys_config);
2628
2629 if ((!card->config.EepromValid) &&
2630 (adapter->reg_params.fail_on_bad_eeprom)) {
2631 WRITE_REG64(adapter,
2632 slic_regs->slic_isp,
2633 0, slic_regs->slic_addr_upper, 0, FLUSH);
2634 DBG_ERROR
2635 ("unsupported CONFIGURATION EEPROM invalid\n");
2636 return -EINVAL;
2637 }
2638
2639 card->config_set = 1;
2640 }
2641
2642 if (slic_card_download_gbrcv(adapter)) {
2643 DBG_ERROR("%s unable to download GB receive microcode\n",
2644 __func__);
2645 return -EINVAL;
2646 }
2647
2648 if (slic_global.dynamic_intagg) {
2649 DBG_MSG
2650 ("Dynamic Interrupt Aggregation[ENABLED]: slic%d \
2651 SET intagg to %d\n",
2652 card->cardnum, 0);
2653 slic_intagg_set(adapter, 0);
2654 } else {
2655 slic_intagg_set(adapter, intagg_delay);
2656 DBG_MSG
2657 ("Dynamic Interrupt Aggregation[DISABLED]: slic%d \
2658 SET intagg to %d\n",
2659 card->cardnum, intagg_delay);
2660 }
2661
2662 /*
2663 * Initialize ping status to "ok"
2664 */
2665 card->pingstatus = ISR_PINGMASK;
2666
2667 #if SLIC_DUMP_ENABLED
2668 if (!card->dumpbuffer) {
2669 card->dumpbuffer = kmalloc(DUMP_PAGE_SIZE, GFP_ATOMIC);
2670
2671 ASSERT(card->dumpbuffer);
2672 if (card->dumpbuffer == NULL)
2673 return -ENOMEM;
2674 }
2675 /*
2676 * Smear the shared memory structure and then obtain
2677 * the PHYSICAL address of this structure
2678 */
2679 memset(card->dumpbuffer, 0, DUMP_PAGE_SIZE);
2680 card->dumpbuffer_phys = virt_to_bus(card->dumpbuffer);
2681 card->dumpbuffer_physh = SLIC_GET_ADDR_HIGH(card->dumpbuffer_phys);
2682 card->dumpbuffer_physl = SLIC_GET_ADDR_LOW(card->dumpbuffer_phys);
2683
2684 /*
2685 * Allocate COMMAND BUFFER
2686 */
2687 if (!card->cmdbuffer) {
2688 card->cmdbuffer = kmalloc(sizeof(struct dump_cmd), GFP_ATOMIC);
2689
2690 ASSERT(card->cmdbuffer);
2691 if (card->cmdbuffer == NULL)
2692 return -ENOMEM;
2693 }
2694 /*
2695 * Smear the shared memory structure and then obtain
2696 * the PHYSICAL address of this structure
2697 */
2698 memset(card->cmdbuffer, 0, sizeof(struct dump_cmd));
2699 card->cmdbuffer_phys = virt_to_bus(card->cmdbuffer);
2700 card->cmdbuffer_physh = SLIC_GET_ADDR_HIGH(card->cmdbuffer_phys);
2701 card->cmdbuffer_physl = SLIC_GET_ADDR_LOW(card->cmdbuffer_phys);
2702 #endif
2703
2704 /*
2705 * Lastly, mark our card state as up and return success
2706 */
2707 card->state = CARD_UP;
2708 card->reset_in_progress = 0;
2709 DBG_MSG("slicoss: %s EXIT card[%p] adapter[%p] card->state[%x]\n",
2710 __func__, card, adapter, card->state);
2711
2712 return STATUS_SUCCESS;
2713 }
2714
2715 static u32 slic_card_locate(struct adapter *adapter)
2716 {
2717 struct sliccard *card = slic_global.slic_card;
2718 struct physcard *physcard = slic_global.phys_card;
2719 ushort card_hostid;
2720 u16 __iomem *hostid_reg;
2721 uint i;
2722 uint rdhostid_offset = 0;
2723
2724 DBG_MSG("slicoss: %s adapter[%p] slot[%x] bus[%x] port[%x]\n",
2725 __func__, adapter, adapter->slotnumber, adapter->busnumber,
2726 adapter->port);
2727
2728 switch (adapter->devid) {
2729 case SLIC_2GB_DEVICE_ID:
2730 rdhostid_offset = SLIC_RDHOSTID_2GB;
2731 break;
2732 case SLIC_1GB_DEVICE_ID:
2733 rdhostid_offset = SLIC_RDHOSTID_1GB;
2734 break;
2735 default:
2736 ASSERT(0);
2737 break;
2738 }
2739
2740 hostid_reg =
2741 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2742 rdhostid_offset);
2743 DBG_MSG("slicoss: %s *hostid_reg[%p] == ", __func__, hostid_reg);
2744
2745 /* read the 16 bit hostid from SRAM */
2746 card_hostid = (ushort) readw(hostid_reg);
2747 DBG_MSG(" card_hostid[%x]\n", card_hostid);
2748
2749 /* Initialize a new card structure if need be */
2750 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2751 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2752 if (card == NULL)
2753 return -ENOMEM;
2754
2755 card->next = slic_global.slic_card;
2756 slic_global.slic_card = card;
2757 #if DBG
2758 if (adapter->devid == SLIC_2GB_DEVICE_ID) {
2759 DBG_MSG
2760 ("SLICOSS ==> Initialize 2 Port Gigabit Server \
2761 and Storage Accelerator\n");
2762 } else {
2763 DBG_MSG
2764 ("SLICOSS ==> Initialize 1 Port Gigabit Server \
2765 and Storage Accelerator\n");
2766 }
2767 #endif
2768 card->busnumber = adapter->busnumber;
2769 card->slotnumber = adapter->slotnumber;
2770
2771 /* Find an available cardnum */
2772 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2773 if (slic_global.cardnuminuse[i] == 0) {
2774 slic_global.cardnuminuse[i] = 1;
2775 card->cardnum = i;
2776 break;
2777 }
2778 }
2779 slic_global.num_slic_cards++;
2780 DBG_MSG("\nCARDNUM == %d Total %d Card[%p]\n\n",
2781 card->cardnum, slic_global.num_slic_cards, card);
2782
2783 slic_debug_card_create(card);
2784 } else {
2785 DBG_MSG
2786 ("slicoss: %s CARD already allocated, find the \
2787 correct card\n", __func__);
2788 /* Card exists, find the card this adapter belongs to */
2789 while (card) {
2790 DBG_MSG
2791 ("slicoss: %s card[%p] slot[%x] bus[%x] \
2792 adaptport[%p] hostid[%x] cardnum[%x]\n",
2793 __func__, card, card->slotnumber,
2794 card->busnumber, card->adapter[adapter->port],
2795 card_hostid, card->cardnum);
2796
2797 if (card->cardnum == card_hostid)
2798 break;
2799 card = card->next;
2800 }
2801 }
2802
2803 ASSERT(card);
2804 if (!card)
2805 return STATUS_FAILURE;
2806 /* Put the adapter in the card's adapter list */
2807 ASSERT(card->adapter[adapter->port] == NULL);
2808 if (!card->adapter[adapter->port]) {
2809 card->adapter[adapter->port] = adapter;
2810 adapter->card = card;
2811 }
2812
2813 card->card_size = 1; /* one port per *logical* card */
2814
2815 while (physcard) {
2816 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2817 if (!physcard->adapter[i])
2818 continue;
2819 else
2820 break;
2821 }
2822 ASSERT(i != SLIC_MAX_PORTS);
2823 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2824 break;
2825 physcard = physcard->next;
2826 }
2827 if (!physcard) {
2828 /* no structure allocated for this physical card yet */
2829 physcard = kmalloc(sizeof(struct physcard *), GFP_ATOMIC);
2830 ASSERT(physcard);
2831 memset(physcard, 0, sizeof(struct physcard *));
2832
2833 DBG_MSG
2834 ("\n%s Allocate a PHYSICALcard:\n PHYSICAL_Card[%p]\n\
2835 LogicalCard [%p]\n adapter [%p]\n",
2836 __func__, physcard, card, adapter);
2837
2838 physcard->next = slic_global.phys_card;
2839 slic_global.phys_card = physcard;
2840 physcard->adapters_allocd = 1;
2841 } else {
2842 physcard->adapters_allocd++;
2843 }
2844 /* Note - this is ZERO relative */
2845 adapter->physport = physcard->adapters_allocd - 1;
2846
2847 ASSERT(physcard->adapter[adapter->physport] == NULL);
2848 physcard->adapter[adapter->physport] = adapter;
2849 adapter->physcard = physcard;
2850 DBG_MSG(" PHYSICAL_Port %d Logical_Port %d\n", adapter->physport,
2851 adapter->port);
2852
2853 return 0;
2854 }
2855
2856 static void slic_soft_reset(struct adapter *adapter)
2857 {
2858 if (adapter->card->state == CARD_UP) {
2859 DBG_MSG("slicoss: %s QUIESCE adapter[%p] card[%p] devid[%x]\n",
2860 __func__, adapter, adapter->card, adapter->devid);
2861 WRITE_REG(adapter->slic_regs->slic_quiesce, 0, FLUSH);
2862 mdelay(1);
2863 }
2864 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x]\n",
2865 __func__, adapter->netdev->name, adapter, adapter->card,
2866 adapter->devid); */
2867
2868 WRITE_REG(adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, FLUSH);
2869 mdelay(1);
2870 }
2871
2872 static void slic_config_set(struct adapter *adapter, bool linkchange)
2873 {
2874 u32 value;
2875 u32 RcrReset;
2876 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2877
2878 DBG_MSG("slicoss: %s (%s) slic_interface_enable[%p](%d)\n",
2879 __func__, adapter->netdev->name, adapter,
2880 adapter->cardindex);
2881
2882 if (linkchange) {
2883 /* Setup MAC */
2884 slic_mac_config(adapter);
2885 RcrReset = GRCR_RESET;
2886 } else {
2887 slic_mac_address_config(adapter);
2888 RcrReset = 0;
2889 }
2890
2891 if (adapter->linkduplex == LINK_FULLD) {
2892 /* setup xmtcfg */
2893 value = (GXCR_RESET | /* Always reset */
2894 GXCR_XMTEN | /* Enable transmit */
2895 GXCR_PAUSEEN); /* Enable pause */
2896
2897 DBG_MSG("slicoss: FDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2898 value);
2899 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2900
2901 /* Setup rcvcfg last */
2902 value = (RcrReset | /* Reset, if linkchange */
2903 GRCR_CTLEN | /* Enable CTL frames */
2904 GRCR_ADDRAEN | /* Address A enable */
2905 GRCR_RCVBAD | /* Rcv bad frames */
2906 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2907 } else {
2908 /* setup xmtcfg */
2909 value = (GXCR_RESET | /* Always reset */
2910 GXCR_XMTEN); /* Enable transmit */
2911
2912 DBG_MSG("slicoss: HDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2913 value);
2914 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2915
2916 /* Setup rcvcfg last */
2917 value = (RcrReset | /* Reset, if linkchange */
2918 GRCR_ADDRAEN | /* Address A enable */
2919 GRCR_RCVBAD | /* Rcv bad frames */
2920 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2921 }
2922
2923 if (adapter->state != ADAPT_DOWN) {
2924 /* Only enable receive if we are restarting or running */
2925 value |= GRCR_RCVEN;
2926 }
2927
2928 if (adapter->macopts & MAC_PROMISC)
2929 value |= GRCR_RCVALL;
2930
2931 DBG_MSG("slicoss: adapt[%p] set rcvcfg to [%x]\n", adapter, value);
2932 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2933 }
2934
2935 /*
2936 * Turn off RCV and XMT, power down PHY
2937 */
2938 static void slic_config_clear(struct adapter *adapter)
2939 {
2940 u32 value;
2941 u32 phy_config;
2942 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2943
2944 /* Setup xmtcfg */
2945 value = (GXCR_RESET | /* Always reset */
2946 GXCR_PAUSEEN); /* Enable pause */
2947
2948 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2949
2950 value = (GRCR_RESET | /* Always reset */
2951 GRCR_CTLEN | /* Enable CTL frames */
2952 GRCR_ADDRAEN | /* Address A enable */
2953 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2954
2955 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2956
2957 /* power down phy */
2958 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2959 WRITE_REG(slic_regs->slic_wphy, phy_config, FLUSH);
2960 }
2961
2962 static void slic_config_get(struct adapter *adapter, u32 config,
2963 u32 config_h)
2964 {
2965 int status;
2966
2967 status = slic_upr_request(adapter,
2968 SLIC_UPR_RCONFIG,
2969 (u32) config, (u32) config_h, 0, 0);
2970 ASSERT(status == 0);
2971 }
2972
2973 static void slic_mac_address_config(struct adapter *adapter)
2974 {
2975 u32 value;
2976 u32 value2;
2977 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2978
2979 value = *(u32 *) &adapter->currmacaddr[2];
2980 value = ntohl(value);
2981 WRITE_REG(slic_regs->slic_wraddral, value, FLUSH);
2982 WRITE_REG(slic_regs->slic_wraddrbl, value, FLUSH);
2983
2984 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2985 adapter->currmacaddr[1]) & 0xFFFF);
2986
2987 WRITE_REG(slic_regs->slic_wraddrah, value2, FLUSH);
2988 WRITE_REG(slic_regs->slic_wraddrbh, value2, FLUSH);
2989
2990 DBG_MSG("%s value1[%x] value2[%x] Call slic_mcast_set_mask\n",
2991 __func__, value, value2);
2992 slic_dbg_macaddrs(adapter);
2993
2994 /* Write our multicast mask out to the card. This is done */
2995 /* here in addition to the slic_mcast_addr_set routine */
2996 /* because ALL_MCAST may have been enabled or disabled */
2997 slic_mcast_set_mask(adapter);
2998 }
2999
3000 static void slic_mac_config(struct adapter *adapter)
3001 {
3002 u32 value;
3003 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3004
3005 /* Setup GMAC gaps */
3006 if (adapter->linkspeed == LINK_1000MB) {
3007 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
3008 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
3009 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
3010 } else {
3011 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
3012 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
3013 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
3014 }
3015
3016 /* enable GMII */
3017 if (adapter->linkspeed == LINK_1000MB)
3018 value |= GMCR_GBIT;
3019
3020 /* enable fullduplex */
3021 if ((adapter->linkduplex == LINK_FULLD)
3022 || (adapter->macopts & MAC_LOOPBACK)) {
3023 value |= GMCR_FULLD;
3024 }
3025
3026 /* write mac config */
3027 WRITE_REG(slic_regs->slic_wmcfg, value, FLUSH);
3028
3029 /* setup mac addresses */
3030 slic_mac_address_config(adapter);
3031 }
3032
3033 static bool slic_mac_filter(struct adapter *adapter,
3034 struct ether_header *ether_frame)
3035 {
3036 u32 opts = adapter->macopts;
3037 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
3038 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
3039 bool equaladdr;
3040
3041 if (opts & MAC_PROMISC) {
3042 DBG_MSG("slicoss: %s (%s) PROMISCUOUS. Accept frame\n",
3043 __func__, adapter->netdev->name);
3044 return TRUE;
3045 }
3046
3047 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
3048 if (opts & MAC_BCAST) {
3049 adapter->rcv_broadcasts++;
3050 return TRUE;
3051 } else {
3052 return FALSE;
3053 }
3054 }
3055
3056 if (ether_frame->ether_dhost[0] & 0x01) {
3057 if (opts & MAC_ALLMCAST) {
3058 adapter->rcv_multicasts++;
3059 adapter->stats.multicast++;
3060 return TRUE;
3061 }
3062 if (opts & MAC_MCAST) {
3063 struct mcast_address *mcaddr = adapter->mcastaddrs;
3064
3065 while (mcaddr) {
3066 ETHER_EQ_ADDR(mcaddr->address,
3067 ether_frame->ether_dhost,
3068 equaladdr);
3069 if (equaladdr) {
3070 adapter->rcv_multicasts++;
3071 adapter->stats.multicast++;
3072 return TRUE;
3073 }
3074 mcaddr = mcaddr->next;
3075 }
3076 return FALSE;
3077 } else {
3078 return FALSE;
3079 }
3080 }
3081 if (opts & MAC_DIRECTED) {
3082 adapter->rcv_unicasts++;
3083 return TRUE;
3084 }
3085 return FALSE;
3086
3087 }
3088
3089 static int slic_mac_set_address(struct net_device *dev, void *ptr)
3090 {
3091 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
3092 struct sockaddr *addr = ptr;
3093
3094 DBG_MSG("%s ENTER (%s)\n", __func__, adapter->netdev->name);
3095
3096 if (netif_running(dev))
3097 return -EBUSY;
3098 if (!adapter)
3099 return -EBUSY;
3100 DBG_MSG("slicoss: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3101 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3102 adapter->currmacaddr[1], adapter->currmacaddr[2],
3103 adapter->currmacaddr[3], adapter->currmacaddr[4],
3104 adapter->currmacaddr[5]);
3105 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3106 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
3107 DBG_MSG("slicoss: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3108 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3109 adapter->currmacaddr[1], adapter->currmacaddr[2],
3110 adapter->currmacaddr[3], adapter->currmacaddr[4],
3111 adapter->currmacaddr[5]);
3112
3113 slic_config_set(adapter, TRUE);
3114 return 0;
3115 }
3116
3117 /*
3118 * slic_timer_get_stats
3119 *
3120 * Timer function used to suck the statistics out of the card every
3121 * 50 seconds or whatever STATS_TIMER_INTERVAL is set to.
3122 *
3123 */
3124 #if SLIC_GET_STATS_TIMER_ENABLED
3125 static void slic_timer_get_stats(ulong dev)
3126 {
3127 struct adapter *adapter;
3128 struct sliccard *card;
3129 struct slic_shmem *pshmem;
3130
3131 ASSERT(dev);
3132 adapter = (struct adapter *)((struct net_device *)dev)->priv;
3133 ASSERT(adapter);
3134 card = adapter->card;
3135 ASSERT(card);
3136
3137 if ((card->state == CARD_UP) &&
3138 (adapter->state == ADAPT_UP) && (adapter->linkstate == LINK_UP)) {
3139 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3140 #ifdef CONFIG_X86_64
3141 slic_upr_request(adapter,
3142 SLIC_UPR_STATS,
3143 SLIC_GET_ADDR_LOW(&pshmem->inicstats),
3144 SLIC_GET_ADDR_HIGH(&pshmem->inicstats), 0, 0);
3145 #elif defined(CONFIG_X86)
3146 slic_upr_request(adapter,
3147 SLIC_UPR_STATS,
3148 (u32) &pshmem->inicstats, 0, 0, 0);
3149 #else
3150 Stop compilation;
3151 #endif
3152 } else {
3153 /* DBG_MSG ("slicoss: %s adapter[%p] linkstate[%x] NOT UP!\n",
3154 __func__, adapter, adapter->linkstate); */
3155 }
3156 adapter->statstimer.expires = jiffies +
3157 SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
3158 add_timer(&adapter->statstimer);
3159 }
3160 #endif
3161 static void slic_timer_load_check(ulong cardaddr)
3162 {
3163 struct sliccard *card = (struct sliccard *)cardaddr;
3164 struct adapter *adapter = card->master;
3165 u32 load = card->events;
3166 u32 level = 0;
3167
3168 if ((adapter) && (adapter->state == ADAPT_UP) &&
3169 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
3170 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
3171 if (adapter->linkspeed == LINK_1000MB)
3172 level = 100;
3173 else {
3174 if (load > SLIC_LOAD_5)
3175 level = SLIC_INTAGG_5;
3176 else if (load > SLIC_LOAD_4)
3177 level = SLIC_INTAGG_4;
3178 else if (load > SLIC_LOAD_3)
3179 level = SLIC_INTAGG_3;
3180 else if (load > SLIC_LOAD_2)
3181 level = SLIC_INTAGG_2;
3182 else if (load > SLIC_LOAD_1)
3183 level = SLIC_INTAGG_1;
3184 else
3185 level = SLIC_INTAGG_0;
3186 }
3187 if (card->loadlevel_current != level) {
3188 card->loadlevel_current = level;
3189 WRITE_REG(adapter->slic_regs->slic_intagg,
3190 level, FLUSH);
3191 }
3192 } else {
3193 if (load > SLIC_LOAD_5)
3194 level = SLIC_INTAGG_5;
3195 else if (load > SLIC_LOAD_4)
3196 level = SLIC_INTAGG_4;
3197 else if (load > SLIC_LOAD_3)
3198 level = SLIC_INTAGG_3;
3199 else if (load > SLIC_LOAD_2)
3200 level = SLIC_INTAGG_2;
3201 else if (load > SLIC_LOAD_1)
3202 level = SLIC_INTAGG_1;
3203 else
3204 level = SLIC_INTAGG_0;
3205 if (card->loadlevel_current != level) {
3206 card->loadlevel_current = level;
3207 WRITE_REG(adapter->slic_regs->slic_intagg,
3208 level, FLUSH);
3209 }
3210 }
3211 }
3212 card->events = 0;
3213 card->loadtimer.expires =
3214 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
3215 add_timer(&card->loadtimer);
3216 }
3217
3218 static void slic_assert_fail(void)
3219 {
3220 u32 cpuid;
3221 u32 curr_pid;
3222 cpuid = smp_processor_id();
3223 curr_pid = current->pid;
3224
3225 DBG_ERROR("%s CPU # %d ---- PID # %d\n", __func__, cpuid, curr_pid);
3226 }
3227
3228 static int slic_upr_queue_request(struct adapter *adapter,
3229 u32 upr_request,
3230 u32 upr_data,
3231 u32 upr_data_h,
3232 u32 upr_buffer, u32 upr_buffer_h)
3233 {
3234 struct slic_upr *upr;
3235 struct slic_upr *uprqueue;
3236
3237 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
3238 if (!upr) {
3239 DBG_MSG("%s COULD NOT ALLOCATE UPR MEM\n", __func__);
3240
3241 return -ENOMEM;
3242 }
3243 upr->adapter = adapter->port;
3244 upr->upr_request = upr_request;
3245 upr->upr_data = upr_data;
3246 upr->upr_buffer = upr_buffer;
3247 upr->upr_data_h = upr_data_h;
3248 upr->upr_buffer_h = upr_buffer_h;
3249 upr->next = NULL;
3250 if (adapter->upr_list) {
3251 uprqueue = adapter->upr_list;
3252
3253 while (uprqueue->next)
3254 uprqueue = uprqueue->next;
3255 uprqueue->next = upr;
3256 } else {
3257 adapter->upr_list = upr;
3258 }
3259 return STATUS_SUCCESS;
3260 }
3261
3262 static int slic_upr_request(struct adapter *adapter,
3263 u32 upr_request,
3264 u32 upr_data,
3265 u32 upr_data_h,
3266 u32 upr_buffer, u32 upr_buffer_h)
3267 {
3268 int status;
3269
3270 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3271 status = slic_upr_queue_request(adapter,
3272 upr_request,
3273 upr_data,
3274 upr_data_h, upr_buffer, upr_buffer_h);
3275 if (status != STATUS_SUCCESS) {
3276 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3277 adapter->upr_lock.flags);
3278 return status;
3279 }
3280 slic_upr_start(adapter);
3281 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3282 adapter->upr_lock.flags);
3283 return STATUS_PENDING;
3284 }
3285
3286 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
3287 {
3288 struct sliccard *card = adapter->card;
3289 struct slic_upr *upr;
3290
3291 /* if (card->dump_requested) {
3292 DBG_MSG("ENTER slic_upr_request_complete Dump in progress ISR[%x]\n",
3293 isr);
3294 } */
3295 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3296 upr = adapter->upr_list;
3297 if (!upr) {
3298 ASSERT(0);
3299 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3300 adapter->upr_lock.flags);
3301 return;
3302 }
3303 adapter->upr_list = upr->next;
3304 upr->next = NULL;
3305 adapter->upr_busy = 0;
3306 ASSERT(adapter->port == upr->adapter);
3307 switch (upr->upr_request) {
3308 case SLIC_UPR_STATS:
3309 {
3310 #if SLIC_GET_STATS_ENABLED
3311 struct slic_stats *slicstats =
3312 (struct slic_stats *) &adapter->pshmem->inicstats;
3313 struct slic_stats *newstats = slicstats;
3314 struct slic_stats *old = &adapter->inicstats_prev;
3315 struct slicnet_stats *stst = &adapter->slic_stats;
3316 #endif
3317 if (isr & ISR_UPCERR) {
3318 DBG_ERROR
3319 ("SLIC_UPR_STATS command failed isr[%x]\n",
3320 isr);
3321
3322 break;
3323 }
3324 #if SLIC_GET_STATS_ENABLED
3325 /* DBG_MSG ("slicoss: %s rcv %lx:%lx:%lx:%lx:%lx %lx %lx "
3326 "xmt %lx:%lx:%lx:%lx:%lx %lx %lx\n",
3327 __func__,
3328 slicstats->rcv_unicasts100,
3329 slicstats->rcv_bytes100,
3330 slicstats->rcv_bytes100,
3331 slicstats->rcv_tcp_bytes100,
3332 slicstats->rcv_tcp_segs100,
3333 slicstats->rcv_other_error100,
3334 slicstats->rcv_drops100,
3335 slicstats->xmit_unicasts100,
3336 slicstats->xmit_bytes100,
3337 slicstats->xmit_bytes100,
3338 slicstats->xmit_tcp_bytes100,
3339 slicstats->xmit_tcp_segs100,
3340 slicstats->xmit_other_error100,
3341 slicstats->xmit_collisions100);*/
3342 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
3343 newstats->xmit_tcp_segs_gb,
3344 old->xmit_tcp_segs_gb);
3345
3346 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
3347 newstats->xmit_tcp_bytes_gb,
3348 old->xmit_tcp_bytes_gb);
3349
3350 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
3351 newstats->rcv_tcp_segs_gb,
3352 old->rcv_tcp_segs_gb);
3353
3354 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
3355 newstats->rcv_tcp_bytes_gb,
3356 old->rcv_tcp_bytes_gb);
3357
3358 UPDATE_STATS_GB(stst->iface.xmt_bytes,
3359 newstats->xmit_bytes_gb,
3360 old->xmit_bytes_gb);
3361
3362 UPDATE_STATS_GB(stst->iface.xmt_ucast,
3363 newstats->xmit_unicasts_gb,
3364 old->xmit_unicasts_gb);
3365
3366 UPDATE_STATS_GB(stst->iface.rcv_bytes,
3367 newstats->rcv_bytes_gb,
3368 old->rcv_bytes_gb);
3369
3370 UPDATE_STATS_GB(stst->iface.rcv_ucast,
3371 newstats->rcv_unicasts_gb,
3372 old->rcv_unicasts_gb);
3373
3374 UPDATE_STATS_GB(stst->iface.xmt_errors,
3375 newstats->xmit_collisions_gb,
3376 old->xmit_collisions_gb);
3377
3378 UPDATE_STATS_GB(stst->iface.xmt_errors,
3379 newstats->xmit_excess_collisions_gb,
3380 old->xmit_excess_collisions_gb);
3381
3382 UPDATE_STATS_GB(stst->iface.xmt_errors,
3383 newstats->xmit_other_error_gb,
3384 old->xmit_other_error_gb);
3385
3386 UPDATE_STATS_GB(stst->iface.rcv_errors,
3387 newstats->rcv_other_error_gb,
3388 old->rcv_other_error_gb);
3389
3390 UPDATE_STATS_GB(stst->iface.rcv_discards,
3391 newstats->rcv_drops_gb,
3392 old->rcv_drops_gb);
3393
3394 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
3395 adapter->rcv_drops +=
3396 (newstats->rcv_drops_gb -
3397 old->rcv_drops_gb);
3398 }
3399 memcpy(old, newstats, sizeof(struct slic_stats));
3400 #endif
3401 break;
3402 }
3403 case SLIC_UPR_RLSR:
3404 slic_link_upr_complete(adapter, isr);
3405 break;
3406 case SLIC_UPR_RCONFIG:
3407 break;
3408 case SLIC_UPR_RPHY:
3409 ASSERT(0);
3410 break;
3411 case SLIC_UPR_ENLB:
3412 ASSERT(0);
3413 break;
3414 case SLIC_UPR_ENCT:
3415 ASSERT(0);
3416 break;
3417 case SLIC_UPR_PDWN:
3418 ASSERT(0);
3419 break;
3420 case SLIC_UPR_PING:
3421 card->pingstatus |= (isr & ISR_PINGDSMASK);
3422 break;
3423 #if SLIC_DUMP_ENABLED
3424 case SLIC_UPR_DUMP:
3425 card->dumpstatus |= (isr & ISR_UPCMASK);
3426 break;
3427 #endif
3428 default:
3429 ASSERT(0);
3430 }
3431 kfree(upr);
3432 slic_upr_start(adapter);
3433 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3434 adapter->upr_lock.flags);
3435 }
3436
3437 static void slic_upr_start(struct adapter *adapter)
3438 {
3439 struct slic_upr *upr;
3440 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3441 /*
3442 char * ptr1;
3443 char * ptr2;
3444 uint cmdoffset;
3445 */
3446 upr = adapter->upr_list;
3447 if (!upr)
3448 return;
3449 if (adapter->upr_busy)
3450 return;
3451 adapter->upr_busy = 1;
3452
3453 switch (upr->upr_request) {
3454 case SLIC_UPR_STATS:
3455 if (upr->upr_data_h == 0) {
3456 WRITE_REG(slic_regs->slic_stats, upr->upr_data, FLUSH);
3457 } else {
3458 WRITE_REG64(adapter,
3459 slic_regs->slic_stats64,
3460 upr->upr_data,
3461 slic_regs->slic_addr_upper,
3462 upr->upr_data_h, FLUSH);
3463 }
3464 break;
3465
3466 case SLIC_UPR_RLSR:
3467 WRITE_REG64(adapter,
3468 slic_regs->slic_rlsr,
3469 upr->upr_data,
3470 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3471 break;
3472
3473 case SLIC_UPR_RCONFIG:
3474 DBG_MSG("%s SLIC_UPR_RCONFIG!!!!\n", __func__);
3475 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3476 " a->slic_regs[%p] slic_regs[%p]\n"
3477 " &slic_rconfig[%p] &slic_addr_upper[%p]\n"
3478 " upr[%p]\n"
3479 " uprdata[%x] uprdatah[%x]\n",
3480 adapter, adapter->slic_regs, slic_regs,
3481 &slic_regs->slic_rconfig, &slic_regs->slic_addr_upper,
3482 upr, upr->upr_data, upr->upr_data_h);
3483 WRITE_REG64(adapter,
3484 slic_regs->slic_rconfig,
3485 upr->upr_data,
3486 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3487 break;
3488 #if SLIC_DUMP_ENABLED
3489 case SLIC_UPR_DUMP:
3490 #if 0
3491 DBG_MSG("%s SLIC_UPR_DUMP!!!!\n", __func__);
3492 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3493 " upr_buffer[%x] upr_bufferh[%x]\n"
3494 " upr_data[%x] upr_datah[%x]\n"
3495 " cmdbuff[%p] cmdbuffP[%p]\n"
3496 " dumpbuff[%p] dumpbuffP[%p]\n",
3497 adapter, upr->upr_buffer, upr->upr_buffer_h,
3498 upr->upr_data, upr->upr_data_h,
3499 adapter->card->cmdbuffer,
3500 (void *)adapter->card->cmdbuffer_phys,
3501 adapter->card->dumpbuffer, (
3502 void *)adapter->card->dumpbuffer_phys);
3503
3504 ptr1 = (char *)slic_regs;
3505 ptr2 = (char *)(&slic_regs->slic_dump_cmd);
3506 cmdoffset = ptr2 - ptr1;
3507 DBG_MSG("slic_dump_cmd register offset [%x]\n", cmdoffset);
3508 #endif
3509 if (upr->upr_buffer || upr->upr_buffer_h) {
3510 WRITE_REG64(adapter,
3511 slic_regs->slic_dump_data,
3512 upr->upr_buffer,
3513 slic_regs->slic_addr_upper,
3514 upr->upr_buffer_h, FLUSH);
3515 }
3516 WRITE_REG64(adapter,
3517 slic_regs->slic_dump_cmd,
3518 upr->upr_data,
3519 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3520 break;
3521 #endif
3522 case SLIC_UPR_PING:
3523 WRITE_REG(slic_regs->slic_ping, 1, FLUSH);
3524 break;
3525 default:
3526 ASSERT(0);
3527 }
3528 }
3529
3530 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
3531 {
3532 u32 linkstatus = adapter->pshmem->linkstatus;
3533 uint linkup;
3534 unsigned char linkspeed;
3535 unsigned char linkduplex;
3536
3537 DBG_MSG("%s: %s ISR[%x] linkstatus[%x]\n adapter[%p](%d)\n",
3538 __func__, adapter->netdev->name, isr, linkstatus, adapter,
3539 adapter->cardindex);
3540
3541 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
3542 struct slic_shmem *pshmem;
3543
3544 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3545 #if defined(CONFIG_X86_64)
3546 slic_upr_queue_request(adapter,
3547 SLIC_UPR_RLSR,
3548 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
3549 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
3550 0, 0);
3551 #elif defined(CONFIG_X86)
3552 slic_upr_queue_request(adapter,
3553 SLIC_UPR_RLSR,
3554 (u32) &pshmem->linkstatus,
3555 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
3556 #else
3557 Stop Compilation;
3558 #endif
3559 return;
3560 }
3561 if (adapter->state != ADAPT_UP)
3562 return;
3563
3564 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
3565 || (adapter->devid == SLIC_2GB_DEVICE_ID));
3566
3567 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
3568 if (linkstatus & GIG_SPEED_1000) {
3569 linkspeed = LINK_1000MB;
3570 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==1000MB ",
3571 __func__, adapter->netdev->name);
3572 } else if (linkstatus & GIG_SPEED_100) {
3573 linkspeed = LINK_100MB;
3574 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==100MB ", __func__,
3575 adapter->netdev->name);
3576 } else {
3577 linkspeed = LINK_10MB;
3578 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==10MB ", __func__,
3579 adapter->netdev->name);
3580 }
3581 if (linkstatus & GIG_FULLDUPLEX) {
3582 linkduplex = LINK_FULLD;
3583 DBG_MSG(" Duplex == FULL\n");
3584 } else {
3585 linkduplex = LINK_HALFD;
3586 DBG_MSG(" Duplex == HALF\n");
3587 }
3588
3589 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) {
3590 DBG_MSG("slicoss: %s (%s) physport(%d) link still down\n",
3591 __func__, adapter->netdev->name, adapter->physport);
3592 return;
3593 }
3594
3595 /* link up event, but nothing has changed */
3596 if ((adapter->linkstate == LINK_UP) &&
3597 (linkup == LINK_UP) &&
3598 (adapter->linkspeed == linkspeed) &&
3599 (adapter->linkduplex == linkduplex)) {
3600 DBG_MSG("slicoss: %s (%s) port(%d) link still up\n",
3601 __func__, adapter->netdev->name, adapter->physport);
3602 return;
3603 }
3604
3605 /* link has changed at this point */
3606
3607 /* link has gone from up to down */
3608 if (linkup == LINK_DOWN) {
3609 adapter->linkstate = LINK_DOWN;
3610 DBG_MSG("slicoss: %s %d LinkDown!\n", __func__,
3611 adapter->physport);
3612 return;
3613 }
3614
3615 /* link has gone from down to up */
3616 adapter->linkspeed = linkspeed;
3617 adapter->linkduplex = linkduplex;
3618
3619 if (adapter->linkstate != LINK_UP) {
3620 /* setup the mac */
3621 DBG_MSG("%s call slic_config_set\n", __func__);
3622 slic_config_set(adapter, TRUE);
3623 adapter->linkstate = LINK_UP;
3624 DBG_MSG("\n(%s) Link UP: CALL slic_if_start_queue",
3625 adapter->netdev->name);
3626 slic_if_start_queue(adapter);
3627 }
3628 #if 1
3629 switch (linkspeed) {
3630 case LINK_1000MB:
3631 DBG_MSG
3632 ("\n(%s) LINK UP!: GIGABIT SPEED == 1000MB duplex[%x]\n",
3633 adapter->netdev->name, adapter->linkduplex);
3634 break;
3635 case LINK_100MB:
3636 DBG_MSG("\n(%s) LINK UP!: SPEED == 100MB duplex[%x]\n",
3637 adapter->netdev->name, adapter->linkduplex);
3638 break;
3639 default:
3640 DBG_MSG("\n(%s) LINK UP!: SPEED == 10MB duplex[%x]\n",
3641 adapter->netdev->name, adapter->linkduplex);
3642 break;
3643 }
3644 #endif
3645 }
3646
3647 /*
3648 * this is here to checksum the eeprom, there is some ucode bug
3649 * which prevens us from using the ucode result.
3650 * remove this once ucode is fixed.
3651 */
3652 static ushort slic_eeprom_cksum(char *m, int len)
3653 {
3654 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
3655 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
3656 }
3657
3658 u16 *w;
3659 u32 sum = 0;
3660 u32 byte_swapped = 0;
3661 u32 w_int;
3662
3663 union {
3664 char c[2];
3665 ushort s;
3666 } s_util;
3667
3668 union {
3669 ushort s[2];
3670 int l;
3671 } l_util;
3672
3673 l_util.l = 0;
3674 s_util.s = 0;
3675
3676 w = (u16 *)m;
3677 #ifdef CONFIG_X86_64
3678 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
3679 #else
3680 w_int = (u32) (w);
3681 #endif
3682 if ((1 & w_int) && (len > 0)) {
3683 REDUCE;
3684 sum <<= 8;
3685 s_util.c[0] = *(unsigned char *)w;
3686 w = (u16 *)((char *)w + 1);
3687 len--;
3688 byte_swapped = 1;
3689 }
3690
3691 /* Unroll the loop to make overhead from branches &c small. */
3692 while ((len -= 32) >= 0) {
3693 sum += w[0];
3694 sum += w[1];
3695 sum += w[2];
3696 sum += w[3];
3697 sum += w[4];
3698 sum += w[5];
3699 sum += w[6];
3700 sum += w[7];
3701 sum += w[8];
3702 sum += w[9];
3703 sum += w[10];
3704 sum += w[11];
3705 sum += w[12];
3706 sum += w[13];
3707 sum += w[14];
3708 sum += w[15];
3709 w = (u16 *)((ulong) w + 16); /* verify */
3710 }
3711 len += 32;
3712 while ((len -= 8) >= 0) {
3713 sum += w[0];
3714 sum += w[1];
3715 sum += w[2];
3716 sum += w[3];
3717 w = (u16 *)((ulong) w + 4); /* verify */
3718 }
3719 len += 8;
3720 if (len != 0 || byte_swapped != 0) {
3721 REDUCE;
3722 while ((len -= 2) >= 0)
3723 sum += *w++; /* verify */
3724 if (byte_swapped) {
3725 REDUCE;
3726 sum <<= 8;
3727 byte_swapped = 0;
3728 if (len == -1) {
3729 s_util.c[1] = *(char *) w;
3730 sum += s_util.s;
3731 len = 0;
3732 } else {
3733 len = -1;
3734 }
3735
3736 } else if (len == -1) {
3737 s_util.c[0] = *(char *) w;
3738 }
3739
3740 if (len == -1) {
3741 s_util.c[1] = 0;
3742 sum += s_util.s;
3743 }
3744 }
3745 REDUCE;
3746 return (ushort) sum;
3747 }
3748
3749 static int slic_rspqueue_init(struct adapter *adapter)
3750 {
3751 int i;
3752 struct slic_rspqueue *rspq = &adapter->rspqueue;
3753 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3754 u32 paddrh = 0;
3755
3756 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3757 adapter->netdev->name, adapter);
3758 ASSERT(adapter->state == ADAPT_DOWN);
3759 memset(rspq, 0, sizeof(struct slic_rspqueue));
3760
3761 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3762
3763 for (i = 0; i < rspq->num_pages; i++) {
3764 rspq->vaddr[i] =
3765 pci_alloc_consistent(adapter->pcidev, PAGE_SIZE,
3766 &rspq->paddr[i]);
3767 if (!rspq->vaddr[i]) {
3768 DBG_ERROR
3769 ("rspqueue_init_failed pci_alloc_consistent\n");
3770 slic_rspqueue_free(adapter);
3771 return STATUS_FAILURE;
3772 }
3773 #ifndef CONFIG_X86_64
3774 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3775 (u32) rspq->vaddr[i]);
3776 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3777 (u32) rspq->paddr[i]);
3778 #endif
3779 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3780 /* DBG_MSG("slicoss: %s UPLOAD RSPBUFF Page pageix[%x] paddr[%p] "
3781 "vaddr[%p]\n",
3782 __func__, i, (void *)rspq->paddr[i], rspq->vaddr[i]); */
3783
3784 if (paddrh == 0) {
3785 WRITE_REG(slic_regs->slic_rbar,
3786 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3787 DONT_FLUSH);
3788 } else {
3789 WRITE_REG64(adapter,
3790 slic_regs->slic_rbar64,
3791 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3792 slic_regs->slic_addr_upper,
3793 paddrh, DONT_FLUSH);
3794 }
3795 }
3796 rspq->offset = 0;
3797 rspq->pageindex = 0;
3798 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3799 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3800 adapter->netdev->name, adapter);
3801 return STATUS_SUCCESS;
3802 }
3803
3804 static int slic_rspqueue_reset(struct adapter *adapter)
3805 {
3806 struct slic_rspqueue *rspq = &adapter->rspqueue;
3807
3808 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3809 adapter->netdev->name, adapter);
3810 ASSERT(adapter->state == ADAPT_DOWN);
3811 ASSERT(rspq);
3812
3813 DBG_MSG("slicoss: Nothing to do. rspq[%p]\n"
3814 " offset[%x]\n"
3815 " pageix[%x]\n"
3816 " rspbuf[%p]\n",
3817 rspq, rspq->offset, rspq->pageindex, rspq->rspbuf);
3818
3819 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3820 adapter->netdev->name, adapter);
3821 return STATUS_SUCCESS;
3822 }
3823
3824 static void slic_rspqueue_free(struct adapter *adapter)
3825 {
3826 int i;
3827 struct slic_rspqueue *rspq = &adapter->rspqueue;
3828
3829 DBG_MSG("slicoss: %s adapter[%p] port %d rspq[%p] FreeRSPQ\n",
3830 __func__, adapter, adapter->physport, rspq);
3831 for (i = 0; i < rspq->num_pages; i++) {
3832 if (rspq->vaddr[i]) {
3833 DBG_MSG
3834 ("slicoss: pci_free_consistent rspq->vaddr[%p] \
3835 paddr[%p]\n",
3836 rspq->vaddr[i], (void *) rspq->paddr[i]);
3837 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3838 rspq->vaddr[i], rspq->paddr[i]);
3839 }
3840 rspq->vaddr[i] = NULL;
3841 rspq->paddr[i] = 0;
3842 }
3843 rspq->offset = 0;
3844 rspq->pageindex = 0;
3845 rspq->rspbuf = NULL;
3846 }
3847
3848 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3849 {
3850 struct slic_rspqueue *rspq = &adapter->rspqueue;
3851 struct slic_rspbuf *buf;
3852
3853 if (!(rspq->rspbuf->status))
3854 return NULL;
3855
3856 buf = rspq->rspbuf;
3857 #ifndef CONFIG_X86_64
3858 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3859 #endif
3860 ASSERT(buf->hosthandle);
3861 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3862 rspq->rspbuf++;
3863 #ifndef CONFIG_X86_64
3864 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3865 (u32) rspq->rspbuf);
3866 #endif
3867 } else {
3868 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3869 WRITE_REG64(adapter,
3870 adapter->slic_regs->slic_rbar64,
3871 (rspq->
3872 paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3873 adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3874 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3875 rspq->offset = 0;
3876 rspq->rspbuf = (struct slic_rspbuf *)
3877 rspq->vaddr[rspq->pageindex];
3878 #ifndef CONFIG_X86_64
3879 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3880 (u32) rspq->rspbuf);
3881 #endif
3882 }
3883 #ifndef CONFIG_X86_64
3884 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3885 #endif
3886 return buf;
3887 }
3888
3889 static void slic_cmdqmem_init(struct adapter *adapter)
3890 {
3891 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3892
3893 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3894 }
3895
3896 static void slic_cmdqmem_free(struct adapter *adapter)
3897 {
3898 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3899 int i;
3900
3901 DBG_MSG("slicoss: (%s) adapter[%p] port %d rspq[%p] Free CMDQ Memory\n",
3902 __func__, adapter, adapter->physport, cmdqmem);
3903 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3904 if (cmdqmem->pages[i]) {
3905 DBG_MSG("slicoss: %s Deallocate page CmdQPage[%p]\n",
3906 __func__, (void *) cmdqmem->pages[i]);
3907 pci_free_consistent(adapter->pcidev,
3908 PAGE_SIZE,
3909 (void *) cmdqmem->pages[i],
3910 cmdqmem->dma_pages[i]);
3911 }
3912 }
3913 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3914 }
3915
3916 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3917 {
3918 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3919 u32 *pageaddr;
3920
3921 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3922 return NULL;
3923 pageaddr = pci_alloc_consistent(adapter->pcidev,
3924 PAGE_SIZE,
3925 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3926 if (!pageaddr)
3927 return NULL;
3928 #ifndef CONFIG_X86_64
3929 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3930 #endif
3931 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3932 cmdqmem->pagecnt++;
3933 return pageaddr;
3934 }
3935
3936 static int slic_cmdq_init(struct adapter *adapter)
3937 {
3938 int i;
3939 u32 *pageaddr;
3940
3941 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
3942 ASSERT(adapter->state == ADAPT_DOWN);
3943 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3944 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3945 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3946 spin_lock_init(&adapter->cmdq_all.lock.lock);
3947 spin_lock_init(&adapter->cmdq_free.lock.lock);
3948 spin_lock_init(&adapter->cmdq_done.lock.lock);
3949 slic_cmdqmem_init(adapter);
3950 adapter->slic_handle_ix = 1;
3951 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3952 pageaddr = slic_cmdqmem_addpage(adapter);
3953 #ifndef CONFIG_X86_64
3954 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3955 #endif
3956 if (!pageaddr) {
3957 slic_cmdq_free(adapter);
3958 return STATUS_FAILURE;
3959 }
3960 slic_cmdq_addcmdpage(adapter, pageaddr);
3961 }
3962 adapter->slic_handle_ix = 1;
3963 DBG_MSG("slicoss: %s reset slic_handle_ix to ONE\n", __func__);
3964
3965 return STATUS_SUCCESS;
3966 }
3967
3968 static void slic_cmdq_free(struct adapter *adapter)
3969 {
3970 struct slic_hostcmd *cmd;
3971
3972 DBG_MSG("slicoss: %s adapter[%p] port %d FreeCommandsFrom CMDQ\n",
3973 __func__, adapter, adapter->physport);
3974 cmd = adapter->cmdq_all.head;
3975 while (cmd) {
3976 if (cmd->busy) {
3977 struct sk_buff *tempskb;
3978
3979 tempskb = cmd->skb;
3980 if (tempskb) {
3981 cmd->skb = NULL;
3982 dev_kfree_skb_irq(tempskb);
3983 }
3984 }
3985 cmd = cmd->next_all;
3986 }
3987 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3988 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3989 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3990 slic_cmdqmem_free(adapter);
3991 }
3992
3993 static void slic_cmdq_reset(struct adapter *adapter)
3994 {
3995 struct slic_hostcmd *hcmd;
3996 struct sk_buff *skb;
3997 u32 outstanding;
3998
3999 DBG_MSG("%s ENTER adapter[%p]\n", __func__, adapter);
4000 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
4001 adapter->cmdq_free.lock.flags);
4002 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
4003 adapter->cmdq_done.lock.flags);
4004 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
4005 outstanding -= adapter->cmdq_free.count;
4006 hcmd = adapter->cmdq_all.head;
4007 while (hcmd) {
4008 if (hcmd->busy) {
4009 skb = hcmd->skb;
4010 ASSERT(skb);
4011 DBG_MSG("slicoss: %s hcmd[%p] skb[%p] ", __func__,
4012 hcmd, skb);
4013 hcmd->busy = 0;
4014 hcmd->skb = NULL;
4015 DBG_MSG(" Free SKB\n");
4016 dev_kfree_skb_irq(skb);
4017 }
4018 hcmd = hcmd->next_all;
4019 }
4020 adapter->cmdq_free.count = 0;
4021 adapter->cmdq_free.head = NULL;
4022 adapter->cmdq_free.tail = NULL;
4023 adapter->cmdq_done.count = 0;
4024 adapter->cmdq_done.head = NULL;
4025 adapter->cmdq_done.tail = NULL;
4026 adapter->cmdq_free.head = adapter->cmdq_all.head;
4027 hcmd = adapter->cmdq_all.head;
4028 while (hcmd) {
4029 adapter->cmdq_free.count++;
4030 hcmd->next = hcmd->next_all;
4031 hcmd = hcmd->next_all;
4032 }
4033 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4034 DBG_ERROR("%s free_count %d != all count %d\n", __func__,
4035 adapter->cmdq_free.count, adapter->cmdq_all.count);
4036 }
4037 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
4038 adapter->cmdq_done.lock.flags);
4039 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
4040 adapter->cmdq_free.lock.flags);
4041 DBG_MSG("%s EXIT adapter[%p]\n", __func__, adapter);
4042 }
4043
4044 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4045 {
4046 struct slic_hostcmd *cmd;
4047 struct slic_hostcmd *prev;
4048 struct slic_hostcmd *tail;
4049 struct slic_cmdqueue *cmdq;
4050 int cmdcnt;
4051 void *cmdaddr;
4052 ulong phys_addr;
4053 u32 phys_addrl;
4054 u32 phys_addrh;
4055 struct slic_handle *pslic_handle;
4056
4057 cmdaddr = page;
4058 cmd = (struct slic_hostcmd *)cmdaddr;
4059 /* DBG_MSG("CMDQ Page addr[%p] ix[%d] pfree[%p]\n", cmdaddr, slic_handle_ix,
4060 adapter->pfree_slic_handles); */
4061 cmdcnt = 0;
4062
4063 phys_addr = virt_to_bus((void *)page);
4064 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
4065 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4066
4067 prev = NULL;
4068 tail = cmd;
4069 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
4070 (adapter->slic_handle_ix < 256)) {
4071 /* Allocate and initialize a SLIC_HANDLE for this command */
4072 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4073 if (pslic_handle == NULL)
4074 ASSERT(0);
4075 ASSERT(pslic_handle ==
4076 &adapter->slic_handles[pslic_handle->token.
4077 handle_index]);
4078 pslic_handle->type = SLIC_HANDLE_CMD;
4079 pslic_handle->address = (void *) cmd;
4080 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
4081 pslic_handle->other_handle = NULL;
4082 pslic_handle->next = NULL;
4083
4084 cmd->pslic_handle = pslic_handle;
4085 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
4086 cmd->busy = FALSE;
4087 cmd->paddrl = phys_addrl;
4088 cmd->paddrh = phys_addrh;
4089 cmd->next_all = prev;
4090 cmd->next = prev;
4091 prev = cmd;
4092 phys_addrl += SLIC_HOSTCMD_SIZE;
4093 cmdaddr += SLIC_HOSTCMD_SIZE;
4094
4095 cmd = (struct slic_hostcmd *)cmdaddr;
4096 cmdcnt++;
4097 }
4098
4099 cmdq = &adapter->cmdq_all;
4100 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4101 tail->next_all = cmdq->head;
4102 ASSERT(VALID_ADDRESS(prev));
4103 cmdq->head = prev;
4104 cmdq = &adapter->cmdq_free;
4105 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4106 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4107 tail->next = cmdq->head;
4108 ASSERT(VALID_ADDRESS(prev));
4109 cmdq->head = prev;
4110 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4111 }
4112
4113 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4114 {
4115 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
4116 struct slic_hostcmd *cmd = NULL;
4117
4118 lock_and_retry:
4119 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4120 retry:
4121 cmd = cmdq->head;
4122 if (cmd) {
4123 cmdq->head = cmd->next;
4124 cmdq->count--;
4125 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4126 } else {
4127 slic_cmdq_getdone(adapter);
4128 cmd = cmdq->head;
4129 if (cmd) {
4130 goto retry;
4131 } else {
4132 u32 *pageaddr;
4133
4134 spin_unlock_irqrestore(&cmdq->lock.lock,
4135 cmdq->lock.flags);
4136 pageaddr = slic_cmdqmem_addpage(adapter);
4137 if (pageaddr) {
4138 slic_cmdq_addcmdpage(adapter, pageaddr);
4139 goto lock_and_retry;
4140 }
4141 }
4142 }
4143 return cmd;
4144 }
4145
4146 static void slic_cmdq_getdone(struct adapter *adapter)
4147 {
4148 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
4149 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4150
4151 ASSERT(free_cmdq->head == NULL);
4152 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4153 ASSERT(VALID_ADDRESS(done_cmdq->head));
4154
4155 free_cmdq->head = done_cmdq->head;
4156 free_cmdq->count = done_cmdq->count;
4157 done_cmdq->head = NULL;
4158 done_cmdq->tail = NULL;
4159 done_cmdq->count = 0;
4160 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4161 }
4162
4163 static void slic_cmdq_putdone_irq(struct adapter *adapter,
4164 struct slic_hostcmd *cmd)
4165 {
4166 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4167
4168 spin_lock(&cmdq->lock.lock);
4169 cmd->busy = 0;
4170 ASSERT(VALID_ADDRESS(cmdq->head));
4171 cmd->next = cmdq->head;
4172 ASSERT(VALID_ADDRESS(cmd));
4173 cmdq->head = cmd;
4174 cmdq->count++;
4175 if ((adapter->xmitq_full) && (cmdq->count > 10))
4176 netif_wake_queue(adapter->netdev);
4177 spin_unlock(&cmdq->lock.lock);
4178 }
4179
4180 static int slic_rcvqueue_init(struct adapter *adapter)
4181 {
4182 int i, count;
4183 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4184
4185 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4186 ASSERT(adapter->state == ADAPT_DOWN);
4187 rcvq->tail = NULL;
4188 rcvq->head = NULL;
4189 rcvq->size = SLIC_RCVQ_ENTRIES;
4190 rcvq->errors = 0;
4191 rcvq->count = 0;
4192 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
4193 count = 0;
4194 while (i) {
4195 count += slic_rcvqueue_fill(adapter);
4196 i--;
4197 }
4198 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
4199 slic_rcvqueue_free(adapter);
4200 return STATUS_FAILURE;
4201 }
4202 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4203 return STATUS_SUCCESS;
4204 }
4205
4206 static int slic_rcvqueue_reset(struct adapter *adapter)
4207 {
4208 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4209
4210 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4211 ASSERT(adapter->state == ADAPT_DOWN);
4212 ASSERT(rcvq);
4213
4214 DBG_MSG("slicoss: Nothing to do. rcvq[%p]\n"
4215 " count[%x]\n"
4216 " head[%p]\n"
4217 " tail[%p]\n",
4218 rcvq, rcvq->count, rcvq->head, rcvq->tail);
4219
4220 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4221 return STATUS_SUCCESS;
4222 }
4223
4224 static void slic_rcvqueue_free(struct adapter *adapter)
4225 {
4226 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4227 struct sk_buff *skb;
4228
4229 while (rcvq->head) {
4230 skb = rcvq->head;
4231 rcvq->head = rcvq->head->next;
4232 dev_kfree_skb(skb);
4233 }
4234 rcvq->tail = NULL;
4235 rcvq->head = NULL;
4236 rcvq->count = 0;
4237 }
4238
4239 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4240 {
4241 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4242 struct sk_buff *skb;
4243 struct slic_rcvbuf *rcvbuf;
4244 int count;
4245
4246 if (rcvq->count) {
4247 skb = rcvq->head;
4248 rcvbuf = (struct slic_rcvbuf *)skb->head;
4249 ASSERT(rcvbuf);
4250
4251 if (rcvbuf->status & IRHDDR_SVALID) {
4252 rcvq->head = rcvq->head->next;
4253 skb->next = NULL;
4254 rcvq->count--;
4255 } else {
4256 skb = NULL;
4257 }
4258 } else {
4259 DBG_ERROR("RcvQ Empty!! adapter[%p] rcvq[%p] count[%x]\n",
4260 adapter, rcvq, rcvq->count);
4261 skb = NULL;
4262 }
4263 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
4264 count = slic_rcvqueue_fill(adapter);
4265 if (!count)
4266 break;
4267 }
4268 if (skb)
4269 rcvq->errors = 0;
4270 return skb;
4271 }
4272
4273 static int slic_rcvqueue_fill(struct adapter *adapter)
4274 {
4275 void *paddr;
4276 u32 paddrl;
4277 u32 paddrh;
4278 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4279 int i = 0;
4280
4281 while (i < SLIC_RCVQ_FILLENTRIES) {
4282 struct slic_rcvbuf *rcvbuf;
4283 struct sk_buff *skb;
4284 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4285 retry_rcvqfill:
4286 #endif
4287 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
4288 if (skb) {
4289 paddr = (void *)pci_map_single(adapter->pcidev,
4290 skb->data,
4291 SLIC_RCVQ_RCVBUFSIZE,
4292 PCI_DMA_FROMDEVICE);
4293 paddrl = SLIC_GET_ADDR_LOW(paddr);
4294 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4295
4296 skb->len = SLIC_RCVBUF_HEADSIZE;
4297 rcvbuf = (struct slic_rcvbuf *)skb->head;
4298 rcvbuf->status = 0;
4299 skb->next = NULL;
4300 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4301 if (paddrl == 0) {
4302 DBG_ERROR
4303 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4304 "skb[%p] PROBLEM\n"
4305 " skbdata[%p]\n"
4306 " skblen[%x]\n"
4307 " paddr[%p]\n"
4308 " paddrl[%x]\n"
4309 " paddrh[%x]\n", __func__, skb,
4310 skb->data, skb->len, paddr, paddrl,
4311 paddrh);
4312 DBG_ERROR(" rcvq->head[%p]\n"
4313 " rcvq->tail[%p]\n"
4314 " rcvq->count[%x]\n",
4315 rcvq->head, rcvq->tail, rcvq->count);
4316 DBG_ERROR("SKIP THIS SKB!!!!!!!!\n");
4317 goto retry_rcvqfill;
4318 }
4319 #else
4320 if (paddrl == 0) {
4321 DBG_ERROR
4322 ("\n\n%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4323 "skb[%p] GIVE TO CARD ANYWAY\n"
4324 " skbdata[%p]\n"
4325 " paddr[%p]\n"
4326 " paddrl[%x]\n"
4327 " paddrh[%x]\n", __func__, skb,
4328 skb->data, paddr, paddrl, paddrh);
4329 }
4330 #endif
4331 if (paddrh == 0) {
4332 WRITE_REG(adapter->slic_regs->slic_hbar,
4333 (u32) paddrl, DONT_FLUSH);
4334 } else {
4335 WRITE_REG64(adapter,
4336 adapter->slic_regs->slic_hbar64,
4337 (u32) paddrl,
4338 adapter->slic_regs->slic_addr_upper,
4339 (u32) paddrh, DONT_FLUSH);
4340 }
4341 if (rcvq->head)
4342 rcvq->tail->next = skb;
4343 else
4344 rcvq->head = skb;
4345 rcvq->tail = skb;
4346 rcvq->count++;
4347 i++;
4348 } else {
4349 DBG_ERROR
4350 ("%s slic_rcvqueue_fill could only get [%d] "
4351 "skbuffs\n",
4352 adapter->netdev->name, i);
4353 break;
4354 }
4355 }
4356 return i;
4357 }
4358
4359 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4360 {
4361 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4362 void *paddr;
4363 u32 paddrl;
4364 u32 paddrh;
4365 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4366
4367 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
4368
4369 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
4370 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4371 rcvbuf->status = 0;
4372 skb->next = NULL;
4373
4374 paddrl = SLIC_GET_ADDR_LOW(paddr);
4375 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4376
4377 if (paddrl == 0) {
4378 DBG_ERROR
4379 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 skb[%p] PROBLEM\n"
4380 " skbdata[%p]\n" " skblen[%x]\n"
4381 " paddr[%p]\n" " paddrl[%x]\n"
4382 " paddrh[%x]\n", __func__, skb, skb->data,
4383 skb->len, paddr, paddrl, paddrh);
4384 DBG_ERROR(" rcvq->head[%p]\n"
4385 " rcvq->tail[%p]\n"
4386 " rcvq->count[%x]\n", rcvq->head, rcvq->tail,
4387 rcvq->count);
4388 }
4389 if (paddrh == 0) {
4390 WRITE_REG(adapter->slic_regs->slic_hbar, (u32) paddrl,
4391 DONT_FLUSH);
4392 } else {
4393 WRITE_REG64(adapter,
4394 adapter->slic_regs->slic_hbar64,
4395 paddrl,
4396 adapter->slic_regs->slic_addr_upper,
4397 paddrh, DONT_FLUSH);
4398 }
4399 if (rcvq->head)
4400 rcvq->tail->next = skb;
4401 else
4402 rcvq->head = skb;
4403 rcvq->tail = skb;
4404 rcvq->count++;
4405 return rcvq->count;
4406 }
4407
4408 static int slic_debug_card_show(struct seq_file *seq, void *v)
4409 {
4410 #ifdef MOOKTODO
4411 int i;
4412 struct sliccard *card = seq->private;
4413 struct slic_config *config = &card->config;
4414 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
4415 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4416 #endif
4417
4418 seq_printf(seq, "driver_version : %s", slic_proc_version);
4419 seq_printf(seq, "Microcode versions: \n");
4420 seq_printf(seq, " Gigabit (gb) : %s %s\n",
4421 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
4422 seq_printf(seq, " Gigabit Receiver : %s %s\n",
4423 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
4424 seq_printf(seq, "Vendor : %s\n", slic_vendor);
4425 seq_printf(seq, "Product Name : %s\n", slic_product_name);
4426 #ifdef MOOKTODO
4427 seq_printf(seq, "VendorId : %4.4X\n",
4428 config->VendorId);
4429 seq_printf(seq, "DeviceId : %4.4X\n",
4430 config->DeviceId);
4431 seq_printf(seq, "RevisionId : %2.2x\n",
4432 config->RevisionId);
4433 seq_printf(seq, "Bus # : %d\n", card->busnumber);
4434 seq_printf(seq, "Device # : %d\n", card->slotnumber);
4435 seq_printf(seq, "Interfaces : %d\n", card->card_size);
4436 seq_printf(seq, " Initialized : %d\n",
4437 card->adapters_activated);
4438 seq_printf(seq, " Allocated : %d\n",
4439 card->adapters_allocated);
4440 ASSERT(card->card_size <= SLIC_NBR_MACS);
4441 for (i = 0; i < card->card_size; i++) {
4442 seq_printf(seq,
4443 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
4444 i, config->macinfo[i].macaddrA[0],
4445 config->macinfo[i].macaddrA[1],
4446 config->macinfo[i].macaddrA[2],
4447 config->macinfo[i].macaddrA[3],
4448 config->macinfo[i].macaddrA[4],
4449 config->macinfo[i].macaddrA[5]);
4450 }
4451 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
4452 seq_printf(seq, " -------------------------------\n");
4453 for (i = 0; i < card->adapters_allocated; i++) {
4454 struct adapter *adapter;
4455
4456 adapter = card->adapter[i];
4457 if (adapter) {
4458 seq_printf(seq,
4459 " %d %d %s %s %s 0x%X\n",
4460 adapter->physport, adapter->state,
4461 SLIC_LINKSTATE(adapter->linkstate),
4462 SLIC_DUPLEX(adapter->linkduplex),
4463 SLIC_SPEED(adapter->linkspeed),
4464 (uint) adapter->irq);
4465 }
4466 }
4467 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
4468 seq_printf(seq, "RcvQ max entries : %4.4X\n",
4469 SLIC_RCVQ_ENTRIES);
4470 seq_printf(seq, "Ping Status : %8.8X\n",
4471 card->pingstatus);
4472 seq_printf(seq, "Minimum grant : %2.2x\n",
4473 config->MinGrant);
4474 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
4475 seq_printf(seq, "PciStatus : %4.4x\n",
4476 config->Pcistatus);
4477 seq_printf(seq, "Debug Device Id : %4.4x\n",
4478 config->DbgDevId);
4479 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
4480 config->DramRomFn);
4481 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
4482 config->NetIntPin1);
4483 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
4484 config->NetIntPin1);
4485 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
4486 config->NetIntPin1);
4487 seq_printf(seq, "PM capabilities : %4.4X\n",
4488 config->PMECapab);
4489 seq_printf(seq, "Network Clock Controls : %4.4X\n",
4490 config->NwClkCtrls);
4491
4492 switch (config->FruFormat) {
4493 case ATK_FRU_FORMAT:
4494 {
4495 seq_printf(seq,
4496 "Vendor : Alacritech, Inc.\n");
4497 seq_printf(seq,
4498 "Assembly # : %c%c%c%c%c%c\n",
4499 fru[0], fru[1], fru[2], fru[3], fru[4],
4500 fru[5]);
4501 seq_printf(seq,
4502 "Revision # : %c%c\n",
4503 fru[6], fru[7]);
4504
4505 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
4506 seq_printf(seq,
4507 "Serial # : "
4508 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
4509 fru[8], fru[9], fru[10],
4510 fru[11], fru[12], fru[13],
4511 fru[16], fru[17], fru[18],
4512 fru[19], fru[20], fru[21]);
4513 } else {
4514 seq_printf(seq,
4515 "Serial # : "
4516 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
4517 fru[8], fru[9], fru[10],
4518 fru[11], fru[12], fru[13],
4519 fru[14], fru[15], fru[16],
4520 fru[17], fru[18], fru[19],
4521 fru[20], fru[21]);
4522 }
4523 break;
4524 }
4525
4526 default:
4527 {
4528 seq_printf(seq,
4529 "Vendor : Alacritech, Inc.\n");
4530 seq_printf(seq,
4531 "Serial # : Empty FRU\n");
4532 break;
4533 }
4534 }
4535
4536 switch (config->OEMFruFormat) {
4537 case VENDOR1_FRU_FORMAT:
4538 {
4539 seq_printf(seq, "FRU Information:\n");
4540 seq_printf(seq, " Commodity # : %c\n",
4541 oemfru[0]);
4542 seq_printf(seq,
4543 " Assembly # : %c%c%c%c\n",
4544 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
4545 seq_printf(seq,
4546 " Revision # : %c%c\n",
4547 oemfru[5], oemfru[6]);
4548 seq_printf(seq,
4549 " Supplier # : %c%c\n",
4550 oemfru[7], oemfru[8]);
4551 seq_printf(seq,
4552 " Date : %c%c\n",
4553 oemfru[9], oemfru[10]);
4554 seq_sprintf(seq,
4555 " Sequence # : %c%c%c\n",
4556 oemfru[11], oemfru[12], oemfru[13]);
4557 break;
4558 }
4559
4560 case VENDOR2_FRU_FORMAT:
4561 {
4562 seq_printf(seq, "FRU Information:\n");
4563 seq_printf(seq,
4564 " Part # : "
4565 "%c%c%c%c%c%c%c%c\n",
4566 oemfru[0], oemfru[1], oemfru[2],
4567 oemfru[3], oemfru[4], oemfru[5],
4568 oemfru[6], oemfru[7]);
4569 seq_printf(seq,
4570 " Supplier # : %c%c%c%c%c\n",
4571 oemfru[8], oemfru[9], oemfru[10],
4572 oemfru[11], oemfru[12]);
4573 seq_printf(seq,
4574 " Date : %c%c%c\n",
4575 oemfru[13], oemfru[14], oemfru[15]);
4576 seq_sprintf(seq,
4577 " Sequence # : %c%c%c%c\n",
4578 oemfru[16], oemfru[17], oemfru[18],
4579 oemfru[19]);
4580 break;
4581 }
4582
4583 case VENDOR3_FRU_FORMAT:
4584 {
4585 seq_printf(seq, "FRU Information:\n");
4586 }
4587
4588 case VENDOR4_FRU_FORMAT:
4589 {
4590 seq_printf(seq, "FRU Information:\n");
4591 seq_printf(seq,
4592 " FRU Number : "
4593 "%c%c%c%c%c%c%c%c\n",
4594 oemfru[0], oemfru[1], oemfru[2],
4595 oemfru[3], oemfru[4], oemfru[5],
4596 oemfru[6], oemfru[7]);
4597 seq_sprintf(seq,
4598 " Part Number : "
4599 "%c%c%c%c%c%c%c%c\n",
4600 oemfru[8], oemfru[9], oemfru[10],
4601 oemfru[11], oemfru[12], oemfru[13],
4602 oemfru[14], oemfru[15]);
4603 seq_printf(seq,
4604 " EC Level : "
4605 "%c%c%c%c%c%c%c%c\n",
4606 oemfru[16], oemfru[17], oemfru[18],
4607 oemfru[19], oemfru[20], oemfru[21],
4608 oemfru[22], oemfru[23]);
4609 break;
4610 }
4611
4612 default:
4613 break;
4614 }
4615 #endif
4616
4617 return 0;
4618 }
4619
4620 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4621 {
4622 struct adapter *adapter = seq->private;
4623
4624 if ((adapter->netdev) && (adapter->netdev->name)) {
4625 seq_printf(seq, "info: interface : %s\n",
4626 adapter->netdev->name);
4627 }
4628 seq_printf(seq, "info: status : %s\n",
4629 SLIC_LINKSTATE(adapter->linkstate));
4630 seq_printf(seq, "info: port : %d\n",
4631 adapter->physport);
4632 seq_printf(seq, "info: speed : %s\n",
4633 SLIC_SPEED(adapter->linkspeed));
4634 seq_printf(seq, "info: duplex : %s\n",
4635 SLIC_DUPLEX(adapter->linkduplex));
4636 seq_printf(seq, "info: irq : 0x%X\n",
4637 (uint) adapter->irq);
4638 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
4639 adapter->card->loadlevel_current);
4640 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
4641 SLIC_RCVQ_ENTRIES);
4642 seq_printf(seq, "info: RcvQ current : %4.4X\n",
4643 adapter->rcvqueue.count);
4644 seq_printf(seq, "rx stats: packets : %8.8lX\n",
4645 adapter->stats.rx_packets);
4646 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
4647 adapter->stats.rx_bytes);
4648 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
4649 adapter->rcv_broadcasts);
4650 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
4651 adapter->rcv_multicasts);
4652 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
4653 adapter->rcv_unicasts);
4654 seq_printf(seq, "rx stats: errors : %8.8X\n",
4655 (u32) adapter->slic_stats.iface.rcv_errors);
4656 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
4657 (u32) adapter->slic_stats.iface.rcv_discards);
4658 seq_printf(seq, "rx stats: drops : %8.8X\n",
4659 (u32) adapter->rcv_drops);
4660 seq_printf(seq, "tx stats: packets : %8.8lX\n",
4661 adapter->stats.tx_packets);
4662 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
4663 adapter->stats.tx_bytes);
4664 seq_printf(seq, "tx stats: errors : %8.8X\n",
4665 (u32) adapter->slic_stats.iface.xmt_errors);
4666 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
4667 adapter->stats.multicast);
4668 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
4669 (u32) adapter->slic_stats.iface.xmit_collisions);
4670 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
4671 adapter->max_isr_rcvs);
4672 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
4673 adapter->rcv_interrupt_yields);
4674 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
4675 adapter->max_isr_xmits);
4676 seq_printf(seq, "perf: error interrupts : %8.8X\n",
4677 adapter->error_interrupts);
4678 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
4679 adapter->error_rmiss_interrupts);
4680 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
4681 adapter->rcv_interrupts);
4682 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
4683 adapter->xmit_interrupts);
4684 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
4685 adapter->linkevent_interrupts);
4686 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
4687 adapter->upr_interrupts);
4688 seq_printf(seq, "perf: interrupt count : %8.8X\n",
4689 adapter->num_isrs);
4690 seq_printf(seq, "perf: false interrupts : %8.8X\n",
4691 adapter->false_interrupts);
4692 seq_printf(seq, "perf: All register writes : %8.8X\n",
4693 adapter->all_reg_writes);
4694 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
4695 adapter->icr_reg_writes);
4696 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
4697 adapter->isr_reg_writes);
4698 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
4699 adapter->if_events.oflow802);
4700 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
4701 adapter->if_events.Tprtoflow);
4702 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
4703 adapter->if_events.uflow802);
4704 seq_printf(seq, "ifevents: receive early : %8.8X\n",
4705 adapter->if_events.rcvearly);
4706 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
4707 adapter->if_events.Bufov);
4708 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
4709 adapter->if_events.Carre);
4710 seq_printf(seq, "ifevents: Long : %8.8X\n",
4711 adapter->if_events.Longe);
4712 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
4713 adapter->if_events.Invp);
4714 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
4715 adapter->if_events.Crc);
4716 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
4717 adapter->if_events.Drbl);
4718 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
4719 adapter->if_events.Code);
4720 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
4721 adapter->if_events.TpCsum);
4722 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
4723 adapter->if_events.TpHlen);
4724 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
4725 adapter->if_events.IpCsum);
4726 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
4727 adapter->if_events.IpLen);
4728 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
4729 adapter->if_events.IpHlen);
4730
4731 return 0;
4732 }
4733 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4734 {
4735 return single_open(file, slic_debug_adapter_show, inode->i_private);
4736 }
4737
4738 static int slic_debug_card_open(struct inode *inode, struct file *file)
4739 {
4740 return single_open(file, slic_debug_card_show, inode->i_private);
4741 }
4742
4743 static const struct file_operations slic_debug_adapter_fops = {
4744 .owner = THIS_MODULE,
4745 .open = slic_debug_adapter_open,
4746 .read = seq_read,
4747 .llseek = seq_lseek,
4748 .release = single_release,
4749 };
4750
4751 static const struct file_operations slic_debug_card_fops = {
4752 .owner = THIS_MODULE,
4753 .open = slic_debug_card_open,
4754 .read = seq_read,
4755 .llseek = seq_lseek,
4756 .release = single_release,
4757 };
4758
4759 static void slic_debug_adapter_create(struct adapter *adapter)
4760 {
4761 struct dentry *d;
4762 char name[7];
4763 struct sliccard *card = adapter->card;
4764
4765 if (!card->debugfs_dir)
4766 return;
4767
4768 sprintf(name, "port%d", adapter->port);
4769 d = debugfs_create_file(name, S_IRUGO,
4770 card->debugfs_dir, adapter,
4771 &slic_debug_adapter_fops);
4772 if (!d || IS_ERR(d))
4773 pr_info(PFX "%s: debugfs create failed\n", name);
4774 else
4775 adapter->debugfs_entry = d;
4776 }
4777
4778 static void slic_debug_adapter_destroy(struct adapter *adapter)
4779 {
4780 if (adapter->debugfs_entry) {
4781 debugfs_remove(adapter->debugfs_entry);
4782 adapter->debugfs_entry = NULL;
4783 }
4784 }
4785
4786 static void slic_debug_card_create(struct sliccard *card)
4787 {
4788 struct dentry *d;
4789 char name[IFNAMSIZ];
4790
4791 snprintf(name, sizeof(name), "slic%d", card->cardnum);
4792 d = debugfs_create_dir(name, slic_debugfs);
4793 if (!d || IS_ERR(d))
4794 pr_info(PFX "%s: debugfs create dir failed\n",
4795 name);
4796 else {
4797 card->debugfs_dir = d;
4798 d = debugfs_create_file("cardinfo", S_IRUGO,
4799 slic_debugfs, card,
4800 &slic_debug_card_fops);
4801 if (!d || IS_ERR(d))
4802 pr_info(PFX "%s: debugfs create failed\n",
4803 name);
4804 else
4805 card->debugfs_cardinfo = d;
4806 }
4807 }
4808
4809 static void slic_debug_card_destroy(struct sliccard *card)
4810 {
4811 int i;
4812
4813 for (i = 0; i < card->card_size; i++) {
4814 struct adapter *adapter;
4815
4816 adapter = card->adapter[i];
4817 if (adapter)
4818 slic_debug_adapter_destroy(adapter);
4819 }
4820 if (card->debugfs_cardinfo) {
4821 debugfs_remove(card->debugfs_cardinfo);
4822 card->debugfs_cardinfo = NULL;
4823 }
4824 if (card->debugfs_dir) {
4825 debugfs_remove(card->debugfs_dir);
4826 card->debugfs_dir = NULL;
4827 }
4828 }
4829
4830 static void slic_debug_init(void)
4831 {
4832 struct dentry *ent;
4833
4834 ent = debugfs_create_dir("slic", NULL);
4835 if (!ent || IS_ERR(ent)) {
4836 pr_info(PFX "debugfs create directory failed\n");
4837 return;
4838 }
4839
4840 slic_debugfs = ent;
4841 }
4842
4843 static void slic_debug_cleanup(void)
4844 {
4845 if (slic_debugfs) {
4846 debugfs_remove(slic_debugfs);
4847 slic_debugfs = NULL;
4848 }
4849 }
4850
4851 /*=============================================================================
4852 =============================================================================
4853 === ===
4854 === SLIC DUMP MANAGEMENT SECTION ===
4855 === ===
4856 === ===
4857 === Dump routines ===
4858 === ===
4859 === ===
4860 =============================================================================
4861 ============================================================================*/
4862
4863 #if SLIC_DUMP_ENABLED
4864
4865 #include <stdarg.h>
4866
4867 void *slic_dump_handle; /* thread handle */
4868
4869 /*
4870 * These are the only things you should do on a core-file: use only these
4871 * functions to write out all the necessary info.
4872 */
4873 static int slic_dump_seek(struct file *SLIChandle, u32 file_offset)
4874 {
4875 if (SLIChandle->f_pos != file_offset) {
4876 /*DBG_MSG("slic_dump_seek now needed [%x : %x]\n",
4877 (u32)SLIChandle->f_pos, (u32)file_offset); */
4878 if (SLIChandle->f_op->llseek) {
4879 if (SLIChandle->f_op->
4880 llseek(SLIChandle, file_offset, 0) != file_offset)
4881 return 0;
4882 } else {
4883 SLIChandle->f_pos = file_offset;
4884 }
4885 }
4886 return 1;
4887 }
4888
4889 static int slic_dump_write(struct sliccard *card,
4890 const void *addr, int size, u32 file_offset)
4891 {
4892 int r = 1;
4893 u32 result = 0;
4894 struct file *SLIChandle = card->dumphandle;
4895
4896 #ifdef HISTORICAL /* legacy */
4897 down(&SLIChandle->f_dentry->d_inode->i_sem);
4898 #endif
4899 if (size) {
4900 slic_dump_seek(SLIChandle, file_offset);
4901
4902 result =
4903 SLIChandle->f_op->write(SLIChandle, addr, size,
4904 &SLIChandle->f_pos);
4905
4906 r = result == size;
4907 }
4908
4909 card->dumptime_complete = jiffies;
4910 card->dumptime_delta = card->dumptime_complete - card->dumptime_start;
4911 card->dumptime_start = jiffies;
4912
4913 #ifdef HISTORICAL
4914 up(&SLIChandle->f_dentry->d_inode->i_sem);
4915 #endif
4916 if (!r) {
4917 DBG_ERROR("%s: addr[%p] size[%x] result[%x] file_offset[%x]\n",
4918 __func__, addr, size, result, file_offset);
4919 }
4920 return r;
4921 }
4922
4923 static uint slic_init_dump_thread(struct sliccard *card)
4924 {
4925 card->dump_task_id = kthread_run(slic_dump_thread, (void *)card, 0);
4926
4927 /* DBG_MSG("create slic_dump_thread dump_pid[%x]\n", card->dump_pid); */
4928 if (IS_ERR(card->dump_task_id)) {
4929 DBG_MSG("create slic_dump_thread FAILED \n");
4930 return STATUS_FAILURE;
4931 }
4932
4933 return STATUS_SUCCESS;
4934 }
4935
4936 static int slic_dump_thread(void *context)
4937 {
4938 struct sliccard *card = (struct sliccard *)context;
4939 struct adapter *adapter;
4940 struct adapter *dump_adapter = NULL;
4941 u32 dump_complete = 0;
4942 u32 delay = SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
4943 struct slic_regs *pregs;
4944 u32 i;
4945 struct slic_upr *upr, *uprnext;
4946 u32 dump_card;
4947
4948 ASSERT(card);
4949
4950 card->dumpthread_running = 1;
4951
4952 #ifdef HISTORICAL
4953 lock_kernel();
4954 /*
4955 * This thread doesn't need any user-level access,
4956 * so get rid of all our resources
4957 */
4958 exit_files(current); /* daemonize doesn't do exit_files */
4959 current->files = init_task.files;
4960 atomic_inc(&current->files->count);
4961 #endif
4962
4963 daemonize("%s", "slicmon");
4964
4965 /* Setup a nice name */
4966 strcpy(current->comm, "slicmon");
4967 DBG_ERROR
4968 ("slic_dump_thread[slicmon] daemon is alive card[%p] pid[%x]\n",
4969 card, card->dump_task_id->pid);
4970
4971 /*
4972 * Send me a signal to get me to die (for debugging)
4973 */
4974 do {
4975 /*
4976 * If card state is not set to up, skip
4977 */
4978 if (card->state != CARD_UP) {
4979 if (card->adapters_activated)
4980 goto wait;
4981 else
4982 goto end_thread;
4983 }
4984 /*
4985 * Check the results of our last ping.
4986 */
4987 dump_card = 0;
4988 #ifdef SLIC_FAILURE_DUMP
4989 if (card->pingstatus != ISR_PINGMASK) {
4990 DBG_MSG
4991 ("\n[slicmon] CARD #%d TIMED OUT - status "
4992 "%x: DUMP THE CARD!\n",
4993 card->cardnum, card->pingstatus);
4994 dump_card = 1;
4995 }
4996 #else
4997 /*
4998 * Cause a card RESET instead?
4999 */
5000 if (card->pingstatus != ISR_PINGMASK) {
5001 /* todo. do we want to reset the card in production */
5002 /* DBG_MSG("\n[slicmon] CARD #%d TIMED OUT - "
5003 status %x: RESET THE CARD!\n", card->cardnum,
5004 card->pingstatus); */
5005 DBG_ERROR
5006 ("\n[slicmon] CARD #%d TIMED OUT - status %x: "
5007 "DUMP THE CARD!\n",
5008 card->cardnum, card->pingstatus);
5009 dump_card = 1;
5010 }
5011 #endif
5012 if ((dump_card)
5013 || (card->dump_requested == SLIC_DUMP_REQUESTED)) {
5014 if (card->dump_requested == SLIC_DUMP_REQUESTED) {
5015 DBG_ERROR
5016 ("[slicmon]: Dump card Requested: Card %x\n",
5017 card->cardnum);
5018 }
5019 if (card->pingstatus != ISR_PINGMASK) {
5020 ushort cpuid = 0;
5021 ushort crashpc = 0;
5022
5023 if (card->adapter[0]) {
5024 if ((card->adapter[0])->memorylength >=
5025 CRASH_INFO_OFFSET +
5026 sizeof(slic_crash_info)) {
5027 char *crashptr;
5028 p_slic_crash_info crashinfo;
5029
5030 crashptr =
5031 ((char *)card->adapter[0]->
5032 slic_regs) +
5033 CRASH_INFO_OFFSET;
5034 crashinfo =
5035 (p_slic_crash_info)
5036 crashptr;
5037 cpuid = crashinfo->cpu_id;
5038 crashpc = crashinfo->crash_pc;
5039 }
5040 }
5041 DBG_ERROR
5042 ("[slicmon]: Dump card: Card %x crashed "
5043 "and failed to answer PING. "
5044 "CPUID[%x] PC[%x]\n ",
5045 card->cardnum, cpuid, crashpc);
5046 }
5047
5048 card->dump_requested = SLIC_DUMP_IN_PROGRESS;
5049
5050 /*
5051 * Set the card state to DOWN and the adapter states
5052 * to RESET.They will check this in SimbaCheckForHang
5053 * and initiate interface reset (which in turn will
5054 * reinitialize the card).
5055 */
5056 card->state = CARD_DOWN;
5057
5058 for (i = 0; i < card->card_size; i++) {
5059 adapter = card->adapter[i];
5060 if (adapter) {
5061 slic_if_stop_queue(adapter);
5062
5063 if (adapter->state == ADAPT_UP) {
5064 adapter->state = ADAPT_RESET;
5065 adapter->linkstate = LINK_DOWN;
5066 DBG_ERROR
5067 ("[slicmon]: SLIC Card[%d] "
5068 "Port[%d] adapter[%p] "
5069 "down\n",
5070 (uint) card->cardnum,
5071 (uint) i, adapter);
5072 }
5073 #if SLIC_GET_STATS_TIMER_ENABLED
5074 /* free stats timer */
5075 if (adapter->statstimerset) {
5076 adapter->statstimerset = 0;
5077 del_timer(&adapter->statstimer);
5078 }
5079 #endif
5080 }
5081 }
5082
5083 for (i = 0; i < card->card_size; i++) {
5084 adapter = card->adapter[i];
5085 if ((adapter) && (adapter->activated)) {
5086 pregs = adapter->slic_regs;
5087 dump_adapter = adapter;
5088
5089 /*
5090 * If the dump status is zero, then
5091 * the utility processor has crashed.
5092 * If this is the case, any pending
5093 * utilityprocessor requests will not
5094 * complete and our dump commands will
5095 * not be issued.
5096 *
5097 * To avoid this we will clear any
5098 * pending utility processor requests
5099 * now.
5100 */
5101 if (!card->pingstatus) {
5102 spin_lock_irqsave(
5103 &adapter->upr_lock.lock,
5104 adapter->upr_lock.flags);
5105 upr = adapter->upr_list;
5106 while (upr) {
5107 uprnext = upr->next;
5108 kfree(upr);
5109 upr = uprnext;
5110 }
5111 adapter->upr_list = 0;
5112 adapter->upr_busy = 0;
5113 spin_unlock_irqrestore(
5114 &adapter->upr_lock.lock,
5115 adapter->upr_lock.flags);
5116 }
5117
5118 slic_dump_card(card, FALSE);
5119 dump_complete = 1;
5120 }
5121
5122 if (dump_complete) {
5123 DBG_ERROR("SLIC Dump Complete\n");
5124 /* Only dump the card one time */
5125 break;
5126 }
5127 }
5128
5129 if (dump_adapter) {
5130 DBG_ERROR
5131 ("slic dump completed. "
5132 "Reenable interfaces\n");
5133 slic_card_init(card, dump_adapter);
5134
5135 /*
5136 * Reenable the adapters that were reset
5137 */
5138 for (i = 0; i < card->card_size; i++) {
5139 adapter = card->adapter[i];
5140 if (adapter) {
5141 if (adapter->state ==
5142 ADAPT_RESET) {
5143 DBG_ERROR
5144 ("slicdump: SLIC "
5145 "Card[%d] Port[%d] adapter[%p] "
5146 "bring UP\n",
5147 (uint) card->
5148 cardnum, (uint) i,
5149 adapter);
5150 adapter->state =
5151 ADAPT_DOWN;
5152 adapter->linkstate =
5153 LINK_DOWN;
5154 slic_entry_open
5155 (adapter->netdev);
5156 }
5157 }
5158 }
5159
5160 card->dump_requested = SLIC_DUMP_DONE;
5161 }
5162 } else {
5163 /* if pingstatus != ISR_PINGMASK) || dump_requested...ELSE
5164 * We received a valid ping response.
5165 * Clear the Pingstatus field, find a valid adapter
5166 * structure and send another ping.
5167 */
5168 for (i = 0; i < card->card_size; i++) {
5169 adapter = card->adapter[i];
5170 if (adapter && (adapter->state == ADAPT_UP)) {
5171 card->pingstatus = 0;
5172 slic_upr_request(adapter, SLIC_UPR_PING,
5173 0, 0, 0, 0);
5174 break; /* Only issue one per card */
5175 }
5176 }
5177 }
5178 wait:
5179 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq, delay);
5180 } while (!signal_pending(current));
5181
5182 end_thread:
5183 /* DBG_MSG("[slicmon] slic_dump_thread card[%p] pid[%x] ENDING\n",
5184 card, card->dump_pid); */
5185 card->dumpthread_running = 0;
5186
5187 return 0;
5188 }
5189
5190 /*
5191 * Read a single byte from our dump index file. This
5192 * value is used as our suffix for our dump path. The
5193 * value is incremented and written back to the file
5194 */
5195 static unsigned char slic_get_dump_index(char *path)
5196 {
5197 unsigned char index = 0;
5198 #ifdef SLIC_DUMP_INDEX_SUPPORT
5199 u32 status;
5200 void *FileHandle;
5201 u32 offset;
5202
5203 offset = 0;
5204
5205 /*
5206 * Open the index file. If one doesn't exist, create it
5207 */
5208 status = create_file(&FileHandle);
5209
5210 if (status != STATUS_SUCCESS)
5211 return (unsigned char) 0;
5212
5213 status = read_file(FileHandle, &index, 1, &offset);
5214
5215 index++;
5216
5217 status = write_file(FileHandle, &index, 1, &offset);
5218
5219 close_file(FileHandle);
5220 #else
5221 index = 0;
5222 #endif
5223 return index;
5224 }
5225
5226 static struct file *slic_dump_open_file(struct sliccard *card)
5227 {
5228 struct file *SLIChandle = NULL;
5229 struct dentry *dentry = NULL;
5230 struct inode *inode = NULL;
5231 char SLICfile[50];
5232
5233 card->dumpfile_fs = get_fs();
5234
5235 set_fs(KERNEL_DS);
5236
5237 memset(SLICfile, 0, sizeof(SLICfile));
5238 sprintf(SLICfile, "/var/tmp/slic%d-dump-%d", card->cardnum,
5239 (uint) card->dump_count);
5240 card->dump_count++;
5241
5242 SLIChandle =
5243 filp_open(SLICfile, O_CREAT | O_RDWR | O_SYNC | O_LARGEFILE, 0666);
5244
5245 DBG_MSG("[slicmon]: Dump Card #%d to file: %s \n", card->cardnum,
5246 SLICfile);
5247
5248 /* DBG_MSG("[slicmon] filp_open %s SLIChandle[%p]\n", SLICfile, SLIChandle);*/
5249
5250 if (IS_ERR(SLIChandle))
5251 goto end_slicdump;
5252
5253 dentry = SLIChandle->f_dentry;
5254 inode = dentry->d_inode;
5255
5256 /* DBG_MSG("[slicmon] inode[%p] i_nlink[%x] i_mode[%x] i_op[%p] i_fop[%p]\n"
5257 "f_op->write[%p]\n",
5258 inode, inode->i_nlink, inode->i_mode, inode->i_op,
5259 inode->i_fop, SLIChandle->f_op->write); */
5260 if (inode->i_nlink > 1)
5261 goto close_slicdump; /* multiple links - don't dump */
5262 #ifdef HISTORICAL
5263 if (!S_ISREG(inode->i_mode))
5264 goto close_slicdump;
5265 #endif
5266 if (!inode->i_op || !inode->i_fop)
5267 goto close_slicdump;
5268
5269 if (!SLIChandle->f_op->write)
5270 goto close_slicdump;
5271
5272 /*
5273 * If we got here we have SUCCESSFULLY OPENED the dump file
5274 */
5275 /* DBG_MSG("opened %s SLIChandle[%p]\n", SLICfile, SLIChandle); */
5276 return SLIChandle;
5277
5278 close_slicdump:
5279 DBG_MSG("[slicmon] slic_dump_open_file failed close SLIChandle[%p]\n",
5280 SLIChandle);
5281 filp_close(SLIChandle, NULL);
5282
5283 end_slicdump:
5284 set_fs(card->dumpfile_fs);
5285
5286 return NULL;
5287 }
5288
5289 static void slic_dump_close_file(struct sliccard *card)
5290 {
5291
5292 /* DBG_MSG("[slicmon] slic_dump_CLOSE_file close SLIChandle[%p]\n",
5293 card->dumphandle); */
5294
5295 filp_close(card->dumphandle, NULL);
5296
5297 set_fs(card->dumpfile_fs);
5298 }
5299
5300 static u32 slic_dump_card(struct sliccard *card, bool resume)
5301 {
5302 struct adapter *adapter = card->master;
5303 u32 status;
5304 u32 queue;
5305 u32 len, offset;
5306 u32 sram_size, dram_size, regs;
5307 struct sliccore_hdr corehdr;
5308 u32 file_offset;
5309 char *namestr;
5310 u32 i;
5311 u32 max_queues = 0;
5312 u32 result;
5313
5314 card->dumphandle = slic_dump_open_file(card);
5315
5316 if (card->dumphandle == NULL) {
5317 DBG_MSG("[slicmon] Cant create Dump file - dump failed\n");
5318 return -ENOMEM;
5319 }
5320 if (!card->dumpbuffer) {
5321 DBG_MSG("[slicmon] Insufficient memory for dump\n");
5322 return -ENOMEM;
5323 }
5324 if (!card->cmdbuffer) {
5325 DBG_MSG("[slicmon] Insufficient cmd memory for dump\n");
5326 return -ENOMEM;
5327 }
5328
5329 /*
5330 * Write the file version to the core header.
5331 */
5332 namestr = slic_proc_version;
5333 for (i = 0; i < (DRIVER_NAME_SIZE - 1); i++, namestr++) {
5334 if (!namestr)
5335 break;
5336 corehdr.driver_version[i] = *namestr;
5337 }
5338 corehdr.driver_version[i] = 0;
5339
5340 file_offset = sizeof(struct sliccore_hdr);
5341
5342 /*
5343 * Issue the following debug commands to the SLIC:
5344 * - Halt both receive and transmit
5345 * - Dump receive registers
5346 * - Dump transmit registers
5347 * - Dump sram
5348 * - Dump dram
5349 * - Dump queues
5350 */
5351 DBG_MSG("slicDump HALT Receive Processor\n");
5352 card->dumptime_start = jiffies;
5353
5354 status = slic_dump_halt(card, PROC_RECEIVE);
5355 if (status != STATUS_SUCCESS) {
5356 DBG_ERROR
5357 ("Cant halt receive sequencer - dump failed status[%x]\n",
5358 status);
5359 goto done;
5360 }
5361
5362 DBG_MSG("slicDump HALT Transmit Processor\n");
5363 status = slic_dump_halt(card, PROC_TRANSMIT);
5364 if (status != STATUS_SUCCESS) {
5365 DBG_ERROR("Cant halt transmit sequencer - dump failed\n");
5366 goto done;
5367 }
5368
5369 /* Dump receive regs */
5370 status = slic_dump_reg(card, PROC_RECEIVE);
5371 if (status != STATUS_SUCCESS) {
5372 DBG_ERROR("Cant dump receive registers - dump failed\n");
5373 goto done;
5374 }
5375
5376 DBG_MSG("slicDump Write Receive REGS len[%x] offset[%x]\n",
5377 (SLIC_NUM_REG * 4), file_offset);
5378
5379 result =
5380 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5381 file_offset);
5382 if (!result) {
5383 DBG_ERROR
5384 ("Cant write rcv registers to dump file - dump failed\n");
5385 goto done;
5386 }
5387
5388 corehdr.RcvRegOff = file_offset;
5389 corehdr.RcvRegsize = SLIC_NUM_REG * 4;
5390 file_offset += SLIC_NUM_REG * 4;
5391
5392 /* Dump transmit regs */
5393 status = slic_dump_reg(card, PROC_TRANSMIT);
5394 if (status != STATUS_SUCCESS) {
5395 DBG_ERROR("Cant dump transmit registers - dump failed\n");
5396 goto done;
5397 }
5398
5399 DBG_MSG("slicDump Write XMIT REGS len[%x] offset[%x]\n",
5400 (SLIC_NUM_REG * 4), file_offset);
5401
5402 result =
5403 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5404 file_offset);
5405 if (!result) {
5406 DBG_ERROR
5407 ("Cant write xmt registers to dump file - dump failed\n");
5408 goto done;
5409 }
5410
5411 corehdr.XmtRegOff = file_offset;
5412 corehdr.XmtRegsize = SLIC_NUM_REG * 4;
5413 file_offset += SLIC_NUM_REG * 4;
5414
5415 regs = SLIC_GBMAX_REG;
5416
5417 corehdr.FileRegOff = file_offset;
5418 corehdr.FileRegsize = regs * 4;
5419
5420 for (offset = 0; regs;) {
5421 len = MIN(regs, 16); /* Can only xfr 16 regs at a time */
5422
5423 status = slic_dump_data(card, offset, (ushort) len, DESC_RFILE);
5424
5425 if (status != STATUS_SUCCESS) {
5426 DBG_ERROR("Cant dump register file - dump failed\n");
5427 goto done;
5428 }
5429
5430 DBG_MSG("slicDump Write RegisterFile len[%x] offset[%x]\n",
5431 (len * 4), file_offset);
5432
5433 result =
5434 slic_dump_write(card, card->dumpbuffer, len * 4,
5435 file_offset);
5436 if (!result) {
5437 DBG_ERROR
5438 ("Cant write register file to dump file - "
5439 "dump failed\n");
5440 goto done;
5441 }
5442
5443 file_offset += len * 4;
5444 offset += len;
5445 regs -= len;
5446 }
5447
5448 dram_size = card->config.DramSize * 0x10000;
5449
5450 switch (adapter->devid) {
5451 case SLIC_2GB_DEVICE_ID:
5452 sram_size = SLIC_SRAM_SIZE2GB;
5453 break;
5454 case SLIC_1GB_DEVICE_ID:
5455 sram_size = SLIC_SRAM_SIZE1GB;
5456 break;
5457 default:
5458 sram_size = 0;
5459 ASSERT(0);
5460 break;
5461 }
5462
5463 corehdr.SramOff = file_offset;
5464 corehdr.Sramsize = sram_size;
5465
5466 for (offset = 0; sram_size;) {
5467 len = MIN(sram_size, DUMP_BUF_SIZE);
5468 status = slic_dump_data(card, offset, (ushort) len, DESC_SRAM);
5469 if (status != STATUS_SUCCESS) {
5470 DBG_ERROR
5471 ("[slicmon] Cant dump SRAM at offset %x - "
5472 "dump failed\n", (uint) offset);
5473 goto done;
5474 }
5475
5476 DBG_MSG("[slicmon] slicDump Write SRAM len[%x] offset[%x]\n",
5477 len, file_offset);
5478
5479 result =
5480 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5481 if (!result) {
5482 DBG_ERROR
5483 ("[slicmon] Cant write SRAM to dump file - "
5484 "dump failed\n");
5485 goto done;
5486 }
5487
5488 file_offset += len;
5489 offset += len;
5490 sram_size -= len;
5491 }
5492
5493 corehdr.DramOff = file_offset;
5494 corehdr.Dramsize = dram_size;
5495
5496 for (offset = 0; dram_size;) {
5497 len = MIN(dram_size, DUMP_BUF_SIZE);
5498
5499 status = slic_dump_data(card, offset, (ushort) len, DESC_DRAM);
5500 if (status != STATUS_SUCCESS) {
5501 DBG_ERROR
5502 ("[slicmon] Cant dump dram at offset %x - "
5503 "dump failed\n", (uint) offset);
5504 goto done;
5505 }
5506
5507 DBG_MSG("slicDump Write DRAM len[%x] offset[%x]\n", len,
5508 file_offset);
5509
5510 result =
5511 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5512 if (!result) {
5513 DBG_ERROR
5514 ("[slicmon] Cant write DRAM to dump file - "
5515 "dump failed\n");
5516 goto done;
5517 }
5518
5519 file_offset += len;
5520 offset += len;
5521 dram_size -= len;
5522 }
5523
5524 max_queues = SLIC_MAX_QUEUE;
5525
5526 for (queue = 0; queue < max_queues; queue++) {
5527 u32 *qarray = (u32 *) card->dumpbuffer;
5528 u32 qarray_physl = card->dumpbuffer_physl;
5529 u32 qarray_physh = card->dumpbuffer_physh;
5530 u32 qstart;
5531 u32 qdelta;
5532 u32 qtotal = 0;
5533
5534 DBG_MSG("[slicmon] Start Dump of QUEUE #0x%x\n", (uint) queue);
5535
5536 for (offset = 0; offset < (DUMP_BUF_SIZE >> 2); offset++) {
5537 qstart = jiffies;
5538 qdelta = 0;
5539
5540 status = slic_dump_queue(card,
5541 qarray_physl,
5542 qarray_physh, queue);
5543 qarray_physl += 4;
5544
5545 if (status != STATUS_SUCCESS)
5546 break;
5547
5548 if (jiffies > qstart) {
5549 qdelta = jiffies - qstart;
5550 qtotal += qdelta;
5551 }
5552 }
5553
5554 if (offset)
5555 qdelta = qtotal / offset;
5556 else
5557 qdelta = 0;
5558
5559 /* DBG_MSG(" slicDump Write QUEUE #0x%x len[%x] offset[%x] "
5560 "avgjiffs[%x]\n", queue, (offset*4), file_offset, qdelta); */
5561
5562 result =
5563 slic_dump_write(card, card->dumpbuffer, offset * 4,
5564 file_offset);
5565
5566 if (!result) {
5567 DBG_ERROR
5568 ("[slicmon] Cant write QUEUES to dump file - "
5569 "dump failed\n");
5570 goto done;
5571 }
5572
5573 corehdr.queues[queue].queueOff = file_offset;
5574 corehdr.queues[queue].queuesize = offset * 4;
5575 file_offset += offset * 4;
5576
5577 /* DBG_MSG(" Reload QUEUE #0x%x elements[%x]\n", (uint)queue, offset);*/
5578 /*
5579 * Fill the queue back up
5580 */
5581 for (i = 0; i < offset; i++) {
5582 qstart = jiffies;
5583 qdelta = 0;
5584
5585 status = slic_dump_load_queue(card, qarray[i], queue);
5586 if (status != STATUS_SUCCESS)
5587 break;
5588
5589 if (jiffies > qstart) {
5590 qdelta = jiffies - qstart;
5591 qtotal += qdelta;
5592 }
5593 }
5594
5595 if (offset)
5596 qdelta = qtotal / offset;
5597 else
5598 qdelta = 0;
5599
5600 /* DBG_MSG(" Reload DONE avgjiffs[%x]\n", qdelta); */
5601
5602 resume = 1;
5603 }
5604
5605 len = SLIC_GB_CAMAB_SZE * 4;
5606 status = slic_dump_cam(card, 0, len, DUMP_CAM_A);
5607 if (status != STATUS_SUCCESS) {
5608 DBG_ERROR("[slicmon] Can't dump CAM_A - dump failed\n");
5609 goto done;
5610 }
5611
5612 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5613 if (result) {
5614 DBG_ERROR
5615 ("[slicmon] Can't write CAM_A data to dump file - "
5616 "dump failed\n");
5617 goto done;
5618 }
5619 corehdr.CamAMOff = file_offset;
5620 corehdr.CamASize = len;
5621 file_offset += len;
5622
5623 len = SLIC_GB_CAMCD_SZE * 4;
5624 status = slic_dump_cam(card, 0, len, DUMP_CAM_C);
5625 if (status) {
5626 DBG_ERROR("[slicmon] Can't dump CAM_C - dump failed\n");
5627 goto done;
5628 }
5629
5630 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5631 if (result) {
5632 DBG_ERROR
5633 ("[slicmon] Can't write CAM_C data to dump file - "
5634 "dump failed\n");
5635 goto done;
5636 }
5637 corehdr.CamCMOff = file_offset;
5638 corehdr.CamCSize = len;
5639 file_offset += len;
5640
5641 done:
5642 /*
5643 * Write out the core header
5644 */
5645 file_offset = 0;
5646 DBG_MSG("[slicmon] Write CoreHeader len[%x] offset[%x]\n",
5647 (uint) sizeof(struct sliccore_hdr), file_offset);
5648
5649 result =
5650 slic_dump_write(card, &corehdr, sizeof(struct sliccore_hdr),
5651 file_offset);
5652 DBG_MSG("[slicmon] corehdr xoff[%x] xsz[%x]\n"
5653 " roff[%x] rsz[%x] fileoff[%x] filesz[%x]\n"
5654 " sramoff[%x] sramsz[%x], dramoff[%x] dramsz[%x]\n"
5655 " corehdr_offset[%x]\n", corehdr.XmtRegOff,
5656 corehdr.XmtRegsize, corehdr.RcvRegOff, corehdr.RcvRegsize,
5657 corehdr.FileRegOff, corehdr.FileRegsize, corehdr.SramOff,
5658 corehdr.Sramsize, corehdr.DramOff, corehdr.Dramsize,
5659 (uint) sizeof(struct sliccore_hdr));
5660 for (i = 0; i < max_queues; i++) {
5661 DBG_MSG("[slicmon] QUEUE 0x%x offset[%x] size[%x]\n",
5662 (uint) i, corehdr.queues[i].queueOff,
5663 corehdr.queues[i].queuesize);
5664
5665 }
5666
5667 slic_dump_close_file(card);
5668
5669 if (resume) {
5670 DBG_MSG("slicDump RESTART RECEIVE and XMIT PROCESSORS\n\n");
5671 slic_dump_resume(card, PROC_RECEIVE);
5672 slic_dump_resume(card, PROC_TRANSMIT);
5673 }
5674
5675 return status;
5676 }
5677
5678 static u32 slic_dump_halt(struct sliccard *card, unsigned char proc)
5679 {
5680 unsigned char *cmd = card->cmdbuffer;
5681
5682 *cmd = COMMAND_BYTE(CMD_HALT, 0, proc);
5683
5684 return slic_dump_send_cmd(card,
5685 card->cmdbuffer_physl,
5686 card->cmdbuffer_physh, 0, 0);
5687 }
5688
5689 static u32 slic_dump_resume(struct sliccard *card, unsigned char proc)
5690 {
5691 unsigned char *cmd = card->cmdbuffer;
5692
5693 *cmd = COMMAND_BYTE(CMD_RUN, 0, proc);
5694
5695 return slic_dump_send_cmd(card,
5696 card->cmdbuffer_physl,
5697 card->cmdbuffer_physh, 0, 0);
5698 }
5699
5700 static u32 slic_dump_reg(struct sliccard *card, unsigned char proc)
5701 {
5702 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5703
5704 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, proc);
5705 dump->desc = DESC_REG;
5706 dump->count = 0;
5707 dump->addr = 0;
5708
5709 return slic_dump_send_cmd(card,
5710 card->cmdbuffer_physl,
5711 card->cmdbuffer_physh,
5712 card->dumpbuffer_physl,
5713 card->dumpbuffer_physh);
5714 }
5715
5716 static u32 slic_dump_data(struct sliccard *card,
5717 u32 addr, ushort count, unsigned char desc)
5718 {
5719 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5720
5721 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5722 dump->desc = desc;
5723 dump->count = count;
5724 dump->addr = addr;
5725
5726 return slic_dump_send_cmd(card,
5727 card->cmdbuffer_physl,
5728 card->cmdbuffer_physh,
5729 card->dumpbuffer_physl,
5730 card->dumpbuffer_physh);
5731 }
5732
5733 static u32 slic_dump_queue(struct sliccard *card,
5734 u32 addr, u32 buf_physh, u32 queue)
5735 {
5736 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5737
5738 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5739 dump->desc = DESC_QUEUE;
5740 dump->count = 1;
5741 dump->addr = queue;
5742
5743 return slic_dump_send_cmd(card,
5744 card->cmdbuffer_physl,
5745 card->cmdbuffer_physh,
5746 addr, card->dumpbuffer_physh);
5747 }
5748
5749 static u32 slic_dump_load_queue(struct sliccard *card, u32 data,
5750 u32 queue)
5751 {
5752 struct dump_cmd *load = (struct dump_cmd *) card->cmdbuffer;
5753
5754 load->cmd = COMMAND_BYTE(CMD_LOAD, 0, PROC_RECEIVE);
5755 load->desc = DESC_QUEUE;
5756 load->count = (ushort) queue;
5757 load->addr = data;
5758
5759 return slic_dump_send_cmd(card,
5760 card->cmdbuffer_physl,
5761 card->cmdbuffer_physh, 0, 0);
5762 }
5763
5764 static u32 slic_dump_cam(struct sliccard *card,
5765 u32 addr, u32 count, unsigned char desc)
5766 {
5767 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5768
5769 dump->cmd = COMMAND_BYTE(CMD_CAM_OPS, 0, PROC_NONE);
5770 dump->desc = desc;
5771 dump->count = count;
5772 dump->addr = 0;
5773
5774 return slic_dump_send_cmd(card,
5775 card->cmdbuffer_physl,
5776 card->cmdbuffer_physh,
5777 addr, card->dumpbuffer_physh);
5778 }
5779
5780 static u32 slic_dump_send_cmd(struct sliccard *card,
5781 u32 cmd_physl,
5782 u32 cmd_physh,
5783 u32 buf_physl, u32 buf_physh)
5784 {
5785 ulong timeout = SLIC_MS_TO_JIFFIES(500); /* 500 msec */
5786 u32 attempts = 5;
5787 u32 delay = SLIC_MS_TO_JIFFIES(10); /* 10 msec */
5788 struct adapter *adapter = card->master;
5789
5790 ASSERT(adapter);
5791 do {
5792 /*
5793 * Zero the Dumpstatus field of the adapter structure
5794 */
5795 card->dumpstatus = 0;
5796 /*
5797 * Issue the dump command via a utility processor request.
5798 *
5799 * Kludge: We use the Informationbuffer parameter to hold
5800 * the buffer address
5801 */
5802 slic_upr_request(adapter, SLIC_UPR_DUMP, cmd_physl, cmd_physh,
5803 buf_physl, buf_physh);
5804
5805 timeout += jiffies;
5806 /*
5807 * Spin until completion or timeout.
5808 */
5809 while (!card->dumpstatus) {
5810 int num_sleeps = 0;
5811
5812 if (jiffies > timeout) {
5813 /*
5814 * Complete the timed-out DUMP UPR request.
5815 */
5816 slic_upr_request_complete(adapter, 0);
5817 DBG_ERROR
5818 ("%s: TIMED OUT num_sleeps[%x] "
5819 "status[%x]\n",
5820 __func__, num_sleeps, STATUS_FAILURE);
5821
5822 return STATUS_FAILURE;
5823 }
5824 num_sleeps++;
5825 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq,
5826 delay);
5827 }
5828
5829 if (card->dumpstatus & ISR_UPCERR) {
5830 /*
5831 * Error (or queue empty)
5832 */
5833 /* DBG_ERROR("[slicmon] %s: DUMP_STATUS & ISR_UPCERR status[%x]\n",
5834 __func__, STATUS_FAILURE); */
5835
5836 return STATUS_FAILURE;
5837 } else if (card->dumpstatus & ISR_UPCBSY) {
5838 /*
5839 * Retry
5840 */
5841 DBG_ERROR("%s: ISR_UPCBUSY attempt[%x]\n", __func__,
5842 attempts);
5843
5844 attempts--;
5845 } else {
5846 /*
5847 * success
5848 */
5849 return STATUS_SUCCESS;
5850 }
5851
5852 } while (attempts);
5853
5854 DBG_ERROR("%s: GAVE UP AFTER SEVERAL ATTEMPTS status[%x]\n",
5855 __func__, STATUS_FAILURE);
5856
5857 /*
5858 * Gave up after several attempts
5859 */
5860 return STATUS_FAILURE;
5861 }
5862
5863 #endif
5864 /*=============================================================================
5865 =============================================================================
5866 === ===
5867 === *** END **** END **** END **** END *** ===
5868 === SLIC DUMP MANAGEMENT SECTION ===
5869 === ===
5870 === ===
5871 === ===
5872 =============================================================================
5873 ============================================================================*/
5874
5875 /******************************************************************************/
5876 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
5877 /******************************************************************************/
5878
5879 static struct pci_driver slic_driver = {
5880 .name = DRV_NAME,
5881 .id_table = slic_pci_tbl,
5882 .probe = slic_entry_probe,
5883 .remove = slic_entry_remove,
5884 #if SLIC_POWER_MANAGEMENT_ENABLED
5885 .suspend = slicpm_suspend,
5886 .resume = slicpm_resume,
5887 #endif
5888 /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */
5889 };
5890
5891 static int __init slic_module_init(void)
5892 {
5893 struct pci_device_id *pcidev;
5894 int ret;
5895
5896 /* DBG_MSG("slicoss: %s ENTER cpu %d\n", __func__, smp_processor_id()); */
5897
5898 slic_init_driver();
5899
5900 if (debug >= 0 && slic_debug != debug)
5901 printk(SLICLEVEL "slicoss: debug level is %d.\n", debug);
5902 if (debug >= 0)
5903 slic_debug = debug;
5904
5905 pcidev = (struct pci_device_id *)slic_driver.id_table;
5906 /* DBG_MSG("slicoss: %s call pci_module_init jiffies[%lx] cpu #%d\n",
5907 __func__, jiffies, smp_processor_id()); */
5908
5909 ret = pci_register_driver(&slic_driver);
5910
5911 /* DBG_MSG("slicoss: %s EXIT after call pci_module_init jiffies[%lx] "
5912 "cpu #%d status[%x]\n",__func__, jiffies,
5913 smp_processor_id(), ret); */
5914
5915 return ret;
5916 }
5917
5918 static void __exit slic_module_cleanup(void)
5919 {
5920 /* DBG_MSG("slicoss: %s ENTER\n", __func__); */
5921 pci_unregister_driver(&slic_driver);
5922 slic_debug_cleanup();
5923 /* DBG_MSG("slicoss: %s EXIT\n", __func__); */
5924 }
5925
5926 module_init(slic_module_init);
5927 module_exit(slic_module_cleanup);
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