[PATCH] sunrpc: cache_register can use wrong module reference
[linux-2.6/mini2440.git] / drivers / isdn / hisax / gazel.c
blob60b04c6d9e7dc4da3888a0ffcc3dd7d8709d9d2c
1 /* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
3 * low level stuff for Gazel isdn cards
5 * Author BeWan Systems
6 * based on source code from Karsten Keil
7 * Copyright by BeWan Systems
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
14 #include <linux/config.h>
15 #include <linux/init.h>
16 #include "hisax.h"
17 #include "isac.h"
18 #include "hscx.h"
19 #include "isdnl1.h"
20 #include "ipac.h"
21 #include <linux/pci.h>
23 extern const char *CardType[];
24 static const char *gazel_revision = "$Revision: 2.19.2.4 $";
26 #define R647 1
27 #define R685 2
28 #define R753 3
29 #define R742 4
31 #define PLX_CNTRL 0x50 /* registre de controle PLX */
32 #define RESET_GAZEL 0x4
33 #define RESET_9050 0x40000000
34 #define PLX_INCSR 0x4C /* registre d'IT du 9050 */
35 #define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
36 #define INT_ISAC 0x20 /* 1 = IT isac en cours */
37 #define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
38 #define INT_HSCX 0x4 /* 1 = IT hscx en cours */
39 #define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
40 #define INT_IPAC_EN 0x3 /* enable IT ipac */
43 #define byteout(addr,val) outb(val,addr)
44 #define bytein(addr) inb(addr)
46 static inline u_char
47 readreg(unsigned int adr, u_short off)
49 return bytein(adr + off);
52 static inline void
53 writereg(unsigned int adr, u_short off, u_char data)
55 byteout(adr + off, data);
59 static inline void
60 read_fifo(unsigned int adr, u_char * data, int size)
62 insb(adr, data, size);
65 static void
66 write_fifo(unsigned int adr, u_char * data, int size)
68 outsb(adr, data, size);
71 static inline u_char
72 readreg_ipac(unsigned int adr, u_short off)
74 register u_char ret;
76 byteout(adr, off);
77 ret = bytein(adr + 4);
78 return ret;
81 static inline void
82 writereg_ipac(unsigned int adr, u_short off, u_char data)
84 byteout(adr, off);
85 byteout(adr + 4, data);
89 static inline void
90 read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
92 byteout(adr, off);
93 insb(adr + 4, data, size);
96 static void
97 write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
99 byteout(adr, off);
100 outsb(adr + 4, data, size);
103 /* Interface functions */
105 static u_char
106 ReadISAC(struct IsdnCardState *cs, u_char offset)
108 u_short off2 = offset;
110 switch (cs->subtyp) {
111 case R647:
112 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
113 case R685:
114 return (readreg(cs->hw.gazel.isac, off2));
115 case R753:
116 case R742:
117 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
119 return 0;
122 static void
123 WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
125 u_short off2 = offset;
127 switch (cs->subtyp) {
128 case R647:
129 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
130 case R685:
131 writereg(cs->hw.gazel.isac, off2, value);
132 break;
133 case R753:
134 case R742:
135 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
136 break;
140 static void
141 ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
143 switch (cs->subtyp) {
144 case R647:
145 case R685:
146 read_fifo(cs->hw.gazel.isacfifo, data, size);
147 break;
148 case R753:
149 case R742:
150 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
151 break;
155 static void
156 WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
158 switch (cs->subtyp) {
159 case R647:
160 case R685:
161 write_fifo(cs->hw.gazel.isacfifo, data, size);
162 break;
163 case R753:
164 case R742:
165 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
166 break;
170 static void
171 ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
173 switch (cs->subtyp) {
174 case R647:
175 case R685:
176 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
177 break;
178 case R753:
179 case R742:
180 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
181 break;
185 static void
186 WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
188 switch (cs->subtyp) {
189 case R647:
190 case R685:
191 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
192 break;
193 case R753:
194 case R742:
195 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
196 break;
200 static u_char
201 ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
203 u_short off2 = offset;
205 switch (cs->subtyp) {
206 case R647:
207 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
208 case R685:
209 return (readreg(cs->hw.gazel.hscx[hscx], off2));
210 case R753:
211 case R742:
212 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
214 return 0;
217 static void
218 WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
220 u_short off2 = offset;
222 switch (cs->subtyp) {
223 case R647:
224 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
225 case R685:
226 writereg(cs->hw.gazel.hscx[hscx], off2, value);
227 break;
228 case R753:
229 case R742:
230 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
231 break;
236 * fast interrupt HSCX stuff goes here
239 #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
240 #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
241 #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
242 #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
244 #include "hscx_irq.c"
246 static irqreturn_t
247 gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
249 #define MAXCOUNT 5
250 struct IsdnCardState *cs = dev_id;
251 u_char valisac, valhscx;
252 int count = 0;
253 u_long flags;
255 spin_lock_irqsave(&cs->lock, flags);
256 do {
257 valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
258 if (valhscx)
259 hscx_int_main(cs, valhscx);
260 valisac = ReadISAC(cs, ISAC_ISTA);
261 if (valisac)
262 isac_interrupt(cs, valisac);
263 count++;
264 } while ((valhscx || valisac) && (count < MAXCOUNT));
266 WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
267 WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
268 WriteISAC(cs, ISAC_MASK, 0xFF);
269 WriteISAC(cs, ISAC_MASK, 0x0);
270 WriteHSCX(cs, 0, HSCX_MASK, 0x0);
271 WriteHSCX(cs, 1, HSCX_MASK, 0x0);
272 spin_unlock_irqrestore(&cs->lock, flags);
273 return IRQ_HANDLED;
277 static irqreturn_t
278 gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
280 struct IsdnCardState *cs = dev_id;
281 u_char ista, val;
282 int count = 0;
283 u_long flags;
285 spin_lock_irqsave(&cs->lock, flags);
286 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
287 do {
288 if (ista & 0x0f) {
289 val = ReadHSCX(cs, 1, HSCX_ISTA);
290 if (ista & 0x01)
291 val |= 0x01;
292 if (ista & 0x04)
293 val |= 0x02;
294 if (ista & 0x08)
295 val |= 0x04;
296 if (val) {
297 hscx_int_main(cs, val);
300 if (ista & 0x20) {
301 val = 0xfe & ReadISAC(cs, ISAC_ISTA);
302 if (val) {
303 isac_interrupt(cs, val);
306 if (ista & 0x10) {
307 val = 0x01;
308 isac_interrupt(cs, val);
310 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
311 count++;
313 while ((ista & 0x3f) && (count < MAXCOUNT));
315 WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
316 WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
317 spin_unlock_irqrestore(&cs->lock, flags);
318 return IRQ_HANDLED;
321 static void
322 release_io_gazel(struct IsdnCardState *cs)
324 unsigned int i;
326 switch (cs->subtyp) {
327 case R647:
328 for (i = 0x0000; i < 0xC000; i += 0x1000)
329 release_region(i + cs->hw.gazel.hscx[0], 16);
330 release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
331 break;
333 case R685:
334 release_region(cs->hw.gazel.hscx[0], 0x100);
335 release_region(cs->hw.gazel.cfg_reg, 0x80);
336 break;
338 case R753:
339 release_region(cs->hw.gazel.ipac, 0x8);
340 release_region(cs->hw.gazel.cfg_reg, 0x80);
341 break;
343 case R742:
344 release_region(cs->hw.gazel.ipac, 8);
345 break;
349 static int
350 reset_gazel(struct IsdnCardState *cs)
352 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
354 switch (cs->subtyp) {
355 case R647:
356 writereg(addr, 0, 0);
357 HZDELAY(10);
358 writereg(addr, 0, 1);
359 HZDELAY(2);
360 break;
361 case R685:
362 plxcntrl = inl(addr + PLX_CNTRL);
363 plxcntrl |= (RESET_9050 + RESET_GAZEL);
364 outl(plxcntrl, addr + PLX_CNTRL);
365 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
366 HZDELAY(4);
367 outl(plxcntrl, addr + PLX_CNTRL);
368 HZDELAY(10);
369 outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
370 break;
371 case R753:
372 plxcntrl = inl(addr + PLX_CNTRL);
373 plxcntrl |= (RESET_9050 + RESET_GAZEL);
374 outl(plxcntrl, addr + PLX_CNTRL);
375 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
376 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
377 HZDELAY(4);
378 outl(plxcntrl, addr + PLX_CNTRL);
379 HZDELAY(10);
380 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
381 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
382 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
383 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
384 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
385 outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
386 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
387 break;
388 case R742:
389 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
390 HZDELAY(4);
391 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
392 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
393 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
394 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
395 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
396 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
397 break;
399 return (0);
402 static int
403 Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
405 u_long flags;
407 switch (mt) {
408 case CARD_RESET:
409 spin_lock_irqsave(&cs->lock, flags);
410 reset_gazel(cs);
411 spin_unlock_irqrestore(&cs->lock, flags);
412 return (0);
413 case CARD_RELEASE:
414 release_io_gazel(cs);
415 return (0);
416 case CARD_INIT:
417 spin_lock_irqsave(&cs->lock, flags);
418 inithscxisac(cs, 1);
419 if ((cs->subtyp==R647)||(cs->subtyp==R685)) {
420 int i;
421 for (i=0;i<(2+MAX_WAITING_CALLS);i++) {
422 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
423 cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
426 spin_unlock_irqrestore(&cs->lock, flags);
427 return (0);
428 case CARD_TEST:
429 return (0);
431 return (0);
434 static int
435 reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
437 unsigned int i, j, base = 0, adr = 0, len = 0;
439 switch (cs->subtyp) {
440 case R647:
441 base = cs->hw.gazel.hscx[0];
442 if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
443 goto error;
444 for (i = 0x0000; i < 0xC000; i += 0x1000) {
445 if (!request_region(adr = (i + base), len = 16, "gazel"))
446 goto error;
448 if (i != 0xC000) {
449 for (j = 0; j < i; j+= 0x1000)
450 release_region(j + base, 16);
451 release_region(0xC000 + base, 1);
452 goto error;
454 break;
456 case R685:
457 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
458 goto error;
459 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
460 release_region(cs->hw.gazel.hscx[0],0x100);
461 goto error;
463 break;
465 case R753:
466 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
467 goto error;
468 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
469 release_region(cs->hw.gazel.ipac, 8);
470 goto error;
472 break;
474 case R742:
475 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
476 goto error;
477 break;
480 return 0;
482 error:
483 printk(KERN_WARNING "Gazel: %s io ports 0x%x-0x%x already in use\n",
484 CardType[cs->typ], adr, adr + len);
485 return 1;
488 static int __init
489 setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
491 printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
492 // we got an irq parameter, assume it is an ISA card
493 // R742 decodes address even in not started...
494 // R647 returns FF if not present or not started
495 // eventually needs improvment
496 if (readreg_ipac(card->para[1], IPAC_ID) == 1)
497 cs->subtyp = R742;
498 else
499 cs->subtyp = R647;
501 setup_isac(cs);
502 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
503 cs->hw.gazel.ipac = card->para[1];
504 cs->hw.gazel.isac = card->para[1] + 0x8000;
505 cs->hw.gazel.hscx[0] = card->para[1];
506 cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
507 cs->irq = card->para[0];
508 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
509 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
510 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
512 switch (cs->subtyp) {
513 case R647:
514 printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
515 cs->dc.isac.adf2 = 0x87;
516 printk(KERN_INFO
517 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
518 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
519 printk(KERN_INFO
520 "Gazel: hscx A:0x%X hscx B:0x%X\n",
521 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
523 break;
524 case R742:
525 printk(KERN_INFO "Gazel: Card ISA R742 found\n");
526 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
527 printk(KERN_INFO
528 "Gazel: config irq:%d ipac:0x%X\n",
529 cs->irq, cs->hw.gazel.ipac);
530 break;
533 return (0);
536 static struct pci_dev *dev_tel __initdata = NULL;
538 static int __init
539 setup_gazelpci(struct IsdnCardState *cs)
541 u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
542 u_char pci_irq = 0, found;
543 u_int nbseek, seekcard;
545 printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
547 found = 0;
548 seekcard = PCI_DEVICE_ID_PLX_R685;
549 for (nbseek = 0; nbseek < 4; nbseek++) {
550 if ((dev_tel = pci_find_device(PCI_VENDOR_ID_PLX,
551 seekcard, dev_tel))) {
552 if (pci_enable_device(dev_tel))
553 return 1;
554 pci_irq = dev_tel->irq;
555 pci_ioaddr0 = pci_resource_start(dev_tel, 1);
556 pci_ioaddr1 = pci_resource_start(dev_tel, 2);
557 found = 1;
559 if (found)
560 break;
561 else {
562 switch (seekcard) {
563 case PCI_DEVICE_ID_PLX_R685:
564 seekcard = PCI_DEVICE_ID_PLX_R753;
565 break;
566 case PCI_DEVICE_ID_PLX_R753:
567 seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
568 break;
569 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
570 seekcard = PCI_DEVICE_ID_PLX_OLITEC;
571 break;
575 if (!found) {
576 printk(KERN_WARNING "Gazel: No PCI card found\n");
577 return (1);
579 if (!pci_irq) {
580 printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
581 return 1;
583 cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
584 cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
585 setup_isac(cs);
586 pci_ioaddr1 &= 0xfffe;
587 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
588 cs->hw.gazel.ipac = pci_ioaddr1;
589 cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
590 cs->hw.gazel.hscx[0] = pci_ioaddr1;
591 cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
592 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
593 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
594 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
595 cs->irq = pci_irq;
596 cs->irq_flags |= SA_SHIRQ;
598 switch (seekcard) {
599 case PCI_DEVICE_ID_PLX_R685:
600 printk(KERN_INFO "Gazel: Card PCI R685 found\n");
601 cs->subtyp = R685;
602 cs->dc.isac.adf2 = 0x87;
603 printk(KERN_INFO
604 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
605 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
606 printk(KERN_INFO
607 "Gazel: hscx A:0x%X hscx B:0x%X\n",
608 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
609 break;
610 case PCI_DEVICE_ID_PLX_R753:
611 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
612 case PCI_DEVICE_ID_PLX_OLITEC:
613 printk(KERN_INFO "Gazel: Card PCI R753 found\n");
614 cs->subtyp = R753;
615 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
616 printk(KERN_INFO
617 "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
618 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
619 break;
622 return (0);
625 int __init
626 setup_gazel(struct IsdnCard *card)
628 struct IsdnCardState *cs = card->cs;
629 char tmp[64];
630 u_char val;
632 strcpy(tmp, gazel_revision);
633 printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
635 if (cs->typ != ISDN_CTYPE_GAZEL)
636 return (0);
638 if (card->para[0]) {
639 if (setup_gazelisa(card, cs))
640 return (0);
641 } else {
643 #ifdef CONFIG_PCI
644 if (setup_gazelpci(cs))
645 return (0);
646 #else
647 printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
648 return (0);
649 #endif /* CONFIG_PCI */
652 if (reserve_regions(card, cs)) {
653 return (0);
655 if (reset_gazel(cs)) {
656 printk(KERN_WARNING "Gazel: wrong IRQ\n");
657 release_io_gazel(cs);
658 return (0);
660 cs->readisac = &ReadISAC;
661 cs->writeisac = &WriteISAC;
662 cs->readisacfifo = &ReadISACfifo;
663 cs->writeisacfifo = &WriteISACfifo;
664 cs->BC_Read_Reg = &ReadHSCX;
665 cs->BC_Write_Reg = &WriteHSCX;
666 cs->BC_Send_Data = &hscx_fill_fifo;
667 cs->cardmsg = &Gazel_card_msg;
669 switch (cs->subtyp) {
670 case R647:
671 case R685:
672 cs->irq_func = &gazel_interrupt;
673 ISACVersion(cs, "Gazel:");
674 if (HscxVersion(cs, "Gazel:")) {
675 printk(KERN_WARNING
676 "Gazel: wrong HSCX versions check IO address\n");
677 release_io_gazel(cs);
678 return (0);
680 break;
681 case R742:
682 case R753:
683 cs->irq_func = &gazel_interrupt_ipac;
684 val = ReadISAC(cs, IPAC_ID - 0x80);
685 printk(KERN_INFO "Gazel: IPAC version %x\n", val);
686 break;
689 return (1);