2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/pci.h>
37 #include <linux/libata.h>
38 #include <linux/highmem.h>
42 const struct ata_port_operations ata_sff_port_ops
= {
43 .inherits
= &ata_base_port_ops
,
45 .qc_prep
= ata_sff_qc_prep
,
46 .qc_issue
= ata_sff_qc_issue
,
47 .qc_fill_rtf
= ata_sff_qc_fill_rtf
,
49 .freeze
= ata_sff_freeze
,
51 .prereset
= ata_sff_prereset
,
52 .softreset
= ata_sff_softreset
,
53 .hardreset
= sata_sff_hardreset
,
54 .postreset
= ata_sff_postreset
,
55 .error_handler
= ata_sff_error_handler
,
56 .post_internal_cmd
= ata_sff_post_internal_cmd
,
58 .sff_dev_select
= ata_sff_dev_select
,
59 .sff_check_status
= ata_sff_check_status
,
60 .sff_tf_load
= ata_sff_tf_load
,
61 .sff_tf_read
= ata_sff_tf_read
,
62 .sff_exec_command
= ata_sff_exec_command
,
63 .sff_data_xfer
= ata_sff_data_xfer
,
64 .sff_irq_on
= ata_sff_irq_on
,
65 .sff_irq_clear
= ata_sff_irq_clear
,
67 .port_start
= ata_sff_port_start
,
69 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
71 const struct ata_port_operations ata_bmdma_port_ops
= {
72 .inherits
= &ata_sff_port_ops
,
74 .mode_filter
= ata_bmdma_mode_filter
,
76 .bmdma_setup
= ata_bmdma_setup
,
77 .bmdma_start
= ata_bmdma_start
,
78 .bmdma_stop
= ata_bmdma_stop
,
79 .bmdma_status
= ata_bmdma_status
,
81 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
83 const struct ata_port_operations ata_bmdma32_port_ops
= {
84 .inherits
= &ata_bmdma_port_ops
,
86 .sff_data_xfer
= ata_sff_data_xfer32
,
88 EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops
);
91 * ata_fill_sg - Fill PCI IDE PRD table
92 * @qc: Metadata associated with taskfile to be transferred
94 * Fill PCI IDE PRD (scatter-gather) table with segments
95 * associated with the current disk command.
98 * spin_lock_irqsave(host lock)
101 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
103 struct ata_port
*ap
= qc
->ap
;
104 struct scatterlist
*sg
;
108 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
112 /* determine if physical DMA addr spans 64K boundary.
113 * Note h/w doesn't support 64-bit, so we unconditionally
114 * truncate dma_addr_t to u32.
116 addr
= (u32
) sg_dma_address(sg
);
117 sg_len
= sg_dma_len(sg
);
120 offset
= addr
& 0xffff;
122 if ((offset
+ sg_len
) > 0x10000)
123 len
= 0x10000 - offset
;
125 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
126 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
127 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
135 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
139 * ata_fill_sg_dumb - Fill PCI IDE PRD table
140 * @qc: Metadata associated with taskfile to be transferred
142 * Fill PCI IDE PRD (scatter-gather) table with segments
143 * associated with the current disk command. Perform the fill
144 * so that we avoid writing any length 64K records for
145 * controllers that don't follow the spec.
148 * spin_lock_irqsave(host lock)
151 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
153 struct ata_port
*ap
= qc
->ap
;
154 struct scatterlist
*sg
;
158 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
160 u32 sg_len
, len
, blen
;
162 /* determine if physical DMA addr spans 64K boundary.
163 * Note h/w doesn't support 64-bit, so we unconditionally
164 * truncate dma_addr_t to u32.
166 addr
= (u32
) sg_dma_address(sg
);
167 sg_len
= sg_dma_len(sg
);
170 offset
= addr
& 0xffff;
172 if ((offset
+ sg_len
) > 0x10000)
173 len
= 0x10000 - offset
;
176 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
178 /* Some PATA chipsets like the CS5530 can't
179 cope with 0x0000 meaning 64K as the spec
181 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
183 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
185 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
186 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
194 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
198 * ata_sff_qc_prep - Prepare taskfile for submission
199 * @qc: Metadata associated with taskfile to be prepared
201 * Prepare ATA taskfile for submission.
204 * spin_lock_irqsave(host lock)
206 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
208 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
213 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
216 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
217 * @qc: Metadata associated with taskfile to be prepared
219 * Prepare ATA taskfile for submission.
222 * spin_lock_irqsave(host lock)
224 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
226 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
229 ata_fill_sg_dumb(qc
);
231 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
234 * ata_sff_check_status - Read device status reg & clear interrupt
235 * @ap: port where the device is
237 * Reads ATA taskfile status register for currently-selected device
238 * and return its value. This also clears pending interrupts
242 * Inherited from caller.
244 u8
ata_sff_check_status(struct ata_port
*ap
)
246 return ioread8(ap
->ioaddr
.status_addr
);
248 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
251 * ata_sff_altstatus - Read device alternate status reg
252 * @ap: port where the device is
254 * Reads ATA taskfile alternate status register for
255 * currently-selected device and return its value.
257 * Note: may NOT be used as the check_altstatus() entry in
258 * ata_port_operations.
261 * Inherited from caller.
263 static u8
ata_sff_altstatus(struct ata_port
*ap
)
265 if (ap
->ops
->sff_check_altstatus
)
266 return ap
->ops
->sff_check_altstatus(ap
);
268 return ioread8(ap
->ioaddr
.altstatus_addr
);
272 * ata_sff_irq_status - Check if the device is busy
273 * @ap: port where the device is
275 * Determine if the port is currently busy. Uses altstatus
276 * if available in order to avoid clearing shared IRQ status
277 * when finding an IRQ source. Non ctl capable devices don't
278 * share interrupt lines fortunately for us.
281 * Inherited from caller.
283 static u8
ata_sff_irq_status(struct ata_port
*ap
)
287 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
288 status
= ata_sff_altstatus(ap
);
289 /* Not us: We are busy */
290 if (status
& ATA_BUSY
)
293 /* Clear INTRQ latch */
294 status
= ap
->ops
->sff_check_status(ap
);
299 * ata_sff_sync - Flush writes
300 * @ap: Port to wait for.
303 * If we have an mmio device with no ctl and no altstatus
304 * method this will fail. No such devices are known to exist.
307 * Inherited from caller.
310 static void ata_sff_sync(struct ata_port
*ap
)
312 if (ap
->ops
->sff_check_altstatus
)
313 ap
->ops
->sff_check_altstatus(ap
);
314 else if (ap
->ioaddr
.altstatus_addr
)
315 ioread8(ap
->ioaddr
.altstatus_addr
);
319 * ata_sff_pause - Flush writes and wait 400nS
320 * @ap: Port to pause for.
323 * If we have an mmio device with no ctl and no altstatus
324 * method this will fail. No such devices are known to exist.
327 * Inherited from caller.
330 void ata_sff_pause(struct ata_port
*ap
)
335 EXPORT_SYMBOL_GPL(ata_sff_pause
);
338 * ata_sff_dma_pause - Pause before commencing DMA
339 * @ap: Port to pause for.
341 * Perform I/O fencing and ensure sufficient cycle delays occur
342 * for the HDMA1:0 transition
345 void ata_sff_dma_pause(struct ata_port
*ap
)
347 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
348 /* An altstatus read will cause the needed delay without
349 messing up the IRQ status */
350 ata_sff_altstatus(ap
);
353 /* There are no DMA controllers without ctl. BUG here to ensure
354 we never violate the HDMA1:0 transition timing and risk
358 EXPORT_SYMBOL_GPL(ata_sff_dma_pause
);
361 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
362 * @ap: port containing status register to be polled
363 * @tmout_pat: impatience timeout in msecs
364 * @tmout: overall timeout in msecs
366 * Sleep until ATA Status register bit BSY clears,
367 * or a timeout occurs.
370 * Kernel thread context (may sleep).
373 * 0 on success, -errno otherwise.
375 int ata_sff_busy_sleep(struct ata_port
*ap
,
376 unsigned long tmout_pat
, unsigned long tmout
)
378 unsigned long timer_start
, timeout
;
381 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
382 timer_start
= jiffies
;
383 timeout
= ata_deadline(timer_start
, tmout_pat
);
384 while (status
!= 0xff && (status
& ATA_BUSY
) &&
385 time_before(jiffies
, timeout
)) {
387 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
390 if (status
!= 0xff && (status
& ATA_BUSY
))
391 ata_port_printk(ap
, KERN_WARNING
,
392 "port is slow to respond, please be patient "
393 "(Status 0x%x)\n", status
);
395 timeout
= ata_deadline(timer_start
, tmout
);
396 while (status
!= 0xff && (status
& ATA_BUSY
) &&
397 time_before(jiffies
, timeout
)) {
399 status
= ap
->ops
->sff_check_status(ap
);
405 if (status
& ATA_BUSY
) {
406 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
407 "(%lu secs, Status 0x%x)\n",
408 DIV_ROUND_UP(tmout
, 1000), status
);
414 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
416 static int ata_sff_check_ready(struct ata_link
*link
)
418 u8 status
= link
->ap
->ops
->sff_check_status(link
->ap
);
420 return ata_check_ready(status
);
424 * ata_sff_wait_ready - sleep until BSY clears, or timeout
425 * @link: SFF link to wait ready status for
426 * @deadline: deadline jiffies for the operation
428 * Sleep until ATA Status register bit BSY clears, or timeout
432 * Kernel thread context (may sleep).
435 * 0 on success, -errno otherwise.
437 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
439 return ata_wait_ready(link
, deadline
, ata_sff_check_ready
);
441 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
444 * ata_sff_dev_select - Select device 0/1 on ATA bus
445 * @ap: ATA channel to manipulate
446 * @device: ATA device (numbered from zero) to select
448 * Use the method defined in the ATA specification to
449 * make either device 0, or device 1, active on the
450 * ATA channel. Works with both PIO and MMIO.
452 * May be used as the dev_select() entry in ata_port_operations.
457 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
462 tmp
= ATA_DEVICE_OBS
;
464 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
466 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
467 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
469 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
472 * ata_dev_select - Select device 0/1 on ATA bus
473 * @ap: ATA channel to manipulate
474 * @device: ATA device (numbered from zero) to select
475 * @wait: non-zero to wait for Status register BSY bit to clear
476 * @can_sleep: non-zero if context allows sleeping
478 * Use the method defined in the ATA specification to
479 * make either device 0, or device 1, active on the
482 * This is a high-level version of ata_sff_dev_select(), which
483 * additionally provides the services of inserting the proper
484 * pauses and status polling, where needed.
489 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
490 unsigned int wait
, unsigned int can_sleep
)
492 if (ata_msg_probe(ap
))
493 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
494 "device %u, wait %u\n", device
, wait
);
499 ap
->ops
->sff_dev_select(ap
, device
);
502 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
509 * ata_sff_irq_on - Enable interrupts on a port.
510 * @ap: Port on which interrupts are enabled.
512 * Enable interrupts on a legacy IDE device using MMIO or PIO,
513 * wait for idle, clear any pending interrupts.
516 * Inherited from caller.
518 u8
ata_sff_irq_on(struct ata_port
*ap
)
520 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
523 ap
->ctl
&= ~ATA_NIEN
;
524 ap
->last_ctl
= ap
->ctl
;
526 if (ioaddr
->ctl_addr
)
527 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
528 tmp
= ata_wait_idle(ap
);
530 ap
->ops
->sff_irq_clear(ap
);
534 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
537 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
538 * @ap: Port associated with this ATA transaction.
540 * Clear interrupt and error flags in DMA status register.
542 * May be used as the irq_clear() entry in ata_port_operations.
545 * spin_lock_irqsave(host lock)
547 void ata_sff_irq_clear(struct ata_port
*ap
)
549 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
554 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
556 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
559 * ata_sff_tf_load - send taskfile registers to host controller
560 * @ap: Port to which output is sent
561 * @tf: ATA taskfile register set
563 * Outputs ATA taskfile to standard ATA host controller.
566 * Inherited from caller.
568 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
570 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
571 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
573 if (tf
->ctl
!= ap
->last_ctl
) {
574 if (ioaddr
->ctl_addr
)
575 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
576 ap
->last_ctl
= tf
->ctl
;
580 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
581 WARN_ON_ONCE(!ioaddr
->ctl_addr
);
582 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
583 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
584 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
585 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
586 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
587 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
596 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
597 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
598 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
599 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
600 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
601 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
609 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
610 iowrite8(tf
->device
, ioaddr
->device_addr
);
611 VPRINTK("device 0x%X\n", tf
->device
);
616 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
619 * ata_sff_tf_read - input device's ATA taskfile shadow registers
620 * @ap: Port from which input is read
621 * @tf: ATA taskfile register set for storing input
623 * Reads ATA taskfile registers for currently-selected device
624 * into @tf. Assumes the device has a fully SFF compliant task file
625 * layout and behaviour. If you device does not (eg has a different
626 * status method) then you will need to provide a replacement tf_read
629 * Inherited from caller.
631 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
633 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
635 tf
->command
= ata_sff_check_status(ap
);
636 tf
->feature
= ioread8(ioaddr
->error_addr
);
637 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
638 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
639 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
640 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
641 tf
->device
= ioread8(ioaddr
->device_addr
);
643 if (tf
->flags
& ATA_TFLAG_LBA48
) {
644 if (likely(ioaddr
->ctl_addr
)) {
645 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
646 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
647 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
648 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
649 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
650 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
651 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
652 ap
->last_ctl
= tf
->ctl
;
657 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
660 * ata_sff_exec_command - issue ATA command to host controller
661 * @ap: port to which command is being issued
662 * @tf: ATA taskfile register set
664 * Issues ATA command, with proper synchronization with interrupt
665 * handler / other threads.
668 * spin_lock_irqsave(host lock)
670 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
672 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
674 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
677 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
680 * ata_tf_to_host - issue ATA taskfile to host controller
681 * @ap: port to which command is being issued
682 * @tf: ATA taskfile register set
684 * Issues ATA taskfile register set to ATA host controller,
685 * with proper synchronization with interrupt handler and
689 * spin_lock_irqsave(host lock)
691 static inline void ata_tf_to_host(struct ata_port
*ap
,
692 const struct ata_taskfile
*tf
)
694 ap
->ops
->sff_tf_load(ap
, tf
);
695 ap
->ops
->sff_exec_command(ap
, tf
);
699 * ata_sff_data_xfer - Transfer data by PIO
700 * @dev: device to target
702 * @buflen: buffer length
705 * Transfer data from/to the device data register by PIO.
708 * Inherited from caller.
713 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
714 unsigned int buflen
, int rw
)
716 struct ata_port
*ap
= dev
->link
->ap
;
717 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
718 unsigned int words
= buflen
>> 1;
720 /* Transfer multiple of 2 bytes */
722 ioread16_rep(data_addr
, buf
, words
);
724 iowrite16_rep(data_addr
, buf
, words
);
726 /* Transfer trailing 1 byte, if any. */
727 if (unlikely(buflen
& 0x01)) {
728 __le16 align_buf
[1] = { 0 };
729 unsigned char *trailing_buf
= buf
+ buflen
- 1;
732 align_buf
[0] = cpu_to_le16(ioread16(data_addr
));
733 memcpy(trailing_buf
, align_buf
, 1);
735 memcpy(align_buf
, trailing_buf
, 1);
736 iowrite16(le16_to_cpu(align_buf
[0]), data_addr
);
743 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
746 * ata_sff_data_xfer32 - Transfer data by PIO
747 * @dev: device to target
749 * @buflen: buffer length
752 * Transfer data from/to the device data register by PIO using 32bit
756 * Inherited from caller.
762 unsigned int ata_sff_data_xfer32(struct ata_device
*dev
, unsigned char *buf
,
763 unsigned int buflen
, int rw
)
765 struct ata_port
*ap
= dev
->link
->ap
;
766 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
767 unsigned int words
= buflen
>> 2;
768 int slop
= buflen
& 3;
770 /* Transfer multiple of 4 bytes */
772 ioread32_rep(data_addr
, buf
, words
);
774 iowrite32_rep(data_addr
, buf
, words
);
776 if (unlikely(slop
)) {
779 pad
= cpu_to_le32(ioread32(ap
->ioaddr
.data_addr
));
780 memcpy(buf
+ buflen
- slop
, &pad
, slop
);
782 memcpy(&pad
, buf
+ buflen
- slop
, slop
);
783 iowrite32(le32_to_cpu(pad
), ap
->ioaddr
.data_addr
);
789 EXPORT_SYMBOL_GPL(ata_sff_data_xfer32
);
792 * ata_sff_data_xfer_noirq - Transfer data by PIO
793 * @dev: device to target
795 * @buflen: buffer length
798 * Transfer data from/to the device data register by PIO. Do the
799 * transfer with interrupts disabled.
802 * Inherited from caller.
807 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
808 unsigned int buflen
, int rw
)
811 unsigned int consumed
;
813 local_irq_save(flags
);
814 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
815 local_irq_restore(flags
);
819 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
822 * ata_pio_sector - Transfer a sector of data.
823 * @qc: Command on going
825 * Transfer qc->sect_size bytes of data from/to the ATA device.
828 * Inherited from caller.
830 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
832 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
833 struct ata_port
*ap
= qc
->ap
;
838 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
839 ap
->hsm_task_state
= HSM_ST_LAST
;
841 page
= sg_page(qc
->cursg
);
842 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
844 /* get the current page and offset */
845 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
848 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
850 if (PageHighMem(page
)) {
853 /* FIXME: use a bounce buffer */
854 local_irq_save(flags
);
855 buf
= kmap_atomic(page
, KM_IRQ0
);
857 /* do the actual data transfer */
858 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
861 kunmap_atomic(buf
, KM_IRQ0
);
862 local_irq_restore(flags
);
864 buf
= page_address(page
);
865 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
869 qc
->curbytes
+= qc
->sect_size
;
870 qc
->cursg_ofs
+= qc
->sect_size
;
872 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
873 qc
->cursg
= sg_next(qc
->cursg
);
879 * ata_pio_sectors - Transfer one or many sectors.
880 * @qc: Command on going
882 * Transfer one or many sectors of data from/to the
883 * ATA device for the DRQ request.
886 * Inherited from caller.
888 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
890 if (is_multi_taskfile(&qc
->tf
)) {
891 /* READ/WRITE MULTIPLE */
894 WARN_ON_ONCE(qc
->dev
->multi_count
== 0);
896 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
897 qc
->dev
->multi_count
);
903 ata_sff_sync(qc
->ap
); /* flush */
907 * atapi_send_cdb - Write CDB bytes to hardware
908 * @ap: Port to which ATAPI device is attached.
909 * @qc: Taskfile currently active
911 * When device has indicated its readiness to accept
912 * a CDB, this function is called. Send the CDB.
917 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
920 DPRINTK("send cdb\n");
921 WARN_ON_ONCE(qc
->dev
->cdb_len
< 12);
923 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
925 /* FIXME: If the CDB is for DMA do we need to do the transition delay
926 or is bmdma_start guaranteed to do it ? */
927 switch (qc
->tf
.protocol
) {
929 ap
->hsm_task_state
= HSM_ST
;
931 case ATAPI_PROT_NODATA
:
932 ap
->hsm_task_state
= HSM_ST_LAST
;
935 ap
->hsm_task_state
= HSM_ST_LAST
;
937 ap
->ops
->bmdma_start(qc
);
943 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
944 * @qc: Command on going
945 * @bytes: number of bytes
947 * Transfer Transfer data from/to the ATAPI device.
950 * Inherited from caller.
953 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
955 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
956 struct ata_port
*ap
= qc
->ap
;
957 struct ata_device
*dev
= qc
->dev
;
958 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
959 struct scatterlist
*sg
;
962 unsigned int offset
, count
, consumed
;
967 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
968 "buf=%u cur=%u bytes=%u",
969 qc
->nbytes
, qc
->curbytes
, bytes
);
974 offset
= sg
->offset
+ qc
->cursg_ofs
;
976 /* get the current page and offset */
977 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
980 /* don't overrun current sg */
981 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
983 /* don't cross page boundaries */
984 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
986 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
988 if (PageHighMem(page
)) {
991 /* FIXME: use bounce buffer */
992 local_irq_save(flags
);
993 buf
= kmap_atomic(page
, KM_IRQ0
);
995 /* do the actual data transfer */
996 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
999 kunmap_atomic(buf
, KM_IRQ0
);
1000 local_irq_restore(flags
);
1002 buf
= page_address(page
);
1003 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1007 bytes
-= min(bytes
, consumed
);
1008 qc
->curbytes
+= count
;
1009 qc
->cursg_ofs
+= count
;
1011 if (qc
->cursg_ofs
== sg
->length
) {
1012 qc
->cursg
= sg_next(qc
->cursg
);
1016 /* consumed can be larger than count only for the last transfer */
1017 WARN_ON_ONCE(qc
->cursg
&& count
!= consumed
);
1025 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1026 * @qc: Command on going
1028 * Transfer Transfer data from/to the ATAPI device.
1031 * Inherited from caller.
1033 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
1035 struct ata_port
*ap
= qc
->ap
;
1036 struct ata_device
*dev
= qc
->dev
;
1037 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
1038 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
1039 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
1041 /* Abuse qc->result_tf for temp storage of intermediate TF
1042 * here to save some kernel stack usage.
1043 * For normal completion, qc->result_tf is not relevant. For
1044 * error, qc->result_tf is later overwritten by ata_qc_complete().
1045 * So, the correctness of qc->result_tf is not affected.
1047 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
1048 ireason
= qc
->result_tf
.nsect
;
1049 bc_lo
= qc
->result_tf
.lbam
;
1050 bc_hi
= qc
->result_tf
.lbah
;
1051 bytes
= (bc_hi
<< 8) | bc_lo
;
1053 /* shall be cleared to zero, indicating xfer of data */
1054 if (unlikely(ireason
& (1 << 0)))
1057 /* make sure transfer direction matches expected */
1058 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
1059 if (unlikely(do_write
!= i_write
))
1062 if (unlikely(!bytes
))
1065 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
1067 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
1069 ata_sff_sync(ap
); /* flush */
1074 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
1077 qc
->err_mask
|= AC_ERR_HSM
;
1078 ap
->hsm_task_state
= HSM_ST_ERR
;
1082 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1083 * @ap: the target ata_port
1087 * 1 if ok in workqueue, 0 otherwise.
1089 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
,
1090 struct ata_queued_cmd
*qc
)
1092 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1095 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
1096 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
1097 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
1100 if (ata_is_atapi(qc
->tf
.protocol
) &&
1101 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1109 * ata_hsm_qc_complete - finish a qc running on standard HSM
1110 * @qc: Command to complete
1111 * @in_wq: 1 if called from workqueue, 0 otherwise
1113 * Finish @qc which is running on standard HSM.
1116 * If @in_wq is zero, spin_lock_irqsave(host lock).
1117 * Otherwise, none on entry and grabs host lock.
1119 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
1121 struct ata_port
*ap
= qc
->ap
;
1122 unsigned long flags
;
1124 if (ap
->ops
->error_handler
) {
1126 spin_lock_irqsave(ap
->lock
, flags
);
1128 /* EH might have kicked in while host lock is
1131 qc
= ata_qc_from_tag(ap
, qc
->tag
);
1133 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
1134 ap
->ops
->sff_irq_on(ap
);
1135 ata_qc_complete(qc
);
1137 ata_port_freeze(ap
);
1140 spin_unlock_irqrestore(ap
->lock
, flags
);
1142 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1143 ata_qc_complete(qc
);
1145 ata_port_freeze(ap
);
1149 spin_lock_irqsave(ap
->lock
, flags
);
1150 ap
->ops
->sff_irq_on(ap
);
1151 ata_qc_complete(qc
);
1152 spin_unlock_irqrestore(ap
->lock
, flags
);
1154 ata_qc_complete(qc
);
1159 * ata_sff_hsm_move - move the HSM to the next state.
1160 * @ap: the target ata_port
1162 * @status: current device status
1163 * @in_wq: 1 if called from workqueue, 0 otherwise
1166 * 1 when poll next status needed, 0 otherwise.
1168 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1169 u8 status
, int in_wq
)
1171 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1172 unsigned long flags
= 0;
1175 WARN_ON_ONCE((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1177 /* Make sure ata_sff_qc_issue() does not throw things
1178 * like DMA polling into the workqueue. Notice that
1179 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1181 WARN_ON_ONCE(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1184 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1185 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1187 switch (ap
->hsm_task_state
) {
1189 /* Send first data block or PACKET CDB */
1191 /* If polling, we will stay in the work queue after
1192 * sending the data. Otherwise, interrupt handler
1193 * takes over after sending the data.
1195 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1197 /* check device status */
1198 if (unlikely((status
& ATA_DRQ
) == 0)) {
1199 /* handle BSY=0, DRQ=0 as error */
1200 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1201 /* device stops HSM for abort/error */
1202 qc
->err_mask
|= AC_ERR_DEV
;
1204 /* HSM violation. Let EH handle this */
1205 ata_ehi_push_desc(ehi
,
1206 "ST_FIRST: !(DRQ|ERR|DF)");
1207 qc
->err_mask
|= AC_ERR_HSM
;
1210 ap
->hsm_task_state
= HSM_ST_ERR
;
1214 /* Device should not ask for data transfer (DRQ=1)
1215 * when it finds something wrong.
1216 * We ignore DRQ here and stop the HSM by
1217 * changing hsm_task_state to HSM_ST_ERR and
1218 * let the EH abort the command or reset the device.
1220 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1221 /* Some ATAPI tape drives forget to clear the ERR bit
1222 * when doing the next command (mostly request sense).
1223 * We ignore ERR here to workaround and proceed sending
1226 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1227 ata_ehi_push_desc(ehi
, "ST_FIRST: "
1228 "DRQ=1 with device error, "
1229 "dev_stat 0x%X", status
);
1230 qc
->err_mask
|= AC_ERR_HSM
;
1231 ap
->hsm_task_state
= HSM_ST_ERR
;
1236 /* Send the CDB (atapi) or the first data block (ata pio out).
1237 * During the state transition, interrupt handler shouldn't
1238 * be invoked before the data transfer is complete and
1239 * hsm_task_state is changed. Hence, the following locking.
1242 spin_lock_irqsave(ap
->lock
, flags
);
1244 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1245 /* PIO data out protocol.
1246 * send first data block.
1249 /* ata_pio_sectors() might change the state
1250 * to HSM_ST_LAST. so, the state is changed here
1251 * before ata_pio_sectors().
1253 ap
->hsm_task_state
= HSM_ST
;
1254 ata_pio_sectors(qc
);
1257 atapi_send_cdb(ap
, qc
);
1260 spin_unlock_irqrestore(ap
->lock
, flags
);
1262 /* if polling, ata_pio_task() handles the rest.
1263 * otherwise, interrupt handler takes over from here.
1268 /* complete command or read/write the data register */
1269 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1270 /* ATAPI PIO protocol */
1271 if ((status
& ATA_DRQ
) == 0) {
1272 /* No more data to transfer or device error.
1273 * Device error will be tagged in HSM_ST_LAST.
1275 ap
->hsm_task_state
= HSM_ST_LAST
;
1279 /* Device should not ask for data transfer (DRQ=1)
1280 * when it finds something wrong.
1281 * We ignore DRQ here and stop the HSM by
1282 * changing hsm_task_state to HSM_ST_ERR and
1283 * let the EH abort the command or reset the device.
1285 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1286 ata_ehi_push_desc(ehi
, "ST-ATAPI: "
1287 "DRQ=1 with device error, "
1288 "dev_stat 0x%X", status
);
1289 qc
->err_mask
|= AC_ERR_HSM
;
1290 ap
->hsm_task_state
= HSM_ST_ERR
;
1294 atapi_pio_bytes(qc
);
1296 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1297 /* bad ireason reported by device */
1301 /* ATA PIO protocol */
1302 if (unlikely((status
& ATA_DRQ
) == 0)) {
1303 /* handle BSY=0, DRQ=0 as error */
1304 if (likely(status
& (ATA_ERR
| ATA_DF
))) {
1305 /* device stops HSM for abort/error */
1306 qc
->err_mask
|= AC_ERR_DEV
;
1308 /* If diagnostic failed and this is
1309 * IDENTIFY, it's likely a phantom
1310 * device. Mark hint.
1312 if (qc
->dev
->horkage
&
1313 ATA_HORKAGE_DIAGNOSTIC
)
1317 /* HSM violation. Let EH handle this.
1318 * Phantom devices also trigger this
1319 * condition. Mark hint.
1321 ata_ehi_push_desc(ehi
, "ST-ATA: "
1322 "DRQ=1 with device error, "
1323 "dev_stat 0x%X", status
);
1324 qc
->err_mask
|= AC_ERR_HSM
|
1328 ap
->hsm_task_state
= HSM_ST_ERR
;
1332 /* For PIO reads, some devices may ask for
1333 * data transfer (DRQ=1) alone with ERR=1.
1334 * We respect DRQ here and transfer one
1335 * block of junk data before changing the
1336 * hsm_task_state to HSM_ST_ERR.
1338 * For PIO writes, ERR=1 DRQ=1 doesn't make
1339 * sense since the data block has been
1340 * transferred to the device.
1342 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1343 /* data might be corrputed */
1344 qc
->err_mask
|= AC_ERR_DEV
;
1346 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1347 ata_pio_sectors(qc
);
1348 status
= ata_wait_idle(ap
);
1351 if (status
& (ATA_BUSY
| ATA_DRQ
)) {
1352 ata_ehi_push_desc(ehi
, "ST-ATA: "
1353 "BUSY|DRQ persists on ERR|DF, "
1354 "dev_stat 0x%X", status
);
1355 qc
->err_mask
|= AC_ERR_HSM
;
1358 /* ata_pio_sectors() might change the
1359 * state to HSM_ST_LAST. so, the state
1360 * is changed after ata_pio_sectors().
1362 ap
->hsm_task_state
= HSM_ST_ERR
;
1366 ata_pio_sectors(qc
);
1368 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1369 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1371 status
= ata_wait_idle(ap
);
1380 if (unlikely(!ata_ok(status
))) {
1381 qc
->err_mask
|= __ac_err_mask(status
);
1382 ap
->hsm_task_state
= HSM_ST_ERR
;
1386 /* no more data to transfer */
1387 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1388 ap
->print_id
, qc
->dev
->devno
, status
);
1390 WARN_ON_ONCE(qc
->err_mask
& (AC_ERR_DEV
| AC_ERR_HSM
));
1392 ap
->hsm_task_state
= HSM_ST_IDLE
;
1394 /* complete taskfile transaction */
1395 ata_hsm_qc_complete(qc
, in_wq
);
1401 ap
->hsm_task_state
= HSM_ST_IDLE
;
1403 /* complete taskfile transaction */
1404 ata_hsm_qc_complete(qc
, in_wq
);
1415 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
1417 void ata_pio_task(struct work_struct
*work
)
1419 struct ata_port
*ap
=
1420 container_of(work
, struct ata_port
, port_task
.work
);
1421 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1426 WARN_ON_ONCE(ap
->hsm_task_state
== HSM_ST_IDLE
);
1429 * This is purely heuristic. This is a fast path.
1430 * Sometimes when we enter, BSY will be cleared in
1431 * a chk-status or two. If not, the drive is probably seeking
1432 * or something. Snooze for a couple msecs, then
1433 * chk-status again. If still busy, queue delayed work.
1435 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1436 if (status
& ATA_BUSY
) {
1438 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1439 if (status
& ATA_BUSY
) {
1440 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1446 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1448 /* another command or interrupt handler
1449 * may be running at this point.
1456 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1457 * @qc: command to issue to device
1459 * Using various libata functions and hooks, this function
1460 * starts an ATA command. ATA commands are grouped into
1461 * classes called "protocols", and issuing each type of protocol
1462 * is slightly different.
1464 * May be used as the qc_issue() entry in ata_port_operations.
1467 * spin_lock_irqsave(host lock)
1470 * Zero on success, AC_ERR_* mask on failure
1472 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1474 struct ata_port
*ap
= qc
->ap
;
1476 /* Use polling pio if the LLD doesn't handle
1477 * interrupt driven pio and atapi CDB interrupt.
1479 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1480 switch (qc
->tf
.protocol
) {
1482 case ATA_PROT_NODATA
:
1483 case ATAPI_PROT_PIO
:
1484 case ATAPI_PROT_NODATA
:
1485 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1487 case ATAPI_PROT_DMA
:
1488 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1489 /* see ata_dma_blacklisted() */
1497 /* select the device */
1498 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1500 /* start the command */
1501 switch (qc
->tf
.protocol
) {
1502 case ATA_PROT_NODATA
:
1503 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1504 ata_qc_set_polling(qc
);
1506 ata_tf_to_host(ap
, &qc
->tf
);
1507 ap
->hsm_task_state
= HSM_ST_LAST
;
1509 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1510 ata_pio_queue_task(ap
, qc
, 0);
1515 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1517 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1518 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1519 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1520 ap
->hsm_task_state
= HSM_ST_LAST
;
1524 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1525 ata_qc_set_polling(qc
);
1527 ata_tf_to_host(ap
, &qc
->tf
);
1529 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1530 /* PIO data out protocol */
1531 ap
->hsm_task_state
= HSM_ST_FIRST
;
1532 ata_pio_queue_task(ap
, qc
, 0);
1534 /* always send first data block using
1535 * the ata_pio_task() codepath.
1538 /* PIO data in protocol */
1539 ap
->hsm_task_state
= HSM_ST
;
1541 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1542 ata_pio_queue_task(ap
, qc
, 0);
1544 /* if polling, ata_pio_task() handles the rest.
1545 * otherwise, interrupt handler takes over from here.
1551 case ATAPI_PROT_PIO
:
1552 case ATAPI_PROT_NODATA
:
1553 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1554 ata_qc_set_polling(qc
);
1556 ata_tf_to_host(ap
, &qc
->tf
);
1558 ap
->hsm_task_state
= HSM_ST_FIRST
;
1560 /* send cdb by polling if no cdb interrupt */
1561 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1562 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1563 ata_pio_queue_task(ap
, qc
, 0);
1566 case ATAPI_PROT_DMA
:
1567 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1569 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1570 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1571 ap
->hsm_task_state
= HSM_ST_FIRST
;
1573 /* send cdb by polling if no cdb interrupt */
1574 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1575 ata_pio_queue_task(ap
, qc
, 0);
1580 return AC_ERR_SYSTEM
;
1585 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
1588 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1589 * @qc: qc to fill result TF for
1591 * @qc is finished and result TF needs to be filled. Fill it
1592 * using ->sff_tf_read.
1595 * spin_lock_irqsave(host lock)
1598 * true indicating that result TF is successfully filled.
1600 bool ata_sff_qc_fill_rtf(struct ata_queued_cmd
*qc
)
1602 qc
->ap
->ops
->sff_tf_read(qc
->ap
, &qc
->result_tf
);
1605 EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf
);
1608 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1609 * @ap: Port on which interrupt arrived (possibly...)
1610 * @qc: Taskfile currently active in engine
1612 * Handle host interrupt for given queued command. Currently,
1613 * only DMA interrupts are handled. All other commands are
1614 * handled via polling with interrupts disabled (nIEN bit).
1617 * spin_lock_irqsave(host lock)
1620 * One if interrupt was handled, zero if not (shared irq).
1622 inline unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1623 struct ata_queued_cmd
*qc
)
1625 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1626 u8 status
, host_stat
= 0;
1628 VPRINTK("ata%u: protocol %d task_state %d\n",
1629 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1631 /* Check whether we are expecting interrupt in this state */
1632 switch (ap
->hsm_task_state
) {
1634 /* Some pre-ATAPI-4 devices assert INTRQ
1635 * at this state when ready to receive CDB.
1638 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1639 * The flag was turned on only for atapi devices. No
1640 * need to check ata_is_atapi(qc->tf.protocol) again.
1642 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1646 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1647 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1648 /* check status of DMA engine */
1649 host_stat
= ap
->ops
->bmdma_status(ap
);
1650 VPRINTK("ata%u: host_stat 0x%X\n",
1651 ap
->print_id
, host_stat
);
1653 /* if it's not our irq... */
1654 if (!(host_stat
& ATA_DMA_INTR
))
1657 /* before we do anything else, clear DMA-Start bit */
1658 ap
->ops
->bmdma_stop(qc
);
1660 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1661 /* error when transfering data to/from memory */
1662 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1663 ap
->hsm_task_state
= HSM_ST_ERR
;
1674 /* check main status, clearing INTRQ if needed */
1675 status
= ata_sff_irq_status(ap
);
1676 if (status
& ATA_BUSY
)
1679 /* ack bmdma irq events */
1680 ap
->ops
->sff_irq_clear(ap
);
1682 ata_sff_hsm_move(ap
, qc
, status
, 0);
1684 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1685 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1686 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1688 return 1; /* irq handled */
1691 ap
->stats
.idle_irq
++;
1694 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1695 ap
->ops
->sff_check_status(ap
);
1696 ap
->ops
->sff_irq_clear(ap
);
1697 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1701 return 0; /* irq not handled */
1703 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
1706 * ata_sff_interrupt - Default ATA host interrupt handler
1707 * @irq: irq line (unused)
1708 * @dev_instance: pointer to our ata_host information structure
1710 * Default interrupt handler for PCI IDE devices. Calls
1711 * ata_sff_host_intr() for each port that is not disabled.
1714 * Obtains host lock during operation.
1717 * IRQ_NONE or IRQ_HANDLED.
1719 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1721 struct ata_host
*host
= dev_instance
;
1723 unsigned int handled
= 0;
1724 unsigned long flags
;
1726 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1727 spin_lock_irqsave(&host
->lock
, flags
);
1729 for (i
= 0; i
< host
->n_ports
; i
++) {
1730 struct ata_port
*ap
;
1732 ap
= host
->ports
[i
];
1734 !(ap
->flags
& ATA_FLAG_DISABLED
)) {
1735 struct ata_queued_cmd
*qc
;
1737 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1738 if (qc
&& (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
)) &&
1739 (qc
->flags
& ATA_QCFLAG_ACTIVE
))
1740 handled
|= ata_sff_host_intr(ap
, qc
);
1744 spin_unlock_irqrestore(&host
->lock
, flags
);
1746 return IRQ_RETVAL(handled
);
1748 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
1751 * ata_sff_freeze - Freeze SFF controller port
1752 * @ap: port to freeze
1754 * Freeze BMDMA controller port.
1757 * Inherited from caller.
1759 void ata_sff_freeze(struct ata_port
*ap
)
1761 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1763 ap
->ctl
|= ATA_NIEN
;
1764 ap
->last_ctl
= ap
->ctl
;
1766 if (ioaddr
->ctl_addr
)
1767 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1769 /* Under certain circumstances, some controllers raise IRQ on
1770 * ATA_NIEN manipulation. Also, many controllers fail to mask
1771 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1773 ap
->ops
->sff_check_status(ap
);
1775 ap
->ops
->sff_irq_clear(ap
);
1777 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
1780 * ata_sff_thaw - Thaw SFF controller port
1783 * Thaw SFF controller port.
1786 * Inherited from caller.
1788 void ata_sff_thaw(struct ata_port
*ap
)
1790 /* clear & re-enable interrupts */
1791 ap
->ops
->sff_check_status(ap
);
1792 ap
->ops
->sff_irq_clear(ap
);
1793 ap
->ops
->sff_irq_on(ap
);
1795 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
1798 * ata_sff_prereset - prepare SFF link for reset
1799 * @link: SFF link to be reset
1800 * @deadline: deadline jiffies for the operation
1802 * SFF link @link is about to be reset. Initialize it. It first
1803 * calls ata_std_prereset() and wait for !BSY if the port is
1807 * Kernel thread context (may sleep)
1810 * 0 on success, -errno otherwise.
1812 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1814 struct ata_eh_context
*ehc
= &link
->eh_context
;
1817 rc
= ata_std_prereset(link
, deadline
);
1821 /* if we're about to do hardreset, nothing more to do */
1822 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1825 /* wait for !BSY if we don't know that no device is attached */
1826 if (!ata_link_offline(link
)) {
1827 rc
= ata_sff_wait_ready(link
, deadline
);
1828 if (rc
&& rc
!= -ENODEV
) {
1829 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1830 "(errno=%d), forcing hardreset\n", rc
);
1831 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1837 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
1840 * ata_devchk - PATA device presence detection
1841 * @ap: ATA channel to examine
1842 * @device: Device to examine (starting at zero)
1844 * This technique was originally described in
1845 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1846 * later found its way into the ATA/ATAPI spec.
1848 * Write a pattern to the ATA shadow registers,
1849 * and if a device is present, it will respond by
1850 * correctly storing and echoing back the
1851 * ATA shadow register contents.
1856 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1858 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1861 ap
->ops
->sff_dev_select(ap
, device
);
1863 iowrite8(0x55, ioaddr
->nsect_addr
);
1864 iowrite8(0xaa, ioaddr
->lbal_addr
);
1866 iowrite8(0xaa, ioaddr
->nsect_addr
);
1867 iowrite8(0x55, ioaddr
->lbal_addr
);
1869 iowrite8(0x55, ioaddr
->nsect_addr
);
1870 iowrite8(0xaa, ioaddr
->lbal_addr
);
1872 nsect
= ioread8(ioaddr
->nsect_addr
);
1873 lbal
= ioread8(ioaddr
->lbal_addr
);
1875 if ((nsect
== 0x55) && (lbal
== 0xaa))
1876 return 1; /* we found a device */
1878 return 0; /* nothing found */
1882 * ata_sff_dev_classify - Parse returned ATA device signature
1883 * @dev: ATA device to classify (starting at zero)
1884 * @present: device seems present
1885 * @r_err: Value of error register on completion
1887 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1888 * an ATA/ATAPI-defined set of values is placed in the ATA
1889 * shadow registers, indicating the results of device detection
1892 * Select the ATA device, and read the values from the ATA shadow
1893 * registers. Then parse according to the Error register value,
1894 * and the spec-defined values examined by ata_dev_classify().
1900 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1902 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
1905 struct ata_port
*ap
= dev
->link
->ap
;
1906 struct ata_taskfile tf
;
1910 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
1912 memset(&tf
, 0, sizeof(tf
));
1914 ap
->ops
->sff_tf_read(ap
, &tf
);
1919 /* see if device passed diags: continue and warn later */
1921 /* diagnostic fail : do nothing _YET_ */
1922 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
1925 else if ((dev
->devno
== 0) && (err
== 0x81))
1928 return ATA_DEV_NONE
;
1930 /* determine if device is ATA or ATAPI */
1931 class = ata_dev_classify(&tf
);
1933 if (class == ATA_DEV_UNKNOWN
) {
1934 /* If the device failed diagnostic, it's likely to
1935 * have reported incorrect device signature too.
1936 * Assume ATA device if the device seems present but
1937 * device signature is invalid with diagnostic
1940 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
1941 class = ATA_DEV_ATA
;
1943 class = ATA_DEV_NONE
;
1944 } else if ((class == ATA_DEV_ATA
) &&
1945 (ap
->ops
->sff_check_status(ap
) == 0))
1946 class = ATA_DEV_NONE
;
1950 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
1953 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1954 * @link: SFF link which is just reset
1955 * @devmask: mask of present devices
1956 * @deadline: deadline jiffies for the operation
1958 * Wait devices attached to SFF @link to become ready after
1959 * reset. It contains preceding 150ms wait to avoid accessing TF
1960 * status register too early.
1963 * Kernel thread context (may sleep).
1966 * 0 on success, -ENODEV if some or all of devices in @devmask
1967 * don't seem to exist. -errno on other errors.
1969 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
1970 unsigned long deadline
)
1972 struct ata_port
*ap
= link
->ap
;
1973 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1974 unsigned int dev0
= devmask
& (1 << 0);
1975 unsigned int dev1
= devmask
& (1 << 1);
1978 msleep(ATA_WAIT_AFTER_RESET
);
1980 /* always check readiness of the master device */
1981 rc
= ata_sff_wait_ready(link
, deadline
);
1982 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1983 * and TF status is 0xff, bail out on it too.
1988 /* if device 1 was found in ata_devchk, wait for register
1989 * access briefly, then wait for BSY to clear.
1994 ap
->ops
->sff_dev_select(ap
, 1);
1996 /* Wait for register access. Some ATAPI devices fail
1997 * to set nsect/lbal after reset, so don't waste too
1998 * much time on it. We're gonna wait for !BSY anyway.
2000 for (i
= 0; i
< 2; i
++) {
2003 nsect
= ioread8(ioaddr
->nsect_addr
);
2004 lbal
= ioread8(ioaddr
->lbal_addr
);
2005 if ((nsect
== 1) && (lbal
== 1))
2007 msleep(50); /* give drive a breather */
2010 rc
= ata_sff_wait_ready(link
, deadline
);
2018 /* is all this really necessary? */
2019 ap
->ops
->sff_dev_select(ap
, 0);
2021 ap
->ops
->sff_dev_select(ap
, 1);
2023 ap
->ops
->sff_dev_select(ap
, 0);
2027 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2029 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
2030 unsigned long deadline
)
2032 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2034 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
2036 /* software reset. causes dev0 to be selected */
2037 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2038 udelay(20); /* FIXME: flush */
2039 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
2040 udelay(20); /* FIXME: flush */
2041 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2043 /* wait the port to become ready */
2044 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
2048 * ata_sff_softreset - reset host port via ATA SRST
2049 * @link: ATA link to reset
2050 * @classes: resulting classes of attached devices
2051 * @deadline: deadline jiffies for the operation
2053 * Reset host port using ATA SRST.
2056 * Kernel thread context (may sleep)
2059 * 0 on success, -errno otherwise.
2061 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
2062 unsigned long deadline
)
2064 struct ata_port
*ap
= link
->ap
;
2065 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2066 unsigned int devmask
= 0;
2072 /* determine if device 0/1 are present */
2073 if (ata_devchk(ap
, 0))
2074 devmask
|= (1 << 0);
2075 if (slave_possible
&& ata_devchk(ap
, 1))
2076 devmask
|= (1 << 1);
2078 /* select device 0 again */
2079 ap
->ops
->sff_dev_select(ap
, 0);
2081 /* issue bus reset */
2082 DPRINTK("about to softreset, devmask=%x\n", devmask
);
2083 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
2084 /* if link is occupied, -ENODEV too is an error */
2085 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
2086 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
2090 /* determine by signature whether we have ATA or ATAPI devices */
2091 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
2092 devmask
& (1 << 0), &err
);
2093 if (slave_possible
&& err
!= 0x81)
2094 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
2095 devmask
& (1 << 1), &err
);
2097 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
2100 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2103 * sata_sff_hardreset - reset host port via SATA phy reset
2104 * @link: link to reset
2105 * @class: resulting class of attached device
2106 * @deadline: deadline jiffies for the operation
2108 * SATA phy-reset host port using DET bits of SControl register,
2109 * wait for !BSY and classify the attached device.
2112 * Kernel thread context (may sleep)
2115 * 0 on success, -errno otherwise.
2117 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
2118 unsigned long deadline
)
2120 struct ata_eh_context
*ehc
= &link
->eh_context
;
2121 const unsigned long *timing
= sata_ehc_deb_timing(ehc
);
2125 rc
= sata_link_hardreset(link
, timing
, deadline
, &online
,
2126 ata_sff_check_ready
);
2128 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2130 DPRINTK("EXIT, class=%u\n", *class);
2133 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2136 * ata_sff_postreset - SFF postreset callback
2137 * @link: the target SFF ata_link
2138 * @classes: classes of attached devices
2140 * This function is invoked after a successful reset. It first
2141 * calls ata_std_postreset() and performs SFF specific postreset
2145 * Kernel thread context (may sleep)
2147 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2149 struct ata_port
*ap
= link
->ap
;
2151 ata_std_postreset(link
, classes
);
2153 /* is double-select really necessary? */
2154 if (classes
[0] != ATA_DEV_NONE
)
2155 ap
->ops
->sff_dev_select(ap
, 1);
2156 if (classes
[1] != ATA_DEV_NONE
)
2157 ap
->ops
->sff_dev_select(ap
, 0);
2159 /* bail out if no device is present */
2160 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2161 DPRINTK("EXIT, no device\n");
2165 /* set up device control */
2166 if (ap
->ioaddr
.ctl_addr
)
2167 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2169 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2172 * ata_sff_error_handler - Stock error handler for BMDMA controller
2173 * @ap: port to handle error for
2175 * Stock error handler for SFF controller. It can handle both
2176 * PATA and SATA controllers. Many controllers should be able to
2177 * use this EH as-is or with some added handling before and
2181 * Kernel thread context (may sleep)
2183 void ata_sff_error_handler(struct ata_port
*ap
)
2185 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2186 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2187 struct ata_queued_cmd
*qc
;
2188 unsigned long flags
;
2191 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2192 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2195 /* reset PIO HSM and stop DMA engine */
2196 spin_lock_irqsave(ap
->lock
, flags
);
2198 ap
->hsm_task_state
= HSM_ST_IDLE
;
2200 if (ap
->ioaddr
.bmdma_addr
&&
2201 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2202 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2205 host_stat
= ap
->ops
->bmdma_status(ap
);
2207 /* BMDMA controllers indicate host bus error by
2208 * setting DMA_ERR bit and timing out. As it wasn't
2209 * really a timeout event, adjust error mask and
2210 * cancel frozen state.
2212 if (qc
->err_mask
== AC_ERR_TIMEOUT
&& (host_stat
& ATA_DMA_ERR
)) {
2213 qc
->err_mask
= AC_ERR_HOST_BUS
;
2217 ap
->ops
->bmdma_stop(qc
);
2220 ata_sff_sync(ap
); /* FIXME: We don't need this */
2221 ap
->ops
->sff_check_status(ap
);
2222 ap
->ops
->sff_irq_clear(ap
);
2224 spin_unlock_irqrestore(ap
->lock
, flags
);
2227 ata_eh_thaw_port(ap
);
2229 /* PIO and DMA engines have been stopped, perform recovery */
2231 /* Ignore ata_sff_softreset if ctl isn't accessible and
2232 * built-in hardresets if SCR access isn't available.
2234 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2236 if (ata_is_builtin_hardreset(hardreset
) && !sata_scr_valid(&ap
->link
))
2239 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2240 ap
->ops
->postreset
);
2242 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2245 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2246 * @qc: internal command to clean up
2249 * Kernel thread context (may sleep)
2251 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2253 struct ata_port
*ap
= qc
->ap
;
2254 unsigned long flags
;
2256 spin_lock_irqsave(ap
->lock
, flags
);
2258 ap
->hsm_task_state
= HSM_ST_IDLE
;
2260 if (ap
->ioaddr
.bmdma_addr
)
2263 spin_unlock_irqrestore(ap
->lock
, flags
);
2265 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2268 * ata_sff_port_start - Set port up for dma.
2269 * @ap: Port to initialize
2271 * Called just after data structures for each port are
2272 * initialized. Allocates space for PRD table if the device
2273 * is DMA capable SFF.
2275 * May be used as the port_start() entry in ata_port_operations.
2278 * Inherited from caller.
2280 int ata_sff_port_start(struct ata_port
*ap
)
2282 if (ap
->ioaddr
.bmdma_addr
)
2283 return ata_port_start(ap
);
2286 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2289 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2290 * @ioaddr: IO address structure to be initialized
2292 * Utility function which initializes data_addr, error_addr,
2293 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2294 * device_addr, status_addr, and command_addr to standard offsets
2295 * relative to cmd_addr.
2297 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2299 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2301 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2302 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2303 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2304 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2305 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2306 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2307 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2308 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2309 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2310 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2312 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2314 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2315 unsigned long xfer_mask
)
2317 /* Filter out DMA modes if the device has been configured by
2318 the BIOS as PIO only */
2320 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2321 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2324 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2327 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2328 * @qc: Info associated with this ATA transaction.
2331 * spin_lock_irqsave(host lock)
2333 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2335 struct ata_port
*ap
= qc
->ap
;
2336 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2339 /* load PRD table addr. */
2340 mb(); /* make sure PRD table writes are visible to controller */
2341 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2343 /* specify data direction, triple-check start bit is clear */
2344 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2345 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2347 dmactl
|= ATA_DMA_WR
;
2348 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2350 /* issue r/w command */
2351 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2353 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2356 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2357 * @qc: Info associated with this ATA transaction.
2360 * spin_lock_irqsave(host lock)
2362 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2364 struct ata_port
*ap
= qc
->ap
;
2367 /* start host DMA transaction */
2368 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2369 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2371 /* Strictly, one may wish to issue an ioread8() here, to
2372 * flush the mmio write. However, control also passes
2373 * to the hardware at this point, and it will interrupt
2374 * us when we are to resume control. So, in effect,
2375 * we don't care when the mmio write flushes.
2376 * Further, a read of the DMA status register _immediately_
2377 * following the write may not be what certain flaky hardware
2378 * is expected, so I think it is best to not add a readb()
2379 * without first all the MMIO ATA cards/mobos.
2380 * Or maybe I'm just being paranoid.
2382 * FIXME: The posting of this write means I/O starts are
2383 * unneccessarily delayed for MMIO
2386 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2389 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2390 * @qc: Command we are ending DMA for
2392 * Clears the ATA_DMA_START flag in the dma control register
2394 * May be used as the bmdma_stop() entry in ata_port_operations.
2397 * spin_lock_irqsave(host lock)
2399 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2401 struct ata_port
*ap
= qc
->ap
;
2402 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2404 /* clear start/stop bit */
2405 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2406 mmio
+ ATA_DMA_CMD
);
2408 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2409 ata_sff_dma_pause(ap
);
2411 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2414 * ata_bmdma_status - Read PCI IDE BMDMA status
2415 * @ap: Port associated with this ATA transaction.
2417 * Read and return BMDMA status register.
2419 * May be used as the bmdma_status() entry in ata_port_operations.
2422 * spin_lock_irqsave(host lock)
2424 u8
ata_bmdma_status(struct ata_port
*ap
)
2426 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2428 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2431 * ata_bus_reset - reset host port and associated ATA channel
2432 * @ap: port to reset
2434 * This is typically the first time we actually start issuing
2435 * commands to the ATA channel. We wait for BSY to clear, then
2436 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2437 * result. Determine what devices, if any, are on the channel
2438 * by looking at the device 0/1 error register. Look at the signature
2439 * stored in each device's taskfile registers, to determine if
2440 * the device is ATA or ATAPI.
2443 * PCI/etc. bus probe sem.
2444 * Obtains host lock.
2447 * Sets ATA_FLAG_DISABLED if bus reset fails.
2450 * This function is only for drivers which still use old EH and
2451 * will be removed soon.
2453 void ata_bus_reset(struct ata_port
*ap
)
2455 struct ata_device
*device
= ap
->link
.device
;
2456 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2457 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2459 unsigned int dev0
, dev1
= 0, devmask
= 0;
2462 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2464 /* determine if device 0/1 are present */
2465 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2468 dev0
= ata_devchk(ap
, 0);
2470 dev1
= ata_devchk(ap
, 1);
2474 devmask
|= (1 << 0);
2476 devmask
|= (1 << 1);
2478 /* select device 0 again */
2479 ap
->ops
->sff_dev_select(ap
, 0);
2481 /* issue bus reset */
2482 if (ap
->flags
& ATA_FLAG_SRST
) {
2483 rc
= ata_bus_softreset(ap
, devmask
,
2484 ata_deadline(jiffies
, 40000));
2485 if (rc
&& rc
!= -ENODEV
)
2490 * determine by signature whether we have ATA or ATAPI devices
2492 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2493 if ((slave_possible
) && (err
!= 0x81))
2494 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2496 /* is double-select really necessary? */
2497 if (device
[1].class != ATA_DEV_NONE
)
2498 ap
->ops
->sff_dev_select(ap
, 1);
2499 if (device
[0].class != ATA_DEV_NONE
)
2500 ap
->ops
->sff_dev_select(ap
, 0);
2502 /* if no devices were detected, disable this port */
2503 if ((device
[0].class == ATA_DEV_NONE
) &&
2504 (device
[1].class == ATA_DEV_NONE
))
2507 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2508 /* set up device control for ATA_FLAG_SATA_RESET */
2509 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2516 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2517 ata_port_disable(ap
);
2521 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2526 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2529 * Some PCI ATA devices report simplex mode but in fact can be told to
2530 * enter non simplex mode. This implements the necessary logic to
2531 * perform the task on such devices. Calling it on other devices will
2532 * have -undefined- behaviour.
2534 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2536 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2542 simplex
= inb(bmdma
+ 0x02);
2543 outb(simplex
& 0x60, bmdma
+ 0x02);
2544 simplex
= inb(bmdma
+ 0x02);
2549 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2552 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2553 * @host: target ATA host
2555 * Acquire PCI BMDMA resources and initialize @host accordingly.
2558 * Inherited from calling layer (may sleep).
2561 * 0 on success, -errno otherwise.
2563 int ata_pci_bmdma_init(struct ata_host
*host
)
2565 struct device
*gdev
= host
->dev
;
2566 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2569 /* No BAR4 allocation: No DMA */
2570 if (pci_resource_start(pdev
, 4) == 0)
2573 /* TODO: If we get no DMA mask we should fall back to PIO */
2574 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2577 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2581 /* request and iomap DMA region */
2582 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2584 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2587 host
->iomap
= pcim_iomap_table(pdev
);
2589 for (i
= 0; i
< 2; i
++) {
2590 struct ata_port
*ap
= host
->ports
[i
];
2591 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2593 if (ata_port_is_dummy(ap
))
2596 ap
->ioaddr
.bmdma_addr
= bmdma
;
2597 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2598 (ioread8(bmdma
+ 2) & 0x80))
2599 host
->flags
|= ATA_HOST_SIMPLEX
;
2601 ata_port_desc(ap
, "bmdma 0x%llx",
2602 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2607 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2609 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2613 /* Check the PCI resources for this channel are enabled */
2615 for (i
= 0; i
< 2; i
++) {
2616 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2617 pci_resource_len(pdev
, port
+ i
) == 0)
2624 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2625 * @host: target ATA host
2627 * Acquire native PCI ATA resources for @host and initialize the
2628 * first two ports of @host accordingly. Ports marked dummy are
2629 * skipped and allocation failure makes the port dummy.
2631 * Note that native PCI resources are valid even for legacy hosts
2632 * as we fix up pdev resources array early in boot, so this
2633 * function can be used for both native and legacy SFF hosts.
2636 * Inherited from calling layer (may sleep).
2639 * 0 if at least one port is initialized, -ENODEV if no port is
2642 int ata_pci_sff_init_host(struct ata_host
*host
)
2644 struct device
*gdev
= host
->dev
;
2645 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2646 unsigned int mask
= 0;
2649 /* request, iomap BARs and init port addresses accordingly */
2650 for (i
= 0; i
< 2; i
++) {
2651 struct ata_port
*ap
= host
->ports
[i
];
2653 void __iomem
* const *iomap
;
2655 if (ata_port_is_dummy(ap
))
2658 /* Discard disabled ports. Some controllers show
2659 * their unused channels this way. Disabled ports are
2662 if (!ata_resources_present(pdev
, i
)) {
2663 ap
->ops
= &ata_dummy_port_ops
;
2667 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2668 dev_driver_string(gdev
));
2670 dev_printk(KERN_WARNING
, gdev
,
2671 "failed to request/iomap BARs for port %d "
2672 "(errno=%d)\n", i
, rc
);
2674 pcim_pin_device(pdev
);
2675 ap
->ops
= &ata_dummy_port_ops
;
2678 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2680 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2681 ap
->ioaddr
.altstatus_addr
=
2682 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2683 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2684 ata_sff_std_ports(&ap
->ioaddr
);
2686 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2687 (unsigned long long)pci_resource_start(pdev
, base
),
2688 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2694 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2700 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2703 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2704 * @pdev: target PCI device
2705 * @ppi: array of port_info, must be enough for two ports
2706 * @r_host: out argument for the initialized ATA host
2708 * Helper to allocate ATA host for @pdev, acquire all native PCI
2709 * resources and initialize it accordingly in one go.
2712 * Inherited from calling layer (may sleep).
2715 * 0 on success, -errno otherwise.
2717 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2718 const struct ata_port_info
* const *ppi
,
2719 struct ata_host
**r_host
)
2721 struct ata_host
*host
;
2724 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2727 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2729 dev_printk(KERN_ERR
, &pdev
->dev
,
2730 "failed to allocate ATA host\n");
2735 rc
= ata_pci_sff_init_host(host
);
2739 /* init DMA related stuff */
2740 rc
= ata_pci_bmdma_init(host
);
2744 devres_remove_group(&pdev
->dev
, NULL
);
2749 /* This is necessary because PCI and iomap resources are
2750 * merged and releasing the top group won't release the
2751 * acquired resources if some of those have been acquired
2752 * before entering this function.
2754 pcim_iounmap_regions(pdev
, 0xf);
2756 devres_release_group(&pdev
->dev
, NULL
);
2759 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2762 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2763 * @host: target SFF ATA host
2764 * @irq_handler: irq_handler used when requesting IRQ(s)
2765 * @sht: scsi_host_template to use when registering the host
2767 * This is the counterpart of ata_host_activate() for SFF ATA
2768 * hosts. This separate helper is necessary because SFF hosts
2769 * use two separate interrupts in legacy mode.
2772 * Inherited from calling layer (may sleep).
2775 * 0 on success, -errno otherwise.
2777 int ata_pci_sff_activate_host(struct ata_host
*host
,
2778 irq_handler_t irq_handler
,
2779 struct scsi_host_template
*sht
)
2781 struct device
*dev
= host
->dev
;
2782 struct pci_dev
*pdev
= to_pci_dev(dev
);
2783 const char *drv_name
= dev_driver_string(host
->dev
);
2784 int legacy_mode
= 0, rc
;
2786 rc
= ata_host_start(host
);
2790 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
2793 /* TODO: What if one channel is in native mode ... */
2794 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
2795 mask
= (1 << 2) | (1 << 0);
2796 if ((tmp8
& mask
) != mask
)
2798 #if defined(CONFIG_NO_ATA_LEGACY)
2799 /* Some platforms with PCI limits cannot address compat
2800 port space. In that case we punt if their firmware has
2801 left a device in compatibility mode */
2803 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2809 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2812 if (!legacy_mode
&& pdev
->irq
) {
2813 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
2814 IRQF_SHARED
, drv_name
, host
);
2818 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
2819 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
2820 } else if (legacy_mode
) {
2821 if (!ata_port_is_dummy(host
->ports
[0])) {
2822 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
2823 irq_handler
, IRQF_SHARED
,
2828 ata_port_desc(host
->ports
[0], "irq %d",
2829 ATA_PRIMARY_IRQ(pdev
));
2832 if (!ata_port_is_dummy(host
->ports
[1])) {
2833 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
2834 irq_handler
, IRQF_SHARED
,
2839 ata_port_desc(host
->ports
[1], "irq %d",
2840 ATA_SECONDARY_IRQ(pdev
));
2844 rc
= ata_host_register(host
, sht
);
2847 devres_remove_group(dev
, NULL
);
2849 devres_release_group(dev
, NULL
);
2853 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
2856 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
2857 * @pdev: Controller to be initialized
2858 * @ppi: array of port_info, must be enough for two ports
2859 * @sht: scsi_host_template to use when registering the host
2860 * @host_priv: host private_data
2862 * This is a helper function which can be called from a driver's
2863 * xxx_init_one() probe function if the hardware uses traditional
2864 * IDE taskfile registers.
2866 * This function calls pci_enable_device(), reserves its register
2867 * regions, sets the dma mask, enables bus master mode, and calls
2871 * Nobody makes a single channel controller that appears solely as
2872 * the secondary legacy port on PCI.
2875 * Inherited from PCI layer (may sleep).
2878 * Zero on success, negative on errno-based value on error.
2880 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
2881 const struct ata_port_info
* const *ppi
,
2882 struct scsi_host_template
*sht
, void *host_priv
)
2884 struct device
*dev
= &pdev
->dev
;
2885 const struct ata_port_info
*pi
= NULL
;
2886 struct ata_host
*host
= NULL
;
2891 /* look up the first valid port_info */
2892 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
2893 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
2900 dev_printk(KERN_ERR
, &pdev
->dev
,
2901 "no valid port_info specified\n");
2905 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
2908 rc
= pcim_enable_device(pdev
);
2912 /* prepare and activate SFF host */
2913 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
2916 host
->private_data
= host_priv
;
2918 pci_set_master(pdev
);
2919 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
2922 devres_remove_group(&pdev
->dev
, NULL
);
2924 devres_release_group(&pdev
->dev
, NULL
);
2928 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
2930 #endif /* CONFIG_PCI */