2 * Machine check handler.
3 * K8 parts Copyright 2002,2003 Andi Kleen, SuSE Labs.
4 * Rest from unknown author(s).
5 * 2004 Andi Kleen. Rewrote most of it.
8 #include <linux/init.h>
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/smp_lock.h>
13 #include <linux/string.h>
14 #include <linux/rcupdate.h>
15 #include <linux/kallsyms.h>
16 #include <linux/sysdev.h>
17 #include <linux/miscdevice.h>
19 #include <linux/capability.h>
20 #include <linux/cpu.h>
21 #include <linux/percpu.h>
22 #include <linux/poll.h>
23 #include <linux/thread_info.h>
24 #include <linux/ctype.h>
25 #include <linux/kmod.h>
26 #include <linux/kdebug.h>
27 #include <asm/processor.h>
30 #include <asm/uaccess.h>
34 #define MISC_MCELOG_MINOR 227
35 #define NR_SYSFS_BANKS 6
39 static int mce_dont_init
;
43 * 0: always panic on uncorrected errors, log corrected errors
44 * 1: panic or SIGBUS on uncorrected errors, log corrected errors
45 * 2: SIGBUS or log uncorrected errors (if possible), log corrected errors
46 * 3: never panic or SIGBUS, log all errors (for testing only)
48 static int tolerant
= 1;
50 static unsigned long bank
[NR_SYSFS_BANKS
] = { [0 ... NR_SYSFS_BANKS
-1] = ~0UL };
51 static unsigned long notify_user
;
53 static int mce_bootlog
= -1;
54 static atomic_t mce_events
;
56 static char trigger
[128];
57 static char *trigger_argv
[2] = { trigger
, NULL
};
59 static DECLARE_WAIT_QUEUE_HEAD(mce_wait
);
62 * Lockless MCE logging infrastructure.
63 * This avoids deadlocks on printk locks without having to break locks. Also
64 * separate MCEs from kernel messages to avoid bogus bug reports.
67 static struct mce_log mcelog
= {
72 void mce_log(struct mce
*mce
)
75 atomic_inc(&mce_events
);
79 entry
= rcu_dereference(mcelog
.next
);
81 /* When the buffer fills up discard new entries. Assume
82 that the earlier errors are the more interesting. */
83 if (entry
>= MCE_LOG_LEN
) {
84 set_bit(MCE_OVERFLOW
, (unsigned long *)&mcelog
.flags
);
87 /* Old left over entry. Skip. */
88 if (mcelog
.entry
[entry
].finished
) {
96 if (cmpxchg(&mcelog
.next
, entry
, next
) == entry
)
99 memcpy(mcelog
.entry
+ entry
, mce
, sizeof(struct mce
));
101 mcelog
.entry
[entry
].finished
= 1;
104 set_bit(0, ¬ify_user
);
107 static void print_mce(struct mce
*m
)
109 printk(KERN_EMERG
"\n"
110 KERN_EMERG
"HARDWARE ERROR\n"
112 "CPU %d: Machine Check Exception: %16Lx Bank %d: %016Lx\n",
113 m
->cpu
, m
->mcgstatus
, m
->bank
, m
->status
);
115 printk(KERN_EMERG
"RIP%s %02x:<%016Lx> ",
116 !(m
->mcgstatus
& MCG_STATUS_EIPV
) ? " !INEXACT!" : "",
118 if (m
->cs
== __KERNEL_CS
)
119 print_symbol("{%s}", m
->ip
);
122 printk(KERN_EMERG
"TSC %Lx ", m
->tsc
);
124 printk("ADDR %Lx ", m
->addr
);
126 printk("MISC %Lx ", m
->misc
);
128 printk(KERN_EMERG
"This is not a software problem!\n");
129 printk(KERN_EMERG
"Run through mcelog --ascii to decode "
130 "and contact your hardware vendor\n");
133 static void mce_panic(char *msg
, struct mce
*backup
, unsigned long start
)
138 for (i
= 0; i
< MCE_LOG_LEN
; i
++) {
139 unsigned long tsc
= mcelog
.entry
[i
].tsc
;
141 if (time_before(tsc
, start
))
143 print_mce(&mcelog
.entry
[i
]);
144 if (backup
&& mcelog
.entry
[i
].tsc
== backup
->tsc
)
152 static int mce_available(struct cpuinfo_x86
*c
)
156 return cpu_has(c
, X86_FEATURE_MCE
) && cpu_has(c
, X86_FEATURE_MCA
);
159 static inline void mce_get_rip(struct mce
*m
, struct pt_regs
*regs
)
161 if (regs
&& (m
->mcgstatus
& MCG_STATUS_RIPV
)) {
169 /* Assume the RIP in the MSR is exact. Is this true? */
170 m
->mcgstatus
|= MCG_STATUS_EIPV
;
171 rdmsrl(rip_msr
, m
->ip
);
177 * The actual machine check handler
179 void do_machine_check(struct pt_regs
* regs
, long error_code
)
181 struct mce m
, panicm
;
184 int panicm_found
= 0;
186 * If no_way_out gets set, there is no safe way to recover from this
187 * MCE. If tolerant is cranked up, we'll try anyway.
191 * If kill_it gets set, there might be a way to recover from this
196 atomic_inc(&mce_entry
);
199 && notify_die(DIE_NMI
, "machine check", regs
, error_code
,
200 18, SIGKILL
) == NOTIFY_STOP
)
204 memset(&m
, 0, sizeof(struct mce
));
205 m
.cpu
= smp_processor_id();
206 rdmsrl(MSR_IA32_MCG_STATUS
, m
.mcgstatus
);
207 /* if the restart IP is not valid, we're done for */
208 if (!(m
.mcgstatus
& MCG_STATUS_RIPV
))
214 for (i
= 0; i
< banks
; i
++) {
215 if (i
< NR_SYSFS_BANKS
&& !bank
[i
])
223 rdmsrl(MSR_IA32_MC0_STATUS
+ i
*4, m
.status
);
224 if ((m
.status
& MCI_STATUS_VAL
) == 0)
227 if (m
.status
& MCI_STATUS_EN
) {
228 /* if PCC was set, there's no way out */
229 no_way_out
|= !!(m
.status
& MCI_STATUS_PCC
);
231 * If this error was uncorrectable and there was
232 * an overflow, we're in trouble. If no overflow,
233 * we might get away with just killing a task.
235 if (m
.status
& MCI_STATUS_UC
) {
236 if (tolerant
< 1 || m
.status
& MCI_STATUS_OVER
)
242 if (m
.status
& MCI_STATUS_MISCV
)
243 rdmsrl(MSR_IA32_MC0_MISC
+ i
*4, m
.misc
);
244 if (m
.status
& MCI_STATUS_ADDRV
)
245 rdmsrl(MSR_IA32_MC0_ADDR
+ i
*4, m
.addr
);
247 mce_get_rip(&m
, regs
);
250 if (error_code
!= -2)
253 /* Did this bank cause the exception? */
254 /* Assume that the bank with uncorrectable errors did it,
255 and that there is only a single one. */
256 if ((m
.status
& MCI_STATUS_UC
) && (m
.status
& MCI_STATUS_EN
)) {
261 add_taint(TAINT_MACHINE_CHECK
);
264 /* Never do anything final in the polling timer */
268 /* If we didn't find an uncorrectable error, pick
269 the last one (shouldn't happen, just being safe). */
274 * If we have decided that we just CAN'T continue, and the user
275 * has not set tolerant to an insane level, give up and die.
277 if (no_way_out
&& tolerant
< 3)
278 mce_panic("Machine check", &panicm
, mcestart
);
281 * If the error seems to be unrecoverable, something should be
282 * done. Try to kill as little as possible. If we can kill just
283 * one task, do that. If the user has set the tolerance very
284 * high, don't try to do anything at all.
286 if (kill_it
&& tolerant
< 3) {
290 * If the EIPV bit is set, it means the saved IP is the
291 * instruction which caused the MCE.
293 if (m
.mcgstatus
& MCG_STATUS_EIPV
)
294 user_space
= panicm
.ip
&& (panicm
.cs
& 3);
297 * If we know that the error was in user space, send a
298 * SIGBUS. Otherwise, panic if tolerance is low.
300 * force_sig() takes an awful lot of locks and has a slight
301 * risk of deadlocking.
304 force_sig(SIGBUS
, current
);
305 } else if (panic_on_oops
|| tolerant
< 2) {
306 mce_panic("Uncorrected machine check",
311 /* notify userspace ASAP */
312 set_thread_flag(TIF_MCE_NOTIFY
);
315 /* the last thing we do is clear state */
316 for (i
= 0; i
< banks
; i
++)
317 wrmsrl(MSR_IA32_MC0_STATUS
+4*i
, 0);
318 wrmsrl(MSR_IA32_MCG_STATUS
, 0);
320 atomic_dec(&mce_entry
);
323 #ifdef CONFIG_X86_MCE_INTEL
325 * mce_log_therm_throt_event - Logs the thermal throttling event to mcelog
326 * @cpu: The CPU on which the event occurred.
327 * @status: Event status information
329 * This function should be called by the thermal interrupt after the
330 * event has been processed and the decision was made to log the event
333 * The status parameter will be saved to the 'status' field of 'struct mce'
334 * and historically has been the register value of the
335 * MSR_IA32_THERMAL_STATUS (Intel) msr.
337 void mce_log_therm_throt_event(unsigned int cpu
, __u64 status
)
341 memset(&m
, 0, sizeof(m
));
343 m
.bank
= MCE_THERMAL_BANK
;
348 #endif /* CONFIG_X86_MCE_INTEL */
351 * Periodic polling timer for "silent" machine check errors. If the
352 * poller finds an MCE, poll 2x faster. When the poller finds no more
353 * errors, poll 2x slower (up to check_interval seconds).
356 static int check_interval
= 5 * 60; /* 5 minutes */
357 static int next_interval
; /* in jiffies */
358 static void mcheck_timer(unsigned long);
359 static DEFINE_PER_CPU(struct timer_list
, mce_timer
);
361 static void mcheck_timer(unsigned long data
)
363 struct timer_list
*t
= &per_cpu(mce_timer
, data
);
365 WARN_ON(smp_processor_id() != data
);
367 if (mce_available(¤t_cpu_data
))
368 do_machine_check(NULL
, 0);
371 * Alert userspace if needed. If we logged an MCE, reduce the
372 * polling interval, otherwise increase the polling interval.
374 if (mce_notify_user()) {
375 next_interval
= max(next_interval
/2, HZ
/100);
377 next_interval
= min(next_interval
* 2,
378 (int)round_jiffies_relative(check_interval
*HZ
));
381 t
->expires
= jiffies
+ next_interval
;
385 static void mce_do_trigger(struct work_struct
*work
)
387 call_usermodehelper(trigger
, trigger_argv
, NULL
, UMH_NO_WAIT
);
390 static DECLARE_WORK(mce_trigger_work
, mce_do_trigger
);
393 * Notify the user(s) about new machine check events.
394 * Can be called from interrupt context, but not from machine check/NMI
397 int mce_notify_user(void)
399 clear_thread_flag(TIF_MCE_NOTIFY
);
400 if (test_and_clear_bit(0, ¬ify_user
)) {
401 static unsigned long last_print
;
402 unsigned long now
= jiffies
;
404 wake_up_interruptible(&mce_wait
);
407 * There is no risk of missing notifications because
408 * work_pending is always cleared before the function is
411 if (trigger
[0] && !work_pending(&mce_trigger_work
))
412 schedule_work(&mce_trigger_work
);
414 if (time_after_eq(now
, last_print
+ (check_interval
*HZ
))) {
416 printk(KERN_INFO
"Machine check events logged\n");
424 /* see if the idle task needs to notify userspace */
426 mce_idle_callback(struct notifier_block
*nfb
, unsigned long action
, void *junk
)
428 /* IDLE_END should be safe - interrupts are back on */
429 if (action
== IDLE_END
&& test_thread_flag(TIF_MCE_NOTIFY
))
435 static struct notifier_block mce_idle_notifier
= {
436 .notifier_call
= mce_idle_callback
,
439 static __init
int periodic_mcheck_init(void)
441 idle_notifier_register(&mce_idle_notifier
);
444 __initcall(periodic_mcheck_init
);
447 * Initialize Machine Checks for a CPU.
449 static void mce_init(void *dummy
)
454 rdmsrl(MSR_IA32_MCG_CAP
, cap
);
456 if (banks
> MCE_EXTENDED_BANK
) {
457 banks
= MCE_EXTENDED_BANK
;
458 printk(KERN_INFO
"MCE: warning: using only %d banks\n",
461 /* Use accurate RIP reporting if available. */
462 if ((cap
& (1<<9)) && ((cap
>> 16) & 0xff) >= 9)
463 rip_msr
= MSR_IA32_MCG_EIP
;
465 /* Log the machine checks left over from the previous reset.
466 This also clears all registers */
467 do_machine_check(NULL
, mce_bootlog
? -1 : -2);
469 set_in_cr4(X86_CR4_MCE
);
472 wrmsr(MSR_IA32_MCG_CTL
, 0xffffffff, 0xffffffff);
474 for (i
= 0; i
< banks
; i
++) {
475 if (i
< NR_SYSFS_BANKS
)
476 wrmsrl(MSR_IA32_MC0_CTL
+4*i
, bank
[i
]);
478 wrmsrl(MSR_IA32_MC0_CTL
+4*i
, ~0UL);
480 wrmsrl(MSR_IA32_MC0_STATUS
+4*i
, 0);
484 /* Add per CPU specific workarounds here */
485 static void __cpuinit
mce_cpu_quirks(struct cpuinfo_x86
*c
)
487 /* This should be disabled by the BIOS, but isn't always */
488 if (c
->x86_vendor
== X86_VENDOR_AMD
) {
490 /* disable GART TBL walk error reporting, which trips off
491 incorrectly with the IOMMU & 3ware & Cerberus. */
492 clear_bit(10, &bank
[4]);
493 if(c
->x86
<= 17 && mce_bootlog
< 0)
494 /* Lots of broken BIOS around that don't clear them
495 by default and leave crap in there. Don't log. */
501 static void __cpuinit
mce_cpu_features(struct cpuinfo_x86
*c
)
503 switch (c
->x86_vendor
) {
504 case X86_VENDOR_INTEL
:
505 mce_intel_feature_init(c
);
508 mce_amd_feature_init(c
);
515 static void mce_init_timer(void)
517 struct timer_list
*t
= &__get_cpu_var(mce_timer
);
519 /* data race harmless because everyone sets to the same value */
521 next_interval
= check_interval
* HZ
;
524 setup_timer(t
, mcheck_timer
, smp_processor_id());
525 t
->expires
= round_jiffies_relative(jiffies
+ next_interval
);
530 * Called for each booted CPU to set up machine checks.
531 * Must be called with preempt off.
533 void __cpuinit
mcheck_init(struct cpuinfo_x86
*c
)
537 if (!mce_available(c
))
546 * Character device to read and clear the MCE log.
549 static DEFINE_SPINLOCK(mce_state_lock
);
550 static int open_count
; /* #times opened */
551 static int open_exclu
; /* already open exclusive? */
553 static int mce_open(struct inode
*inode
, struct file
*file
)
556 spin_lock(&mce_state_lock
);
558 if (open_exclu
|| (open_count
&& (file
->f_flags
& O_EXCL
))) {
559 spin_unlock(&mce_state_lock
);
564 if (file
->f_flags
& O_EXCL
)
568 spin_unlock(&mce_state_lock
);
571 return nonseekable_open(inode
, file
);
574 static int mce_release(struct inode
*inode
, struct file
*file
)
576 spin_lock(&mce_state_lock
);
581 spin_unlock(&mce_state_lock
);
586 static void collect_tscs(void *data
)
588 unsigned long *cpu_tsc
= (unsigned long *)data
;
590 rdtscll(cpu_tsc
[smp_processor_id()]);
593 static ssize_t
mce_read(struct file
*filp
, char __user
*ubuf
, size_t usize
,
596 unsigned long *cpu_tsc
;
597 static DEFINE_MUTEX(mce_read_mutex
);
599 char __user
*buf
= ubuf
;
602 cpu_tsc
= kmalloc(nr_cpu_ids
* sizeof(long), GFP_KERNEL
);
606 mutex_lock(&mce_read_mutex
);
607 next
= rcu_dereference(mcelog
.next
);
609 /* Only supports full reads right now */
610 if (*off
!= 0 || usize
< MCE_LOG_LEN
*sizeof(struct mce
)) {
611 mutex_unlock(&mce_read_mutex
);
619 for (i
= prev
; i
< next
; i
++) {
620 unsigned long start
= jiffies
;
622 while (!mcelog
.entry
[i
].finished
) {
623 if (time_after_eq(jiffies
, start
+ 2)) {
624 memset(mcelog
.entry
+ i
, 0,
631 err
|= copy_to_user(buf
, mcelog
.entry
+ i
,
633 buf
+= sizeof(struct mce
);
638 memset(mcelog
.entry
+ prev
, 0,
639 (next
- prev
) * sizeof(struct mce
));
641 next
= cmpxchg(&mcelog
.next
, prev
, 0);
642 } while (next
!= prev
);
647 * Collect entries that were still getting written before the
650 on_each_cpu(collect_tscs
, cpu_tsc
, 1);
651 for (i
= next
; i
< MCE_LOG_LEN
; i
++) {
652 if (mcelog
.entry
[i
].finished
&&
653 mcelog
.entry
[i
].tsc
< cpu_tsc
[mcelog
.entry
[i
].cpu
]) {
654 err
|= copy_to_user(buf
, mcelog
.entry
+i
,
657 buf
+= sizeof(struct mce
);
658 memset(&mcelog
.entry
[i
], 0, sizeof(struct mce
));
661 mutex_unlock(&mce_read_mutex
);
663 return err
? -EFAULT
: buf
- ubuf
;
666 static unsigned int mce_poll(struct file
*file
, poll_table
*wait
)
668 poll_wait(file
, &mce_wait
, wait
);
669 if (rcu_dereference(mcelog
.next
))
670 return POLLIN
| POLLRDNORM
;
674 static long mce_ioctl(struct file
*f
, unsigned int cmd
, unsigned long arg
)
676 int __user
*p
= (int __user
*)arg
;
678 if (!capable(CAP_SYS_ADMIN
))
681 case MCE_GET_RECORD_LEN
:
682 return put_user(sizeof(struct mce
), p
);
683 case MCE_GET_LOG_LEN
:
684 return put_user(MCE_LOG_LEN
, p
);
685 case MCE_GETCLEAR_FLAGS
: {
689 flags
= mcelog
.flags
;
690 } while (cmpxchg(&mcelog
.flags
, flags
, 0) != flags
);
691 return put_user(flags
, p
);
698 static const struct file_operations mce_chrdev_ops
= {
700 .release
= mce_release
,
703 .unlocked_ioctl
= mce_ioctl
,
706 static struct miscdevice mce_log_device
= {
713 * Old style boot options parsing. Only for compatibility.
715 static int __init
mcheck_disable(char *str
)
721 /* mce=off disables machine check.
722 mce=TOLERANCELEVEL (number, see above)
723 mce=bootlog Log MCEs from before booting. Disabled by default on AMD.
724 mce=nobootlog Don't log MCEs from before booting. */
725 static int __init
mcheck_enable(char *str
)
727 if (!strcmp(str
, "off"))
729 else if (!strcmp(str
, "bootlog") || !strcmp(str
,"nobootlog"))
730 mce_bootlog
= str
[0] == 'b';
731 else if (isdigit(str
[0]))
732 get_option(&str
, &tolerant
);
734 printk("mce= argument %s ignored. Please use /sys", str
);
738 __setup("nomce", mcheck_disable
);
739 __setup("mce=", mcheck_enable
);
746 * Disable machine checks on suspend and shutdown. We can't really handle
749 static int mce_disable(void)
753 for (i
= 0; i
< banks
; i
++)
754 wrmsrl(MSR_IA32_MC0_CTL
+ i
*4, 0);
758 static int mce_suspend(struct sys_device
*dev
, pm_message_t state
)
760 return mce_disable();
763 static int mce_shutdown(struct sys_device
*dev
)
765 return mce_disable();
768 /* On resume clear all MCE state. Don't want to see leftovers from the BIOS.
769 Only one CPU is active at this time, the others get readded later using
771 static int mce_resume(struct sys_device
*dev
)
774 mce_cpu_features(¤t_cpu_data
);
778 static void mce_cpu_restart(void *data
)
780 del_timer_sync(&__get_cpu_var(mce_timer
));
781 if (mce_available(¤t_cpu_data
))
786 /* Reinit MCEs after user configuration changes */
787 static void mce_restart(void)
789 next_interval
= check_interval
* HZ
;
790 on_each_cpu(mce_cpu_restart
, NULL
, 1);
793 static struct sysdev_class mce_sysclass
= {
794 .suspend
= mce_suspend
,
795 .shutdown
= mce_shutdown
,
796 .resume
= mce_resume
,
797 .name
= "machinecheck",
800 DEFINE_PER_CPU(struct sys_device
, device_mce
);
801 void (*threshold_cpu_callback
)(unsigned long action
, unsigned int cpu
) __cpuinitdata
;
803 /* Why are there no generic functions for this? */
804 #define ACCESSOR(name, var, start) \
805 static ssize_t show_ ## name(struct sys_device *s, \
806 struct sysdev_attribute *attr, \
808 return sprintf(buf, "%lx\n", (unsigned long)var); \
810 static ssize_t set_ ## name(struct sys_device *s, \
811 struct sysdev_attribute *attr, \
812 const char *buf, size_t siz) { \
814 unsigned long new = simple_strtoul(buf, &end, 0); \
815 if (end == buf) return -EINVAL; \
820 static SYSDEV_ATTR(name, 0644, show_ ## name, set_ ## name);
823 * TBD should generate these dynamically based on number of available banks.
824 * Have only 6 contol banks in /sysfs until then.
826 ACCESSOR(bank0ctl
,bank
[0],mce_restart())
827 ACCESSOR(bank1ctl
,bank
[1],mce_restart())
828 ACCESSOR(bank2ctl
,bank
[2],mce_restart())
829 ACCESSOR(bank3ctl
,bank
[3],mce_restart())
830 ACCESSOR(bank4ctl
,bank
[4],mce_restart())
831 ACCESSOR(bank5ctl
,bank
[5],mce_restart())
833 static ssize_t
show_trigger(struct sys_device
*s
, struct sysdev_attribute
*attr
,
836 strcpy(buf
, trigger
);
838 return strlen(trigger
) + 1;
841 static ssize_t
set_trigger(struct sys_device
*s
, struct sysdev_attribute
*attr
,
842 const char *buf
,size_t siz
)
846 strncpy(trigger
, buf
, sizeof(trigger
));
847 trigger
[sizeof(trigger
)-1] = 0;
848 len
= strlen(trigger
);
849 p
= strchr(trigger
, '\n');
854 static SYSDEV_ATTR(trigger
, 0644, show_trigger
, set_trigger
);
855 static SYSDEV_INT_ATTR(tolerant
, 0644, tolerant
);
856 ACCESSOR(check_interval
,check_interval
,mce_restart())
857 static struct sysdev_attribute
*mce_attributes
[] = {
858 &attr_bank0ctl
, &attr_bank1ctl
, &attr_bank2ctl
,
859 &attr_bank3ctl
, &attr_bank4ctl
, &attr_bank5ctl
,
860 &attr_tolerant
.attr
, &attr_check_interval
, &attr_trigger
,
864 static cpumask_t mce_device_initialized
= CPU_MASK_NONE
;
866 /* Per cpu sysdev init. All of the cpus still share the same ctl bank */
867 static __cpuinit
int mce_create_device(unsigned int cpu
)
872 if (!mce_available(&boot_cpu_data
))
875 memset(&per_cpu(device_mce
, cpu
).kobj
, 0, sizeof(struct kobject
));
876 per_cpu(device_mce
,cpu
).id
= cpu
;
877 per_cpu(device_mce
,cpu
).cls
= &mce_sysclass
;
879 err
= sysdev_register(&per_cpu(device_mce
,cpu
));
883 for (i
= 0; mce_attributes
[i
]; i
++) {
884 err
= sysdev_create_file(&per_cpu(device_mce
,cpu
),
889 cpu_set(cpu
, mce_device_initialized
);
894 sysdev_remove_file(&per_cpu(device_mce
,cpu
),
897 sysdev_unregister(&per_cpu(device_mce
,cpu
));
902 static __cpuinit
void mce_remove_device(unsigned int cpu
)
906 if (!cpu_isset(cpu
, mce_device_initialized
))
909 for (i
= 0; mce_attributes
[i
]; i
++)
910 sysdev_remove_file(&per_cpu(device_mce
,cpu
),
912 sysdev_unregister(&per_cpu(device_mce
,cpu
));
913 cpu_clear(cpu
, mce_device_initialized
);
916 /* Make sure there are no machine checks on offlined CPUs. */
917 static void __cpuexit
mce_disable_cpu(void *h
)
921 if (!mce_available(¤t_cpu_data
))
923 for (i
= 0; i
< banks
; i
++)
924 wrmsrl(MSR_IA32_MC0_CTL
+ i
*4, 0);
927 static void __cpuexit
mce_reenable_cpu(void *h
)
931 if (!mce_available(¤t_cpu_data
))
933 for (i
= 0; i
< banks
; i
++)
934 wrmsrl(MSR_IA32_MC0_CTL
+ i
*4, bank
[i
]);
937 /* Get notified when a cpu comes on/off. Be hotplug friendly. */
938 static int __cpuinit
mce_cpu_callback(struct notifier_block
*nfb
,
939 unsigned long action
, void *hcpu
)
941 unsigned int cpu
= (unsigned long)hcpu
;
942 struct timer_list
*t
= &per_cpu(mce_timer
, cpu
);
946 case CPU_ONLINE_FROZEN
:
947 mce_create_device(cpu
);
948 if (threshold_cpu_callback
)
949 threshold_cpu_callback(action
, cpu
);
952 case CPU_DEAD_FROZEN
:
953 if (threshold_cpu_callback
)
954 threshold_cpu_callback(action
, cpu
);
955 mce_remove_device(cpu
);
957 case CPU_DOWN_PREPARE
:
958 case CPU_DOWN_PREPARE_FROZEN
:
960 smp_call_function_single(cpu
, mce_disable_cpu
, NULL
, 1);
962 case CPU_DOWN_FAILED
:
963 case CPU_DOWN_FAILED_FROZEN
:
964 t
->expires
= round_jiffies_relative(jiffies
+ next_interval
);
965 add_timer_on(t
, cpu
);
966 smp_call_function_single(cpu
, mce_reenable_cpu
, NULL
, 1);
972 static struct notifier_block mce_cpu_notifier __cpuinitdata
= {
973 .notifier_call
= mce_cpu_callback
,
976 static __init
int mce_init_device(void)
981 if (!mce_available(&boot_cpu_data
))
983 err
= sysdev_class_register(&mce_sysclass
);
987 for_each_online_cpu(i
) {
988 err
= mce_create_device(i
);
993 register_hotcpu_notifier(&mce_cpu_notifier
);
994 misc_register(&mce_log_device
);
998 device_initcall(mce_init_device
);