2 * SuperTrak EX Series Storage Controller driver for Linux
4 * Copyright (C) 2005, 2006 Promise Technology Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 * Ed Lin <promise_linux@promise.com>
18 #include <linux/init.h>
19 #include <linux/errno.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/sched.h>
23 #include <linux/time.h>
24 #include <linux/pci.h>
25 #include <linux/blkdev.h>
26 #include <linux/interrupt.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/spinlock.h>
32 #include <asm/byteorder.h>
33 #include <scsi/scsi.h>
34 #include <scsi/scsi_device.h>
35 #include <scsi/scsi_cmnd.h>
36 #include <scsi/scsi_host.h>
37 #include <scsi/scsi_tcq.h>
39 #define DRV_NAME "stex"
40 #define ST_DRIVER_VERSION "3.0.0.1"
41 #define ST_VER_MAJOR 3
42 #define ST_VER_MINOR 0
44 #define ST_BUILD_VER 1
47 /* MU register offset */
48 IMR0
= 0x10, /* MU_INBOUND_MESSAGE_REG0 */
49 IMR1
= 0x14, /* MU_INBOUND_MESSAGE_REG1 */
50 OMR0
= 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
51 OMR1
= 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
52 IDBL
= 0x20, /* MU_INBOUND_DOORBELL */
53 IIS
= 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
54 IIM
= 0x28, /* MU_INBOUND_INTERRUPT_MASK */
55 ODBL
= 0x2c, /* MU_OUTBOUND_DOORBELL */
56 OIS
= 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
57 OIM
= 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
59 /* MU register value */
60 MU_INBOUND_DOORBELL_HANDSHAKE
= 1,
61 MU_INBOUND_DOORBELL_REQHEADCHANGED
= 2,
62 MU_INBOUND_DOORBELL_STATUSTAILCHANGED
= 4,
63 MU_INBOUND_DOORBELL_HMUSTOPPED
= 8,
64 MU_INBOUND_DOORBELL_RESET
= 16,
66 MU_OUTBOUND_DOORBELL_HANDSHAKE
= 1,
67 MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED
= 2,
68 MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED
= 4,
69 MU_OUTBOUND_DOORBELL_BUSCHANGE
= 8,
70 MU_OUTBOUND_DOORBELL_HASEVENT
= 16,
73 MU_STATE_STARTING
= 1,
74 MU_STATE_FMU_READY_FOR_HANDSHAKE
= 2,
75 MU_STATE_SEND_HANDSHAKE_FRAME
= 3,
77 MU_STATE_RESETTING
= 5,
79 MU_MAX_DELAY_TIME
= 240000,
80 MU_HANDSHAKE_SIGNATURE
= 0x55aaaa55,
81 MU_HANDSHAKE_SIGNATURE_HALF
= 0x5a5a0000,
84 /* firmware returned values */
85 SRB_STATUS_SUCCESS
= 0x01,
86 SRB_STATUS_ERROR
= 0x04,
87 SRB_STATUS_BUSY
= 0x05,
88 SRB_STATUS_INVALID_REQUEST
= 0x06,
89 SRB_STATUS_SELECTION_TIMEOUT
= 0x0A,
93 TASK_ATTRIBUTE_SIMPLE
= 0x0,
94 TASK_ATTRIBUTE_HEADOFQUEUE
= 0x1,
95 TASK_ATTRIBUTE_ORDERED
= 0x2,
96 TASK_ATTRIBUTE_ACA
= 0x4,
98 /* request count, etc. */
101 /* one message wasted, use MU_MAX_REQUEST+1
102 to handle MU_MAX_REQUEST messages */
103 MU_REQ_COUNT
= (MU_MAX_REQUEST
+ 1),
104 MU_STATUS_COUNT
= (MU_MAX_REQUEST
+ 1),
106 STEX_CDB_LENGTH
= MAX_COMMAND_SIZE
,
107 REQ_VARIABLE_LEN
= 1024,
108 STATUS_VAR_LEN
= 128,
109 ST_CAN_QUEUE
= MU_MAX_REQUEST
,
110 ST_CMD_PER_LUN
= MU_MAX_REQUEST
,
114 SG_CF_EOT
= 0x80, /* end of table */
115 SG_CF_64B
= 0x40, /* 64 bit item */
116 SG_CF_HOST
= 0x20, /* sg in host memory */
118 ST_MAX_ARRAY_SUPPORTED
= 16,
119 ST_MAX_TARGET_NUM
= (ST_MAX_ARRAY_SUPPORTED
+1),
120 ST_MAX_LUN_PER_TARGET
= 16,
126 PASSTHRU_REQ_TYPE
= 0x00000001,
127 PASSTHRU_REQ_NO_WAKEUP
= 0x00000100,
128 ST_INTERNAL_TIMEOUT
= 30,
133 /* vendor specific commands of Promise */
135 SINBAND_MGT_CMD
= 0xd9,
137 CONTROLLER_CMD
= 0xe1,
138 DEBUGGING_CMD
= 0xe2,
141 PASSTHRU_GET_ADAPTER
= 0x05,
142 PASSTHRU_GET_DRVVER
= 0x10,
144 CTLR_CONFIG_CMD
= 0x03,
145 CTLR_SHUTDOWN
= 0x0d,
147 CTLR_POWER_STATE_CHANGE
= 0x0e,
148 CTLR_POWER_SAVING
= 0x01,
150 PASSTHRU_SIGNATURE
= 0x4e415041,
151 MGT_CMD_SIGNATURE
= 0xba,
156 /* SCSI inquiry data */
157 typedef struct st_inq
{
159 u8 DeviceTypeQualifier
:3;
160 u8 DeviceTypeModifier
:7;
161 u8 RemovableMedia
:1;
163 u8 ResponseDataFormat
:4;
173 u8 LinkedCommands
:1;
177 u8 RelativeAddressing
:1;
180 u8 ProductRevisionLevel
[4];
181 u8 VendorSpecific
[20];
186 u8 ctrl
; /* SG_CF_xxx */
197 struct st_sgitem table
[ST_MAX_SG
];
200 struct handshake_frame
{
201 __le32 rb_phy
; /* request payload queue physical address */
203 __le16 req_sz
; /* size of each request payload */
204 __le16 req_cnt
; /* count of reqs the buffer can hold */
205 __le16 status_sz
; /* size of each status payload */
206 __le16 status_cnt
; /* count of status the buffer can hold */
207 __le32 hosttime
; /* seconds from Jan 1, 1970 (GMT) */
209 u8 partner_type
; /* who sends this frame */
211 __le32 partner_ver_major
;
212 __le32 partner_ver_minor
;
213 __le32 partner_ver_oem
;
214 __le32 partner_ver_build
;
225 u8 payload_sz
; /* payload size in 4-byte, not used */
226 u8 cdb
[STEX_CDB_LENGTH
];
227 u8 variable
[REQ_VARIABLE_LEN
];
237 u8 payload_sz
; /* payload size in 4-byte */
238 u8 variable
[STATUS_VAR_LEN
];
253 struct ver_info drv_ver
;
254 struct ver_info bios_ver
;
283 #define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
284 #define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
285 #define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
286 #define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ))
287 #define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
291 struct scsi_cmnd
*cmd
;
294 unsigned int sense_bufflen
;
303 void __iomem
*mmio_base
; /* iomapped PCI memory space */
305 dma_addr_t dma_handle
;
307 struct Scsi_Host
*host
;
308 struct pci_dev
*pdev
;
315 struct status_msg
*status_buffer
;
316 void *copy_buffer
; /* temp buffer for driver-handled commands */
317 struct st_ccb ccb
[MU_MAX_REQUEST
];
318 struct st_ccb
*wait_ccb
;
319 wait_queue_head_t waitq
;
321 unsigned int mu_status
;
324 unsigned int cardtype
;
327 static const char console_inq_page
[] =
329 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
330 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */
331 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */
332 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */
333 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */
334 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */
335 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */
336 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
339 MODULE_AUTHOR("Ed Lin");
340 MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
341 MODULE_LICENSE("GPL");
342 MODULE_VERSION(ST_DRIVER_VERSION
);
344 static void stex_gettime(__le32
*time
)
347 do_gettimeofday(&tv
);
349 *time
= cpu_to_le32(tv
.tv_sec
& 0xffffffff);
350 *(time
+ 1) = cpu_to_le32((tv
.tv_sec
>> 16) >> 16);
353 static struct status_msg
*stex_get_status(struct st_hba
*hba
)
355 struct status_msg
*status
=
356 hba
->status_buffer
+ hba
->status_tail
;
359 hba
->status_tail
%= MU_STATUS_COUNT
;
364 static void stex_set_sense(struct scsi_cmnd
*cmd
, u8 sk
, u8 asc
, u8 ascq
)
366 cmd
->result
= (DRIVER_SENSE
<< 24) | SAM_STAT_CHECK_CONDITION
;
368 cmd
->sense_buffer
[0] = 0x70; /* fixed format, current */
369 cmd
->sense_buffer
[2] = sk
;
370 cmd
->sense_buffer
[7] = 18 - 8; /* additional sense length */
371 cmd
->sense_buffer
[12] = asc
;
372 cmd
->sense_buffer
[13] = ascq
;
375 static void stex_invalid_field(struct scsi_cmnd
*cmd
,
376 void (*done
)(struct scsi_cmnd
*))
378 /* "Invalid field in cbd" */
379 stex_set_sense(cmd
, ILLEGAL_REQUEST
, 0x24, 0x0);
383 static struct req_msg
*stex_alloc_req(struct st_hba
*hba
)
385 struct req_msg
*req
= ((struct req_msg
*)hba
->dma_mem
) +
389 hba
->req_head
%= MU_REQ_COUNT
;
394 static int stex_map_sg(struct st_hba
*hba
,
395 struct req_msg
*req
, struct st_ccb
*ccb
)
397 struct pci_dev
*pdev
= hba
->pdev
;
398 struct scsi_cmnd
*cmd
;
399 dma_addr_t dma_handle
;
400 struct scatterlist
*src
;
401 struct st_sgtable
*dst
;
405 dst
= (struct st_sgtable
*)req
->variable
;
406 dst
->max_sg_count
= cpu_to_le16(ST_MAX_SG
);
407 dst
->sz_in_byte
= cpu_to_le32(cmd
->request_bufflen
);
412 src
= (struct scatterlist
*) cmd
->request_buffer
;
413 n_elem
= pci_map_sg(pdev
, src
,
414 cmd
->use_sg
, cmd
->sc_data_direction
);
418 ccb
->sg_count
= n_elem
;
419 dst
->sg_count
= cpu_to_le16((u16
)n_elem
);
421 for (i
= 0; i
< n_elem
; i
++, src
++) {
422 dst
->table
[i
].count
= cpu_to_le32((u32
)sg_dma_len(src
));
424 cpu_to_le32(sg_dma_address(src
) & 0xffffffff);
425 dst
->table
[i
].addr_hi
=
426 cpu_to_le32((sg_dma_address(src
) >> 16) >> 16);
427 dst
->table
[i
].ctrl
= SG_CF_64B
| SG_CF_HOST
;
429 dst
->table
[--i
].ctrl
|= SG_CF_EOT
;
433 dma_handle
= pci_map_single(pdev
, cmd
->request_buffer
,
434 cmd
->request_bufflen
, cmd
->sc_data_direction
);
435 cmd
->SCp
.dma_handle
= dma_handle
;
438 dst
->sg_count
= cpu_to_le16(1);
439 dst
->table
[0].addr
= cpu_to_le32(dma_handle
& 0xffffffff);
440 dst
->table
[0].addr_hi
= cpu_to_le32((dma_handle
>> 16) >> 16);
441 dst
->table
[0].count
= cpu_to_le32((u32
)cmd
->request_bufflen
);
442 dst
->table
[0].ctrl
= SG_CF_EOT
| SG_CF_64B
| SG_CF_HOST
;
447 static void stex_internal_copy(struct scsi_cmnd
*cmd
,
448 const void *src
, size_t *count
, int sg_count
, int direction
)
452 void *s
, *d
, *base
= NULL
;
453 if (*count
> cmd
->request_bufflen
)
454 *count
= cmd
->request_bufflen
;
460 size_t offset
= *count
- lcount
;
462 base
= scsi_kmap_atomic_sg(cmd
->request_buffer
,
463 sg_count
, &offset
, &len
);
470 d
= cmd
->request_buffer
;
472 if (direction
== ST_TO_CMD
)
479 scsi_kunmap_atomic_sg(base
);
483 static int stex_direct_copy(struct scsi_cmnd
*cmd
,
484 const void *src
, size_t count
)
486 struct st_hba
*hba
= (struct st_hba
*) &cmd
->device
->host
->hostdata
[0];
487 size_t cp_len
= count
;
491 n_elem
= pci_map_sg(hba
->pdev
, cmd
->request_buffer
,
492 cmd
->use_sg
, cmd
->sc_data_direction
);
497 stex_internal_copy(cmd
, src
, &cp_len
, n_elem
, ST_TO_CMD
);
500 pci_unmap_sg(hba
->pdev
, cmd
->request_buffer
,
501 cmd
->use_sg
, cmd
->sc_data_direction
);
502 return cp_len
== count
;
505 static void stex_controller_info(struct st_hba
*hba
, struct st_ccb
*ccb
)
508 size_t count
= sizeof(struct st_frame
);
510 p
= hba
->copy_buffer
;
511 stex_internal_copy(ccb
->cmd
, p
, &count
, ccb
->sg_count
, ST_FROM_CMD
);
512 memset(p
->base
, 0, sizeof(u32
)*6);
513 *(unsigned long *)(p
->base
) = pci_resource_start(hba
->pdev
, 0);
516 p
->drv_ver
.major
= ST_VER_MAJOR
;
517 p
->drv_ver
.minor
= ST_VER_MINOR
;
518 p
->drv_ver
.oem
= ST_OEM
;
519 p
->drv_ver
.build
= ST_BUILD_VER
;
521 p
->bus
= hba
->pdev
->bus
->number
;
522 p
->slot
= hba
->pdev
->devfn
;
524 p
->irq_vec
= hba
->pdev
->irq
;
525 p
->id
= hba
->pdev
->vendor
<< 16 | hba
->pdev
->device
;
527 hba
->pdev
->subsystem_vendor
<< 16 | hba
->pdev
->subsystem_device
;
529 stex_internal_copy(ccb
->cmd
, p
, &count
, ccb
->sg_count
, ST_TO_CMD
);
533 stex_send_cmd(struct st_hba
*hba
, struct req_msg
*req
, u16 tag
)
535 req
->tag
= cpu_to_le16(tag
);
536 req
->task_attr
= TASK_ATTRIBUTE_SIMPLE
;
537 req
->task_manage
= 0; /* not supported yet */
539 hba
->ccb
[tag
].req
= req
;
542 writel(hba
->req_head
, hba
->mmio_base
+ IMR0
);
543 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED
, hba
->mmio_base
+ IDBL
);
544 readl(hba
->mmio_base
+ IDBL
); /* flush */
548 stex_slave_alloc(struct scsi_device
*sdev
)
550 /* Cheat: usually extracted from Inquiry data */
551 sdev
->tagged_supported
= 1;
553 scsi_activate_tcq(sdev
, sdev
->host
->can_queue
);
559 stex_slave_config(struct scsi_device
*sdev
)
561 sdev
->use_10_for_rw
= 1;
562 sdev
->use_10_for_ms
= 1;
563 sdev
->timeout
= 60 * HZ
;
564 sdev
->tagged_supported
= 1;
570 stex_slave_destroy(struct scsi_device
*sdev
)
572 scsi_deactivate_tcq(sdev
, 1);
576 stex_queuecommand(struct scsi_cmnd
*cmd
, void (* done
)(struct scsi_cmnd
*))
579 struct Scsi_Host
*host
;
583 host
= cmd
->device
->host
;
584 id
= cmd
->device
->id
;
585 lun
= cmd
->device
->channel
; /* firmware lun issue work around */
586 hba
= (struct st_hba
*) &host
->hostdata
[0];
588 switch (cmd
->cmnd
[0]) {
591 static char ms10_caching_page
[12] =
592 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
594 page
= cmd
->cmnd
[2] & 0x3f;
595 if (page
== 0x8 || page
== 0x3f) {
596 stex_direct_copy(cmd
, ms10_caching_page
,
597 sizeof(ms10_caching_page
));
598 cmd
->result
= DID_OK
<< 16 | COMMAND_COMPLETE
<< 8;
601 stex_invalid_field(cmd
, done
);
605 if (id
!= ST_MAX_ARRAY_SUPPORTED
)
607 if (lun
== 0 && (cmd
->cmnd
[1] & INQUIRY_EVPD
) == 0) {
608 stex_direct_copy(cmd
, console_inq_page
,
609 sizeof(console_inq_page
));
610 cmd
->result
= DID_OK
<< 16 | COMMAND_COMPLETE
<< 8;
613 stex_invalid_field(cmd
, done
);
616 if (cmd
->cmnd
[1] == PASSTHRU_GET_DRVVER
) {
617 struct st_drvver ver
;
618 ver
.major
= ST_VER_MAJOR
;
619 ver
.minor
= ST_VER_MINOR
;
621 ver
.build
= ST_BUILD_VER
;
622 ver
.signature
[0] = PASSTHRU_SIGNATURE
;
623 ver
.console_id
= ST_MAX_ARRAY_SUPPORTED
;
624 ver
.host_no
= hba
->host
->host_no
;
625 cmd
->result
= stex_direct_copy(cmd
, &ver
, sizeof(ver
)) ?
626 DID_OK
<< 16 | COMMAND_COMPLETE
<< 8 :
627 DID_ERROR
<< 16 | COMMAND_COMPLETE
<< 8;
635 cmd
->scsi_done
= done
;
637 tag
= cmd
->request
->tag
;
639 if (unlikely(tag
>= host
->can_queue
))
640 return SCSI_MLQUEUE_HOST_BUSY
;
642 req
= stex_alloc_req(hba
);
644 if (hba
->cardtype
== st_yosemite
) {
645 req
->lun
= lun
* (ST_MAX_TARGET_NUM
- 1) + id
;
653 memcpy(req
->cdb
, cmd
->cmnd
, STEX_CDB_LENGTH
);
655 hba
->ccb
[tag
].cmd
= cmd
;
656 hba
->ccb
[tag
].sense_bufflen
= SCSI_SENSE_BUFFERSIZE
;
657 hba
->ccb
[tag
].sense_buffer
= cmd
->sense_buffer
;
658 hba
->ccb
[tag
].req_type
= 0;
660 if (cmd
->sc_data_direction
!= DMA_NONE
)
661 stex_map_sg(hba
, req
, &hba
->ccb
[tag
]);
663 stex_send_cmd(hba
, req
, tag
);
667 static void stex_unmap_sg(struct st_hba
*hba
, struct scsi_cmnd
*cmd
)
669 if (cmd
->sc_data_direction
!= DMA_NONE
) {
671 pci_unmap_sg(hba
->pdev
, cmd
->request_buffer
,
672 cmd
->use_sg
, cmd
->sc_data_direction
);
674 pci_unmap_single(hba
->pdev
, cmd
->SCp
.dma_handle
,
675 cmd
->request_bufflen
, cmd
->sc_data_direction
);
679 static void stex_scsi_done(struct st_ccb
*ccb
)
681 struct scsi_cmnd
*cmd
= ccb
->cmd
;
684 if (ccb
->srb_status
== SRB_STATUS_SUCCESS
|| ccb
->srb_status
== 0) {
685 result
= ccb
->scsi_status
;
686 switch (ccb
->scsi_status
) {
688 result
|= DID_OK
<< 16 | COMMAND_COMPLETE
<< 8;
690 case SAM_STAT_CHECK_CONDITION
:
691 result
|= DRIVER_SENSE
<< 24;
694 result
|= DID_BUS_BUSY
<< 16 | COMMAND_COMPLETE
<< 8;
697 result
|= DID_ERROR
<< 16 | COMMAND_COMPLETE
<< 8;
701 else if (ccb
->srb_status
& SRB_SEE_SENSE
)
702 result
= DRIVER_SENSE
<< 24 | SAM_STAT_CHECK_CONDITION
;
703 else switch (ccb
->srb_status
) {
704 case SRB_STATUS_SELECTION_TIMEOUT
:
705 result
= DID_NO_CONNECT
<< 16 | COMMAND_COMPLETE
<< 8;
707 case SRB_STATUS_BUSY
:
708 result
= DID_BUS_BUSY
<< 16 | COMMAND_COMPLETE
<< 8;
710 case SRB_STATUS_INVALID_REQUEST
:
711 case SRB_STATUS_ERROR
:
713 result
= DID_ERROR
<< 16 | COMMAND_COMPLETE
<< 8;
717 cmd
->result
= result
;
721 static void stex_copy_data(struct st_ccb
*ccb
,
722 struct status_msg
*resp
, unsigned int variable
)
724 size_t count
= variable
;
725 if (resp
->scsi_status
!= SAM_STAT_GOOD
) {
726 if (ccb
->sense_buffer
!= NULL
)
727 memcpy(ccb
->sense_buffer
, resp
->variable
,
728 min(variable
, ccb
->sense_bufflen
));
732 if (ccb
->cmd
== NULL
)
734 stex_internal_copy(ccb
->cmd
,
735 resp
->variable
, &count
, ccb
->sg_count
, ST_TO_CMD
);
738 static void stex_ys_commands(struct st_hba
*hba
,
739 struct st_ccb
*ccb
, struct status_msg
*resp
)
743 if (ccb
->cmd
->cmnd
[0] == MGT_CMD
&&
744 resp
->scsi_status
!= SAM_STAT_CHECK_CONDITION
) {
745 ccb
->cmd
->request_bufflen
=
746 le32_to_cpu(*(__le32
*)&resp
->variable
[0]);
750 if (resp
->srb_status
!= 0)
753 /* determine inquiry command status by DeviceTypeQualifier */
754 if (ccb
->cmd
->cmnd
[0] == INQUIRY
&&
755 resp
->scsi_status
== SAM_STAT_GOOD
) {
758 count
= STEX_EXTRA_SIZE
;
759 stex_internal_copy(ccb
->cmd
, hba
->copy_buffer
,
760 &count
, ccb
->sg_count
, ST_FROM_CMD
);
761 inq_data
= (ST_INQ
*)hba
->copy_buffer
;
762 if (inq_data
->DeviceTypeQualifier
!= 0)
763 ccb
->srb_status
= SRB_STATUS_SELECTION_TIMEOUT
;
765 ccb
->srb_status
= SRB_STATUS_SUCCESS
;
766 } else if (ccb
->cmd
->cmnd
[0] == REPORT_LUNS
) {
767 u8
*report_lun_data
= (u8
*)hba
->copy_buffer
;
769 count
= STEX_EXTRA_SIZE
;
770 stex_internal_copy(ccb
->cmd
, report_lun_data
,
771 &count
, ccb
->sg_count
, ST_FROM_CMD
);
772 if (report_lun_data
[2] || report_lun_data
[3]) {
773 report_lun_data
[2] = 0x00;
774 report_lun_data
[3] = 0x08;
775 stex_internal_copy(ccb
->cmd
, report_lun_data
,
776 &count
, ccb
->sg_count
, ST_TO_CMD
);
781 static void stex_mu_intr(struct st_hba
*hba
, u32 doorbell
)
783 void __iomem
*base
= hba
->mmio_base
;
784 struct status_msg
*resp
;
789 if (!(doorbell
& MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED
))
792 /* status payloads */
793 hba
->status_head
= readl(base
+ OMR1
);
794 if (unlikely(hba
->status_head
>= MU_STATUS_COUNT
)) {
795 printk(KERN_WARNING DRV_NAME
"(%s): invalid status head\n",
796 pci_name(hba
->pdev
));
801 * it's not a valid status payload if:
802 * 1. there are no pending requests(e.g. during init stage)
803 * 2. there are some pending requests, but the controller is in
804 * reset status, and its type is not st_yosemite
805 * firmware of st_yosemite in reset status will return pending requests
806 * to driver, so we allow it to pass
808 if (unlikely(hba
->out_req_cnt
<= 0 ||
809 (hba
->mu_status
== MU_STATE_RESETTING
&&
810 hba
->cardtype
!= st_yosemite
))) {
811 hba
->status_tail
= hba
->status_head
;
815 while (hba
->status_tail
!= hba
->status_head
) {
816 resp
= stex_get_status(hba
);
817 tag
= le16_to_cpu(resp
->tag
);
818 if (unlikely(tag
>= hba
->host
->can_queue
)) {
819 printk(KERN_WARNING DRV_NAME
820 "(%s): invalid tag\n", pci_name(hba
->pdev
));
824 ccb
= &hba
->ccb
[tag
];
825 if (hba
->wait_ccb
== ccb
)
826 hba
->wait_ccb
= NULL
;
827 if (unlikely(ccb
->req
== NULL
)) {
828 printk(KERN_WARNING DRV_NAME
829 "(%s): lagging req\n", pci_name(hba
->pdev
));
834 size
= resp
->payload_sz
* sizeof(u32
); /* payload size */
835 if (unlikely(size
< sizeof(*resp
) - STATUS_VAR_LEN
||
836 size
> sizeof(*resp
))) {
837 printk(KERN_WARNING DRV_NAME
"(%s): bad status size\n",
838 pci_name(hba
->pdev
));
840 size
-= sizeof(*resp
) - STATUS_VAR_LEN
; /* copy size */
842 stex_copy_data(ccb
, resp
, size
);
845 ccb
->srb_status
= resp
->srb_status
;
846 ccb
->scsi_status
= resp
->scsi_status
;
848 if (likely(ccb
->cmd
!= NULL
)) {
849 if (hba
->cardtype
== st_yosemite
)
850 stex_ys_commands(hba
, ccb
, resp
);
852 if (unlikely(ccb
->cmd
->cmnd
[0] == PASSTHRU_CMD
&&
853 ccb
->cmd
->cmnd
[1] == PASSTHRU_GET_ADAPTER
))
854 stex_controller_info(hba
, ccb
);
856 stex_unmap_sg(hba
, ccb
->cmd
);
859 } else if (ccb
->req_type
& PASSTHRU_REQ_TYPE
) {
861 if (ccb
->req_type
& PASSTHRU_REQ_NO_WAKEUP
) {
866 if (waitqueue_active(&hba
->waitq
))
867 wake_up(&hba
->waitq
);
872 writel(hba
->status_head
, base
+ IMR1
);
873 readl(base
+ IMR1
); /* flush */
876 static irqreturn_t
stex_intr(int irq
, void *__hba
)
878 struct st_hba
*hba
= __hba
;
879 void __iomem
*base
= hba
->mmio_base
;
884 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
886 data
= readl(base
+ ODBL
);
888 if (data
&& data
!= 0xffffffff) {
889 /* clear the interrupt */
890 writel(data
, base
+ ODBL
);
891 readl(base
+ ODBL
); /* flush */
892 stex_mu_intr(hba
, data
);
896 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
898 return IRQ_RETVAL(handled
);
901 static int stex_handshake(struct st_hba
*hba
)
903 void __iomem
*base
= hba
->mmio_base
;
904 struct handshake_frame
*h
;
905 dma_addr_t status_phys
;
909 if (readl(base
+ OMR0
) != MU_HANDSHAKE_SIGNATURE
) {
910 writel(MU_INBOUND_DOORBELL_HANDSHAKE
, base
+ IDBL
);
912 for (i
= 0; readl(base
+ OMR0
) != MU_HANDSHAKE_SIGNATURE
913 && i
< MU_MAX_DELAY_TIME
; i
++) {
918 if (i
== MU_MAX_DELAY_TIME
) {
919 printk(KERN_ERR DRV_NAME
920 "(%s): no handshake signature\n",
921 pci_name(hba
->pdev
));
928 data
= readl(base
+ OMR1
);
929 if ((data
& 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF
) {
931 if (hba
->host
->can_queue
> data
)
932 hba
->host
->can_queue
= data
;
935 h
= (struct handshake_frame
*)(hba
->dma_mem
+ MU_REQ_BUFFER_SIZE
);
936 h
->rb_phy
= cpu_to_le32(hba
->dma_handle
);
937 h
->rb_phy_hi
= cpu_to_le32((hba
->dma_handle
>> 16) >> 16);
938 h
->req_sz
= cpu_to_le16(sizeof(struct req_msg
));
939 h
->req_cnt
= cpu_to_le16(MU_REQ_COUNT
);
940 h
->status_sz
= cpu_to_le16(sizeof(struct status_msg
));
941 h
->status_cnt
= cpu_to_le16(MU_STATUS_COUNT
);
942 stex_gettime(&h
->hosttime
);
943 h
->partner_type
= HMU_PARTNER_TYPE
;
945 status_phys
= hba
->dma_handle
+ MU_REQ_BUFFER_SIZE
;
946 writel(status_phys
, base
+ IMR0
);
948 writel((status_phys
>> 16) >> 16, base
+ IMR1
);
951 writel((status_phys
>> 16) >> 16, base
+ OMR0
); /* old fw compatible */
953 writel(MU_INBOUND_DOORBELL_HANDSHAKE
, base
+ IDBL
);
954 readl(base
+ IDBL
); /* flush */
957 for (i
= 0; readl(base
+ OMR0
) != MU_HANDSHAKE_SIGNATURE
958 && i
< MU_MAX_DELAY_TIME
; i
++) {
963 if (i
== MU_MAX_DELAY_TIME
) {
964 printk(KERN_ERR DRV_NAME
965 "(%s): no signature after handshake frame\n",
966 pci_name(hba
->pdev
));
970 writel(0, base
+ IMR0
);
972 writel(0, base
+ OMR0
);
974 writel(0, base
+ IMR1
);
976 writel(0, base
+ OMR1
);
977 readl(base
+ OMR1
); /* flush */
978 hba
->mu_status
= MU_STATE_STARTED
;
982 static int stex_abort(struct scsi_cmnd
*cmd
)
984 struct Scsi_Host
*host
= cmd
->device
->host
;
985 struct st_hba
*hba
= (struct st_hba
*)host
->hostdata
;
986 u16 tag
= cmd
->request
->tag
;
989 int result
= SUCCESS
;
991 base
= hba
->mmio_base
;
992 spin_lock_irqsave(host
->host_lock
, flags
);
993 if (tag
< host
->can_queue
&& hba
->ccb
[tag
].cmd
== cmd
)
994 hba
->wait_ccb
= &hba
->ccb
[tag
];
996 for (tag
= 0; tag
< host
->can_queue
; tag
++)
997 if (hba
->ccb
[tag
].cmd
== cmd
) {
998 hba
->wait_ccb
= &hba
->ccb
[tag
];
1001 if (tag
>= host
->can_queue
)
1005 data
= readl(base
+ ODBL
);
1006 if (data
== 0 || data
== 0xffffffff)
1009 writel(data
, base
+ ODBL
);
1010 readl(base
+ ODBL
); /* flush */
1012 stex_mu_intr(hba
, data
);
1014 if (hba
->wait_ccb
== NULL
) {
1015 printk(KERN_WARNING DRV_NAME
1016 "(%s): lost interrupt\n", pci_name(hba
->pdev
));
1021 stex_unmap_sg(hba
, cmd
);
1022 hba
->wait_ccb
->req
= NULL
; /* nullify the req's future return */
1023 hba
->wait_ccb
= NULL
;
1026 spin_unlock_irqrestore(host
->host_lock
, flags
);
1030 static void stex_hard_reset(struct st_hba
*hba
)
1032 struct pci_bus
*bus
;
1037 for (i
= 0; i
< 16; i
++)
1038 pci_read_config_dword(hba
->pdev
, i
* 4,
1039 &hba
->pdev
->saved_config_space
[i
]);
1041 /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1042 secondary bus. Consult Intel 80331/3 developer's manual for detail */
1043 bus
= hba
->pdev
->bus
;
1044 pci_read_config_byte(bus
->self
, PCI_BRIDGE_CONTROL
, &pci_bctl
);
1045 pci_bctl
|= PCI_BRIDGE_CTL_BUS_RESET
;
1046 pci_write_config_byte(bus
->self
, PCI_BRIDGE_CONTROL
, pci_bctl
);
1048 pci_bctl
&= ~PCI_BRIDGE_CTL_BUS_RESET
;
1049 pci_write_config_byte(bus
->self
, PCI_BRIDGE_CONTROL
, pci_bctl
);
1051 for (i
= 0; i
< MU_MAX_DELAY_TIME
; i
++) {
1052 pci_read_config_word(hba
->pdev
, PCI_COMMAND
, &pci_cmd
);
1053 if (pci_cmd
!= 0xffff && (pci_cmd
& PCI_COMMAND_MASTER
))
1059 for (i
= 0; i
< 16; i
++)
1060 pci_write_config_dword(hba
->pdev
, i
* 4,
1061 hba
->pdev
->saved_config_space
[i
]);
1064 static int stex_reset(struct scsi_cmnd
*cmd
)
1067 unsigned long flags
;
1068 unsigned long before
;
1069 hba
= (struct st_hba
*) &cmd
->device
->host
->hostdata
[0];
1071 hba
->mu_status
= MU_STATE_RESETTING
;
1073 if (hba
->cardtype
== st_shasta
)
1074 stex_hard_reset(hba
);
1076 if (hba
->cardtype
!= st_yosemite
) {
1077 if (stex_handshake(hba
)) {
1078 printk(KERN_WARNING DRV_NAME
1079 "(%s): resetting: handshake failed\n",
1080 pci_name(hba
->pdev
));
1083 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1086 hba
->status_head
= 0;
1087 hba
->status_tail
= 0;
1088 hba
->out_req_cnt
= 0;
1089 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1094 writel(MU_INBOUND_DOORBELL_RESET
, hba
->mmio_base
+ IDBL
);
1095 readl(hba
->mmio_base
+ IDBL
); /* flush */
1097 while (hba
->out_req_cnt
> 0) {
1098 if (time_after(jiffies
, before
+ ST_INTERNAL_TIMEOUT
* HZ
)) {
1099 printk(KERN_WARNING DRV_NAME
1100 "(%s): reset timeout\n", pci_name(hba
->pdev
));
1106 hba
->mu_status
= MU_STATE_STARTED
;
1110 static int stex_biosparam(struct scsi_device
*sdev
,
1111 struct block_device
*bdev
, sector_t capacity
, int geom
[])
1113 int heads
= 255, sectors
= 63;
1115 if (capacity
< 0x200000) {
1120 sector_div(capacity
, heads
* sectors
);
1129 static struct scsi_host_template driver_template
= {
1130 .module
= THIS_MODULE
,
1132 .proc_name
= DRV_NAME
,
1133 .bios_param
= stex_biosparam
,
1134 .queuecommand
= stex_queuecommand
,
1135 .slave_alloc
= stex_slave_alloc
,
1136 .slave_configure
= stex_slave_config
,
1137 .slave_destroy
= stex_slave_destroy
,
1138 .eh_abort_handler
= stex_abort
,
1139 .eh_host_reset_handler
= stex_reset
,
1140 .can_queue
= ST_CAN_QUEUE
,
1142 .sg_tablesize
= ST_MAX_SG
,
1143 .cmd_per_lun
= ST_CMD_PER_LUN
,
1146 static int stex_set_dma_mask(struct pci_dev
* pdev
)
1149 if (!pci_set_dma_mask(pdev
, DMA_64BIT_MASK
)
1150 && !pci_set_consistent_dma_mask(pdev
, DMA_64BIT_MASK
))
1152 ret
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
1154 ret
= pci_set_consistent_dma_mask(pdev
, DMA_32BIT_MASK
);
1158 static int __devinit
1159 stex_probe(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1162 struct Scsi_Host
*host
;
1165 err
= pci_enable_device(pdev
);
1169 pci_set_master(pdev
);
1171 host
= scsi_host_alloc(&driver_template
, sizeof(struct st_hba
));
1174 printk(KERN_ERR DRV_NAME
"(%s): scsi_host_alloc failed\n",
1180 hba
= (struct st_hba
*)host
->hostdata
;
1181 memset(hba
, 0, sizeof(struct st_hba
));
1183 err
= pci_request_regions(pdev
, DRV_NAME
);
1185 printk(KERN_ERR DRV_NAME
"(%s): request regions failed\n",
1187 goto out_scsi_host_put
;
1190 hba
->mmio_base
= ioremap(pci_resource_start(pdev
, 0),
1191 pci_resource_len(pdev
, 0));
1192 if ( !hba
->mmio_base
) {
1193 printk(KERN_ERR DRV_NAME
"(%s): memory map failed\n",
1196 goto out_release_regions
;
1199 err
= stex_set_dma_mask(pdev
);
1201 printk(KERN_ERR DRV_NAME
"(%s): set dma mask failed\n",
1206 hba
->dma_mem
= dma_alloc_coherent(&pdev
->dev
,
1207 STEX_BUFFER_SIZE
, &hba
->dma_handle
, GFP_KERNEL
);
1208 if (!hba
->dma_mem
) {
1210 printk(KERN_ERR DRV_NAME
"(%s): dma mem alloc failed\n",
1215 hba
->status_buffer
=
1216 (struct status_msg
*)(hba
->dma_mem
+ MU_REQ_BUFFER_SIZE
);
1217 hba
->copy_buffer
= hba
->dma_mem
+ MU_BUFFER_SIZE
;
1218 hba
->mu_status
= MU_STATE_STARTING
;
1220 hba
->cardtype
= (unsigned int) id
->driver_data
;
1222 /* firmware uses id/lun pair for a logical drive, but lun would be
1223 always 0 if CONFIG_SCSI_MULTI_LUN not configured, so we use
1224 channel to map lun here */
1225 host
->max_channel
= ST_MAX_LUN_PER_TARGET
- 1;
1226 host
->max_id
= ST_MAX_TARGET_NUM
;
1228 host
->unique_id
= host
->host_no
;
1229 host
->max_cmd_len
= STEX_CDB_LENGTH
;
1233 init_waitqueue_head(&hba
->waitq
);
1235 err
= request_irq(pdev
->irq
, stex_intr
, IRQF_SHARED
, DRV_NAME
, hba
);
1237 printk(KERN_ERR DRV_NAME
"(%s): request irq failed\n",
1242 err
= stex_handshake(hba
);
1246 err
= scsi_init_shared_tag_map(host
, host
->can_queue
);
1248 printk(KERN_ERR DRV_NAME
"(%s): init shared queue failed\n",
1253 pci_set_drvdata(pdev
, hba
);
1255 err
= scsi_add_host(host
, &pdev
->dev
);
1257 printk(KERN_ERR DRV_NAME
"(%s): scsi_add_host failed\n",
1262 scsi_scan_host(host
);
1267 free_irq(pdev
->irq
, hba
);
1269 dma_free_coherent(&pdev
->dev
, STEX_BUFFER_SIZE
,
1270 hba
->dma_mem
, hba
->dma_handle
);
1272 iounmap(hba
->mmio_base
);
1273 out_release_regions
:
1274 pci_release_regions(pdev
);
1276 scsi_host_put(host
);
1278 pci_disable_device(pdev
);
1283 static void stex_hba_stop(struct st_hba
*hba
)
1285 struct req_msg
*req
;
1286 unsigned long flags
;
1287 unsigned long before
;
1290 spin_lock_irqsave(hba
->host
->host_lock
, flags
);
1291 req
= stex_alloc_req(hba
);
1292 memset(req
->cdb
, 0, STEX_CDB_LENGTH
);
1294 if (hba
->cardtype
== st_yosemite
) {
1295 req
->cdb
[0] = MGT_CMD
;
1296 req
->cdb
[1] = MGT_CMD_SIGNATURE
;
1297 req
->cdb
[2] = CTLR_CONFIG_CMD
;
1298 req
->cdb
[3] = CTLR_SHUTDOWN
;
1300 req
->cdb
[0] = CONTROLLER_CMD
;
1301 req
->cdb
[1] = CTLR_POWER_STATE_CHANGE
;
1302 req
->cdb
[2] = CTLR_POWER_SAVING
;
1305 hba
->ccb
[tag
].cmd
= NULL
;
1306 hba
->ccb
[tag
].sg_count
= 0;
1307 hba
->ccb
[tag
].sense_bufflen
= 0;
1308 hba
->ccb
[tag
].sense_buffer
= NULL
;
1309 hba
->ccb
[tag
].req_type
|= PASSTHRU_REQ_TYPE
;
1311 stex_send_cmd(hba
, req
, tag
);
1312 spin_unlock_irqrestore(hba
->host
->host_lock
, flags
);
1315 while (hba
->ccb
[tag
].req_type
& PASSTHRU_REQ_TYPE
) {
1316 if (time_after(jiffies
, before
+ ST_INTERNAL_TIMEOUT
* HZ
))
1322 static void stex_hba_free(struct st_hba
*hba
)
1324 free_irq(hba
->pdev
->irq
, hba
);
1326 iounmap(hba
->mmio_base
);
1328 pci_release_regions(hba
->pdev
);
1330 dma_free_coherent(&hba
->pdev
->dev
, STEX_BUFFER_SIZE
,
1331 hba
->dma_mem
, hba
->dma_handle
);
1334 static void stex_remove(struct pci_dev
*pdev
)
1336 struct st_hba
*hba
= pci_get_drvdata(pdev
);
1338 scsi_remove_host(hba
->host
);
1340 pci_set_drvdata(pdev
, NULL
);
1346 scsi_host_put(hba
->host
);
1348 pci_disable_device(pdev
);
1351 static void stex_shutdown(struct pci_dev
*pdev
)
1353 struct st_hba
*hba
= pci_get_drvdata(pdev
);
1358 static struct pci_device_id stex_pci_tbl
[] = {
1360 { 0x105a, 0x8350, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0,
1361 st_shasta
}, /* SuperTrak EX8350/8300/16350/16300 */
1362 { 0x105a, 0xc350, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0,
1363 st_shasta
}, /* SuperTrak EX12350 */
1364 { 0x105a, 0x4302, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0,
1365 st_shasta
}, /* SuperTrak EX4350 */
1366 { 0x105a, 0xe350, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0,
1367 st_shasta
}, /* SuperTrak EX24350 */
1370 { 0x105a, 0x7250, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, st_vsc
},
1373 { 0x105a, 0x8650, PCI_ANY_ID
, 0x4600, 0, 0,
1374 st_yosemite
}, /* SuperTrak EX4650 */
1375 { 0x105a, 0x8650, PCI_ANY_ID
, 0x4610, 0, 0,
1376 st_yosemite
}, /* SuperTrak EX4650o */
1377 { 0x105a, 0x8650, PCI_ANY_ID
, 0x8600, 0, 0,
1378 st_yosemite
}, /* SuperTrak EX8650EL */
1379 { 0x105a, 0x8650, PCI_ANY_ID
, 0x8601, 0, 0,
1380 st_yosemite
}, /* SuperTrak EX8650 */
1381 { 0x105a, 0x8650, PCI_ANY_ID
, 0x8602, 0, 0,
1382 st_yosemite
}, /* SuperTrak EX8654 */
1383 { 0x105a, 0x8650, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0,
1384 st_yosemite
}, /* generic st_yosemite */
1385 { } /* terminate list */
1387 MODULE_DEVICE_TABLE(pci
, stex_pci_tbl
);
1389 static struct pci_driver stex_pci_driver
= {
1391 .id_table
= stex_pci_tbl
,
1392 .probe
= stex_probe
,
1393 .remove
= __devexit_p(stex_remove
),
1394 .shutdown
= stex_shutdown
,
1397 static int __init
stex_init(void)
1399 printk(KERN_INFO DRV_NAME
1400 ": Promise SuperTrak EX Driver version: %s\n",
1403 return pci_register_driver(&stex_pci_driver
);
1406 static void __exit
stex_exit(void)
1408 pci_unregister_driver(&stex_pci_driver
);
1411 module_init(stex_init
);
1412 module_exit(stex_exit
);