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matroxfb: get rid of unneeded macro MINFO_FROM
[linux-2.6/mini2440.git] / drivers / video / matrox / matroxfb_base.c
blobc6b122cfb3008676c99d5fc460843a2f44c6d9f6
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #define __OLD_VIDIOC_
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/uaccess.h>
117
118 #ifdef CONFIG_PPC_PMAC
119 #include <asm/machdep.h>
120 unsigned char nvram_read_byte(int);
121 static int default_vmode = VMODE_NVRAM;
122 static int default_cmode = CMODE_NVRAM;
123 #endif
124
125 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
126
127 /* --------------------------------------------------------------------- */
128
129 /*
130 * card parameters
131 */
132
133 /* --------------------------------------------------------------------- */
134
135 static struct fb_var_screeninfo vesafb_defined = {
136 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
137 0,0, /* virtual -> visible no offset */
138 8, /* depth -> load bits_per_pixel */
139 0, /* greyscale ? */
140 {0,0,0}, /* R */
141 {0,0,0}, /* G */
142 {0,0,0}, /* B */
143 {0,0,0}, /* transparency */
144 0, /* standard pixel format */
145 FB_ACTIVATE_NOW,
146 -1,-1,
147 FB_ACCELF_TEXT, /* accel flags */
148 39721L,48L,16L,33L,10L,
149 96L,2L,~0, /* No sync info */
150 FB_VMODE_NONINTERLACED,
151 0, {0,0,0,0,0}
152 };
153
154
155
156 /* --------------------------------------------------------------------- */
157 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos)
158 {
159 struct matroxfb_dh_fb_info *info = minfo->crtc2.info;
160
161 /* Make sure that displays are compatible */
162 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel)
163 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual)
164 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length)
165 ) {
166 switch (minfo->fbcon.var.bits_per_pixel) {
167 case 16:
168 case 32:
169 pos = pos * 8;
170 if (info->interlaced) {
171 mga_outl(0x3C2C, pos);
172 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8);
173 } else {
174 mga_outl(0x3C28, pos);
175 }
176 break;
177 }
178 }
179 }
180
181 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo)
182 {
183 if (minfo->crtc1.panpos >= 0) {
184 unsigned long flags;
185 int panpos;
186
187 matroxfb_DAC_lock_irqsave(flags);
188 panpos = minfo->crtc1.panpos;
189 if (panpos >= 0) {
190 unsigned int extvga_reg;
191
192 minfo->crtc1.panpos = -1; /* No update pending anymore */
193 extvga_reg = mga_inb(M_EXTVGA_INDEX);
194 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
195 if (extvga_reg != 0x00) {
196 mga_outb(M_EXTVGA_INDEX, extvga_reg);
197 }
198 }
199 matroxfb_DAC_unlock_irqrestore(flags);
200 }
201 }
202
203 static irqreturn_t matrox_irq(int irq, void *dev_id)
204 {
205 u_int32_t status;
206 int handled = 0;
207 struct matrox_fb_info *minfo = dev_id;
208
209 status = mga_inl(M_STATUS);
210
211 if (status & 0x20) {
212 mga_outl(M_ICLEAR, 0x20);
213 minfo->crtc1.vsync.cnt++;
214 matroxfb_crtc1_panpos(minfo);
215 wake_up_interruptible(&minfo->crtc1.vsync.wait);
216 handled = 1;
217 }
218 if (status & 0x200) {
219 mga_outl(M_ICLEAR, 0x200);
220 minfo->crtc2.vsync.cnt++;
221 wake_up_interruptible(&minfo->crtc2.vsync.wait);
222 handled = 1;
223 }
224 return IRQ_RETVAL(handled);
225 }
226
227 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable)
228 {
229 u_int32_t bm;
230
231 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
232 bm = 0x220;
233 else
234 bm = 0x020;
235
236 if (!test_and_set_bit(0, &minfo->irq_flags)) {
237 if (request_irq(minfo->pcidev->irq, matrox_irq,
238 IRQF_SHARED, "matroxfb", minfo)) {
239 clear_bit(0, &minfo->irq_flags);
240 return -EINVAL;
241 }
242 /* Clear any pending field interrupts */
243 mga_outl(M_ICLEAR, bm);
244 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
245 } else if (reenable) {
246 u_int32_t ien;
247
248 ien = mga_inl(M_IEN);
249 if ((ien & bm) != bm) {
250 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
251 mga_outl(M_IEN, ien | bm);
252 }
253 }
254 return 0;
255 }
256
257 static void matroxfb_disable_irq(struct matrox_fb_info *minfo)
258 {
259 if (test_and_clear_bit(0, &minfo->irq_flags)) {
260 /* Flush pending pan-at-vbl request... */
261 matroxfb_crtc1_panpos(minfo);
262 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
264 else
265 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
266 free_irq(minfo->pcidev->irq, minfo);
267 }
268 }
269
270 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc)
271 {
272 struct matrox_vsync *vs;
273 unsigned int cnt;
274 int ret;
275
276 switch (crtc) {
277 case 0:
278 vs = &minfo->crtc1.vsync;
279 break;
280 case 1:
281 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) {
282 return -ENODEV;
283 }
284 vs = &minfo->crtc2.vsync;
285 break;
286 default:
287 return -ENODEV;
288 }
289 ret = matroxfb_enable_irq(minfo, 0);
290 if (ret) {
291 return ret;
292 }
293
294 cnt = vs->cnt;
295 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
296 if (ret < 0) {
297 return ret;
298 }
299 if (ret == 0) {
300 matroxfb_enable_irq(minfo, 1);
301 return -ETIMEDOUT;
302 }
303 return 0;
304 }
305
306 /* --------------------------------------------------------------------- */
307
308 static void matrox_pan_var(struct matrox_fb_info *minfo,
309 struct fb_var_screeninfo *var)
310 {
311 unsigned int pos;
312 unsigned short p0, p1, p2;
313 #ifdef CONFIG_FB_MATROX_32MB
314 unsigned int p3;
315 #endif
316 int vbl;
317 unsigned long flags;
318
319 CRITFLAGS
320
321 DBG(__func__)
322
323 if (minfo->dead)
324 return;
325
326 minfo->fbcon.var.xoffset = var->xoffset;
327 minfo->fbcon.var.yoffset = var->yoffset;
328 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32;
329 pos += minfo->curr.ydstorg.chunks;
330 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF;
331 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8;
332 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
333 #ifdef CONFIG_FB_MATROX_32MB
334 p3 = minfo->hw.CRTCEXT[8] = pos >> 21;
335 #endif
336
337 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
338 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0);
339
340 CRITBEGIN
341
342 matroxfb_DAC_lock_irqsave(flags);
343 mga_setr(M_CRTC_INDEX, 0x0D, p0);
344 mga_setr(M_CRTC_INDEX, 0x0C, p1);
345 #ifdef CONFIG_FB_MATROX_32MB
346 if (minfo->devflags.support32MB)
347 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
348 #endif
349 if (vbl) {
350 minfo->crtc1.panpos = p2;
351 } else {
352 /* Abort any pending change */
353 minfo->crtc1.panpos = -1;
354 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
355 }
356 matroxfb_DAC_unlock_irqrestore(flags);
357
358 update_crtc2(minfo, pos);
359
360 CRITEND
361 }
362
363 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy)
364 {
365 /* Currently we are holding big kernel lock on all dead & usecount updates.
366 * Destroy everything after all users release it. Especially do not unregister
367 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
368 * for device unplugged when in use.
369 * In future we should point mmio.vbase & video.vbase somewhere where we can
370 * write data without causing too much damage...
371 */
372
373 minfo->dead = 1;
374 if (minfo->usecount) {
375 /* destroy it later */
376 return;
377 }
378 matroxfb_unregister_device(minfo);
379 unregister_framebuffer(&minfo->fbcon);
380 matroxfb_g450_shutdown(minfo);
381 #ifdef CONFIG_MTRR
382 if (minfo->mtrr.vram_valid)
383 mtrr_del(minfo->mtrr.vram, minfo->video.base, minfo->video.len);
384 #endif
385 mga_iounmap(minfo->mmio.vbase);
386 mga_iounmap(minfo->video.vbase);
387 release_mem_region(minfo->video.base, minfo->video.len_maximum);
388 release_mem_region(minfo->mmio.base, 16384);
389 kfree(minfo);
390 }
391
392 /*
393 * Open/Release the frame buffer device
394 */
395
396 static int matroxfb_open(struct fb_info *info, int user)
397 {
398 struct matrox_fb_info *minfo = info2minfo(info);
399
400 DBG_LOOP(__func__)
401
402 if (minfo->dead) {
403 return -ENXIO;
404 }
405 minfo->usecount++;
406 if (user) {
407 minfo->userusecount++;
408 }
409 return(0);
410 }
411
412 static int matroxfb_release(struct fb_info *info, int user)
413 {
414 struct matrox_fb_info *minfo = info2minfo(info);
415
416 DBG_LOOP(__func__)
417
418 if (user) {
419 if (0 == --minfo->userusecount) {
420 matroxfb_disable_irq(minfo);
421 }
422 }
423 if (!(--minfo->usecount) && minfo->dead) {
424 matroxfb_remove(minfo, 0);
425 }
426 return(0);
427 }
428
429 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
430 struct fb_info* info) {
431 struct matrox_fb_info *minfo = info2minfo(info);
432
433 DBG(__func__)
434
435 matrox_pan_var(minfo, var);
436 return 0;
437 }
438
439 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo,
440 int bpp)
441 {
442 int bppshft2;
443
444 DBG(__func__)
445
446 bppshft2 = bpp;
447 if (!bppshft2) {
448 return 8;
449 }
450 if (isInterleave(minfo))
451 bppshft2 >>= 1;
452 if (minfo->devflags.video64bits)
453 bppshft2 >>= 1;
454 return bppshft2;
455 }
456
457 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo,
458 int xres, int bpp)
459 {
460 int over;
461 int rounding;
462
463 DBG(__func__)
464
465 switch (bpp) {
466 case 0: return xres;
467 case 4: rounding = 128;
468 break;
469 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
470 break;
471 case 16: rounding = 32;
472 break;
473 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
474 break;
475 default: rounding = 16;
476 /* on G400, 16 really does not work */
477 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400)
478 rounding = 32;
479 break;
480 }
481 if (isInterleave(minfo)) {
482 rounding *= 2;
483 }
484 over = xres % rounding;
485 if (over)
486 xres += rounding-over;
487 return xres;
488 }
489
490 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres,
491 int bpp)
492 {
493 const int* width;
494 int xres_new;
495
496 DBG(__func__)
497
498 if (!bpp) return xres;
499
500 width = minfo->capable.vxres;
501
502 if (minfo->devflags.precise_width) {
503 while (*width) {
504 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) {
505 break;
506 }
507 width++;
508 }
509 xres_new = *width;
510 } else {
511 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp);
512 }
513 return xres_new;
514 }
515
516 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
517
518 DBG(__func__)
519
520 switch (var->bits_per_pixel) {
521 case 4:
522 return 16; /* pseudocolor... 16 entries HW palette */
523 case 8:
524 return 256; /* pseudocolor... 256 entries HW palette */
525 case 16:
526 return 16; /* directcolor... 16 entries SW palette */
527 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
528 case 24:
529 return 16; /* directcolor... 16 entries SW palette */
530 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
531 case 32:
532 return 16; /* directcolor... 16 entries SW palette */
533 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
534 }
535 return 16; /* return something reasonable... or panic()? */
536 }
537
538 static int matroxfb_decode_var(const struct matrox_fb_info *minfo,
539 struct fb_var_screeninfo *var, int *visual,
540 int *video_cmap_len, unsigned int* ydstorg)
541 {
542 struct RGBT {
543 unsigned char bpp;
544 struct {
545 unsigned char offset,
546 length;
547 } red,
548 green,
549 blue,
550 transp;
551 signed char visual;
552 };
553 static const struct RGBT table[]= {
554 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
555 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
556 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
557 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
558 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
559 };
560 struct RGBT const *rgbt;
561 unsigned int bpp = var->bits_per_pixel;
562 unsigned int vramlen;
563 unsigned int memlen;
564
565 DBG(__func__)
566
567 switch (bpp) {
568 case 4: if (!minfo->capable.cfb4) return -EINVAL;
569 break;
570 case 8: break;
571 case 16: break;
572 case 24: break;
573 case 32: break;
574 default: return -EINVAL;
575 }
576 *ydstorg = 0;
577 vramlen = minfo->video.len_usable;
578 if (var->yres_virtual < var->yres)
579 var->yres_virtual = var->yres;
580 if (var->xres_virtual < var->xres)
581 var->xres_virtual = var->xres;
582
583 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp);
584 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
585 if (memlen > vramlen) {
586 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
587 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
588 }
589 /* There is hardware bug that no line can cross 4MB boundary */
590 /* give up for CFB24, it is impossible to easy workaround it */
591 /* for other try to do something */
592 if (!minfo->capable.cross4MB && (memlen > 0x400000)) {
593 if (bpp == 24) {
594 /* sorry */
595 } else {
596 unsigned int linelen;
597 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
598 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
599 unsigned int max_yres;
600
601 while (m1) {
602 int t;
603
604 while (m2 >= m1) m2 -= m1;
605 t = m1;
606 m1 = m2;
607 m2 = t;
608 }
609 m2 = linelen * PAGE_SIZE / m2;
610 *ydstorg = m2 = 0x400000 % m2;
611 max_yres = (vramlen - m2) / linelen;
612 if (var->yres_virtual > max_yres)
613 var->yres_virtual = max_yres;
614 }
615 }
616 /* YDSTLEN contains only signed 16bit value */
617 if (var->yres_virtual > 32767)
618 var->yres_virtual = 32767;
619 /* we must round yres/xres down, we already rounded y/xres_virtual up
620 if it was possible. We should return -EINVAL, but I disagree */
621 if (var->yres_virtual < var->yres)
622 var->yres = var->yres_virtual;
623 if (var->xres_virtual < var->xres)
624 var->xres = var->xres_virtual;
625 if (var->xoffset + var->xres > var->xres_virtual)
626 var->xoffset = var->xres_virtual - var->xres;
627 if (var->yoffset + var->yres > var->yres_virtual)
628 var->yoffset = var->yres_virtual - var->yres;
629
630 if (bpp == 16 && var->green.length == 5) {
631 bpp--; /* an artifical value - 15 */
632 }
633
634 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
635 #define SETCLR(clr)\
636 var->clr.offset = rgbt->clr.offset;\
637 var->clr.length = rgbt->clr.length
638 SETCLR(red);
639 SETCLR(green);
640 SETCLR(blue);
641 SETCLR(transp);
642 #undef SETCLR
643 *visual = rgbt->visual;
644
645 if (bpp > 8)
646 dprintk("matroxfb: truecolor: "
647 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
648 var->transp.length, var->red.length, var->green.length, var->blue.length,
649 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
650
651 *video_cmap_len = matroxfb_get_cmap_len(var);
652 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
653 var->xres_virtual, var->yres_virtual);
654 return 0;
655 }
656
657 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
658 unsigned blue, unsigned transp,
659 struct fb_info *fb_info)
660 {
661 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
662
663 DBG(__func__)
664
665 /*
666 * Set a single color register. The values supplied are
667 * already rounded down to the hardware's capabilities
668 * (according to the entries in the `var' structure). Return
669 * != 0 for invalid regno.
670 */
671
672 if (regno >= minfo->curr.cmap_len)
673 return 1;
674
675 if (minfo->fbcon.var.grayscale) {
676 /* gray = 0.30*R + 0.59*G + 0.11*B */
677 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
678 }
679
680 red = CNVT_TOHW(red, minfo->fbcon.var.red.length);
681 green = CNVT_TOHW(green, minfo->fbcon.var.green.length);
682 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length);
683 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length);
684
685 switch (minfo->fbcon.var.bits_per_pixel) {
686 case 4:
687 case 8:
688 mga_outb(M_DAC_REG, regno);
689 mga_outb(M_DAC_VAL, red);
690 mga_outb(M_DAC_VAL, green);
691 mga_outb(M_DAC_VAL, blue);
692 break;
693 case 16:
694 if (regno >= 16)
695 break;
696 {
697 u_int16_t col =
698 (red << minfo->fbcon.var.red.offset) |
699 (green << minfo->fbcon.var.green.offset) |
700 (blue << minfo->fbcon.var.blue.offset) |
701 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */
702 minfo->cmap[regno] = col | (col << 16);
703 }
704 break;
705 case 24:
706 case 32:
707 if (regno >= 16)
708 break;
709 minfo->cmap[regno] =
710 (red << minfo->fbcon.var.red.offset) |
711 (green << minfo->fbcon.var.green.offset) |
712 (blue << minfo->fbcon.var.blue.offset) |
713 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */
714 break;
715 }
716 return 0;
717 }
718
719 static void matroxfb_init_fix(struct matrox_fb_info *minfo)
720 {
721 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
722 DBG(__func__)
723
724 strcpy(fix->id,"MATROX");
725
726 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
727 fix->ypanstep = 1;
728 fix->ywrapstep = 0;
729 fix->mmio_start = minfo->mmio.base;
730 fix->mmio_len = minfo->mmio.len;
731 fix->accel = minfo->devflags.accelerator;
732 }
733
734 static void matroxfb_update_fix(struct matrox_fb_info *minfo)
735 {
736 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix;
737 DBG(__func__)
738
739 mutex_lock(&minfo->fbcon.mm_lock);
740 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes;
741 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes;
742 mutex_unlock(&minfo->fbcon.mm_lock);
743 }
744
745 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
746 {
747 int err;
748 int visual;
749 int cmap_len;
750 unsigned int ydstorg;
751 struct matrox_fb_info *minfo = info2minfo(info);
752
753 if (minfo->dead) {
754 return -ENXIO;
755 }
756 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
757 return err;
758 return 0;
759 }
760
761 static int matroxfb_set_par(struct fb_info *info)
762 {
763 int err;
764 int visual;
765 int cmap_len;
766 unsigned int ydstorg;
767 struct fb_var_screeninfo *var;
768 struct matrox_fb_info *minfo = info2minfo(info);
769
770 DBG(__func__)
771
772 if (minfo->dead) {
773 return -ENXIO;
774 }
775
776 var = &info->var;
777 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0)
778 return err;
779 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg;
780 matroxfb_update_fix(minfo);
781 minfo->fbcon.fix.visual = visual;
782 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS;
783 minfo->fbcon.fix.type_aux = 0;
784 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
785 {
786 unsigned int pos;
787
788 minfo->curr.cmap_len = cmap_len;
789 ydstorg += minfo->devflags.ydstorg;
790 minfo->curr.ydstorg.bytes = ydstorg;
791 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2);
792 if (var->bits_per_pixel == 4)
793 minfo->curr.ydstorg.pixels = ydstorg;
794 else
795 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel;
796 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel);
797 { struct my_timming mt;
798 struct matrox_hw_state* hw;
799 int out;
800
801 matroxfb_var2my(var, &mt);
802 mt.crtc = MATROXFB_SRC_CRTC1;
803 /* CRTC1 delays */
804 switch (var->bits_per_pixel) {
805 case 0: mt.delay = 31 + 0; break;
806 case 16: mt.delay = 21 + 8; break;
807 case 24: mt.delay = 17 + 8; break;
808 case 32: mt.delay = 16 + 8; break;
809 default: mt.delay = 31 + 8; break;
810 }
811
812 hw = &minfo->hw;
813
814 down_read(&minfo->altout.lock);
815 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
816 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
817 minfo->outputs[out].output->compute) {
818 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt);
819 }
820 }
821 up_read(&minfo->altout.lock);
822 minfo->crtc1.pixclock = mt.pixclock;
823 minfo->crtc1.mnp = mt.mnp;
824 minfo->hw_switch->init(minfo, &mt);
825 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32;
826 pos += minfo->curr.ydstorg.chunks;
827
828 hw->CRTC[0x0D] = pos & 0xFF;
829 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
830 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
831 hw->CRTCEXT[8] = pos >> 21;
832 minfo->hw_switch->restore(minfo);
833 update_crtc2(minfo, pos);
834 down_read(&minfo->altout.lock);
835 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
836 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
837 minfo->outputs[out].output->program) {
838 minfo->outputs[out].output->program(minfo->outputs[out].data);
839 }
840 }
841 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
842 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 &&
843 minfo->outputs[out].output->start) {
844 minfo->outputs[out].output->start(minfo->outputs[out].data);
845 }
846 }
847 up_read(&minfo->altout.lock);
848 matrox_cfbX_init(minfo);
849 }
850 }
851 minfo->initialized = 1;
852 return 0;
853 }
854
855 static int matroxfb_get_vblank(struct matrox_fb_info *minfo,
856 struct fb_vblank *vblank)
857 {
858 unsigned int sts1;
859
860 matroxfb_enable_irq(minfo, 0);
861 memset(vblank, 0, sizeof(*vblank));
862 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
863 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
864 sts1 = mga_inb(M_INSTS1);
865 vblank->vcount = mga_inl(M_VCOUNT);
866 /* BTW, on my PIII/450 with G400, reading M_INSTS1
867 byte makes this call about 12% slower (1.70 vs. 2.05 us
868 per ioctl()) */
869 if (sts1 & 1)
870 vblank->flags |= FB_VBLANK_HBLANKING;
871 if (sts1 & 8)
872 vblank->flags |= FB_VBLANK_VSYNCING;
873 if (vblank->vcount >= minfo->fbcon.var.yres)
874 vblank->flags |= FB_VBLANK_VBLANKING;
875 if (test_bit(0, &minfo->irq_flags)) {
876 vblank->flags |= FB_VBLANK_HAVE_COUNT;
877 /* Only one writer, aligned int value...
878 it should work without lock and without atomic_t */
879 vblank->count = minfo->crtc1.vsync.cnt;
880 }
881 return 0;
882 }
883
884 static struct matrox_altout panellink_output = {
885 .name = "Panellink output",
886 };
887
888 static int matroxfb_ioctl(struct fb_info *info,
889 unsigned int cmd, unsigned long arg)
890 {
891 void __user *argp = (void __user *)arg;
892 struct matrox_fb_info *minfo = info2minfo(info);
893
894 DBG(__func__)
895
896 if (minfo->dead) {
897 return -ENXIO;
898 }
899
900 switch (cmd) {
901 case FBIOGET_VBLANK:
902 {
903 struct fb_vblank vblank;
904 int err;
905
906 err = matroxfb_get_vblank(minfo, &vblank);
907 if (err)
908 return err;
909 if (copy_to_user(argp, &vblank, sizeof(vblank)))
910 return -EFAULT;
911 return 0;
912 }
913 case FBIO_WAITFORVSYNC:
914 {
915 u_int32_t crt;
916
917 if (get_user(crt, (u_int32_t __user *)arg))
918 return -EFAULT;
919
920 return matroxfb_wait_for_sync(minfo, crt);
921 }
922 case MATROXFB_SET_OUTPUT_MODE:
923 {
924 struct matroxioc_output_mode mom;
925 struct matrox_altout *oproc;
926 int val;
927
928 if (copy_from_user(&mom, argp, sizeof(mom)))
929 return -EFAULT;
930 if (mom.output >= MATROXFB_MAX_OUTPUTS)
931 return -ENXIO;
932 down_read(&minfo->altout.lock);
933 oproc = minfo->outputs[mom.output].output;
934 if (!oproc) {
935 val = -ENXIO;
936 } else if (!oproc->verifymode) {
937 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
938 val = 0;
939 } else {
940 val = -EINVAL;
941 }
942 } else {
943 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode);
944 }
945 if (!val) {
946 if (minfo->outputs[mom.output].mode != mom.mode) {
947 minfo->outputs[mom.output].mode = mom.mode;
948 val = 1;
949 }
950 }
951 up_read(&minfo->altout.lock);
952 if (val != 1)
953 return val;
954 switch (minfo->outputs[mom.output].src) {
955 case MATROXFB_SRC_CRTC1:
956 matroxfb_set_par(info);
957 break;
958 case MATROXFB_SRC_CRTC2:
959 {
960 struct matroxfb_dh_fb_info* crtc2;
961
962 down_read(&minfo->crtc2.lock);
963 crtc2 = minfo->crtc2.info;
964 if (crtc2)
965 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
966 up_read(&minfo->crtc2.lock);
967 }
968 break;
969 }
970 return 0;
971 }
972 case MATROXFB_GET_OUTPUT_MODE:
973 {
974 struct matroxioc_output_mode mom;
975 struct matrox_altout *oproc;
976 int val;
977
978 if (copy_from_user(&mom, argp, sizeof(mom)))
979 return -EFAULT;
980 if (mom.output >= MATROXFB_MAX_OUTPUTS)
981 return -ENXIO;
982 down_read(&minfo->altout.lock);
983 oproc = minfo->outputs[mom.output].output;
984 if (!oproc) {
985 val = -ENXIO;
986 } else {
987 mom.mode = minfo->outputs[mom.output].mode;
988 val = 0;
989 }
990 up_read(&minfo->altout.lock);
991 if (val)
992 return val;
993 if (copy_to_user(argp, &mom, sizeof(mom)))
994 return -EFAULT;
995 return 0;
996 }
997 case MATROXFB_SET_OUTPUT_CONNECTION:
998 {
999 u_int32_t tmp;
1000 int i;
1001 int changes;
1002
1003 if (copy_from_user(&tmp, argp, sizeof(tmp)))
1004 return -EFAULT;
1005 for (i = 0; i < 32; i++) {
1006 if (tmp & (1 << i)) {
1007 if (i >= MATROXFB_MAX_OUTPUTS)
1008 return -ENXIO;
1009 if (!minfo->outputs[i].output)
1010 return -ENXIO;
1011 switch (minfo->outputs[i].src) {
1012 case MATROXFB_SRC_NONE:
1013 case MATROXFB_SRC_CRTC1:
1014 break;
1015 default:
1016 return -EBUSY;
1017 }
1018 }
1019 }
1020 if (minfo->devflags.panellink) {
1021 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1022 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1023 return -EINVAL;
1024 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1025 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) {
1026 return -EBUSY;
1027 }
1028 }
1029 }
1030 }
1031 changes = 0;
1032 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1033 if (tmp & (1 << i)) {
1034 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) {
1035 changes = 1;
1036 minfo->outputs[i].src = MATROXFB_SRC_CRTC1;
1037 }
1038 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1039 changes = 1;
1040 minfo->outputs[i].src = MATROXFB_SRC_NONE;
1041 }
1042 }
1043 if (!changes)
1044 return 0;
1045 matroxfb_set_par(info);
1046 return 0;
1047 }
1048 case MATROXFB_GET_OUTPUT_CONNECTION:
1049 {
1050 u_int32_t conn = 0;
1051 int i;
1052
1053 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1054 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) {
1055 conn |= 1 << i;
1056 }
1057 }
1058 if (put_user(conn, (u_int32_t __user *)arg))
1059 return -EFAULT;
1060 return 0;
1061 }
1062 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1063 {
1064 u_int32_t conn = 0;
1065 int i;
1066
1067 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1068 if (minfo->outputs[i].output) {
1069 switch (minfo->outputs[i].src) {
1070 case MATROXFB_SRC_NONE:
1071 case MATROXFB_SRC_CRTC1:
1072 conn |= 1 << i;
1073 break;
1074 }
1075 }
1076 }
1077 if (minfo->devflags.panellink) {
1078 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1079 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1080 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1081 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1082 }
1083 if (put_user(conn, (u_int32_t __user *)arg))
1084 return -EFAULT;
1085 return 0;
1086 }
1087 case MATROXFB_GET_ALL_OUTPUTS:
1088 {
1089 u_int32_t conn = 0;
1090 int i;
1091
1092 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1093 if (minfo->outputs[i].output) {
1094 conn |= 1 << i;
1095 }
1096 }
1097 if (put_user(conn, (u_int32_t __user *)arg))
1098 return -EFAULT;
1099 return 0;
1100 }
1101 case VIDIOC_QUERYCAP:
1102 {
1103 struct v4l2_capability r;
1104
1105 memset(&r, 0, sizeof(r));
1106 strcpy(r.driver, "matroxfb");
1107 strcpy(r.card, "Matrox");
1108 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev));
1109 r.version = KERNEL_VERSION(1,0,0);
1110 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1111 if (copy_to_user(argp, &r, sizeof(r)))
1112 return -EFAULT;
1113 return 0;
1114
1115 }
1116 case VIDIOC_QUERYCTRL:
1117 {
1118 struct v4l2_queryctrl qctrl;
1119 int err;
1120
1121 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1122 return -EFAULT;
1123
1124 down_read(&minfo->altout.lock);
1125 if (!minfo->outputs[1].output) {
1126 err = -ENXIO;
1127 } else if (minfo->outputs[1].output->getqueryctrl) {
1128 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl);
1129 } else {
1130 err = -EINVAL;
1131 }
1132 up_read(&minfo->altout.lock);
1133 if (err >= 0 &&
1134 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1135 return -EFAULT;
1136 return err;
1137 }
1138 case VIDIOC_G_CTRL:
1139 {
1140 struct v4l2_control ctrl;
1141 int err;
1142
1143 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1144 return -EFAULT;
1145
1146 down_read(&minfo->altout.lock);
1147 if (!minfo->outputs[1].output) {
1148 err = -ENXIO;
1149 } else if (minfo->outputs[1].output->getctrl) {
1150 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl);
1151 } else {
1152 err = -EINVAL;
1153 }
1154 up_read(&minfo->altout.lock);
1155 if (err >= 0 &&
1156 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1157 return -EFAULT;
1158 return err;
1159 }
1160 case VIDIOC_S_CTRL_OLD:
1161 case VIDIOC_S_CTRL:
1162 {
1163 struct v4l2_control ctrl;
1164 int err;
1165
1166 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1167 return -EFAULT;
1168
1169 down_read(&minfo->altout.lock);
1170 if (!minfo->outputs[1].output) {
1171 err = -ENXIO;
1172 } else if (minfo->outputs[1].output->setctrl) {
1173 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl);
1174 } else {
1175 err = -EINVAL;
1176 }
1177 up_read(&minfo->altout.lock);
1178 return err;
1179 }
1180 }
1181 return -ENOTTY;
1182 }
1183
1184 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1185
1186 static int matroxfb_blank(int blank, struct fb_info *info)
1187 {
1188 int seq;
1189 int crtc;
1190 CRITFLAGS
1191 struct matrox_fb_info *minfo = info2minfo(info);
1192
1193 DBG(__func__)
1194
1195 if (minfo->dead)
1196 return 1;
1197
1198 switch (blank) {
1199 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1200 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1201 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1202 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1203 default: seq = 0x00; crtc = 0x00; break;
1204 }
1205
1206 CRITBEGIN
1207
1208 mga_outb(M_SEQ_INDEX, 1);
1209 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1210 mga_outb(M_EXTVGA_INDEX, 1);
1211 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1212
1213 CRITEND
1214 return 0;
1215 }
1216
1217 static struct fb_ops matroxfb_ops = {
1218 .owner = THIS_MODULE,
1219 .fb_open = matroxfb_open,
1220 .fb_release = matroxfb_release,
1221 .fb_check_var = matroxfb_check_var,
1222 .fb_set_par = matroxfb_set_par,
1223 .fb_setcolreg = matroxfb_setcolreg,
1224 .fb_pan_display =matroxfb_pan_display,
1225 .fb_blank = matroxfb_blank,
1226 .fb_ioctl = matroxfb_ioctl,
1227 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1228 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1229 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1230 /* .fb_cursor = <set by matrox_cfbX_init>, */
1231 };
1232
1233 #define RSDepth(X) (((X) >> 8) & 0x0F)
1234 #define RS8bpp 0x1
1235 #define RS15bpp 0x2
1236 #define RS16bpp 0x3
1237 #define RS32bpp 0x4
1238 #define RS4bpp 0x5
1239 #define RS24bpp 0x6
1240 #define RSText 0x7
1241 #define RSText8 0x8
1242 /* 9-F */
1243 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1244 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1245 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1246 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1247 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1248 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1249 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1250 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1251 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1252 };
1253
1254 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1255 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1256 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1257 static int inv24; /* "matrox:inv24" */
1258 static int cross4MB = -1; /* "matrox:cross4MB" */
1259 static int disabled; /* "matrox:disabled" */
1260 static int noaccel; /* "matrox:noaccel" */
1261 static int nopan; /* "matrox:nopan" */
1262 static int no_pci_retry; /* "matrox:nopciretry" */
1263 static int novga; /* "matrox:novga" */
1264 static int nobios; /* "matrox:nobios" */
1265 static int noinit = 1; /* "matrox:init" */
1266 static int inverse; /* "matrox:inverse" */
1267 static int sgram; /* "matrox:sgram" */
1268 #ifdef CONFIG_MTRR
1269 static int mtrr = 1; /* "matrox:nomtrr" */
1270 #endif
1271 static int grayscale; /* "matrox:grayscale" */
1272 static int dev = -1; /* "matrox:dev:xxxxx" */
1273 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1274 static int depth = -1; /* "matrox:depth:xxxxx" */
1275 static unsigned int xres; /* "matrox:xres:xxxxx" */
1276 static unsigned int yres; /* "matrox:yres:xxxxx" */
1277 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1278 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1279 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1280 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1281 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1282 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1283 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1284 static int sync = -1; /* "matrox:sync:xxxxx" */
1285 static unsigned int fv; /* "matrox:fv:xxxxx" */
1286 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1287 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1288 static int dfp; /* "matrox:dfp */
1289 static int dfp_type = -1; /* "matrox:dfp:xxx */
1290 static int memtype = -1; /* "matrox:memtype:xxx" */
1291 static char outputs[8]; /* "matrox:outputs:xxx" */
1292
1293 #ifndef MODULE
1294 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1295 #endif
1296
1297 static int matroxfb_getmemory(struct matrox_fb_info *minfo,
1298 unsigned int maxSize, unsigned int *realSize)
1299 {
1300 vaddr_t vm;
1301 unsigned int offs;
1302 unsigned int offs2;
1303 unsigned char orig;
1304 unsigned char bytes[32];
1305 unsigned char* tmp;
1306
1307 DBG(__func__)
1308
1309 vm = minfo->video.vbase;
1310 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1311 /* at least 2MB */
1312 if (maxSize < 0x0200000) return 0;
1313 if (maxSize > 0x2000000) maxSize = 0x2000000;
1314
1315 mga_outb(M_EXTVGA_INDEX, 0x03);
1316 orig = mga_inb(M_EXTVGA_DATA);
1317 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1318
1319 tmp = bytes;
1320 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1321 *tmp++ = mga_readb(vm, offs);
1322 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1323 mga_writeb(vm, offs, 0x02);
1324 mga_outb(M_CACHEFLUSH, 0x00);
1325 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1326 if (mga_readb(vm, offs) != 0x02)
1327 break;
1328 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1329 if (mga_readb(vm, offs))
1330 break;
1331 }
1332 tmp = bytes;
1333 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1334 mga_writeb(vm, offs2, *tmp++);
1335
1336 mga_outb(M_EXTVGA_INDEX, 0x03);
1337 mga_outb(M_EXTVGA_DATA, orig);
1338
1339 *realSize = offs - 0x100000;
1340 #ifdef CONFIG_FB_MATROX_MILLENIUM
1341 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF));
1342 #endif
1343 return 1;
1344 }
1345
1346 struct video_board {
1347 int maxvram;
1348 int maxdisplayable;
1349 int accelID;
1350 struct matrox_switch* lowlevel;
1351 };
1352 #ifdef CONFIG_FB_MATROX_MILLENIUM
1353 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1354 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1355 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1356 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1357 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1358 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1359 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1360 #ifdef CONFIG_FB_MATROX_G
1361 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1362 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1363 #ifdef CONFIG_FB_MATROX_32MB
1364 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1365 whole 32MB */
1366 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1367 #else
1368 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1369 #endif
1370 #endif
1371
1372 #define DEVF_VIDEO64BIT 0x0001
1373 #define DEVF_SWAPS 0x0002
1374 #define DEVF_SRCORG 0x0004
1375 #define DEVF_DUALHEAD 0x0008
1376 #define DEVF_CROSS4MB 0x0010
1377 #define DEVF_TEXT4B 0x0020
1378 /* #define DEVF_recycled 0x0040 */
1379 /* #define DEVF_recycled 0x0080 */
1380 #define DEVF_SUPPORT32MB 0x0100
1381 #define DEVF_ANY_VXRES 0x0200
1382 #define DEVF_TEXT16B 0x0400
1383 #define DEVF_CRTC2 0x0800
1384 #define DEVF_MAVEN_CAPABLE 0x1000
1385 #define DEVF_PANELLINK_CAPABLE 0x2000
1386 #define DEVF_G450DAC 0x4000
1387
1388 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1389 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1390 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1391 #define DEVF_G200 (DEVF_G2CORE)
1392 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1393 /* if you'll find how to drive DFP... */
1394 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1395 #define DEVF_G550 (DEVF_G450)
1396
1397 static struct board {
1398 unsigned short vendor, device, rev, svid, sid;
1399 unsigned int flags;
1400 unsigned int maxclk;
1401 enum mga_chip chip;
1402 struct video_board* base;
1403 const char* name;
1404 } dev_list[] = {
1405 #ifdef CONFIG_FB_MATROX_MILLENIUM
1406 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1407 0, 0,
1408 DEVF_TEXT4B,
1409 230000,
1410 MGA_2064,
1411 &vbMillennium,
1412 "Millennium (PCI)"},
1413 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1414 0, 0,
1415 DEVF_SWAPS,
1416 220000,
1417 MGA_2164,
1418 &vbMillennium2,
1419 "Millennium II (PCI)"},
1420 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1421 0, 0,
1422 DEVF_SWAPS,
1423 250000,
1424 MGA_2164,
1425 &vbMillennium2A,
1426 "Millennium II (AGP)"},
1427 #endif
1428 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1429 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1430 0, 0,
1431 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1432 180000,
1433 MGA_1064,
1434 &vbMystique,
1435 "Mystique (PCI)"},
1436 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1437 0, 0,
1438 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1439 220000,
1440 MGA_1164,
1441 &vbMystique,
1442 "Mystique 220 (PCI)"},
1443 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1444 0, 0,
1445 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1446 180000,
1447 MGA_1064,
1448 &vbMystique,
1449 "Mystique (AGP)"},
1450 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1451 0, 0,
1452 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1453 220000,
1454 MGA_1164,
1455 &vbMystique,
1456 "Mystique 220 (AGP)"},
1457 #endif
1458 #ifdef CONFIG_FB_MATROX_G
1459 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1460 0, 0,
1461 DEVF_G100,
1462 230000,
1463 MGA_G100,
1464 &vbG100,
1465 "MGA-G100 (PCI)"},
1466 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1467 0, 0,
1468 DEVF_G100,
1469 230000,
1470 MGA_G100,
1471 &vbG100,
1472 "MGA-G100 (AGP)"},
1473 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF,
1474 0, 0,
1475 DEVF_G200,
1476 230000,
1477 MGA_G200,
1478 &vbG200,
1479 "MGA-G200eV (PCI)"},
1480 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1481 0, 0,
1482 DEVF_G200,
1483 250000,
1484 MGA_G200,
1485 &vbG200,
1486 "MGA-G200 (PCI)"},
1487 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1488 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1489 DEVF_G200,
1490 220000,
1491 MGA_G200,
1492 &vbG200,
1493 "MGA-G200 (AGP)"},
1494 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1495 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1496 DEVF_G200,
1497 230000,
1498 MGA_G200,
1499 &vbG200,
1500 "Mystique G200 (AGP)"},
1501 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1502 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1503 DEVF_G200,
1504 250000,
1505 MGA_G200,
1506 &vbG200,
1507 "Millennium G200 (AGP)"},
1508 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1509 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1510 DEVF_G200,
1511 230000,
1512 MGA_G200,
1513 &vbG200,
1514 "Marvel G200 (AGP)"},
1515 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1516 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1517 DEVF_G200,
1518 230000,
1519 MGA_G200,
1520 &vbG200,
1521 "MGA-G200 (AGP)"},
1522 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1523 0, 0,
1524 DEVF_G200,
1525 230000,
1526 MGA_G200,
1527 &vbG200,
1528 "G200 (AGP)"},
1529 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1530 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1531 DEVF_G400,
1532 360000,
1533 MGA_G400,
1534 &vbG400,
1535 "Millennium G400 MAX (AGP)"},
1536 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1537 0, 0,
1538 DEVF_G400,
1539 300000,
1540 MGA_G400,
1541 &vbG400,
1542 "G400 (AGP)"},
1543 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1544 0, 0,
1545 DEVF_G450,
1546 360000,
1547 MGA_G450,
1548 &vbG400,
1549 "G450"},
1550 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1551 0, 0,
1552 DEVF_G550,
1553 360000,
1554 MGA_G550,
1555 &vbG400,
1556 "G550"},
1557 #endif
1558 {0, 0, 0xFF,
1559 0, 0,
1560 0,
1561 0,
1562 0,
1563 NULL,
1564 NULL}};
1565
1566 #ifndef MODULE
1567 static struct fb_videomode defaultmode = {
1568 /* 640x480 @ 60Hz, 31.5 kHz */
1569 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1570 0, FB_VMODE_NONINTERLACED
1571 };
1572 #endif /* !MODULE */
1573
1574 static int hotplug = 0;
1575
1576 static void setDefaultOutputs(struct matrox_fb_info *minfo)
1577 {
1578 unsigned int i;
1579 const char* ptr;
1580
1581 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1;
1582 if (minfo->devflags.g450dac) {
1583 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1;
1584 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1585 } else if (dfp) {
1586 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1;
1587 }
1588 ptr = outputs;
1589 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1590 char c = *ptr++;
1591
1592 if (c == 0) {
1593 break;
1594 }
1595 if (c == '0') {
1596 minfo->outputs[i].default_src = MATROXFB_SRC_NONE;
1597 } else if (c == '1') {
1598 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1;
1599 } else if (c == '2' && minfo->devflags.crtc2) {
1600 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2;
1601 } else {
1602 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1603 break;
1604 }
1605 }
1606 /* Nullify this option for subsequent adapters */
1607 outputs[0] = 0;
1608 }
1609
1610 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b)
1611 {
1612 unsigned long ctrlptr_phys = 0;
1613 unsigned long video_base_phys = 0;
1614 unsigned int memsize;
1615 int err;
1616
1617 static struct pci_device_id intel_82437[] = {
1618 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1619 { },
1620 };
1621
1622 DBG(__func__)
1623
1624 /* set default values... */
1625 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1626
1627 minfo->hw_switch = b->base->lowlevel;
1628 minfo->devflags.accelerator = b->base->accelID;
1629 minfo->max_pixel_clock = b->maxclk;
1630
1631 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1632 minfo->capable.plnwt = 1;
1633 minfo->chip = b->chip;
1634 minfo->capable.srcorg = b->flags & DEVF_SRCORG;
1635 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT;
1636 if (b->flags & DEVF_TEXT4B) {
1637 minfo->devflags.vgastep = 4;
1638 minfo->devflags.textmode = 4;
1639 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1640 } else if (b->flags & DEVF_TEXT16B) {
1641 minfo->devflags.vgastep = 16;
1642 minfo->devflags.textmode = 1;
1643 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16;
1644 } else {
1645 minfo->devflags.vgastep = 8;
1646 minfo->devflags.textmode = 1;
1647 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8;
1648 }
1649 #ifdef CONFIG_FB_MATROX_32MB
1650 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0;
1651 #endif
1652 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES);
1653 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0;
1654 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1655 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0;
1656 minfo->devflags.dfp_type = dfp_type;
1657 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0;
1658 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode;
1659 minfo->devflags.textvram = 65536 / minfo->devflags.textmode;
1660 setDefaultOutputs(minfo);
1661 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1662 minfo->outputs[2].data = minfo;
1663 minfo->outputs[2].output = &panellink_output;
1664 minfo->outputs[2].src = minfo->outputs[2].default_src;
1665 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR;
1666 minfo->devflags.panellink = 1;
1667 }
1668
1669 if (minfo->capable.cross4MB < 0)
1670 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB;
1671 if (b->flags & DEVF_SWAPS) {
1672 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1);
1673 video_base_phys = pci_resource_start(minfo->pcidev, 0);
1674 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0;
1675 } else {
1676 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0);
1677 video_base_phys = pci_resource_start(minfo->pcidev, 1);
1678 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1;
1679 }
1680 err = -EINVAL;
1681 if (!ctrlptr_phys) {
1682 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1683 goto fail;
1684 }
1685 if (!video_base_phys) {
1686 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1687 goto fail;
1688 }
1689 memsize = b->base->maxvram;
1690 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1691 goto fail;
1692 }
1693 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1694 goto failCtrlMR;
1695 }
1696 minfo->video.len_maximum = memsize;
1697 /* convert mem (autodetect k, M) */
1698 if (mem < 1024) mem *= 1024;
1699 if (mem < 0x00100000) mem *= 1024;
1700
1701 if (mem && (mem < memsize))
1702 memsize = mem;
1703 err = -ENOMEM;
1704 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &minfo->mmio.vbase)) {
1705 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1706 goto failVideoMR;
1707 }
1708 minfo->mmio.base = ctrlptr_phys;
1709 minfo->mmio.len = 16384;
1710 minfo->video.base = video_base_phys;
1711 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &minfo->video.vbase)) {
1712 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1713 video_base_phys, memsize);
1714 goto failCtrlIO;
1715 }
1716 {
1717 u_int32_t cmd;
1718 u_int32_t mga_option;
1719
1720 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option);
1721 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd);
1722 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1723 mga_option |= MX_OPTION_BSWAP;
1724 /* disable palette snooping */
1725 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1726 if (pci_dev_present(intel_82437)) {
1727 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) {
1728 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1729 }
1730 mga_option |= 0x20000000;
1731 minfo->devflags.nopciretry = 1;
1732 }
1733 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd);
1734 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option);
1735 minfo->hw.MXoptionReg = mga_option;
1736
1737 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1738 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1739 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00);
1740 }
1741
1742 err = -ENXIO;
1743 matroxfb_read_pins(minfo);
1744 if (minfo->hw_switch->preinit(minfo)) {
1745 goto failVideoIO;
1746 }
1747
1748 err = -ENOMEM;
1749 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) {
1750 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1751 goto failVideoIO;
1752 }
1753 minfo->devflags.ydstorg = 0;
1754
1755 minfo->video.base = video_base_phys;
1756 minfo->video.len_usable = minfo->video.len;
1757 if (minfo->video.len_usable > b->base->maxdisplayable)
1758 minfo->video.len_usable = b->base->maxdisplayable;
1759 #ifdef CONFIG_MTRR
1760 if (mtrr) {
1761 minfo->mtrr.vram = mtrr_add(video_base_phys, minfo->video.len, MTRR_TYPE_WRCOMB, 1);
1762 minfo->mtrr.vram_valid = 1;
1763 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1764 }
1765 #endif /* CONFIG_MTRR */
1766
1767 if (!minfo->devflags.novga)
1768 request_region(0x3C0, 32, "matrox");
1769 matroxfb_g450_connect(minfo);
1770 minfo->hw_switch->reset(minfo);
1771
1772 minfo->fbcon.monspecs.hfmin = 0;
1773 minfo->fbcon.monspecs.hfmax = fh;
1774 minfo->fbcon.monspecs.vfmin = 0;
1775 minfo->fbcon.monspecs.vfmax = fv;
1776 minfo->fbcon.monspecs.dpms = 0; /* TBD */
1777
1778 /* static settings */
1779 vesafb_defined.red = colors[depth-1].red;
1780 vesafb_defined.green = colors[depth-1].green;
1781 vesafb_defined.blue = colors[depth-1].blue;
1782 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1783 vesafb_defined.grayscale = grayscale;
1784 vesafb_defined.vmode = 0;
1785 if (noaccel)
1786 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1787
1788 minfo->fbops = matroxfb_ops;
1789 minfo->fbcon.fbops = &minfo->fbops;
1790 minfo->fbcon.pseudo_palette = minfo->cmap;
1791 /* after __init time we are like module... no logo */
1792 minfo->fbcon.flags = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1793 minfo->fbcon.flags |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1794 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1795 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1796 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1797 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1798 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1799 minfo->video.len_usable &= PAGE_MASK;
1800 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1);
1801
1802 #ifndef MODULE
1803 /* mode database is marked __init!!! */
1804 if (!hotplug) {
1805 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL,
1806 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1807 }
1808 #endif /* !MODULE */
1809
1810 /* mode modifiers */
1811 if (hslen)
1812 vesafb_defined.hsync_len = hslen;
1813 if (vslen)
1814 vesafb_defined.vsync_len = vslen;
1815 if (left != ~0)
1816 vesafb_defined.left_margin = left;
1817 if (right != ~0)
1818 vesafb_defined.right_margin = right;
1819 if (upper != ~0)
1820 vesafb_defined.upper_margin = upper;
1821 if (lower != ~0)
1822 vesafb_defined.lower_margin = lower;
1823 if (xres)
1824 vesafb_defined.xres = xres;
1825 if (yres)
1826 vesafb_defined.yres = yres;
1827 if (sync != -1)
1828 vesafb_defined.sync = sync;
1829 else if (vesafb_defined.sync == ~0) {
1830 vesafb_defined.sync = 0;
1831 if (yres < 400)
1832 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1833 else if (yres < 480)
1834 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1835 }
1836
1837 /* fv, fh, maxclk limits was specified */
1838 {
1839 unsigned int tmp;
1840
1841 if (fv) {
1842 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1843 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1844 if ((tmp < fh) || (fh == 0)) fh = tmp;
1845 }
1846 if (fh) {
1847 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1848 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1849 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1850 }
1851 tmp = (maxclk + 499) / 500;
1852 if (tmp) {
1853 tmp = (2000000000 + tmp) / tmp;
1854 if (tmp > pixclock) pixclock = tmp;
1855 }
1856 }
1857 if (pixclock) {
1858 if (pixclock < 2000) /* > 500MHz */
1859 pixclock = 4000; /* 250MHz */
1860 if (pixclock > 1000000)
1861 pixclock = 1000000; /* 1MHz */
1862 vesafb_defined.pixclock = pixclock;
1863 }
1864
1865 /* FIXME: Where to move this?! */
1866 #if defined(CONFIG_PPC_PMAC)
1867 #ifndef MODULE
1868 if (machine_is(powermac)) {
1869 struct fb_var_screeninfo var;
1870 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1871 default_vmode = VMODE_640_480_60;
1872 #ifdef CONFIG_NVRAM
1873 if (default_cmode == CMODE_NVRAM)
1874 default_cmode = nvram_read_byte(NV_CMODE);
1875 #endif
1876 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1877 default_cmode = CMODE_8;
1878 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1879 var.accel_flags = vesafb_defined.accel_flags;
1880 var.xoffset = var.yoffset = 0;
1881 /* Note: mac_vmode_to_var() does not set all parameters */
1882 vesafb_defined = var;
1883 }
1884 }
1885 #endif /* !MODULE */
1886 #endif /* CONFIG_PPC_PMAC */
1887 vesafb_defined.xres_virtual = vesafb_defined.xres;
1888 if (nopan) {
1889 vesafb_defined.yres_virtual = vesafb_defined.yres;
1890 } else {
1891 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1892 to yres_virtual * xres_virtual < 2^32 */
1893 }
1894 matroxfb_init_fix(minfo);
1895 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase);
1896 /* Normalize values (namely yres_virtual) */
1897 matroxfb_check_var(&vesafb_defined, &minfo->fbcon);
1898 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1899 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1900 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1901 * anyway. But we at least tried... */
1902 minfo->fbcon.var = vesafb_defined;
1903 err = -EINVAL;
1904
1905 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1906 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1907 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1908 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1909 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len);
1910
1911 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1912 * and we do not want currcon == 0 for subsequent framebuffers */
1913
1914 minfo->fbcon.device = &minfo->pcidev->dev;
1915 if (register_framebuffer(&minfo->fbcon) < 0) {
1916 goto failVideoIO;
1917 }
1918 printk("fb%d: %s frame buffer device\n",
1919 minfo->fbcon.node, minfo->fbcon.fix.id);
1920
1921 /* there is no console on this fb... but we have to initialize hardware
1922 * until someone tells me what is proper thing to do */
1923 if (!minfo->initialized) {
1924 printk(KERN_INFO "fb%d: initializing hardware\n",
1925 minfo->fbcon.node);
1926 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1927 * already before, so register_framebuffer works correctly. */
1928 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1929 fb_set_var(&minfo->fbcon, &vesafb_defined);
1930 }
1931
1932 return 0;
1933 failVideoIO:;
1934 matroxfb_g450_shutdown(minfo);
1935 mga_iounmap(minfo->video.vbase);
1936 failCtrlIO:;
1937 mga_iounmap(minfo->mmio.vbase);
1938 failVideoMR:;
1939 release_mem_region(video_base_phys, minfo->video.len_maximum);
1940 failCtrlMR:;
1941 release_mem_region(ctrlptr_phys, 16384);
1942 fail:;
1943 return err;
1944 }
1945
1946 static LIST_HEAD(matroxfb_list);
1947 static LIST_HEAD(matroxfb_driver_list);
1948
1949 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1950 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1951 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1952 struct matrox_fb_info* minfo;
1953
1954 list_add(&drv->node, &matroxfb_driver_list);
1955 for (minfo = matroxfb_l(matroxfb_list.next);
1956 minfo != matroxfb_l(&matroxfb_list);
1957 minfo = matroxfb_l(minfo->next_fb.next)) {
1958 void* p;
1959
1960 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1961 continue;
1962 p = drv->probe(minfo);
1963 if (p) {
1964 minfo->drivers_data[minfo->drivers_count] = p;
1965 minfo->drivers[minfo->drivers_count++] = drv;
1966 }
1967 }
1968 return 0;
1969 }
1970
1971 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1972 struct matrox_fb_info* minfo;
1973
1974 list_del(&drv->node);
1975 for (minfo = matroxfb_l(matroxfb_list.next);
1976 minfo != matroxfb_l(&matroxfb_list);
1977 minfo = matroxfb_l(minfo->next_fb.next)) {
1978 int i;
1979
1980 for (i = 0; i < minfo->drivers_count; ) {
1981 if (minfo->drivers[i] == drv) {
1982 if (drv && drv->remove)
1983 drv->remove(minfo, minfo->drivers_data[i]);
1984 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1985 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1986 } else
1987 i++;
1988 }
1989 }
1990 }
1991
1992 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1993 struct matroxfb_driver* drv;
1994 int i = 0;
1995 list_add(&minfo->next_fb, &matroxfb_list);
1996 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1997 drv != matroxfb_driver_l(&matroxfb_driver_list);
1998 drv = matroxfb_driver_l(drv->node.next)) {
1999 if (drv && drv->probe) {
2000 void *p = drv->probe(minfo);
2001 if (p) {
2002 minfo->drivers_data[i] = p;
2003 minfo->drivers[i++] = drv;
2004 if (i == MATROXFB_MAX_FB_DRIVERS)
2005 break;
2006 }
2007 }
2008 }
2009 minfo->drivers_count = i;
2010 }
2011
2012 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
2013 int i;
2014
2015 list_del(&minfo->next_fb);
2016 for (i = 0; i < minfo->drivers_count; i++) {
2017 struct matroxfb_driver* drv = minfo->drivers[i];
2018
2019 if (drv && drv->remove)
2020 drv->remove(minfo, minfo->drivers_data[i]);
2021 }
2022 }
2023
2024 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2025 struct board* b;
2026 u_int16_t svid;
2027 u_int16_t sid;
2028 struct matrox_fb_info* minfo;
2029 int err;
2030 u_int32_t cmd;
2031 DBG(__func__)
2032
2033 svid = pdev->subsystem_vendor;
2034 sid = pdev->subsystem_device;
2035 for (b = dev_list; b->vendor; b++) {
2036 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2037 if (b->svid)
2038 if ((b->svid != svid) || (b->sid != sid)) continue;
2039 break;
2040 }
2041 /* not match... */
2042 if (!b->vendor)
2043 return -ENODEV;
2044 if (dev > 0) {
2045 /* not requested one... */
2046 dev--;
2047 return -ENODEV;
2048 }
2049 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2050 if (pci_enable_device(pdev)) {
2051 return -1;
2052 }
2053
2054 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2055 if (!minfo)
2056 return -1;
2057 memset(minfo, 0, sizeof(*minfo));
2058
2059 minfo->pcidev = pdev;
2060 minfo->dead = 0;
2061 minfo->usecount = 0;
2062 minfo->userusecount = 0;
2063
2064 pci_set_drvdata(pdev, minfo);
2065 /* DEVFLAGS */
2066 minfo->devflags.memtype = memtype;
2067 if (memtype != -1)
2068 noinit = 0;
2069 if (cmd & PCI_COMMAND_MEMORY) {
2070 minfo->devflags.novga = novga;
2071 minfo->devflags.nobios = nobios;
2072 minfo->devflags.noinit = noinit;
2073 /* subsequent heads always needs initialization and must not enable BIOS */
2074 novga = 1;
2075 nobios = 1;
2076 noinit = 0;
2077 } else {
2078 minfo->devflags.novga = 1;
2079 minfo->devflags.nobios = 1;
2080 minfo->devflags.noinit = 0;
2081 }
2082
2083 minfo->devflags.nopciretry = no_pci_retry;
2084 minfo->devflags.mga_24bpp_fix = inv24;
2085 minfo->devflags.precise_width = option_precise_width;
2086 minfo->devflags.sgram = sgram;
2087 minfo->capable.cross4MB = cross4MB;
2088
2089 spin_lock_init(&minfo->lock.DAC);
2090 spin_lock_init(&minfo->lock.accel);
2091 init_rwsem(&minfo->crtc2.lock);
2092 init_rwsem(&minfo->altout.lock);
2093 mutex_init(&minfo->fbcon.mm_lock);
2094 minfo->irq_flags = 0;
2095 init_waitqueue_head(&minfo->crtc1.vsync.wait);
2096 init_waitqueue_head(&minfo->crtc2.vsync.wait);
2097 minfo->crtc1.panpos = -1;
2098
2099 err = initMatrox2(minfo, b);
2100 if (!err) {
2101 matroxfb_register_device(minfo);
2102 return 0;
2103 }
2104 kfree(minfo);
2105 return -1;
2106 }
2107
2108 static void pci_remove_matrox(struct pci_dev* pdev) {
2109 struct matrox_fb_info* minfo;
2110
2111 minfo = pci_get_drvdata(pdev);
2112 matroxfb_remove(minfo, 1);
2113 }
2114
2115 static struct pci_device_id matroxfb_devices[] = {
2116 #ifdef CONFIG_FB_MATROX_MILLENIUM
2117 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2119 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2121 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2122 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2123 #endif
2124 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2125 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2126 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2127 #endif
2128 #ifdef CONFIG_FB_MATROX_G
2129 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2130 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2131 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2132 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2133 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI,
2134 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2135 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2136 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2137 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2138 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2139 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2140 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2141 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2142 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2143 #endif
2144 {0, 0,
2145 0, 0, 0, 0, 0}
2146 };
2147
2148 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2149
2150
2151 static struct pci_driver matroxfb_driver = {
2152 .name = "matroxfb",
2153 .id_table = matroxfb_devices,
2154 .probe = matroxfb_probe,
2155 .remove = pci_remove_matrox,
2156 };
2157
2158 /* **************************** init-time only **************************** */
2159
2160 #define RSResolution(X) ((X) & 0x0F)
2161 #define RS640x400 1
2162 #define RS640x480 2
2163 #define RS800x600 3
2164 #define RS1024x768 4
2165 #define RS1280x1024 5
2166 #define RS1600x1200 6
2167 #define RS768x576 7
2168 #define RS960x720 8
2169 #define RS1152x864 9
2170 #define RS1408x1056 10
2171 #define RS640x350 11
2172 #define RS1056x344 12 /* 132 x 43 text */
2173 #define RS1056x400 13 /* 132 x 50 text */
2174 #define RS1056x480 14 /* 132 x 60 text */
2175 #define RSNoxNo 15
2176 /* 10-FF */
2177 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2178 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2179 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2180 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2181 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2182 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2183 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2184 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2185 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2186 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2187 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2188 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2189 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2190 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2191 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2192 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2193 };
2194
2195 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2196 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2197 /* default must be first */
2198 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2199 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2200 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2201 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2202 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2203 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2204 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2205 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2206 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2207 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2208 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2209 { 0x110, RSCreate(RS640x480, RS15bpp) },
2210 { 0x181, RSCreate(RS768x576, RS15bpp) },
2211 { 0x113, RSCreate(RS800x600, RS15bpp) },
2212 { 0x189, RSCreate(RS960x720, RS15bpp) },
2213 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2214 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2215 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2216 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2217 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2218 { 0x111, RSCreate(RS640x480, RS16bpp) },
2219 { 0x182, RSCreate(RS768x576, RS16bpp) },
2220 { 0x114, RSCreate(RS800x600, RS16bpp) },
2221 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2222 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2223 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2224 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2225 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2226 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2227 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2228 { 0x184, RSCreate(RS768x576, RS24bpp) },
2229 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2230 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2231 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2232 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2233 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2234 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2235 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2236 { 0x112, RSCreate(RS640x480, RS32bpp) },
2237 { 0x183, RSCreate(RS768x576, RS32bpp) },
2238 { 0x115, RSCreate(RS800x600, RS32bpp) },
2239 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2240 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2241 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2242 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2243 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2244 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2245 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2246 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2247 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2248 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2249 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2250 { 0, 0 }};
2251
2252 static void __init matroxfb_init_params(void) {
2253 /* fh from kHz to Hz */
2254 if (fh < 1000)
2255 fh *= 1000; /* 1kHz minimum */
2256 /* maxclk */
2257 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2258 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2259 /* fix VESA number */
2260 if (vesa != ~0)
2261 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2262
2263 /* static settings */
2264 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2265 if (RSptr->vesa == vesa) break;
2266 }
2267 if (!RSptr->vesa) {
2268 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2269 RSptr = vesamap;
2270 }
2271 {
2272 int res = RSResolution(RSptr->info)-1;
2273 if (left == ~0)
2274 left = timmings[res].left;
2275 if (!xres)
2276 xres = timmings[res].xres;
2277 if (right == ~0)
2278 right = timmings[res].right;
2279 if (!hslen)
2280 hslen = timmings[res].hslen;
2281 if (upper == ~0)
2282 upper = timmings[res].upper;
2283 if (!yres)
2284 yres = timmings[res].yres;
2285 if (lower == ~0)
2286 lower = timmings[res].lower;
2287 if (!vslen)
2288 vslen = timmings[res].vslen;
2289 if (!(fv||fh||maxclk||pixclock))
2290 fv = timmings[res].vfreq;
2291 if (depth == -1)
2292 depth = RSDepth(RSptr->info);
2293 }
2294 }
2295
2296 static int __init matrox_init(void) {
2297 int err;
2298
2299 matroxfb_init_params();
2300 err = pci_register_driver(&matroxfb_driver);
2301 dev = -1; /* accept all new devices... */
2302 return err;
2303 }
2304
2305 /* **************************** exit-time only **************************** */
2306
2307 static void __exit matrox_done(void) {
2308 pci_unregister_driver(&matroxfb_driver);
2309 }
2310
2311 #ifndef MODULE
2312
2313 /* ************************* init in-kernel code ************************** */
2314
2315 static int __init matroxfb_setup(char *options) {
2316 char *this_opt;
2317
2318 DBG(__func__)
2319
2320 if (!options || !*options)
2321 return 0;
2322
2323 while ((this_opt = strsep(&options, ",")) != NULL) {
2324 if (!*this_opt) continue;
2325
2326 dprintk("matroxfb_setup: option %s\n", this_opt);
2327
2328 if (!strncmp(this_opt, "dev:", 4))
2329 dev = simple_strtoul(this_opt+4, NULL, 0);
2330 else if (!strncmp(this_opt, "depth:", 6)) {
2331 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2332 case 0: depth = RSText; break;
2333 case 4: depth = RS4bpp; break;
2334 case 8: depth = RS8bpp; break;
2335 case 15:depth = RS15bpp; break;
2336 case 16:depth = RS16bpp; break;
2337 case 24:depth = RS24bpp; break;
2338 case 32:depth = RS32bpp; break;
2339 default:
2340 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2341 }
2342 } else if (!strncmp(this_opt, "xres:", 5))
2343 xres = simple_strtoul(this_opt+5, NULL, 0);
2344 else if (!strncmp(this_opt, "yres:", 5))
2345 yres = simple_strtoul(this_opt+5, NULL, 0);
2346 else if (!strncmp(this_opt, "vslen:", 6))
2347 vslen = simple_strtoul(this_opt+6, NULL, 0);
2348 else if (!strncmp(this_opt, "hslen:", 6))
2349 hslen = simple_strtoul(this_opt+6, NULL, 0);
2350 else if (!strncmp(this_opt, "left:", 5))
2351 left = simple_strtoul(this_opt+5, NULL, 0);
2352 else if (!strncmp(this_opt, "right:", 6))
2353 right = simple_strtoul(this_opt+6, NULL, 0);
2354 else if (!strncmp(this_opt, "upper:", 6))
2355 upper = simple_strtoul(this_opt+6, NULL, 0);
2356 else if (!strncmp(this_opt, "lower:", 6))
2357 lower = simple_strtoul(this_opt+6, NULL, 0);
2358 else if (!strncmp(this_opt, "pixclock:", 9))
2359 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2360 else if (!strncmp(this_opt, "sync:", 5))
2361 sync = simple_strtoul(this_opt+5, NULL, 0);
2362 else if (!strncmp(this_opt, "vesa:", 5))
2363 vesa = simple_strtoul(this_opt+5, NULL, 0);
2364 else if (!strncmp(this_opt, "maxclk:", 7))
2365 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2366 else if (!strncmp(this_opt, "fh:", 3))
2367 fh = simple_strtoul(this_opt+3, NULL, 0);
2368 else if (!strncmp(this_opt, "fv:", 3))
2369 fv = simple_strtoul(this_opt+3, NULL, 0);
2370 else if (!strncmp(this_opt, "mem:", 4))
2371 mem = simple_strtoul(this_opt+4, NULL, 0);
2372 else if (!strncmp(this_opt, "mode:", 5))
2373 strlcpy(videomode, this_opt+5, sizeof(videomode));
2374 else if (!strncmp(this_opt, "outputs:", 8))
2375 strlcpy(outputs, this_opt+8, sizeof(outputs));
2376 else if (!strncmp(this_opt, "dfp:", 4)) {
2377 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2378 dfp = 1;
2379 }
2380 #ifdef CONFIG_PPC_PMAC
2381 else if (!strncmp(this_opt, "vmode:", 6)) {
2382 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2383 if (vmode > 0 && vmode <= VMODE_MAX)
2384 default_vmode = vmode;
2385 } else if (!strncmp(this_opt, "cmode:", 6)) {
2386 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2387 switch (cmode) {
2388 case 0:
2389 case 8:
2390 default_cmode = CMODE_8;
2391 break;
2392 case 15:
2393 case 16:
2394 default_cmode = CMODE_16;
2395 break;
2396 case 24:
2397 case 32:
2398 default_cmode = CMODE_32;
2399 break;
2400 }
2401 }
2402 #endif
2403 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2404 disabled = 1;
2405 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2406 disabled = 0;
2407 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2408 sgram = 1;
2409 else if (!strcmp(this_opt, "sdram"))
2410 sgram = 0;
2411 else if (!strncmp(this_opt, "memtype:", 8))
2412 memtype = simple_strtoul(this_opt+8, NULL, 0);
2413 else {
2414 int value = 1;
2415
2416 if (!strncmp(this_opt, "no", 2)) {
2417 value = 0;
2418 this_opt += 2;
2419 }
2420 if (! strcmp(this_opt, "inverse"))
2421 inverse = value;
2422 else if (!strcmp(this_opt, "accel"))
2423 noaccel = !value;
2424 else if (!strcmp(this_opt, "pan"))
2425 nopan = !value;
2426 else if (!strcmp(this_opt, "pciretry"))
2427 no_pci_retry = !value;
2428 else if (!strcmp(this_opt, "vga"))
2429 novga = !value;
2430 else if (!strcmp(this_opt, "bios"))
2431 nobios = !value;
2432 else if (!strcmp(this_opt, "init"))
2433 noinit = !value;
2434 #ifdef CONFIG_MTRR
2435 else if (!strcmp(this_opt, "mtrr"))
2436 mtrr = value;
2437 #endif
2438 else if (!strcmp(this_opt, "inv24"))
2439 inv24 = value;
2440 else if (!strcmp(this_opt, "cross4MB"))
2441 cross4MB = value;
2442 else if (!strcmp(this_opt, "grayscale"))
2443 grayscale = value;
2444 else if (!strcmp(this_opt, "dfp"))
2445 dfp = value;
2446 else {
2447 strlcpy(videomode, this_opt, sizeof(videomode));
2448 }
2449 }
2450 }
2451 return 0;
2452 }
2453
2454 static int __initdata initialized = 0;
2455
2456 static int __init matroxfb_init(void)
2457 {
2458 char *option = NULL;
2459 int err = 0;
2460
2461 DBG(__func__)
2462
2463 if (fb_get_options("matroxfb", &option))
2464 return -ENODEV;
2465 matroxfb_setup(option);
2466
2467 if (disabled)
2468 return -ENXIO;
2469 if (!initialized) {
2470 initialized = 1;
2471 err = matrox_init();
2472 }
2473 hotplug = 1;
2474 /* never return failure, user can hotplug matrox later... */
2475 return err;
2476 }
2477
2478 module_init(matroxfb_init);
2479
2480 #else
2481
2482 /* *************************** init module code **************************** */
2483
2484 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2485 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2486 MODULE_LICENSE("GPL");
2487
2488 module_param(mem, int, 0);
2489 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2490 module_param(disabled, int, 0);
2491 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2492 module_param(noaccel, int, 0);
2493 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2494 module_param(nopan, int, 0);
2495 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2496 module_param(no_pci_retry, int, 0);
2497 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2498 module_param(novga, int, 0);
2499 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2500 module_param(nobios, int, 0);
2501 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2502 module_param(noinit, int, 0);
2503 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2504 module_param(memtype, int, 0);
2505 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2506 #ifdef CONFIG_MTRR
2507 module_param(mtrr, int, 0);
2508 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2509 #endif
2510 module_param(sgram, int, 0);
2511 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2512 module_param(inv24, int, 0);
2513 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2514 module_param(inverse, int, 0);
2515 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2516 module_param(dev, int, 0);
2517 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2518 module_param(vesa, int, 0);
2519 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2520 module_param(xres, int, 0);
2521 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2522 module_param(yres, int, 0);
2523 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2524 module_param(upper, int, 0);
2525 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2526 module_param(lower, int, 0);
2527 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2528 module_param(vslen, int, 0);
2529 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2530 module_param(left, int, 0);
2531 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2532 module_param(right, int, 0);
2533 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2534 module_param(hslen, int, 0);
2535 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2536 module_param(pixclock, int, 0);
2537 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2538 module_param(sync, int, 0);
2539 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2540 module_param(depth, int, 0);
2541 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2542 module_param(maxclk, int, 0);
2543 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2544 module_param(fh, int, 0);
2545 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2546 module_param(fv, int, 0);
2547 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2548 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2549 module_param(grayscale, int, 0);
2550 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2551 module_param(cross4MB, int, 0);
2552 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2553 module_param(dfp, int, 0);
2554 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2555 module_param(dfp_type, int, 0);
2556 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2557 module_param_string(outputs, outputs, sizeof(outputs), 0);
2558 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2559 #ifdef CONFIG_PPC_PMAC
2560 module_param_named(vmode, default_vmode, int, 0);
2561 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2562 module_param_named(cmode, default_cmode, int, 0);
2563 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2564 #endif
2565
2566 int __init init_module(void){
2567
2568 DBG(__func__)
2569
2570 if (disabled)
2571 return -ENXIO;
2572
2573 if (depth == 0)
2574 depth = RSText;
2575 else if (depth == 4)
2576 depth = RS4bpp;
2577 else if (depth == 8)
2578 depth = RS8bpp;
2579 else if (depth == 15)
2580 depth = RS15bpp;
2581 else if (depth == 16)
2582 depth = RS16bpp;
2583 else if (depth == 24)
2584 depth = RS24bpp;
2585 else if (depth == 32)
2586 depth = RS32bpp;
2587 else if (depth != -1) {
2588 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2589 depth = -1;
2590 }
2591 matrox_init();
2592 /* never return failure; user can hotplug matrox later... */
2593 return 0;
2594 }
2595 #endif /* MODULE */
2596
2597 module_exit(matrox_done);
2598 EXPORT_SYMBOL(matroxfb_register_driver);
2599 EXPORT_SYMBOL(matroxfb_unregister_driver);
2600 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2601 EXPORT_SYMBOL(matroxfb_enable_irq);
2602
2603 /*
2604 * Overrides for Emacs so that we follow Linus's tabbing style.
2605 * ---------------------------------------------------------------------------
2606 * Local variables:
2607 * c-basic-offset: 8
2608 * End:
2609 */
2610
Support for the Chinese Samsung S3C2440 based development boards