2 * Xilinx SystemACE device driver
4 * Copyright 2007 Secret Lab Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
13 * bitstream from a file on a CF card and squirting it into FPGAs connected
14 * to the SystemACE JTAG chain. It also has the advantage of providing an
15 * MPU interface which can be used to control the FPGA configuration process
16 * and to use the attached CF card for general purpose storage.
18 * This driver is a block device driver for the SystemACE.
21 * The driver registers itself as a platform_device driver at module
22 * load time. The platform bus will take care of calling the
23 * ace_probe() method for all SystemACE instances in the system. Any
24 * number of SystemACE instances are supported. ace_probe() calls
25 * ace_setup() which initialized all data structures, reads the CF
26 * id structure and registers the device.
29 * Just about all of the heavy lifting in this driver is performed by
30 * a Finite State Machine (FSM). The driver needs to wait on a number
31 * of events; some raised by interrupts, some which need to be polled
32 * for. Describing all of the behaviour in a FSM seems to be the
33 * easiest way to keep the complexity low and make it easy to
34 * understand what the driver is doing. If the block ops or the
35 * request function need to interact with the hardware, then they
36 * simply need to flag the request and kick of FSM processing.
38 * The FSM itself is atomic-safe code which can be run from any
39 * context. The general process flow is:
40 * 1. obtain the ace->lock spinlock.
41 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
43 * 3. release the lock.
45 * Individual states do not sleep in any way. If a condition needs to
46 * be waited for then the state much clear the fsm_continue flag and
47 * either schedule the FSM to be run again at a later time, or expect
48 * an interrupt to call the FSM when the desired condition is met.
50 * In normal operation, the FSM is processed at interrupt context
51 * either when the driver's tasklet is scheduled, or when an irq is
52 * raised by the hardware. The tasklet can be scheduled at any time.
53 * The request method in particular schedules the tasklet when a new
54 * request has been indicated by the block layer. Once started, the
55 * FSM proceeds as far as it can processing the request until it
56 * needs on a hardware event. At this point, it must yield execution.
58 * A state has two options when yielding execution:
60 * - Call if need to poll for event.
61 * - clears the fsm_continue flag to exit the processing loop
62 * - reschedules the tasklet to run again as soon as possible
63 * 2. ace_fsm_yieldirq()
64 * - Call if an irq is expected from the HW
65 * - clears the fsm_continue flag to exit the processing loop
66 * - does not reschedule the tasklet so the FSM will not be processed
67 * again until an irq is received.
68 * After calling a yield function, the state must return control back
69 * to the FSM main loop.
71 * Additionally, the driver maintains a kernel timer which can process
72 * the FSM. If the FSM gets stalled, typically due to a missed
73 * interrupt, then the kernel timer will expire and the driver can
74 * continue where it left off.
77 * - Add FPGA configuration control interface.
78 * - Request major number from lanana
83 #include <linux/module.h>
84 #include <linux/ctype.h>
85 #include <linux/init.h>
86 #include <linux/interrupt.h>
87 #include <linux/errno.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/slab.h>
91 #include <linux/blkdev.h>
92 #include <linux/hdreg.h>
93 #include <linux/platform_device.h>
94 #if defined(CONFIG_OF)
95 #include <linux/of_device.h>
96 #include <linux/of_platform.h>
99 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
100 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
101 MODULE_LICENSE("GPL");
103 /* SystemACE register definitions */
104 #define ACE_BUSMODE (0x00)
106 #define ACE_STATUS (0x04)
107 #define ACE_STATUS_CFGLOCK (0x00000001)
108 #define ACE_STATUS_MPULOCK (0x00000002)
109 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
110 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
111 #define ACE_STATUS_CFDETECT (0x00000010)
112 #define ACE_STATUS_DATABUFRDY (0x00000020)
113 #define ACE_STATUS_DATABUFMODE (0x00000040)
114 #define ACE_STATUS_CFGDONE (0x00000080)
115 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
116 #define ACE_STATUS_CFGMODEPIN (0x00000200)
117 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
118 #define ACE_STATUS_CFBSY (0x00020000)
119 #define ACE_STATUS_CFRDY (0x00040000)
120 #define ACE_STATUS_CFDWF (0x00080000)
121 #define ACE_STATUS_CFDSC (0x00100000)
122 #define ACE_STATUS_CFDRQ (0x00200000)
123 #define ACE_STATUS_CFCORR (0x00400000)
124 #define ACE_STATUS_CFERR (0x00800000)
126 #define ACE_ERROR (0x08)
127 #define ACE_CFGLBA (0x0c)
128 #define ACE_MPULBA (0x10)
130 #define ACE_SECCNTCMD (0x14)
131 #define ACE_SECCNTCMD_RESET (0x0100)
132 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
133 #define ACE_SECCNTCMD_READ_DATA (0x0300)
134 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
135 #define ACE_SECCNTCMD_ABORT (0x0600)
137 #define ACE_VERSION (0x16)
138 #define ACE_VERSION_REVISION_MASK (0x00FF)
139 #define ACE_VERSION_MINOR_MASK (0x0F00)
140 #define ACE_VERSION_MAJOR_MASK (0xF000)
142 #define ACE_CTRL (0x18)
143 #define ACE_CTRL_FORCELOCKREQ (0x0001)
144 #define ACE_CTRL_LOCKREQ (0x0002)
145 #define ACE_CTRL_FORCECFGADDR (0x0004)
146 #define ACE_CTRL_FORCECFGMODE (0x0008)
147 #define ACE_CTRL_CFGMODE (0x0010)
148 #define ACE_CTRL_CFGSTART (0x0020)
149 #define ACE_CTRL_CFGSEL (0x0040)
150 #define ACE_CTRL_CFGRESET (0x0080)
151 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
152 #define ACE_CTRL_ERRORIRQ (0x0200)
153 #define ACE_CTRL_CFGDONEIRQ (0x0400)
154 #define ACE_CTRL_RESETIRQ (0x0800)
155 #define ACE_CTRL_CFGPROG (0x1000)
156 #define ACE_CTRL_CFGADDR_MASK (0xe000)
158 #define ACE_FATSTAT (0x1c)
160 #define ACE_NUM_MINORS 16
161 #define ACE_SECTOR_SIZE (512)
162 #define ACE_FIFO_SIZE (32)
163 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
165 #define ACE_BUS_WIDTH_8 0
166 #define ACE_BUS_WIDTH_16 1
171 /* driver state data */
175 struct list_head list
;
177 /* finite state machine data */
178 struct tasklet_struct fsm_tasklet
;
179 uint fsm_task
; /* Current activity (ACE_TASK_*) */
180 uint fsm_state
; /* Current state (ACE_FSM_STATE_*) */
181 uint fsm_continue_flag
; /* cleared to exit FSM mainloop */
183 struct timer_list stall_timer
;
185 /* Transfer state/result, use for both id and block request */
186 struct request
*req
; /* request being processed */
187 void *data_ptr
; /* pointer to I/O buffer */
188 int data_count
; /* number of buffers remaining */
189 int data_result
; /* Result of transfer; 0 := success */
191 int id_req_count
; /* count of id requests */
193 struct completion id_completion
; /* used when id req finishes */
196 /* Details of hardware device */
197 unsigned long physaddr
;
198 void __iomem
*baseaddr
;
200 int bus_width
; /* 0 := 8 bit; 1 := 16 bit */
201 struct ace_reg_ops
*reg_ops
;
204 /* Block device data structures */
207 struct request_queue
*queue
;
210 /* Inserted CF card parameters */
211 struct hd_driveid cf_id
;
214 static int ace_major
;
216 /* ---------------------------------------------------------------------
217 * Low level register access
221 u16(*in
) (struct ace_device
* ace
, int reg
);
222 void (*out
) (struct ace_device
* ace
, int reg
, u16 val
);
223 void (*datain
) (struct ace_device
* ace
);
224 void (*dataout
) (struct ace_device
* ace
);
227 /* 8 Bit bus width */
228 static u16
ace_in_8(struct ace_device
*ace
, int reg
)
230 void __iomem
*r
= ace
->baseaddr
+ reg
;
231 return in_8(r
) | (in_8(r
+ 1) << 8);
234 static void ace_out_8(struct ace_device
*ace
, int reg
, u16 val
)
236 void __iomem
*r
= ace
->baseaddr
+ reg
;
238 out_8(r
+ 1, val
>> 8);
241 static void ace_datain_8(struct ace_device
*ace
)
243 void __iomem
*r
= ace
->baseaddr
+ 0x40;
244 u8
*dst
= ace
->data_ptr
;
245 int i
= ACE_FIFO_SIZE
;
251 static void ace_dataout_8(struct ace_device
*ace
)
253 void __iomem
*r
= ace
->baseaddr
+ 0x40;
254 u8
*src
= ace
->data_ptr
;
255 int i
= ACE_FIFO_SIZE
;
261 static struct ace_reg_ops ace_reg_8_ops
= {
264 .datain
= ace_datain_8
,
265 .dataout
= ace_dataout_8
,
268 /* 16 bit big endian bus attachment */
269 static u16
ace_in_be16(struct ace_device
*ace
, int reg
)
271 return in_be16(ace
->baseaddr
+ reg
);
274 static void ace_out_be16(struct ace_device
*ace
, int reg
, u16 val
)
276 out_be16(ace
->baseaddr
+ reg
, val
);
279 static void ace_datain_be16(struct ace_device
*ace
)
281 int i
= ACE_FIFO_SIZE
/ 2;
282 u16
*dst
= ace
->data_ptr
;
284 *dst
++ = in_le16(ace
->baseaddr
+ 0x40);
288 static void ace_dataout_be16(struct ace_device
*ace
)
290 int i
= ACE_FIFO_SIZE
/ 2;
291 u16
*src
= ace
->data_ptr
;
293 out_le16(ace
->baseaddr
+ 0x40, *src
++);
297 /* 16 bit little endian bus attachment */
298 static u16
ace_in_le16(struct ace_device
*ace
, int reg
)
300 return in_le16(ace
->baseaddr
+ reg
);
303 static void ace_out_le16(struct ace_device
*ace
, int reg
, u16 val
)
305 out_le16(ace
->baseaddr
+ reg
, val
);
308 static void ace_datain_le16(struct ace_device
*ace
)
310 int i
= ACE_FIFO_SIZE
/ 2;
311 u16
*dst
= ace
->data_ptr
;
313 *dst
++ = in_be16(ace
->baseaddr
+ 0x40);
317 static void ace_dataout_le16(struct ace_device
*ace
)
319 int i
= ACE_FIFO_SIZE
/ 2;
320 u16
*src
= ace
->data_ptr
;
322 out_be16(ace
->baseaddr
+ 0x40, *src
++);
326 static struct ace_reg_ops ace_reg_be16_ops
= {
329 .datain
= ace_datain_be16
,
330 .dataout
= ace_dataout_be16
,
333 static struct ace_reg_ops ace_reg_le16_ops
= {
336 .datain
= ace_datain_le16
,
337 .dataout
= ace_dataout_le16
,
340 static inline u16
ace_in(struct ace_device
*ace
, int reg
)
342 return ace
->reg_ops
->in(ace
, reg
);
345 static inline u32
ace_in32(struct ace_device
*ace
, int reg
)
347 return ace_in(ace
, reg
) | (ace_in(ace
, reg
+ 2) << 16);
350 static inline void ace_out(struct ace_device
*ace
, int reg
, u16 val
)
352 ace
->reg_ops
->out(ace
, reg
, val
);
355 static inline void ace_out32(struct ace_device
*ace
, int reg
, u32 val
)
357 ace_out(ace
, reg
, val
);
358 ace_out(ace
, reg
+ 2, val
>> 16);
361 /* ---------------------------------------------------------------------
362 * Debug support functions
366 static void ace_dump_mem(void *base
, int len
)
368 const char *ptr
= base
;
371 for (i
= 0; i
< len
; i
+= 16) {
372 printk(KERN_INFO
"%.8x:", i
);
373 for (j
= 0; j
< 16; j
++) {
376 printk("%.2x", ptr
[i
+ j
]);
379 for (j
= 0; j
< 16; j
++)
380 printk("%c", isprint(ptr
[i
+ j
]) ? ptr
[i
+ j
] : '.');
385 static inline void ace_dump_mem(void *base
, int len
)
390 static void ace_dump_regs(struct ace_device
*ace
)
392 dev_info(ace
->dev
, " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
393 KERN_INFO
" status:%.8x mpu_lba:%.8x busmode:%4x\n"
394 KERN_INFO
" error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
395 ace_in32(ace
, ACE_CTRL
),
396 ace_in(ace
, ACE_SECCNTCMD
),
397 ace_in(ace
, ACE_VERSION
),
398 ace_in32(ace
, ACE_STATUS
),
399 ace_in32(ace
, ACE_MPULBA
),
400 ace_in(ace
, ACE_BUSMODE
),
401 ace_in32(ace
, ACE_ERROR
),
402 ace_in32(ace
, ACE_CFGLBA
), ace_in(ace
, ACE_FATSTAT
));
405 void ace_fix_driveid(struct hd_driveid
*id
)
407 #if defined(__BIG_ENDIAN)
408 u16
*buf
= (void *)id
;
411 /* All half words have wrong byte order; swap the bytes */
412 for (i
= 0; i
< sizeof(struct hd_driveid
); i
+= 2, buf
++)
413 *buf
= le16_to_cpu(*buf
);
415 /* Some of the data values are 32bit; swap the half words */
416 id
->lba_capacity
= ((id
->lba_capacity
>> 16) & 0x0000FFFF) |
417 ((id
->lba_capacity
<< 16) & 0xFFFF0000);
418 id
->spg
= ((id
->spg
>> 16) & 0x0000FFFF) |
419 ((id
->spg
<< 16) & 0xFFFF0000);
423 /* ---------------------------------------------------------------------
424 * Finite State Machine (FSM) implementation
427 /* FSM tasks; used to direct state transitions */
428 #define ACE_TASK_IDLE 0
429 #define ACE_TASK_IDENTIFY 1
430 #define ACE_TASK_READ 2
431 #define ACE_TASK_WRITE 3
432 #define ACE_FSM_NUM_TASKS 4
434 /* FSM state definitions */
435 #define ACE_FSM_STATE_IDLE 0
436 #define ACE_FSM_STATE_REQ_LOCK 1
437 #define ACE_FSM_STATE_WAIT_LOCK 2
438 #define ACE_FSM_STATE_WAIT_CFREADY 3
439 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
440 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
441 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
442 #define ACE_FSM_STATE_REQ_PREPARE 7
443 #define ACE_FSM_STATE_REQ_TRANSFER 8
444 #define ACE_FSM_STATE_REQ_COMPLETE 9
445 #define ACE_FSM_STATE_ERROR 10
446 #define ACE_FSM_NUM_STATES 11
448 /* Set flag to exit FSM loop and reschedule tasklet */
449 static inline void ace_fsm_yield(struct ace_device
*ace
)
451 dev_dbg(ace
->dev
, "ace_fsm_yield()\n");
452 tasklet_schedule(&ace
->fsm_tasklet
);
453 ace
->fsm_continue_flag
= 0;
456 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
457 static inline void ace_fsm_yieldirq(struct ace_device
*ace
)
459 dev_dbg(ace
->dev
, "ace_fsm_yieldirq()\n");
461 if (ace
->irq
== NO_IRQ
)
462 /* No IRQ assigned, so need to poll */
463 tasklet_schedule(&ace
->fsm_tasklet
);
464 ace
->fsm_continue_flag
= 0;
467 /* Get the next read/write request; ending requests that we don't handle */
468 struct request
*ace_get_next_request(struct request_queue
* q
)
472 while ((req
= elv_next_request(q
)) != NULL
) {
473 if (blk_fs_request(req
))
480 static void ace_fsm_dostate(struct ace_device
*ace
)
488 dev_dbg(ace
->dev
, "fsm_state=%i, id_req_count=%i\n",
489 ace
->fsm_state
, ace
->id_req_count
);
492 switch (ace
->fsm_state
) {
493 case ACE_FSM_STATE_IDLE
:
494 /* See if there is anything to do */
495 if (ace
->id_req_count
|| ace_get_next_request(ace
->queue
)) {
497 ace
->fsm_state
= ACE_FSM_STATE_REQ_LOCK
;
498 mod_timer(&ace
->stall_timer
, jiffies
+ HZ
);
499 if (!timer_pending(&ace
->stall_timer
))
500 add_timer(&ace
->stall_timer
);
503 del_timer(&ace
->stall_timer
);
504 ace
->fsm_continue_flag
= 0;
507 case ACE_FSM_STATE_REQ_LOCK
:
508 if (ace_in(ace
, ACE_STATUS
) & ACE_STATUS_MPULOCK
) {
509 /* Already have the lock, jump to next state */
510 ace
->fsm_state
= ACE_FSM_STATE_WAIT_CFREADY
;
514 /* Request the lock */
515 val
= ace_in(ace
, ACE_CTRL
);
516 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_LOCKREQ
);
517 ace
->fsm_state
= ACE_FSM_STATE_WAIT_LOCK
;
520 case ACE_FSM_STATE_WAIT_LOCK
:
521 if (ace_in(ace
, ACE_STATUS
) & ACE_STATUS_MPULOCK
) {
522 /* got the lock; move to next state */
523 ace
->fsm_state
= ACE_FSM_STATE_WAIT_CFREADY
;
527 /* wait a bit for the lock */
531 case ACE_FSM_STATE_WAIT_CFREADY
:
532 status
= ace_in32(ace
, ACE_STATUS
);
533 if (!(status
& ACE_STATUS_RDYFORCFCMD
) ||
534 (status
& ACE_STATUS_CFBSY
)) {
535 /* CF card isn't ready; it needs to be polled */
540 /* Device is ready for command; determine what to do next */
541 if (ace
->id_req_count
)
542 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_PREPARE
;
544 ace
->fsm_state
= ACE_FSM_STATE_REQ_PREPARE
;
547 case ACE_FSM_STATE_IDENTIFY_PREPARE
:
548 /* Send identify command */
549 ace
->fsm_task
= ACE_TASK_IDENTIFY
;
550 ace
->data_ptr
= &ace
->cf_id
;
551 ace
->data_count
= ACE_BUF_PER_SECTOR
;
552 ace_out(ace
, ACE_SECCNTCMD
, ACE_SECCNTCMD_IDENTIFY
);
554 /* As per datasheet, put config controller in reset */
555 val
= ace_in(ace
, ACE_CTRL
);
556 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_CFGRESET
);
558 /* irq handler takes over from this point; wait for the
559 * transfer to complete */
560 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_TRANSFER
;
561 ace_fsm_yieldirq(ace
);
564 case ACE_FSM_STATE_IDENTIFY_TRANSFER
:
565 /* Check that the sysace is ready to receive data */
566 status
= ace_in32(ace
, ACE_STATUS
);
567 if (status
& ACE_STATUS_CFBSY
) {
568 dev_dbg(ace
->dev
, "CFBSY set; t=%i iter=%i dc=%i\n",
569 ace
->fsm_task
, ace
->fsm_iter_num
,
574 if (!(status
& ACE_STATUS_DATABUFRDY
)) {
579 /* Transfer the next buffer */
580 ace
->reg_ops
->datain(ace
);
583 /* If there are still buffers to be transfers; jump out here */
584 if (ace
->data_count
!= 0) {
585 ace_fsm_yieldirq(ace
);
589 /* transfer finished; kick state machine */
590 dev_dbg(ace
->dev
, "identify finished\n");
591 ace
->fsm_state
= ACE_FSM_STATE_IDENTIFY_COMPLETE
;
594 case ACE_FSM_STATE_IDENTIFY_COMPLETE
:
595 ace_fix_driveid(&ace
->cf_id
);
596 ace_dump_mem(&ace
->cf_id
, 512); /* Debug: Dump out disk ID */
598 if (ace
->data_result
) {
599 /* Error occured, disable the disk */
600 ace
->media_change
= 1;
601 set_capacity(ace
->gd
, 0);
602 dev_err(ace
->dev
, "error fetching CF id (%i)\n",
605 ace
->media_change
= 0;
607 /* Record disk parameters */
608 set_capacity(ace
->gd
, ace
->cf_id
.lba_capacity
);
609 dev_info(ace
->dev
, "capacity: %i sectors\n",
610 ace
->cf_id
.lba_capacity
);
613 /* We're done, drop to IDLE state and notify waiters */
614 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
615 ace
->id_result
= ace
->data_result
;
616 while (ace
->id_req_count
) {
617 complete(&ace
->id_completion
);
622 case ACE_FSM_STATE_REQ_PREPARE
:
623 req
= ace_get_next_request(ace
->queue
);
625 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
629 /* Okay, it's a data request, set it up for transfer */
631 "request: sec=%lx hcnt=%lx, ccnt=%x, dir=%i\n",
632 req
->sector
, req
->hard_nr_sectors
,
633 req
->current_nr_sectors
, rq_data_dir(req
));
636 ace
->data_ptr
= req
->buffer
;
637 ace
->data_count
= req
->current_nr_sectors
* ACE_BUF_PER_SECTOR
;
638 ace_out32(ace
, ACE_MPULBA
, req
->sector
& 0x0FFFFFFF);
640 count
= req
->hard_nr_sectors
;
641 if (rq_data_dir(req
)) {
642 /* Kick off write request */
643 dev_dbg(ace
->dev
, "write data\n");
644 ace
->fsm_task
= ACE_TASK_WRITE
;
645 ace_out(ace
, ACE_SECCNTCMD
,
646 count
| ACE_SECCNTCMD_WRITE_DATA
);
648 /* Kick off read request */
649 dev_dbg(ace
->dev
, "read data\n");
650 ace
->fsm_task
= ACE_TASK_READ
;
651 ace_out(ace
, ACE_SECCNTCMD
,
652 count
| ACE_SECCNTCMD_READ_DATA
);
655 /* As per datasheet, put config controller in reset */
656 val
= ace_in(ace
, ACE_CTRL
);
657 ace_out(ace
, ACE_CTRL
, val
| ACE_CTRL_CFGRESET
);
659 /* Move to the transfer state. The systemace will raise
660 * an interrupt once there is something to do
662 ace
->fsm_state
= ACE_FSM_STATE_REQ_TRANSFER
;
663 if (ace
->fsm_task
== ACE_TASK_READ
)
664 ace_fsm_yieldirq(ace
); /* wait for data ready */
667 case ACE_FSM_STATE_REQ_TRANSFER
:
668 /* Check that the sysace is ready to receive data */
669 status
= ace_in32(ace
, ACE_STATUS
);
670 if (status
& ACE_STATUS_CFBSY
) {
672 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
673 ace
->fsm_task
, ace
->fsm_iter_num
,
674 ace
->req
->current_nr_sectors
* 16,
675 ace
->data_count
, ace
->in_irq
);
676 ace_fsm_yield(ace
); /* need to poll CFBSY bit */
679 if (!(status
& ACE_STATUS_DATABUFRDY
)) {
681 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
682 ace
->fsm_task
, ace
->fsm_iter_num
,
683 ace
->req
->current_nr_sectors
* 16,
684 ace
->data_count
, ace
->in_irq
);
685 ace_fsm_yieldirq(ace
);
689 /* Transfer the next buffer */
690 if (ace
->fsm_task
== ACE_TASK_WRITE
)
691 ace
->reg_ops
->dataout(ace
);
693 ace
->reg_ops
->datain(ace
);
696 /* If there are still buffers to be transfers; jump out here */
697 if (ace
->data_count
!= 0) {
698 ace_fsm_yieldirq(ace
);
702 /* bio finished; is there another one? */
703 if (__blk_end_request(ace
->req
, 0,
704 blk_rq_cur_bytes(ace
->req
))) {
705 /* dev_dbg(ace->dev, "next block; h=%li c=%i\n",
706 * ace->req->hard_nr_sectors,
707 * ace->req->current_nr_sectors);
709 ace
->data_ptr
= ace
->req
->buffer
;
710 ace
->data_count
= ace
->req
->current_nr_sectors
* 16;
711 ace_fsm_yieldirq(ace
);
715 ace
->fsm_state
= ACE_FSM_STATE_REQ_COMPLETE
;
718 case ACE_FSM_STATE_REQ_COMPLETE
:
721 /* Finished request; go to idle state */
722 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
726 ace
->fsm_state
= ACE_FSM_STATE_IDLE
;
731 static void ace_fsm_tasklet(unsigned long data
)
733 struct ace_device
*ace
= (void *)data
;
736 spin_lock_irqsave(&ace
->lock
, flags
);
738 /* Loop over state machine until told to stop */
739 ace
->fsm_continue_flag
= 1;
740 while (ace
->fsm_continue_flag
)
741 ace_fsm_dostate(ace
);
743 spin_unlock_irqrestore(&ace
->lock
, flags
);
746 static void ace_stall_timer(unsigned long data
)
748 struct ace_device
*ace
= (void *)data
;
752 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
753 ace
->fsm_state
, ace
->fsm_task
, ace
->fsm_iter_num
,
755 spin_lock_irqsave(&ace
->lock
, flags
);
757 /* Rearm the stall timer *before* entering FSM (which may then
758 * delete the timer) */
759 mod_timer(&ace
->stall_timer
, jiffies
+ HZ
);
761 /* Loop over state machine until told to stop */
762 ace
->fsm_continue_flag
= 1;
763 while (ace
->fsm_continue_flag
)
764 ace_fsm_dostate(ace
);
766 spin_unlock_irqrestore(&ace
->lock
, flags
);
769 /* ---------------------------------------------------------------------
770 * Interrupt handling routines
772 static int ace_interrupt_checkstate(struct ace_device
*ace
)
774 u32 sreg
= ace_in32(ace
, ACE_STATUS
);
775 u16 creg
= ace_in(ace
, ACE_CTRL
);
777 /* Check for error occurance */
778 if ((sreg
& (ACE_STATUS_CFGERROR
| ACE_STATUS_CFCERROR
)) &&
779 (creg
& ACE_CTRL_ERRORIRQ
)) {
780 dev_err(ace
->dev
, "transfer failure\n");
788 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
791 struct ace_device
*ace
= dev_id
;
793 /* be safe and get the lock */
794 spin_lock(&ace
->lock
);
797 /* clear the interrupt */
798 creg
= ace_in(ace
, ACE_CTRL
);
799 ace_out(ace
, ACE_CTRL
, creg
| ACE_CTRL_RESETIRQ
);
800 ace_out(ace
, ACE_CTRL
, creg
);
802 /* check for IO failures */
803 if (ace_interrupt_checkstate(ace
))
804 ace
->data_result
= -EIO
;
806 if (ace
->fsm_task
== 0) {
808 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
809 ace_in32(ace
, ACE_STATUS
), ace_in32(ace
, ACE_CTRL
),
810 ace_in(ace
, ACE_SECCNTCMD
));
811 dev_err(ace
->dev
, "fsm_task=%i fsm_state=%i data_count=%i\n",
812 ace
->fsm_task
, ace
->fsm_state
, ace
->data_count
);
815 /* Loop over state machine until told to stop */
816 ace
->fsm_continue_flag
= 1;
817 while (ace
->fsm_continue_flag
)
818 ace_fsm_dostate(ace
);
820 /* done with interrupt; drop the lock */
822 spin_unlock(&ace
->lock
);
827 /* ---------------------------------------------------------------------
830 static void ace_request(struct request_queue
* q
)
833 struct ace_device
*ace
;
835 req
= ace_get_next_request(q
);
838 ace
= req
->rq_disk
->private_data
;
839 tasklet_schedule(&ace
->fsm_tasklet
);
843 static int ace_media_changed(struct gendisk
*gd
)
845 struct ace_device
*ace
= gd
->private_data
;
846 dev_dbg(ace
->dev
, "ace_media_changed(): %i\n", ace
->media_change
);
848 return ace
->media_change
;
851 static int ace_revalidate_disk(struct gendisk
*gd
)
853 struct ace_device
*ace
= gd
->private_data
;
856 dev_dbg(ace
->dev
, "ace_revalidate_disk()\n");
858 if (ace
->media_change
) {
859 dev_dbg(ace
->dev
, "requesting cf id and scheduling tasklet\n");
861 spin_lock_irqsave(&ace
->lock
, flags
);
863 spin_unlock_irqrestore(&ace
->lock
, flags
);
865 tasklet_schedule(&ace
->fsm_tasklet
);
866 wait_for_completion(&ace
->id_completion
);
869 dev_dbg(ace
->dev
, "revalidate complete\n");
870 return ace
->id_result
;
873 static int ace_open(struct inode
*inode
, struct file
*filp
)
875 struct ace_device
*ace
= inode
->i_bdev
->bd_disk
->private_data
;
878 dev_dbg(ace
->dev
, "ace_open() users=%i\n", ace
->users
+ 1);
880 filp
->private_data
= ace
;
881 spin_lock_irqsave(&ace
->lock
, flags
);
883 spin_unlock_irqrestore(&ace
->lock
, flags
);
885 check_disk_change(inode
->i_bdev
);
889 static int ace_release(struct inode
*inode
, struct file
*filp
)
891 struct ace_device
*ace
= inode
->i_bdev
->bd_disk
->private_data
;
895 dev_dbg(ace
->dev
, "ace_release() users=%i\n", ace
->users
- 1);
897 spin_lock_irqsave(&ace
->lock
, flags
);
899 if (ace
->users
== 0) {
900 val
= ace_in(ace
, ACE_CTRL
);
901 ace_out(ace
, ACE_CTRL
, val
& ~ACE_CTRL_LOCKREQ
);
903 spin_unlock_irqrestore(&ace
->lock
, flags
);
907 static int ace_getgeo(struct block_device
*bdev
, struct hd_geometry
*geo
)
909 struct ace_device
*ace
= bdev
->bd_disk
->private_data
;
911 dev_dbg(ace
->dev
, "ace_getgeo()\n");
913 geo
->heads
= ace
->cf_id
.heads
;
914 geo
->sectors
= ace
->cf_id
.sectors
;
915 geo
->cylinders
= ace
->cf_id
.cyls
;
920 static struct block_device_operations ace_fops
= {
921 .owner
= THIS_MODULE
,
923 .release
= ace_release
,
924 .media_changed
= ace_media_changed
,
925 .revalidate_disk
= ace_revalidate_disk
,
926 .getgeo
= ace_getgeo
,
929 /* --------------------------------------------------------------------
930 * SystemACE device setup/teardown code
932 static int __devinit
ace_setup(struct ace_device
*ace
)
938 dev_dbg(ace
->dev
, "ace_setup(ace=0x%p)\n", ace
);
939 dev_dbg(ace
->dev
, "physaddr=0x%lx irq=%i\n", ace
->physaddr
, ace
->irq
);
941 spin_lock_init(&ace
->lock
);
942 init_completion(&ace
->id_completion
);
947 ace
->baseaddr
= ioremap(ace
->physaddr
, 0x80);
952 * Initialize the state machine tasklet and stall timer
954 tasklet_init(&ace
->fsm_tasklet
, ace_fsm_tasklet
, (unsigned long)ace
);
955 setup_timer(&ace
->stall_timer
, ace_stall_timer
, (unsigned long)ace
);
958 * Initialize the request queue
960 ace
->queue
= blk_init_queue(ace_request
, &ace
->lock
);
961 if (ace
->queue
== NULL
)
963 blk_queue_hardsect_size(ace
->queue
, 512);
966 * Allocate and initialize GD structure
968 ace
->gd
= alloc_disk(ACE_NUM_MINORS
);
972 ace
->gd
->major
= ace_major
;
973 ace
->gd
->first_minor
= ace
->id
* ACE_NUM_MINORS
;
974 ace
->gd
->fops
= &ace_fops
;
975 ace
->gd
->queue
= ace
->queue
;
976 ace
->gd
->private_data
= ace
;
977 snprintf(ace
->gd
->disk_name
, 32, "xs%c", ace
->id
+ 'a');
980 if (ace
->bus_width
== ACE_BUS_WIDTH_16
) {
981 /* 0x0101 should work regardless of endianess */
982 ace_out_le16(ace
, ACE_BUSMODE
, 0x0101);
984 /* read it back to determine endianess */
985 if (ace_in_le16(ace
, ACE_BUSMODE
) == 0x0001)
986 ace
->reg_ops
= &ace_reg_le16_ops
;
988 ace
->reg_ops
= &ace_reg_be16_ops
;
990 ace_out_8(ace
, ACE_BUSMODE
, 0x00);
991 ace
->reg_ops
= &ace_reg_8_ops
;
994 /* Make sure version register is sane */
995 version
= ace_in(ace
, ACE_VERSION
);
996 if ((version
== 0) || (version
== 0xFFFF))
999 /* Put sysace in a sane state by clearing most control reg bits */
1000 ace_out(ace
, ACE_CTRL
, ACE_CTRL_FORCECFGMODE
|
1001 ACE_CTRL_DATABUFRDYIRQ
| ACE_CTRL_ERRORIRQ
);
1003 /* Now we can hook up the irq handler */
1004 if (ace
->irq
!= NO_IRQ
) {
1005 rc
= request_irq(ace
->irq
, ace_interrupt
, 0, "systemace", ace
);
1007 /* Failure - fall back to polled mode */
1008 dev_err(ace
->dev
, "request_irq failed\n");
1013 /* Enable interrupts */
1014 val
= ace_in(ace
, ACE_CTRL
);
1015 val
|= ACE_CTRL_DATABUFRDYIRQ
| ACE_CTRL_ERRORIRQ
;
1016 ace_out(ace
, ACE_CTRL
, val
);
1018 /* Print the identification */
1019 dev_info(ace
->dev
, "Xilinx SystemACE revision %i.%i.%i\n",
1020 (version
>> 12) & 0xf, (version
>> 8) & 0x0f, version
& 0xff);
1021 dev_dbg(ace
->dev
, "physaddr 0x%lx, mapped to 0x%p, irq=%i\n",
1022 ace
->physaddr
, ace
->baseaddr
, ace
->irq
);
1024 ace
->media_change
= 1;
1025 ace_revalidate_disk(ace
->gd
);
1027 /* Make the sysace device 'live' */
1035 blk_cleanup_queue(ace
->queue
);
1037 iounmap(ace
->baseaddr
);
1039 dev_info(ace
->dev
, "xsysace: error initializing device at 0x%lx\n",
1044 static void __devexit
ace_teardown(struct ace_device
*ace
)
1047 del_gendisk(ace
->gd
);
1052 blk_cleanup_queue(ace
->queue
);
1054 tasklet_kill(&ace
->fsm_tasklet
);
1056 if (ace
->irq
!= NO_IRQ
)
1057 free_irq(ace
->irq
, ace
);
1059 iounmap(ace
->baseaddr
);
1062 static int __devinit
1063 ace_alloc(struct device
*dev
, int id
, unsigned long physaddr
,
1064 int irq
, int bus_width
)
1066 struct ace_device
*ace
;
1068 dev_dbg(dev
, "ace_alloc(%p)\n", dev
);
1075 /* Allocate and initialize the ace device structure */
1076 ace
= kzalloc(sizeof(struct ace_device
), GFP_KERNEL
);
1084 ace
->physaddr
= physaddr
;
1086 ace
->bus_width
= bus_width
;
1088 /* Call the setup code */
1089 rc
= ace_setup(ace
);
1093 dev_set_drvdata(dev
, ace
);
1097 dev_set_drvdata(dev
, NULL
);
1101 dev_err(dev
, "could not initialize device, err=%i\n", rc
);
1105 static void __devexit
ace_free(struct device
*dev
)
1107 struct ace_device
*ace
= dev_get_drvdata(dev
);
1108 dev_dbg(dev
, "ace_free(%p)\n", dev
);
1112 dev_set_drvdata(dev
, NULL
);
1117 /* ---------------------------------------------------------------------
1118 * Platform Bus Support
1121 static int __devinit
ace_probe(struct platform_device
*dev
)
1123 unsigned long physaddr
= 0;
1124 int bus_width
= ACE_BUS_WIDTH_16
; /* FIXME: should not be hard coded */
1129 dev_dbg(&dev
->dev
, "ace_probe(%p)\n", dev
);
1131 for (i
= 0; i
< dev
->num_resources
; i
++) {
1132 if (dev
->resource
[i
].flags
& IORESOURCE_MEM
)
1133 physaddr
= dev
->resource
[i
].start
;
1134 if (dev
->resource
[i
].flags
& IORESOURCE_IRQ
)
1135 irq
= dev
->resource
[i
].start
;
1138 /* Call the bus-independant setup code */
1139 return ace_alloc(&dev
->dev
, id
, physaddr
, irq
, bus_width
);
1143 * Platform bus remove() method
1145 static int __devexit
ace_remove(struct platform_device
*dev
)
1147 ace_free(&dev
->dev
);
1151 static struct platform_driver ace_platform_driver
= {
1153 .remove
= __devexit_p(ace_remove
),
1155 .owner
= THIS_MODULE
,
1160 /* ---------------------------------------------------------------------
1161 * OF_Platform Bus Support
1164 #if defined(CONFIG_OF)
1165 static int __devinit
1166 ace_of_probe(struct of_device
*op
, const struct of_device_id
*match
)
1168 struct resource res
;
1169 unsigned long physaddr
;
1171 int irq
, bus_width
, rc
;
1173 dev_dbg(&op
->dev
, "ace_of_probe(%p, %p)\n", op
, match
);
1176 id
= of_get_property(op
->node
, "port-number", NULL
);
1179 rc
= of_address_to_resource(op
->node
, 0, &res
);
1181 dev_err(&op
->dev
, "invalid address\n");
1184 physaddr
= res
.start
;
1187 irq
= irq_of_parse_and_map(op
->node
, 0);
1190 bus_width
= ACE_BUS_WIDTH_16
;
1191 if (of_find_property(op
->node
, "8-bit", NULL
))
1192 bus_width
= ACE_BUS_WIDTH_8
;
1194 /* Call the bus-independant setup code */
1195 return ace_alloc(&op
->dev
, id
? *id
: 0, physaddr
, irq
, bus_width
);
1198 static int __devexit
ace_of_remove(struct of_device
*op
)
1204 /* Match table for of_platform binding */
1205 static struct of_device_id ace_of_match
[] __devinitdata
= {
1206 { .compatible
= "xlnx,opb-sysace-1.00.b", },
1207 { .compatible
= "xlnx,opb-sysace-1.00.c", },
1208 { .compatible
= "xlnx,xps-sysace-1.00.a", },
1211 MODULE_DEVICE_TABLE(of
, ace_of_match
);
1213 static struct of_platform_driver ace_of_driver
= {
1214 .owner
= THIS_MODULE
,
1216 .match_table
= ace_of_match
,
1217 .probe
= ace_of_probe
,
1218 .remove
= __devexit_p(ace_of_remove
),
1224 /* Registration helpers to keep the number of #ifdefs to a minimum */
1225 static inline int __init
ace_of_register(void)
1227 pr_debug("xsysace: registering OF binding\n");
1228 return of_register_platform_driver(&ace_of_driver
);
1231 static inline void __exit
ace_of_unregister(void)
1233 of_unregister_platform_driver(&ace_of_driver
);
1235 #else /* CONFIG_OF */
1236 /* CONFIG_OF not enabled; do nothing helpers */
1237 static inline int __init
ace_of_register(void) { return 0; }
1238 static inline void __exit
ace_of_unregister(void) { }
1239 #endif /* CONFIG_OF */
1241 /* ---------------------------------------------------------------------
1242 * Module init/exit routines
1244 static int __init
ace_init(void)
1248 ace_major
= register_blkdev(ace_major
, "xsysace");
1249 if (ace_major
<= 0) {
1254 rc
= ace_of_register();
1258 pr_debug("xsysace: registering platform binding\n");
1259 rc
= platform_driver_register(&ace_platform_driver
);
1263 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major
);
1267 ace_of_unregister();
1269 unregister_blkdev(ace_major
, "xsysace");
1271 printk(KERN_ERR
"xsysace: registration failed; err=%i\n", rc
);
1275 static void __exit
ace_exit(void)
1277 pr_debug("Unregistering Xilinx SystemACE driver\n");
1278 platform_driver_unregister(&ace_platform_driver
);
1279 ace_of_unregister();
1280 unregister_blkdev(ace_major
, "xsysace");
1283 module_init(ace_init
);
1284 module_exit(ace_exit
);