2 * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
3 * Copyright(c) 2006 - 2007 Chris Snook <csnook@redhat.com>
4 * Copyright(c) 2006 - 2008 Jay Cliburn <jcliburn@gmail.com>
6 * Derived from Intel e1000 driver
7 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc., 59
21 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 * The full GNU General Public License is included in this distribution in the
24 * file called COPYING.
26 * Contact Information:
27 * Xiong Huang <xiong.huang@atheros.com>
28 * Jie Yang <jie.yang@atheros.com>
29 * Chris Snook <csnook@redhat.com>
30 * Jay Cliburn <jcliburn@gmail.com>
32 * This version is adapted from the Attansic reference driver.
35 * Add more ethtool functions.
36 * Fix abstruse irq enable/disable condition described here:
37 * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
43 * interrupt coalescing
47 #include <asm/atomic.h>
48 #include <asm/byteorder.h>
50 #include <linux/compiler.h>
51 #include <linux/crc32.h>
52 #include <linux/delay.h>
53 #include <linux/dma-mapping.h>
54 #include <linux/etherdevice.h>
55 #include <linux/hardirq.h>
56 #include <linux/if_ether.h>
57 #include <linux/if_vlan.h>
59 #include <linux/interrupt.h>
61 #include <linux/irqflags.h>
62 #include <linux/irqreturn.h>
63 #include <linux/jiffies.h>
64 #include <linux/mii.h>
65 #include <linux/module.h>
66 #include <linux/moduleparam.h>
67 #include <linux/net.h>
68 #include <linux/netdevice.h>
69 #include <linux/pci.h>
70 #include <linux/pci_ids.h>
72 #include <linux/skbuff.h>
73 #include <linux/slab.h>
74 #include <linux/spinlock.h>
75 #include <linux/string.h>
76 #include <linux/tcp.h>
77 #include <linux/timer.h>
78 #include <linux/types.h>
79 #include <linux/workqueue.h>
81 #include <net/checksum.h>
85 /* Temporary hack for merging atl1 and atl2 */
89 * This is the only thing that needs to be changed to adjust the
90 * maximum number of ports that the driver can manage.
92 #define ATL1_MAX_NIC 4
94 #define OPTION_UNSET -1
95 #define OPTION_DISABLED 0
96 #define OPTION_ENABLED 1
98 #define ATL1_PARAM_INIT { [0 ... ATL1_MAX_NIC] = OPTION_UNSET }
101 * Interrupt Moderate Timer in units of 2 us
103 * Valid Range: 10-65535
105 * Default Value: 100 (200us)
107 static int __devinitdata int_mod_timer
[ATL1_MAX_NIC
+1] = ATL1_PARAM_INIT
;
108 static int num_int_mod_timer
;
109 module_param_array_named(int_mod_timer
, int_mod_timer
, int,
110 &num_int_mod_timer
, 0);
111 MODULE_PARM_DESC(int_mod_timer
, "Interrupt moderator timer");
113 #define DEFAULT_INT_MOD_CNT 100 /* 200us */
114 #define MAX_INT_MOD_CNT 65000
115 #define MIN_INT_MOD_CNT 50
118 enum { enable_option
, range_option
, list_option
} type
;
123 struct { /* range_option info */
127 struct { /* list_option info */
129 struct atl1_opt_list
{
137 static int __devinit
atl1_validate_option(int *value
, struct atl1_option
*opt
,
138 struct pci_dev
*pdev
)
140 if (*value
== OPTION_UNSET
) {
149 dev_info(&pdev
->dev
, "%s enabled\n", opt
->name
);
151 case OPTION_DISABLED
:
152 dev_info(&pdev
->dev
, "%s disabled\n", opt
->name
);
157 if (*value
>= opt
->arg
.r
.min
&& *value
<= opt
->arg
.r
.max
) {
158 dev_info(&pdev
->dev
, "%s set to %i\n", opt
->name
,
165 struct atl1_opt_list
*ent
;
167 for (i
= 0; i
< opt
->arg
.l
.nr
; i
++) {
168 ent
= &opt
->arg
.l
.p
[i
];
169 if (*value
== ent
->i
) {
170 if (ent
->str
[0] != '\0')
171 dev_info(&pdev
->dev
, "%s\n",
183 dev_info(&pdev
->dev
, "invalid %s specified (%i) %s\n",
184 opt
->name
, *value
, opt
->err
);
190 * atl1_check_options - Range Checking for Command Line Parameters
191 * @adapter: board private structure
193 * This routine checks all command line parameters for valid user
194 * input. If an invalid value is given, or if no user specified
195 * value exists, a default value is used. The final value is stored
196 * in a variable in the adapter structure.
198 static void __devinit
atl1_check_options(struct atl1_adapter
*adapter
)
200 struct pci_dev
*pdev
= adapter
->pdev
;
201 int bd
= adapter
->bd_number
;
202 if (bd
>= ATL1_MAX_NIC
) {
203 dev_notice(&pdev
->dev
, "no configuration for board#%i\n", bd
);
204 dev_notice(&pdev
->dev
, "using defaults for all values\n");
206 { /* Interrupt Moderate Timer */
207 struct atl1_option opt
= {
208 .type
= range_option
,
209 .name
= "Interrupt Moderator Timer",
210 .err
= "using default of "
211 __MODULE_STRING(DEFAULT_INT_MOD_CNT
),
212 .def
= DEFAULT_INT_MOD_CNT
,
213 .arg
= {.r
= {.min
= MIN_INT_MOD_CNT
,
214 .max
= MAX_INT_MOD_CNT
} }
217 if (num_int_mod_timer
> bd
) {
218 val
= int_mod_timer
[bd
];
219 atl1_validate_option(&val
, &opt
, pdev
);
220 adapter
->imt
= (u16
) val
;
222 adapter
->imt
= (u16
) (opt
.def
);
227 * atl1_pci_tbl - PCI Device ID Table
229 static const struct pci_device_id atl1_pci_tbl
[] = {
230 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC
, PCI_DEVICE_ID_ATTANSIC_L1
)},
231 /* required last entry */
234 MODULE_DEVICE_TABLE(pci
, atl1_pci_tbl
);
236 static const u32 atl1_default_msg
= NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
237 NETIF_MSG_LINK
| NETIF_MSG_TIMER
| NETIF_MSG_IFDOWN
| NETIF_MSG_IFUP
;
239 static int debug
= -1;
240 module_param(debug
, int, 0);
241 MODULE_PARM_DESC(debug
, "Message level (0=none,...,16=all)");
244 * Reset the transmit and receive units; mask and clear all interrupts.
245 * hw - Struct containing variables accessed by shared code
246 * return : 0 or idle status (if error)
248 static s32
atl1_reset_hw(struct atl1_hw
*hw
)
250 struct pci_dev
*pdev
= hw
->back
->pdev
;
251 struct atl1_adapter
*adapter
= hw
->back
;
256 * Clear Interrupt mask to stop board from generating
257 * interrupts & Clear any pending interrupt events
260 * iowrite32(0, hw->hw_addr + REG_IMR);
261 * iowrite32(0xffffffff, hw->hw_addr + REG_ISR);
265 * Issue Soft Reset to the MAC. This will reset the chip's
266 * transmit, receive, DMA. It will not effect
267 * the current PCI configuration. The global reset bit is self-
268 * clearing, and should clear within a microsecond.
270 iowrite32(MASTER_CTRL_SOFT_RST
, hw
->hw_addr
+ REG_MASTER_CTRL
);
271 ioread32(hw
->hw_addr
+ REG_MASTER_CTRL
);
273 iowrite16(1, hw
->hw_addr
+ REG_PHY_ENABLE
);
274 ioread16(hw
->hw_addr
+ REG_PHY_ENABLE
);
276 /* delay about 1ms */
279 /* Wait at least 10ms for All module to be Idle */
280 for (i
= 0; i
< 10; i
++) {
281 icr
= ioread32(hw
->hw_addr
+ REG_IDLE_STATUS
);
286 /* FIXME: still the right way to do this? */
291 if (netif_msg_hw(adapter
))
292 dev_dbg(&pdev
->dev
, "ICR = 0x%x\n", icr
);
299 /* function about EEPROM
302 * return 0 if eeprom exist
304 static int atl1_check_eeprom_exist(struct atl1_hw
*hw
)
307 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
308 if (value
& SPI_FLASH_CTRL_EN_VPD
) {
309 value
&= ~SPI_FLASH_CTRL_EN_VPD
;
310 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
313 value
= ioread16(hw
->hw_addr
+ REG_PCIE_CAP_LIST
);
314 return ((value
& 0xFF00) == 0x6C00) ? 0 : 1;
317 static bool atl1_read_eeprom(struct atl1_hw
*hw
, u32 offset
, u32
*p_value
)
323 /* address do not align */
326 iowrite32(0, hw
->hw_addr
+ REG_VPD_DATA
);
327 control
= (offset
& VPD_CAP_VPD_ADDR_MASK
) << VPD_CAP_VPD_ADDR_SHIFT
;
328 iowrite32(control
, hw
->hw_addr
+ REG_VPD_CAP
);
329 ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
331 for (i
= 0; i
< 10; i
++) {
333 control
= ioread32(hw
->hw_addr
+ REG_VPD_CAP
);
334 if (control
& VPD_CAP_VPD_FLAG
)
337 if (control
& VPD_CAP_VPD_FLAG
) {
338 *p_value
= ioread32(hw
->hw_addr
+ REG_VPD_DATA
);
346 * Reads the value from a PHY register
347 * hw - Struct containing variables accessed by shared code
348 * reg_addr - address of the PHY register to read
350 s32
atl1_read_phy_reg(struct atl1_hw
*hw
, u16 reg_addr
, u16
*phy_data
)
355 val
= ((u32
) (reg_addr
& MDIO_REG_ADDR_MASK
)) << MDIO_REG_ADDR_SHIFT
|
356 MDIO_START
| MDIO_SUP_PREAMBLE
| MDIO_RW
| MDIO_CLK_25_4
<<
358 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
359 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
361 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
363 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
364 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
367 if (!(val
& (MDIO_START
| MDIO_BUSY
))) {
368 *phy_data
= (u16
) val
;
374 #define CUSTOM_SPI_CS_SETUP 2
375 #define CUSTOM_SPI_CLK_HI 2
376 #define CUSTOM_SPI_CLK_LO 2
377 #define CUSTOM_SPI_CS_HOLD 2
378 #define CUSTOM_SPI_CS_HI 3
380 static bool atl1_spi_read(struct atl1_hw
*hw
, u32 addr
, u32
*buf
)
385 iowrite32(0, hw
->hw_addr
+ REG_SPI_DATA
);
386 iowrite32(addr
, hw
->hw_addr
+ REG_SPI_ADDR
);
388 value
= SPI_FLASH_CTRL_WAIT_READY
|
389 (CUSTOM_SPI_CS_SETUP
& SPI_FLASH_CTRL_CS_SETUP_MASK
) <<
390 SPI_FLASH_CTRL_CS_SETUP_SHIFT
| (CUSTOM_SPI_CLK_HI
&
391 SPI_FLASH_CTRL_CLK_HI_MASK
) <<
392 SPI_FLASH_CTRL_CLK_HI_SHIFT
| (CUSTOM_SPI_CLK_LO
&
393 SPI_FLASH_CTRL_CLK_LO_MASK
) <<
394 SPI_FLASH_CTRL_CLK_LO_SHIFT
| (CUSTOM_SPI_CS_HOLD
&
395 SPI_FLASH_CTRL_CS_HOLD_MASK
) <<
396 SPI_FLASH_CTRL_CS_HOLD_SHIFT
| (CUSTOM_SPI_CS_HI
&
397 SPI_FLASH_CTRL_CS_HI_MASK
) <<
398 SPI_FLASH_CTRL_CS_HI_SHIFT
| (1 & SPI_FLASH_CTRL_INS_MASK
) <<
399 SPI_FLASH_CTRL_INS_SHIFT
;
401 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
403 value
|= SPI_FLASH_CTRL_START
;
404 iowrite32(value
, hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
405 ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
407 for (i
= 0; i
< 10; i
++) {
409 value
= ioread32(hw
->hw_addr
+ REG_SPI_FLASH_CTRL
);
410 if (!(value
& SPI_FLASH_CTRL_START
))
414 if (value
& SPI_FLASH_CTRL_START
)
417 *buf
= ioread32(hw
->hw_addr
+ REG_SPI_DATA
);
423 * get_permanent_address
424 * return 0 if get valid mac address,
426 static int atl1_get_permanent_address(struct atl1_hw
*hw
)
431 u8 eth_addr
[ETH_ALEN
];
434 if (is_valid_ether_addr(hw
->perm_mac_addr
))
438 addr
[0] = addr
[1] = 0;
440 if (!atl1_check_eeprom_exist(hw
)) {
443 /* Read out all EEPROM content */
446 if (atl1_read_eeprom(hw
, i
+ 0x100, &control
)) {
448 if (reg
== REG_MAC_STA_ADDR
)
450 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
453 } else if ((control
& 0xff) == 0x5A) {
455 reg
= (u16
) (control
>> 16);
464 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
465 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
466 if (is_valid_ether_addr(eth_addr
)) {
467 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
472 /* see if SPI FLAGS exist ? */
473 addr
[0] = addr
[1] = 0;
478 if (atl1_spi_read(hw
, i
+ 0x1f000, &control
)) {
480 if (reg
== REG_MAC_STA_ADDR
)
482 else if (reg
== (REG_MAC_STA_ADDR
+ 4))
485 } else if ((control
& 0xff) == 0x5A) {
487 reg
= (u16
) (control
>> 16);
497 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
498 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
499 if (is_valid_ether_addr(eth_addr
)) {
500 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
505 * On some motherboards, the MAC address is written by the
506 * BIOS directly to the MAC register during POST, and is
507 * not stored in eeprom. If all else thus far has failed
508 * to fetch the permanent MAC address, try reading it directly.
510 addr
[0] = ioread32(hw
->hw_addr
+ REG_MAC_STA_ADDR
);
511 addr
[1] = ioread16(hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
512 *(u32
*) ð_addr
[2] = swab32(addr
[0]);
513 *(u16
*) ð_addr
[0] = swab16(*(u16
*) &addr
[1]);
514 if (is_valid_ether_addr(eth_addr
)) {
515 memcpy(hw
->perm_mac_addr
, eth_addr
, ETH_ALEN
);
523 * Reads the adapter's MAC address from the EEPROM
524 * hw - Struct containing variables accessed by shared code
526 static s32
atl1_read_mac_addr(struct atl1_hw
*hw
)
530 if (atl1_get_permanent_address(hw
))
531 random_ether_addr(hw
->perm_mac_addr
);
533 for (i
= 0; i
< ETH_ALEN
; i
++)
534 hw
->mac_addr
[i
] = hw
->perm_mac_addr
[i
];
539 * Hashes an address to determine its location in the multicast table
540 * hw - Struct containing variables accessed by shared code
541 * mc_addr - the multicast address to hash
545 * set hash value for a multicast address
546 * hash calcu processing :
547 * 1. calcu 32bit CRC for multicast address
548 * 2. reverse crc with MSB to LSB
550 u32
atl1_hash_mc_addr(struct atl1_hw
*hw
, u8
*mc_addr
)
552 u32 crc32
, value
= 0;
555 crc32
= ether_crc_le(6, mc_addr
);
556 for (i
= 0; i
< 32; i
++)
557 value
|= (((crc32
>> i
) & 1) << (31 - i
));
563 * Sets the bit in the multicast table corresponding to the hash value.
564 * hw - Struct containing variables accessed by shared code
565 * hash_value - Multicast address hash value
567 void atl1_hash_set(struct atl1_hw
*hw
, u32 hash_value
)
569 u32 hash_bit
, hash_reg
;
573 * The HASH Table is a register array of 2 32-bit registers.
574 * It is treated like an array of 64 bits. We want to set
575 * bit BitArray[hash_value]. So we figure out what register
576 * the bit is in, read it, OR in the new bit, then write
577 * back the new value. The register is determined by the
578 * upper 7 bits of the hash value and the bit within that
579 * register are determined by the lower 5 bits of the value.
581 hash_reg
= (hash_value
>> 31) & 0x1;
582 hash_bit
= (hash_value
>> 26) & 0x1F;
583 mta
= ioread32((hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
584 mta
|= (1 << hash_bit
);
585 iowrite32(mta
, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (hash_reg
<< 2));
589 * Writes a value to a PHY register
590 * hw - Struct containing variables accessed by shared code
591 * reg_addr - address of the PHY register to write
592 * data - data to write to the PHY
594 static s32
atl1_write_phy_reg(struct atl1_hw
*hw
, u32 reg_addr
, u16 phy_data
)
599 val
= ((u32
) (phy_data
& MDIO_DATA_MASK
)) << MDIO_DATA_SHIFT
|
600 (reg_addr
& MDIO_REG_ADDR_MASK
) << MDIO_REG_ADDR_SHIFT
|
602 MDIO_START
| MDIO_CLK_25_4
<< MDIO_CLK_SEL_SHIFT
;
603 iowrite32(val
, hw
->hw_addr
+ REG_MDIO_CTRL
);
604 ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
606 for (i
= 0; i
< MDIO_WAIT_TIMES
; i
++) {
608 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
609 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
613 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
620 * Make L001's PHY out of Power Saving State (bug)
621 * hw - Struct containing variables accessed by shared code
622 * when power on, L001's PHY always on Power saving State
623 * (Gigabit Link forbidden)
625 static s32
atl1_phy_leave_power_saving(struct atl1_hw
*hw
)
628 ret
= atl1_write_phy_reg(hw
, 29, 0x0029);
631 return atl1_write_phy_reg(hw
, 30, 0);
635 * Resets the PHY and make all config validate
636 * hw - Struct containing variables accessed by shared code
638 * Sets bit 15 and 12 of the MII Control regiser (for F001 bug)
640 static s32
atl1_phy_reset(struct atl1_hw
*hw
)
642 struct pci_dev
*pdev
= hw
->back
->pdev
;
643 struct atl1_adapter
*adapter
= hw
->back
;
647 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
648 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
649 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
651 switch (hw
->media_type
) {
652 case MEDIA_TYPE_100M_FULL
:
654 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
657 case MEDIA_TYPE_100M_HALF
:
658 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
660 case MEDIA_TYPE_10M_FULL
:
662 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
665 /* MEDIA_TYPE_10M_HALF: */
666 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
671 ret_val
= atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
675 /* pcie serdes link may be down! */
676 if (netif_msg_hw(adapter
))
677 dev_dbg(&pdev
->dev
, "pcie phy link down\n");
679 for (i
= 0; i
< 25; i
++) {
681 val
= ioread32(hw
->hw_addr
+ REG_MDIO_CTRL
);
682 if (!(val
& (MDIO_START
| MDIO_BUSY
)))
686 if ((val
& (MDIO_START
| MDIO_BUSY
)) != 0) {
687 if (netif_msg_hw(adapter
))
689 "pcie link down at least 25ms\n");
697 * Configures PHY autoneg and flow control advertisement settings
698 * hw - Struct containing variables accessed by shared code
700 static s32
atl1_phy_setup_autoneg_adv(struct atl1_hw
*hw
)
703 s16 mii_autoneg_adv_reg
;
704 s16 mii_1000t_ctrl_reg
;
706 /* Read the MII Auto-Neg Advertisement Register (Address 4). */
707 mii_autoneg_adv_reg
= MII_AR_DEFAULT_CAP_MASK
;
709 /* Read the MII 1000Base-T Control Register (Address 9). */
710 mii_1000t_ctrl_reg
= MII_ATLX_CR_1000T_DEFAULT_CAP_MASK
;
713 * First we clear all the 10/100 mb speed bits in the Auto-Neg
714 * Advertisement Register (Address 4) and the 1000 mb speed bits in
715 * the 1000Base-T Control Register (Address 9).
717 mii_autoneg_adv_reg
&= ~MII_AR_SPEED_MASK
;
718 mii_1000t_ctrl_reg
&= ~MII_ATLX_CR_1000T_SPEED_MASK
;
721 * Need to parse media_type and set up
722 * the appropriate PHY registers.
724 switch (hw
->media_type
) {
725 case MEDIA_TYPE_AUTO_SENSOR
:
726 mii_autoneg_adv_reg
|= (MII_AR_10T_HD_CAPS
|
728 MII_AR_100TX_HD_CAPS
|
729 MII_AR_100TX_FD_CAPS
);
730 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
733 case MEDIA_TYPE_1000M_FULL
:
734 mii_1000t_ctrl_reg
|= MII_ATLX_CR_1000T_FD_CAPS
;
737 case MEDIA_TYPE_100M_FULL
:
738 mii_autoneg_adv_reg
|= MII_AR_100TX_FD_CAPS
;
741 case MEDIA_TYPE_100M_HALF
:
742 mii_autoneg_adv_reg
|= MII_AR_100TX_HD_CAPS
;
745 case MEDIA_TYPE_10M_FULL
:
746 mii_autoneg_adv_reg
|= MII_AR_10T_FD_CAPS
;
750 mii_autoneg_adv_reg
|= MII_AR_10T_HD_CAPS
;
754 /* flow control fixed to enable all */
755 mii_autoneg_adv_reg
|= (MII_AR_ASM_DIR
| MII_AR_PAUSE
);
757 hw
->mii_autoneg_adv_reg
= mii_autoneg_adv_reg
;
758 hw
->mii_1000t_ctrl_reg
= mii_1000t_ctrl_reg
;
760 ret_val
= atl1_write_phy_reg(hw
, MII_ADVERTISE
, mii_autoneg_adv_reg
);
764 ret_val
= atl1_write_phy_reg(hw
, MII_ATLX_CR
, mii_1000t_ctrl_reg
);
772 * Configures link settings.
773 * hw - Struct containing variables accessed by shared code
774 * Assumes the hardware has previously been reset and the
775 * transmitter and receiver are not enabled.
777 static s32
atl1_setup_link(struct atl1_hw
*hw
)
779 struct pci_dev
*pdev
= hw
->back
->pdev
;
780 struct atl1_adapter
*adapter
= hw
->back
;
785 * PHY will advertise value(s) parsed from
786 * autoneg_advertised and fc
787 * no matter what autoneg is , We will not wait link result.
789 ret_val
= atl1_phy_setup_autoneg_adv(hw
);
791 if (netif_msg_link(adapter
))
793 "error setting up autonegotiation\n");
796 /* SW.Reset , En-Auto-Neg if needed */
797 ret_val
= atl1_phy_reset(hw
);
799 if (netif_msg_link(adapter
))
800 dev_dbg(&pdev
->dev
, "error resetting phy\n");
803 hw
->phy_configured
= true;
807 static void atl1_init_flash_opcode(struct atl1_hw
*hw
)
809 if (hw
->flash_vendor
>= ARRAY_SIZE(flash_table
))
811 hw
->flash_vendor
= 0;
814 iowrite8(flash_table
[hw
->flash_vendor
].cmd_program
,
815 hw
->hw_addr
+ REG_SPI_FLASH_OP_PROGRAM
);
816 iowrite8(flash_table
[hw
->flash_vendor
].cmd_sector_erase
,
817 hw
->hw_addr
+ REG_SPI_FLASH_OP_SC_ERASE
);
818 iowrite8(flash_table
[hw
->flash_vendor
].cmd_chip_erase
,
819 hw
->hw_addr
+ REG_SPI_FLASH_OP_CHIP_ERASE
);
820 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdid
,
821 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDID
);
822 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wren
,
823 hw
->hw_addr
+ REG_SPI_FLASH_OP_WREN
);
824 iowrite8(flash_table
[hw
->flash_vendor
].cmd_rdsr
,
825 hw
->hw_addr
+ REG_SPI_FLASH_OP_RDSR
);
826 iowrite8(flash_table
[hw
->flash_vendor
].cmd_wrsr
,
827 hw
->hw_addr
+ REG_SPI_FLASH_OP_WRSR
);
828 iowrite8(flash_table
[hw
->flash_vendor
].cmd_read
,
829 hw
->hw_addr
+ REG_SPI_FLASH_OP_READ
);
833 * Performs basic configuration of the adapter.
834 * hw - Struct containing variables accessed by shared code
835 * Assumes that the controller has previously been reset and is in a
836 * post-reset uninitialized state. Initializes multicast table,
837 * and Calls routines to setup link
838 * Leaves the transmit and receive units disabled and uninitialized.
840 static s32
atl1_init_hw(struct atl1_hw
*hw
)
844 /* Zero out the Multicast HASH table */
845 iowrite32(0, hw
->hw_addr
+ REG_RX_HASH_TABLE
);
846 /* clear the old settings from the multicast hash table */
847 iowrite32(0, (hw
->hw_addr
+ REG_RX_HASH_TABLE
) + (1 << 2));
849 atl1_init_flash_opcode(hw
);
851 if (!hw
->phy_configured
) {
852 /* enable GPHY LinkChange Interrrupt */
853 ret_val
= atl1_write_phy_reg(hw
, 18, 0xC00);
856 /* make PHY out of power-saving state */
857 ret_val
= atl1_phy_leave_power_saving(hw
);
860 /* Call a subroutine to configure the link */
861 ret_val
= atl1_setup_link(hw
);
867 * Detects the current speed and duplex settings of the hardware.
868 * hw - Struct containing variables accessed by shared code
869 * speed - Speed of the connection
870 * duplex - Duplex setting of the connection
872 static s32
atl1_get_speed_and_duplex(struct atl1_hw
*hw
, u16
*speed
, u16
*duplex
)
874 struct pci_dev
*pdev
= hw
->back
->pdev
;
875 struct atl1_adapter
*adapter
= hw
->back
;
879 /* ; --- Read PHY Specific Status Register (17) */
880 ret_val
= atl1_read_phy_reg(hw
, MII_ATLX_PSSR
, &phy_data
);
884 if (!(phy_data
& MII_ATLX_PSSR_SPD_DPLX_RESOLVED
))
885 return ATLX_ERR_PHY_RES
;
887 switch (phy_data
& MII_ATLX_PSSR_SPEED
) {
888 case MII_ATLX_PSSR_1000MBS
:
891 case MII_ATLX_PSSR_100MBS
:
894 case MII_ATLX_PSSR_10MBS
:
898 if (netif_msg_hw(adapter
))
899 dev_dbg(&pdev
->dev
, "error getting speed\n");
900 return ATLX_ERR_PHY_SPEED
;
903 if (phy_data
& MII_ATLX_PSSR_DPLX
)
904 *duplex
= FULL_DUPLEX
;
906 *duplex
= HALF_DUPLEX
;
911 void atl1_set_mac_addr(struct atl1_hw
*hw
)
916 * 0: 6AF600DC 1: 000B
919 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
920 (((u32
) hw
->mac_addr
[3]) << 16) |
921 (((u32
) hw
->mac_addr
[4]) << 8) | (((u32
) hw
->mac_addr
[5]));
922 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
924 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
925 iowrite32(value
, (hw
->hw_addr
+ REG_MAC_STA_ADDR
) + (1 << 2));
929 * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
930 * @adapter: board private structure to initialize
932 * atl1_sw_init initializes the Adapter private data structure.
933 * Fields are initialized based on PCI device information and
934 * OS network device settings (MTU size).
936 static int __devinit
atl1_sw_init(struct atl1_adapter
*adapter
)
938 struct atl1_hw
*hw
= &adapter
->hw
;
939 struct net_device
*netdev
= adapter
->netdev
;
941 hw
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
942 hw
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
945 adapter
->rx_buffer_len
= (hw
->max_frame_size
+ 7) & ~7;
946 adapter
->ict
= 50000; /* 100ms */
947 adapter
->link_speed
= SPEED_0
; /* hardware init */
948 adapter
->link_duplex
= FULL_DUPLEX
;
950 hw
->phy_configured
= false;
951 hw
->preamble_len
= 7;
961 hw
->rfd_fetch_gap
= 1;
962 hw
->rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
963 hw
->rx_jumbo_lkah
= 1;
964 hw
->rrd_ret_timer
= 16;
966 hw
->tpd_fetch_th
= 16;
967 hw
->txf_burst
= 0x100;
968 hw
->tx_jumbo_task_th
= (hw
->max_frame_size
+ 7) >> 3;
969 hw
->tpd_fetch_gap
= 1;
970 hw
->rcb_value
= atl1_rcb_64
;
971 hw
->dma_ord
= atl1_dma_ord_enh
;
972 hw
->dmar_block
= atl1_dma_req_256
;
973 hw
->dmaw_block
= atl1_dma_req_256
;
976 hw
->cmb_rx_timer
= 1; /* about 2us */
977 hw
->cmb_tx_timer
= 1; /* about 2us */
978 hw
->smb_timer
= 100000; /* about 200ms */
980 spin_lock_init(&adapter
->lock
);
981 spin_lock_init(&adapter
->mb_lock
);
986 static int mdio_read(struct net_device
*netdev
, int phy_id
, int reg_num
)
988 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
991 atl1_read_phy_reg(&adapter
->hw
, reg_num
& 0x1f, &result
);
996 static void mdio_write(struct net_device
*netdev
, int phy_id
, int reg_num
,
999 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1001 atl1_write_phy_reg(&adapter
->hw
, reg_num
, val
);
1010 static int atl1_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
1012 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
1013 unsigned long flags
;
1016 if (!netif_running(netdev
))
1019 spin_lock_irqsave(&adapter
->lock
, flags
);
1020 retval
= generic_mii_ioctl(&adapter
->mii
, if_mii(ifr
), cmd
, NULL
);
1021 spin_unlock_irqrestore(&adapter
->lock
, flags
);
1027 * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
1028 * @adapter: board private structure
1030 * Return 0 on success, negative on failure
1032 static s32
atl1_setup_ring_resources(struct atl1_adapter
*adapter
)
1034 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1035 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1036 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1037 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1038 struct pci_dev
*pdev
= adapter
->pdev
;
1042 size
= sizeof(struct atl1_buffer
) * (tpd_ring
->count
+ rfd_ring
->count
);
1043 tpd_ring
->buffer_info
= kzalloc(size
, GFP_KERNEL
);
1044 if (unlikely(!tpd_ring
->buffer_info
)) {
1045 if (netif_msg_drv(adapter
))
1046 dev_err(&pdev
->dev
, "kzalloc failed , size = D%d\n",
1050 rfd_ring
->buffer_info
=
1051 (struct atl1_buffer
*)(tpd_ring
->buffer_info
+ tpd_ring
->count
);
1054 * real ring DMA buffer
1055 * each ring/block may need up to 8 bytes for alignment, hence the
1056 * additional 40 bytes tacked onto the end.
1058 ring_header
->size
= size
=
1059 sizeof(struct tx_packet_desc
) * tpd_ring
->count
1060 + sizeof(struct rx_free_desc
) * rfd_ring
->count
1061 + sizeof(struct rx_return_desc
) * rrd_ring
->count
1062 + sizeof(struct coals_msg_block
)
1063 + sizeof(struct stats_msg_block
)
1066 ring_header
->desc
= pci_alloc_consistent(pdev
, ring_header
->size
,
1068 if (unlikely(!ring_header
->desc
)) {
1069 if (netif_msg_drv(adapter
))
1070 dev_err(&pdev
->dev
, "pci_alloc_consistent failed\n");
1074 memset(ring_header
->desc
, 0, ring_header
->size
);
1077 tpd_ring
->dma
= ring_header
->dma
;
1078 offset
= (tpd_ring
->dma
& 0x7) ? (8 - (ring_header
->dma
& 0x7)) : 0;
1079 tpd_ring
->dma
+= offset
;
1080 tpd_ring
->desc
= (u8
*) ring_header
->desc
+ offset
;
1081 tpd_ring
->size
= sizeof(struct tx_packet_desc
) * tpd_ring
->count
;
1084 rfd_ring
->dma
= tpd_ring
->dma
+ tpd_ring
->size
;
1085 offset
= (rfd_ring
->dma
& 0x7) ? (8 - (rfd_ring
->dma
& 0x7)) : 0;
1086 rfd_ring
->dma
+= offset
;
1087 rfd_ring
->desc
= (u8
*) tpd_ring
->desc
+ (tpd_ring
->size
+ offset
);
1088 rfd_ring
->size
= sizeof(struct rx_free_desc
) * rfd_ring
->count
;
1092 rrd_ring
->dma
= rfd_ring
->dma
+ rfd_ring
->size
;
1093 offset
= (rrd_ring
->dma
& 0x7) ? (8 - (rrd_ring
->dma
& 0x7)) : 0;
1094 rrd_ring
->dma
+= offset
;
1095 rrd_ring
->desc
= (u8
*) rfd_ring
->desc
+ (rfd_ring
->size
+ offset
);
1096 rrd_ring
->size
= sizeof(struct rx_return_desc
) * rrd_ring
->count
;
1100 adapter
->cmb
.dma
= rrd_ring
->dma
+ rrd_ring
->size
;
1101 offset
= (adapter
->cmb
.dma
& 0x7) ? (8 - (adapter
->cmb
.dma
& 0x7)) : 0;
1102 adapter
->cmb
.dma
+= offset
;
1103 adapter
->cmb
.cmb
= (struct coals_msg_block
*)
1104 ((u8
*) rrd_ring
->desc
+ (rrd_ring
->size
+ offset
));
1107 adapter
->smb
.dma
= adapter
->cmb
.dma
+ sizeof(struct coals_msg_block
);
1108 offset
= (adapter
->smb
.dma
& 0x7) ? (8 - (adapter
->smb
.dma
& 0x7)) : 0;
1109 adapter
->smb
.dma
+= offset
;
1110 adapter
->smb
.smb
= (struct stats_msg_block
*)
1111 ((u8
*) adapter
->cmb
.cmb
+
1112 (sizeof(struct coals_msg_block
) + offset
));
1117 kfree(tpd_ring
->buffer_info
);
1121 static void atl1_init_ring_ptrs(struct atl1_adapter
*adapter
)
1123 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1124 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1125 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1127 atomic_set(&tpd_ring
->next_to_use
, 0);
1128 atomic_set(&tpd_ring
->next_to_clean
, 0);
1130 rfd_ring
->next_to_clean
= 0;
1131 atomic_set(&rfd_ring
->next_to_use
, 0);
1133 rrd_ring
->next_to_use
= 0;
1134 atomic_set(&rrd_ring
->next_to_clean
, 0);
1138 * atl1_clean_rx_ring - Free RFD Buffers
1139 * @adapter: board private structure
1141 static void atl1_clean_rx_ring(struct atl1_adapter
*adapter
)
1143 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1144 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1145 struct atl1_buffer
*buffer_info
;
1146 struct pci_dev
*pdev
= adapter
->pdev
;
1150 /* Free all the Rx ring sk_buffs */
1151 for (i
= 0; i
< rfd_ring
->count
; i
++) {
1152 buffer_info
= &rfd_ring
->buffer_info
[i
];
1153 if (buffer_info
->dma
) {
1154 pci_unmap_page(pdev
, buffer_info
->dma
,
1155 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
1156 buffer_info
->dma
= 0;
1158 if (buffer_info
->skb
) {
1159 dev_kfree_skb(buffer_info
->skb
);
1160 buffer_info
->skb
= NULL
;
1164 size
= sizeof(struct atl1_buffer
) * rfd_ring
->count
;
1165 memset(rfd_ring
->buffer_info
, 0, size
);
1167 /* Zero out the descriptor ring */
1168 memset(rfd_ring
->desc
, 0, rfd_ring
->size
);
1170 rfd_ring
->next_to_clean
= 0;
1171 atomic_set(&rfd_ring
->next_to_use
, 0);
1173 rrd_ring
->next_to_use
= 0;
1174 atomic_set(&rrd_ring
->next_to_clean
, 0);
1178 * atl1_clean_tx_ring - Free Tx Buffers
1179 * @adapter: board private structure
1181 static void atl1_clean_tx_ring(struct atl1_adapter
*adapter
)
1183 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1184 struct atl1_buffer
*buffer_info
;
1185 struct pci_dev
*pdev
= adapter
->pdev
;
1189 /* Free all the Tx ring sk_buffs */
1190 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1191 buffer_info
= &tpd_ring
->buffer_info
[i
];
1192 if (buffer_info
->dma
) {
1193 pci_unmap_page(pdev
, buffer_info
->dma
,
1194 buffer_info
->length
, PCI_DMA_TODEVICE
);
1195 buffer_info
->dma
= 0;
1199 for (i
= 0; i
< tpd_ring
->count
; i
++) {
1200 buffer_info
= &tpd_ring
->buffer_info
[i
];
1201 if (buffer_info
->skb
) {
1202 dev_kfree_skb_any(buffer_info
->skb
);
1203 buffer_info
->skb
= NULL
;
1207 size
= sizeof(struct atl1_buffer
) * tpd_ring
->count
;
1208 memset(tpd_ring
->buffer_info
, 0, size
);
1210 /* Zero out the descriptor ring */
1211 memset(tpd_ring
->desc
, 0, tpd_ring
->size
);
1213 atomic_set(&tpd_ring
->next_to_use
, 0);
1214 atomic_set(&tpd_ring
->next_to_clean
, 0);
1218 * atl1_free_ring_resources - Free Tx / RX descriptor Resources
1219 * @adapter: board private structure
1221 * Free all transmit software resources
1223 static void atl1_free_ring_resources(struct atl1_adapter
*adapter
)
1225 struct pci_dev
*pdev
= adapter
->pdev
;
1226 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
1227 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1228 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1229 struct atl1_ring_header
*ring_header
= &adapter
->ring_header
;
1231 atl1_clean_tx_ring(adapter
);
1232 atl1_clean_rx_ring(adapter
);
1234 kfree(tpd_ring
->buffer_info
);
1235 pci_free_consistent(pdev
, ring_header
->size
, ring_header
->desc
,
1238 tpd_ring
->buffer_info
= NULL
;
1239 tpd_ring
->desc
= NULL
;
1242 rfd_ring
->buffer_info
= NULL
;
1243 rfd_ring
->desc
= NULL
;
1246 rrd_ring
->desc
= NULL
;
1250 static void atl1_setup_mac_ctrl(struct atl1_adapter
*adapter
)
1253 struct atl1_hw
*hw
= &adapter
->hw
;
1254 struct net_device
*netdev
= adapter
->netdev
;
1255 /* Config MAC CTRL Register */
1256 value
= MAC_CTRL_TX_EN
| MAC_CTRL_RX_EN
;
1258 if (FULL_DUPLEX
== adapter
->link_duplex
)
1259 value
|= MAC_CTRL_DUPLX
;
1261 value
|= ((u32
) ((SPEED_1000
== adapter
->link_speed
) ?
1262 MAC_CTRL_SPEED_1000
: MAC_CTRL_SPEED_10_100
) <<
1263 MAC_CTRL_SPEED_SHIFT
);
1265 value
|= (MAC_CTRL_TX_FLOW
| MAC_CTRL_RX_FLOW
);
1267 value
|= (MAC_CTRL_ADD_CRC
| MAC_CTRL_PAD
);
1268 /* preamble length */
1269 value
|= (((u32
) adapter
->hw
.preamble_len
1270 & MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
1273 value
|= MAC_CTRL_RMV_VLAN
;
1275 if (adapter->rx_csum)
1276 value |= MAC_CTRL_RX_CHKSUM_EN;
1279 value
|= MAC_CTRL_BC_EN
;
1280 if (netdev
->flags
& IFF_PROMISC
)
1281 value
|= MAC_CTRL_PROMIS_EN
;
1282 else if (netdev
->flags
& IFF_ALLMULTI
)
1283 value
|= MAC_CTRL_MC_ALL_EN
;
1284 /* value |= MAC_CTRL_LOOPBACK; */
1285 iowrite32(value
, hw
->hw_addr
+ REG_MAC_CTRL
);
1288 static u32
atl1_check_link(struct atl1_adapter
*adapter
)
1290 struct atl1_hw
*hw
= &adapter
->hw
;
1291 struct net_device
*netdev
= adapter
->netdev
;
1293 u16 speed
, duplex
, phy_data
;
1296 /* MII_BMSR must read twice */
1297 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1298 atl1_read_phy_reg(hw
, MII_BMSR
, &phy_data
);
1299 if (!(phy_data
& BMSR_LSTATUS
)) {
1301 if (netif_carrier_ok(netdev
)) {
1302 /* old link state: Up */
1303 if (netif_msg_link(adapter
))
1304 dev_info(&adapter
->pdev
->dev
, "link is down\n");
1305 adapter
->link_speed
= SPEED_0
;
1306 netif_carrier_off(netdev
);
1312 ret_val
= atl1_get_speed_and_duplex(hw
, &speed
, &duplex
);
1316 switch (hw
->media_type
) {
1317 case MEDIA_TYPE_1000M_FULL
:
1318 if (speed
!= SPEED_1000
|| duplex
!= FULL_DUPLEX
)
1321 case MEDIA_TYPE_100M_FULL
:
1322 if (speed
!= SPEED_100
|| duplex
!= FULL_DUPLEX
)
1325 case MEDIA_TYPE_100M_HALF
:
1326 if (speed
!= SPEED_100
|| duplex
!= HALF_DUPLEX
)
1329 case MEDIA_TYPE_10M_FULL
:
1330 if (speed
!= SPEED_10
|| duplex
!= FULL_DUPLEX
)
1333 case MEDIA_TYPE_10M_HALF
:
1334 if (speed
!= SPEED_10
|| duplex
!= HALF_DUPLEX
)
1339 /* link result is our setting */
1341 if (adapter
->link_speed
!= speed
1342 || adapter
->link_duplex
!= duplex
) {
1343 adapter
->link_speed
= speed
;
1344 adapter
->link_duplex
= duplex
;
1345 atl1_setup_mac_ctrl(adapter
);
1346 if (netif_msg_link(adapter
))
1347 dev_info(&adapter
->pdev
->dev
,
1348 "%s link is up %d Mbps %s\n",
1349 netdev
->name
, adapter
->link_speed
,
1350 adapter
->link_duplex
== FULL_DUPLEX
?
1351 "full duplex" : "half duplex");
1353 if (!netif_carrier_ok(netdev
)) {
1354 /* Link down -> Up */
1355 netif_carrier_on(netdev
);
1360 /* change original link status */
1361 if (netif_carrier_ok(netdev
)) {
1362 adapter
->link_speed
= SPEED_0
;
1363 netif_carrier_off(netdev
);
1364 netif_stop_queue(netdev
);
1367 if (hw
->media_type
!= MEDIA_TYPE_AUTO_SENSOR
&&
1368 hw
->media_type
!= MEDIA_TYPE_1000M_FULL
) {
1369 switch (hw
->media_type
) {
1370 case MEDIA_TYPE_100M_FULL
:
1371 phy_data
= MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
1374 case MEDIA_TYPE_100M_HALF
:
1375 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
1377 case MEDIA_TYPE_10M_FULL
:
1379 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
1382 /* MEDIA_TYPE_10M_HALF: */
1383 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
1386 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
1390 /* auto-neg, insert timer to re-config phy */
1391 if (!adapter
->phy_timer_pending
) {
1392 adapter
->phy_timer_pending
= true;
1393 mod_timer(&adapter
->phy_config_timer
,
1394 round_jiffies(jiffies
+ 3 * HZ
));
1400 static void set_flow_ctrl_old(struct atl1_adapter
*adapter
)
1404 /* RFD Flow Control */
1405 value
= adapter
->rfd_ring
.count
;
1411 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1412 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1413 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1415 /* RRD Flow Control */
1416 value
= adapter
->rrd_ring
.count
;
1421 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1422 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1423 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1426 static void set_flow_ctrl_new(struct atl1_hw
*hw
)
1430 /* RXF Flow Control */
1431 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RXF_LEN
);
1438 value
= ((hi
& RXQ_RXF_PAUSE_TH_HI_MASK
) << RXQ_RXF_PAUSE_TH_HI_SHIFT
) |
1439 ((lo
& RXQ_RXF_PAUSE_TH_LO_MASK
) << RXQ_RXF_PAUSE_TH_LO_SHIFT
);
1440 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RXF_PAUSE_THRESH
);
1442 /* RRD Flow Control */
1443 value
= ioread32(hw
->hw_addr
+ REG_SRAM_RRD_LEN
);
1450 value
= ((hi
& RXQ_RRD_PAUSE_TH_HI_MASK
) << RXQ_RRD_PAUSE_TH_HI_SHIFT
) |
1451 ((lo
& RXQ_RRD_PAUSE_TH_LO_MASK
) << RXQ_RRD_PAUSE_TH_LO_SHIFT
);
1452 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_RRD_PAUSE_THRESH
);
1456 * atl1_configure - Configure Transmit&Receive Unit after Reset
1457 * @adapter: board private structure
1459 * Configure the Tx /Rx unit of the MAC after a reset.
1461 static u32
atl1_configure(struct atl1_adapter
*adapter
)
1463 struct atl1_hw
*hw
= &adapter
->hw
;
1466 /* clear interrupt status */
1467 iowrite32(0xffffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1469 /* set MAC Address */
1470 value
= (((u32
) hw
->mac_addr
[2]) << 24) |
1471 (((u32
) hw
->mac_addr
[3]) << 16) |
1472 (((u32
) hw
->mac_addr
[4]) << 8) |
1473 (((u32
) hw
->mac_addr
[5]));
1474 iowrite32(value
, hw
->hw_addr
+ REG_MAC_STA_ADDR
);
1475 value
= (((u32
) hw
->mac_addr
[0]) << 8) | (((u32
) hw
->mac_addr
[1]));
1476 iowrite32(value
, hw
->hw_addr
+ (REG_MAC_STA_ADDR
+ 4));
1480 /* HI base address */
1481 iowrite32((u32
) ((adapter
->tpd_ring
.dma
& 0xffffffff00000000ULL
) >> 32),
1482 hw
->hw_addr
+ REG_DESC_BASE_ADDR_HI
);
1483 /* LO base address */
1484 iowrite32((u32
) (adapter
->rfd_ring
.dma
& 0x00000000ffffffffULL
),
1485 hw
->hw_addr
+ REG_DESC_RFD_ADDR_LO
);
1486 iowrite32((u32
) (adapter
->rrd_ring
.dma
& 0x00000000ffffffffULL
),
1487 hw
->hw_addr
+ REG_DESC_RRD_ADDR_LO
);
1488 iowrite32((u32
) (adapter
->tpd_ring
.dma
& 0x00000000ffffffffULL
),
1489 hw
->hw_addr
+ REG_DESC_TPD_ADDR_LO
);
1490 iowrite32((u32
) (adapter
->cmb
.dma
& 0x00000000ffffffffULL
),
1491 hw
->hw_addr
+ REG_DESC_CMB_ADDR_LO
);
1492 iowrite32((u32
) (adapter
->smb
.dma
& 0x00000000ffffffffULL
),
1493 hw
->hw_addr
+ REG_DESC_SMB_ADDR_LO
);
1496 value
= adapter
->rrd_ring
.count
;
1498 value
+= adapter
->rfd_ring
.count
;
1499 iowrite32(value
, hw
->hw_addr
+ REG_DESC_RFD_RRD_RING_SIZE
);
1500 iowrite32(adapter
->tpd_ring
.count
, hw
->hw_addr
+
1501 REG_DESC_TPD_RING_SIZE
);
1504 iowrite32(1, hw
->hw_addr
+ REG_LOAD_PTR
);
1506 /* config Mailbox */
1507 value
= ((atomic_read(&adapter
->tpd_ring
.next_to_use
)
1508 & MB_TPD_PROD_INDX_MASK
) << MB_TPD_PROD_INDX_SHIFT
) |
1509 ((atomic_read(&adapter
->rrd_ring
.next_to_clean
)
1510 & MB_RRD_CONS_INDX_MASK
) << MB_RRD_CONS_INDX_SHIFT
) |
1511 ((atomic_read(&adapter
->rfd_ring
.next_to_use
)
1512 & MB_RFD_PROD_INDX_MASK
) << MB_RFD_PROD_INDX_SHIFT
);
1513 iowrite32(value
, hw
->hw_addr
+ REG_MAILBOX
);
1515 /* config IPG/IFG */
1516 value
= (((u32
) hw
->ipgt
& MAC_IPG_IFG_IPGT_MASK
)
1517 << MAC_IPG_IFG_IPGT_SHIFT
) |
1518 (((u32
) hw
->min_ifg
& MAC_IPG_IFG_MIFG_MASK
)
1519 << MAC_IPG_IFG_MIFG_SHIFT
) |
1520 (((u32
) hw
->ipgr1
& MAC_IPG_IFG_IPGR1_MASK
)
1521 << MAC_IPG_IFG_IPGR1_SHIFT
) |
1522 (((u32
) hw
->ipgr2
& MAC_IPG_IFG_IPGR2_MASK
)
1523 << MAC_IPG_IFG_IPGR2_SHIFT
);
1524 iowrite32(value
, hw
->hw_addr
+ REG_MAC_IPG_IFG
);
1526 /* config Half-Duplex Control */
1527 value
= ((u32
) hw
->lcol
& MAC_HALF_DUPLX_CTRL_LCOL_MASK
) |
1528 (((u32
) hw
->max_retry
& MAC_HALF_DUPLX_CTRL_RETRY_MASK
)
1529 << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT
) |
1530 MAC_HALF_DUPLX_CTRL_EXC_DEF_EN
|
1531 (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT
) |
1532 (((u32
) hw
->jam_ipg
& MAC_HALF_DUPLX_CTRL_JAMIPG_MASK
)
1533 << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT
);
1534 iowrite32(value
, hw
->hw_addr
+ REG_MAC_HALF_DUPLX_CTRL
);
1536 /* set Interrupt Moderator Timer */
1537 iowrite16(adapter
->imt
, hw
->hw_addr
+ REG_IRQ_MODU_TIMER_INIT
);
1538 iowrite32(MASTER_CTRL_ITIMER_EN
, hw
->hw_addr
+ REG_MASTER_CTRL
);
1540 /* set Interrupt Clear Timer */
1541 iowrite16(adapter
->ict
, hw
->hw_addr
+ REG_CMBDISDMA_TIMER
);
1543 /* set max frame size hw will accept */
1544 iowrite32(hw
->max_frame_size
, hw
->hw_addr
+ REG_MTU
);
1546 /* jumbo size & rrd retirement timer */
1547 value
= (((u32
) hw
->rx_jumbo_th
& RXQ_JMBOSZ_TH_MASK
)
1548 << RXQ_JMBOSZ_TH_SHIFT
) |
1549 (((u32
) hw
->rx_jumbo_lkah
& RXQ_JMBO_LKAH_MASK
)
1550 << RXQ_JMBO_LKAH_SHIFT
) |
1551 (((u32
) hw
->rrd_ret_timer
& RXQ_RRD_TIMER_MASK
)
1552 << RXQ_RRD_TIMER_SHIFT
);
1553 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_JMBOSZ_RRDTIM
);
1556 switch (hw
->dev_rev
) {
1561 set_flow_ctrl_old(adapter
);
1564 set_flow_ctrl_new(hw
);
1569 value
= (((u32
) hw
->tpd_burst
& TXQ_CTRL_TPD_BURST_NUM_MASK
)
1570 << TXQ_CTRL_TPD_BURST_NUM_SHIFT
) |
1571 (((u32
) hw
->txf_burst
& TXQ_CTRL_TXF_BURST_NUM_MASK
)
1572 << TXQ_CTRL_TXF_BURST_NUM_SHIFT
) |
1573 (((u32
) hw
->tpd_fetch_th
& TXQ_CTRL_TPD_FETCH_TH_MASK
)
1574 << TXQ_CTRL_TPD_FETCH_TH_SHIFT
) | TXQ_CTRL_ENH_MODE
|
1576 iowrite32(value
, hw
->hw_addr
+ REG_TXQ_CTRL
);
1578 /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
1579 value
= (((u32
) hw
->tx_jumbo_task_th
& TX_JUMBO_TASK_TH_MASK
)
1580 << TX_JUMBO_TASK_TH_SHIFT
) |
1581 (((u32
) hw
->tpd_fetch_gap
& TX_TPD_MIN_IPG_MASK
)
1582 << TX_TPD_MIN_IPG_SHIFT
);
1583 iowrite32(value
, hw
->hw_addr
+ REG_TX_JUMBO_TASK_TH_TPD_IPG
);
1586 value
= (((u32
) hw
->rfd_burst
& RXQ_CTRL_RFD_BURST_NUM_MASK
)
1587 << RXQ_CTRL_RFD_BURST_NUM_SHIFT
) |
1588 (((u32
) hw
->rrd_burst
& RXQ_CTRL_RRD_BURST_THRESH_MASK
)
1589 << RXQ_CTRL_RRD_BURST_THRESH_SHIFT
) |
1590 (((u32
) hw
->rfd_fetch_gap
& RXQ_CTRL_RFD_PREF_MIN_IPG_MASK
)
1591 << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT
) | RXQ_CTRL_CUT_THRU_EN
|
1593 iowrite32(value
, hw
->hw_addr
+ REG_RXQ_CTRL
);
1595 /* config DMA Engine */
1596 value
= ((((u32
) hw
->dmar_block
) & DMA_CTRL_DMAR_BURST_LEN_MASK
)
1597 << DMA_CTRL_DMAR_BURST_LEN_SHIFT
) |
1598 ((((u32
) hw
->dmaw_block
) & DMA_CTRL_DMAW_BURST_LEN_MASK
)
1599 << DMA_CTRL_DMAW_BURST_LEN_SHIFT
) | DMA_CTRL_DMAR_EN
|
1601 value
|= (u32
) hw
->dma_ord
;
1602 if (atl1_rcb_128
== hw
->rcb_value
)
1603 value
|= DMA_CTRL_RCB_VALUE
;
1604 iowrite32(value
, hw
->hw_addr
+ REG_DMA_CTRL
);
1606 /* config CMB / SMB */
1607 value
= (hw
->cmb_tpd
> adapter
->tpd_ring
.count
) ?
1608 hw
->cmb_tpd
: adapter
->tpd_ring
.count
;
1610 value
|= hw
->cmb_rrd
;
1611 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TH
);
1612 value
= hw
->cmb_rx_timer
| ((u32
) hw
->cmb_tx_timer
<< 16);
1613 iowrite32(value
, hw
->hw_addr
+ REG_CMB_WRITE_TIMER
);
1614 iowrite32(hw
->smb_timer
, hw
->hw_addr
+ REG_SMB_TIMER
);
1616 /* --- enable CMB / SMB */
1617 value
= CSMB_CTRL_CMB_EN
| CSMB_CTRL_SMB_EN
;
1618 iowrite32(value
, hw
->hw_addr
+ REG_CSMB_CTRL
);
1620 value
= ioread32(adapter
->hw
.hw_addr
+ REG_ISR
);
1621 if (unlikely((value
& ISR_PHY_LINKDOWN
) != 0))
1622 value
= 1; /* config failed */
1626 /* clear all interrupt status */
1627 iowrite32(0x3fffffff, adapter
->hw
.hw_addr
+ REG_ISR
);
1628 iowrite32(0, adapter
->hw
.hw_addr
+ REG_ISR
);
1633 * atl1_pcie_patch - Patch for PCIE module
1635 static void atl1_pcie_patch(struct atl1_adapter
*adapter
)
1639 /* much vendor magic here */
1641 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x12FC);
1642 /* pcie flow control mode change */
1643 value
= ioread32(adapter
->hw
.hw_addr
+ 0x1008);
1645 iowrite32(value
, adapter
->hw
.hw_addr
+ 0x1008);
1649 * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
1650 * on PCI Command register is disable.
1651 * The function enable this bit.
1652 * Brackett, 2006/03/15
1654 static void atl1_via_workaround(struct atl1_adapter
*adapter
)
1656 unsigned long value
;
1658 value
= ioread16(adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1659 if (value
& PCI_COMMAND_INTX_DISABLE
)
1660 value
&= ~PCI_COMMAND_INTX_DISABLE
;
1661 iowrite32(value
, adapter
->hw
.hw_addr
+ PCI_COMMAND
);
1664 static void atl1_inc_smb(struct atl1_adapter
*adapter
)
1666 struct net_device
*netdev
= adapter
->netdev
;
1667 struct stats_msg_block
*smb
= adapter
->smb
.smb
;
1669 /* Fill out the OS statistics structure */
1670 adapter
->soft_stats
.rx_packets
+= smb
->rx_ok
;
1671 adapter
->soft_stats
.tx_packets
+= smb
->tx_ok
;
1672 adapter
->soft_stats
.rx_bytes
+= smb
->rx_byte_cnt
;
1673 adapter
->soft_stats
.tx_bytes
+= smb
->tx_byte_cnt
;
1674 adapter
->soft_stats
.multicast
+= smb
->rx_mcast
;
1675 adapter
->soft_stats
.collisions
+= (smb
->tx_1_col
+ smb
->tx_2_col
* 2 +
1676 smb
->tx_late_col
+ smb
->tx_abort_col
* adapter
->hw
.max_retry
);
1679 adapter
->soft_stats
.rx_errors
+= (smb
->rx_frag
+ smb
->rx_fcs_err
+
1680 smb
->rx_len_err
+ smb
->rx_sz_ov
+ smb
->rx_rxf_ov
+
1681 smb
->rx_rrd_ov
+ smb
->rx_align_err
);
1682 adapter
->soft_stats
.rx_fifo_errors
+= smb
->rx_rxf_ov
;
1683 adapter
->soft_stats
.rx_length_errors
+= smb
->rx_len_err
;
1684 adapter
->soft_stats
.rx_crc_errors
+= smb
->rx_fcs_err
;
1685 adapter
->soft_stats
.rx_frame_errors
+= smb
->rx_align_err
;
1686 adapter
->soft_stats
.rx_missed_errors
+= (smb
->rx_rrd_ov
+
1689 adapter
->soft_stats
.rx_pause
+= smb
->rx_pause
;
1690 adapter
->soft_stats
.rx_rrd_ov
+= smb
->rx_rrd_ov
;
1691 adapter
->soft_stats
.rx_trunc
+= smb
->rx_sz_ov
;
1694 adapter
->soft_stats
.tx_errors
+= (smb
->tx_late_col
+
1695 smb
->tx_abort_col
+ smb
->tx_underrun
+ smb
->tx_trunc
);
1696 adapter
->soft_stats
.tx_fifo_errors
+= smb
->tx_underrun
;
1697 adapter
->soft_stats
.tx_aborted_errors
+= smb
->tx_abort_col
;
1698 adapter
->soft_stats
.tx_window_errors
+= smb
->tx_late_col
;
1700 adapter
->soft_stats
.excecol
+= smb
->tx_abort_col
;
1701 adapter
->soft_stats
.deffer
+= smb
->tx_defer
;
1702 adapter
->soft_stats
.scc
+= smb
->tx_1_col
;
1703 adapter
->soft_stats
.mcc
+= smb
->tx_2_col
;
1704 adapter
->soft_stats
.latecol
+= smb
->tx_late_col
;
1705 adapter
->soft_stats
.tx_underun
+= smb
->tx_underrun
;
1706 adapter
->soft_stats
.tx_trunc
+= smb
->tx_trunc
;
1707 adapter
->soft_stats
.tx_pause
+= smb
->tx_pause
;
1709 netdev
->stats
.rx_packets
= adapter
->soft_stats
.rx_packets
;
1710 netdev
->stats
.tx_packets
= adapter
->soft_stats
.tx_packets
;
1711 netdev
->stats
.rx_bytes
= adapter
->soft_stats
.rx_bytes
;
1712 netdev
->stats
.tx_bytes
= adapter
->soft_stats
.tx_bytes
;
1713 netdev
->stats
.multicast
= adapter
->soft_stats
.multicast
;
1714 netdev
->stats
.collisions
= adapter
->soft_stats
.collisions
;
1715 netdev
->stats
.rx_errors
= adapter
->soft_stats
.rx_errors
;
1716 netdev
->stats
.rx_over_errors
=
1717 adapter
->soft_stats
.rx_missed_errors
;
1718 netdev
->stats
.rx_length_errors
=
1719 adapter
->soft_stats
.rx_length_errors
;
1720 netdev
->stats
.rx_crc_errors
= adapter
->soft_stats
.rx_crc_errors
;
1721 netdev
->stats
.rx_frame_errors
=
1722 adapter
->soft_stats
.rx_frame_errors
;
1723 netdev
->stats
.rx_fifo_errors
= adapter
->soft_stats
.rx_fifo_errors
;
1724 netdev
->stats
.rx_missed_errors
=
1725 adapter
->soft_stats
.rx_missed_errors
;
1726 netdev
->stats
.tx_errors
= adapter
->soft_stats
.tx_errors
;
1727 netdev
->stats
.tx_fifo_errors
= adapter
->soft_stats
.tx_fifo_errors
;
1728 netdev
->stats
.tx_aborted_errors
=
1729 adapter
->soft_stats
.tx_aborted_errors
;
1730 netdev
->stats
.tx_window_errors
=
1731 adapter
->soft_stats
.tx_window_errors
;
1732 netdev
->stats
.tx_carrier_errors
=
1733 adapter
->soft_stats
.tx_carrier_errors
;
1736 static void atl1_update_mailbox(struct atl1_adapter
*adapter
)
1738 unsigned long flags
;
1739 u32 tpd_next_to_use
;
1740 u32 rfd_next_to_use
;
1741 u32 rrd_next_to_clean
;
1744 spin_lock_irqsave(&adapter
->mb_lock
, flags
);
1746 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
1747 rfd_next_to_use
= atomic_read(&adapter
->rfd_ring
.next_to_use
);
1748 rrd_next_to_clean
= atomic_read(&adapter
->rrd_ring
.next_to_clean
);
1750 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
1751 MB_RFD_PROD_INDX_SHIFT
) |
1752 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
1753 MB_RRD_CONS_INDX_SHIFT
) |
1754 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
1755 MB_TPD_PROD_INDX_SHIFT
);
1756 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
1758 spin_unlock_irqrestore(&adapter
->mb_lock
, flags
);
1761 static void atl1_clean_alloc_flag(struct atl1_adapter
*adapter
,
1762 struct rx_return_desc
*rrd
, u16 offset
)
1764 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1766 while (rfd_ring
->next_to_clean
!= (rrd
->buf_indx
+ offset
)) {
1767 rfd_ring
->buffer_info
[rfd_ring
->next_to_clean
].alloced
= 0;
1768 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
) {
1769 rfd_ring
->next_to_clean
= 0;
1774 static void atl1_update_rfd_index(struct atl1_adapter
*adapter
,
1775 struct rx_return_desc
*rrd
)
1779 num_buf
= (rrd
->xsz
.xsum_sz
.pkt_size
+ adapter
->rx_buffer_len
- 1) /
1780 adapter
->rx_buffer_len
;
1781 if (rrd
->num_buf
== num_buf
)
1782 /* clean alloc flag for bad rrd */
1783 atl1_clean_alloc_flag(adapter
, rrd
, num_buf
);
1786 static void atl1_rx_checksum(struct atl1_adapter
*adapter
,
1787 struct rx_return_desc
*rrd
, struct sk_buff
*skb
)
1789 struct pci_dev
*pdev
= adapter
->pdev
;
1792 * The L1 hardware contains a bug that erroneously sets the
1793 * PACKET_FLAG_ERR and ERR_FLAG_L4_CHKSUM bits whenever a
1794 * fragmented IP packet is received, even though the packet
1795 * is perfectly valid and its checksum is correct. There's
1796 * no way to distinguish between one of these good packets
1797 * and a packet that actually contains a TCP/UDP checksum
1798 * error, so all we can do is allow it to be handed up to
1799 * the higher layers and let it be sorted out there.
1802 skb
->ip_summed
= CHECKSUM_NONE
;
1804 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
1805 if (rrd
->err_flg
& (ERR_FLAG_CRC
| ERR_FLAG_TRUNC
|
1806 ERR_FLAG_CODE
| ERR_FLAG_OV
)) {
1807 adapter
->hw_csum_err
++;
1808 if (netif_msg_rx_err(adapter
))
1809 dev_printk(KERN_DEBUG
, &pdev
->dev
,
1810 "rx checksum error\n");
1816 if (!(rrd
->pkt_flg
& PACKET_FLAG_IPV4
))
1817 /* checksum is invalid, but it's not an IPv4 pkt, so ok */
1821 if (likely(!(rrd
->err_flg
&
1822 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
)))) {
1823 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1824 adapter
->hw_csum_good
++;
1832 * atl1_alloc_rx_buffers - Replace used receive buffers
1833 * @adapter: address of board private structure
1835 static u16
atl1_alloc_rx_buffers(struct atl1_adapter
*adapter
)
1837 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1838 struct pci_dev
*pdev
= adapter
->pdev
;
1840 unsigned long offset
;
1841 struct atl1_buffer
*buffer_info
, *next_info
;
1842 struct sk_buff
*skb
;
1844 u16 rfd_next_to_use
, next_next
;
1845 struct rx_free_desc
*rfd_desc
;
1847 next_next
= rfd_next_to_use
= atomic_read(&rfd_ring
->next_to_use
);
1848 if (++next_next
== rfd_ring
->count
)
1850 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1851 next_info
= &rfd_ring
->buffer_info
[next_next
];
1853 while (!buffer_info
->alloced
&& !next_info
->alloced
) {
1854 if (buffer_info
->skb
) {
1855 buffer_info
->alloced
= 1;
1859 rfd_desc
= ATL1_RFD_DESC(rfd_ring
, rfd_next_to_use
);
1861 skb
= netdev_alloc_skb(adapter
->netdev
,
1862 adapter
->rx_buffer_len
+ NET_IP_ALIGN
);
1863 if (unlikely(!skb
)) {
1864 /* Better luck next round */
1865 adapter
->netdev
->stats
.rx_dropped
++;
1870 * Make buffer alignment 2 beyond a 16 byte boundary
1871 * this will result in a 16 byte aligned IP header after
1872 * the 14 byte MAC header is removed
1874 skb_reserve(skb
, NET_IP_ALIGN
);
1876 buffer_info
->alloced
= 1;
1877 buffer_info
->skb
= skb
;
1878 buffer_info
->length
= (u16
) adapter
->rx_buffer_len
;
1879 page
= virt_to_page(skb
->data
);
1880 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
1881 buffer_info
->dma
= pci_map_page(pdev
, page
, offset
,
1882 adapter
->rx_buffer_len
,
1883 PCI_DMA_FROMDEVICE
);
1884 rfd_desc
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
1885 rfd_desc
->buf_len
= cpu_to_le16(adapter
->rx_buffer_len
);
1886 rfd_desc
->coalese
= 0;
1889 rfd_next_to_use
= next_next
;
1890 if (unlikely(++next_next
== rfd_ring
->count
))
1893 buffer_info
= &rfd_ring
->buffer_info
[rfd_next_to_use
];
1894 next_info
= &rfd_ring
->buffer_info
[next_next
];
1900 * Force memory writes to complete before letting h/w
1901 * know there are new descriptors to fetch. (Only
1902 * applicable for weak-ordered memory model archs,
1906 atomic_set(&rfd_ring
->next_to_use
, (int)rfd_next_to_use
);
1911 static void atl1_intr_rx(struct atl1_adapter
*adapter
)
1915 u16 rrd_next_to_clean
;
1917 struct atl1_rfd_ring
*rfd_ring
= &adapter
->rfd_ring
;
1918 struct atl1_rrd_ring
*rrd_ring
= &adapter
->rrd_ring
;
1919 struct atl1_buffer
*buffer_info
;
1920 struct rx_return_desc
*rrd
;
1921 struct sk_buff
*skb
;
1925 rrd_next_to_clean
= atomic_read(&rrd_ring
->next_to_clean
);
1928 rrd
= ATL1_RRD_DESC(rrd_ring
, rrd_next_to_clean
);
1930 if (likely(rrd
->xsz
.valid
)) { /* packet valid */
1932 /* check rrd status */
1933 if (likely(rrd
->num_buf
== 1))
1935 else if (netif_msg_rx_err(adapter
)) {
1936 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1937 "unexpected RRD buffer count\n");
1938 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1939 "rx_buf_len = %d\n",
1940 adapter
->rx_buffer_len
);
1941 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1942 "RRD num_buf = %d\n",
1944 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1945 "RRD pkt_len = %d\n",
1946 rrd
->xsz
.xsum_sz
.pkt_size
);
1947 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1948 "RRD pkt_flg = 0x%08X\n",
1950 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1951 "RRD err_flg = 0x%08X\n",
1953 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1954 "RRD vlan_tag = 0x%08X\n",
1958 /* rrd seems to be bad */
1959 if (unlikely(i
-- > 0)) {
1960 /* rrd may not be DMAed completely */
1965 if (netif_msg_rx_err(adapter
))
1966 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
1968 /* see if update RFD index */
1969 if (rrd
->num_buf
> 1)
1970 atl1_update_rfd_index(adapter
, rrd
);
1974 if (++rrd_next_to_clean
== rrd_ring
->count
)
1975 rrd_next_to_clean
= 0;
1978 } else { /* current rrd still not be updated */
1983 /* clean alloc flag for bad rrd */
1984 atl1_clean_alloc_flag(adapter
, rrd
, 0);
1986 buffer_info
= &rfd_ring
->buffer_info
[rrd
->buf_indx
];
1987 if (++rfd_ring
->next_to_clean
== rfd_ring
->count
)
1988 rfd_ring
->next_to_clean
= 0;
1990 /* update rrd next to clean */
1991 if (++rrd_next_to_clean
== rrd_ring
->count
)
1992 rrd_next_to_clean
= 0;
1995 if (unlikely(rrd
->pkt_flg
& PACKET_FLAG_ERR
)) {
1996 if (!(rrd
->err_flg
&
1997 (ERR_FLAG_IP_CHKSUM
| ERR_FLAG_L4_CHKSUM
1999 /* packet error, don't need upstream */
2000 buffer_info
->alloced
= 0;
2007 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2008 buffer_info
->length
, PCI_DMA_FROMDEVICE
);
2009 buffer_info
->dma
= 0;
2010 skb
= buffer_info
->skb
;
2011 length
= le16_to_cpu(rrd
->xsz
.xsum_sz
.pkt_size
);
2013 skb_put(skb
, length
- ETH_FCS_LEN
);
2015 /* Receive Checksum Offload */
2016 atl1_rx_checksum(adapter
, rrd
, skb
);
2017 skb
->protocol
= eth_type_trans(skb
, adapter
->netdev
);
2019 if (adapter
->vlgrp
&& (rrd
->pkt_flg
& PACKET_FLAG_VLAN_INS
)) {
2020 u16 vlan_tag
= (rrd
->vlan_tag
>> 4) |
2021 ((rrd
->vlan_tag
& 7) << 13) |
2022 ((rrd
->vlan_tag
& 8) << 9);
2023 vlan_hwaccel_rx(skb
, adapter
->vlgrp
, vlan_tag
);
2027 /* let protocol layer free skb */
2028 buffer_info
->skb
= NULL
;
2029 buffer_info
->alloced
= 0;
2033 atomic_set(&rrd_ring
->next_to_clean
, rrd_next_to_clean
);
2035 atl1_alloc_rx_buffers(adapter
);
2037 /* update mailbox ? */
2039 u32 tpd_next_to_use
;
2040 u32 rfd_next_to_use
;
2042 spin_lock(&adapter
->mb_lock
);
2044 tpd_next_to_use
= atomic_read(&adapter
->tpd_ring
.next_to_use
);
2046 atomic_read(&adapter
->rfd_ring
.next_to_use
);
2048 atomic_read(&adapter
->rrd_ring
.next_to_clean
);
2049 value
= ((rfd_next_to_use
& MB_RFD_PROD_INDX_MASK
) <<
2050 MB_RFD_PROD_INDX_SHIFT
) |
2051 ((rrd_next_to_clean
& MB_RRD_CONS_INDX_MASK
) <<
2052 MB_RRD_CONS_INDX_SHIFT
) |
2053 ((tpd_next_to_use
& MB_TPD_PROD_INDX_MASK
) <<
2054 MB_TPD_PROD_INDX_SHIFT
);
2055 iowrite32(value
, adapter
->hw
.hw_addr
+ REG_MAILBOX
);
2056 spin_unlock(&adapter
->mb_lock
);
2060 static void atl1_intr_tx(struct atl1_adapter
*adapter
)
2062 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2063 struct atl1_buffer
*buffer_info
;
2064 u16 sw_tpd_next_to_clean
;
2065 u16 cmb_tpd_next_to_clean
;
2067 sw_tpd_next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2068 cmb_tpd_next_to_clean
= le16_to_cpu(adapter
->cmb
.cmb
->tpd_cons_idx
);
2070 while (cmb_tpd_next_to_clean
!= sw_tpd_next_to_clean
) {
2071 struct tx_packet_desc
*tpd
;
2073 tpd
= ATL1_TPD_DESC(tpd_ring
, sw_tpd_next_to_clean
);
2074 buffer_info
= &tpd_ring
->buffer_info
[sw_tpd_next_to_clean
];
2075 if (buffer_info
->dma
) {
2076 pci_unmap_page(adapter
->pdev
, buffer_info
->dma
,
2077 buffer_info
->length
, PCI_DMA_TODEVICE
);
2078 buffer_info
->dma
= 0;
2081 if (buffer_info
->skb
) {
2082 dev_kfree_skb_irq(buffer_info
->skb
);
2083 buffer_info
->skb
= NULL
;
2086 if (++sw_tpd_next_to_clean
== tpd_ring
->count
)
2087 sw_tpd_next_to_clean
= 0;
2089 atomic_set(&tpd_ring
->next_to_clean
, sw_tpd_next_to_clean
);
2091 if (netif_queue_stopped(adapter
->netdev
)
2092 && netif_carrier_ok(adapter
->netdev
))
2093 netif_wake_queue(adapter
->netdev
);
2096 static u16
atl1_tpd_avail(struct atl1_tpd_ring
*tpd_ring
)
2098 u16 next_to_clean
= atomic_read(&tpd_ring
->next_to_clean
);
2099 u16 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2100 return ((next_to_clean
> next_to_use
) ?
2101 next_to_clean
- next_to_use
- 1 :
2102 tpd_ring
->count
+ next_to_clean
- next_to_use
- 1);
2105 static int atl1_tso(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2106 struct tx_packet_desc
*ptpd
)
2112 if (skb_shinfo(skb
)->gso_size
) {
2113 if (skb_header_cloned(skb
)) {
2114 err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
2119 if (skb
->protocol
== htons(ETH_P_IP
)) {
2120 struct iphdr
*iph
= ip_hdr(skb
);
2122 real_len
= (((unsigned char *)iph
- skb
->data
) +
2123 ntohs(iph
->tot_len
));
2124 if (real_len
< skb
->len
)
2125 pskb_trim(skb
, real_len
);
2126 hdr_len
= (skb_transport_offset(skb
) + tcp_hdrlen(skb
));
2127 if (skb
->len
== hdr_len
) {
2129 tcp_hdr(skb
)->check
=
2130 ~csum_tcpudp_magic(iph
->saddr
,
2131 iph
->daddr
, tcp_hdrlen(skb
),
2133 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2135 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2136 TPD_TCPHDRLEN_MASK
) <<
2137 TPD_TCPHDRLEN_SHIFT
;
2138 ptpd
->word3
|= 1 << TPD_IP_CSUM_SHIFT
;
2139 ptpd
->word3
|= 1 << TPD_TCP_CSUM_SHIFT
;
2144 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
2145 iph
->daddr
, 0, IPPROTO_TCP
, 0);
2146 ip_off
= (unsigned char *)iph
-
2147 (unsigned char *) skb_network_header(skb
);
2148 if (ip_off
== 8) /* 802.3-SNAP frame */
2149 ptpd
->word3
|= 1 << TPD_ETHTYPE_SHIFT
;
2150 else if (ip_off
!= 0)
2153 ptpd
->word3
|= (iph
->ihl
& TPD_IPHL_MASK
) <<
2155 ptpd
->word3
|= ((tcp_hdrlen(skb
) >> 2) &
2156 TPD_TCPHDRLEN_MASK
) << TPD_TCPHDRLEN_SHIFT
;
2157 ptpd
->word3
|= (skb_shinfo(skb
)->gso_size
&
2158 TPD_MSS_MASK
) << TPD_MSS_SHIFT
;
2159 ptpd
->word3
|= 1 << TPD_SEGMENT_EN_SHIFT
;
2166 static int atl1_tx_csum(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2167 struct tx_packet_desc
*ptpd
)
2171 if (likely(skb
->ip_summed
== CHECKSUM_PARTIAL
)) {
2172 css
= (u8
) (skb
->csum_start
- skb_headroom(skb
));
2173 cso
= css
+ (u8
) skb
->csum_offset
;
2174 if (unlikely(css
& 0x1)) {
2175 /* L1 hardware requires an even number here */
2176 if (netif_msg_tx_err(adapter
))
2177 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2178 "payload offset not an even number\n");
2181 ptpd
->word3
|= (css
& TPD_PLOADOFFSET_MASK
) <<
2182 TPD_PLOADOFFSET_SHIFT
;
2183 ptpd
->word3
|= (cso
& TPD_CCSUMOFFSET_MASK
) <<
2184 TPD_CCSUMOFFSET_SHIFT
;
2185 ptpd
->word3
|= 1 << TPD_CUST_CSUM_EN_SHIFT
;
2191 static void atl1_tx_map(struct atl1_adapter
*adapter
, struct sk_buff
*skb
,
2192 struct tx_packet_desc
*ptpd
)
2194 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2195 struct atl1_buffer
*buffer_info
;
2196 u16 buf_len
= skb
->len
;
2198 unsigned long offset
;
2199 unsigned int nr_frags
;
2206 buf_len
-= skb
->data_len
;
2207 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2208 next_to_use
= atomic_read(&tpd_ring
->next_to_use
);
2209 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2210 if (unlikely(buffer_info
->skb
))
2212 /* put skb in last TPD */
2213 buffer_info
->skb
= NULL
;
2215 retval
= (ptpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) & TPD_SEGMENT_EN_MASK
;
2218 hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
2219 buffer_info
->length
= hdr_len
;
2220 page
= virt_to_page(skb
->data
);
2221 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2222 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2226 if (++next_to_use
== tpd_ring
->count
)
2229 if (buf_len
> hdr_len
) {
2232 data_len
= buf_len
- hdr_len
;
2233 nseg
= (data_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2234 ATL1_MAX_TX_BUF_LEN
;
2235 for (i
= 0; i
< nseg
; i
++) {
2237 &tpd_ring
->buffer_info
[next_to_use
];
2238 buffer_info
->skb
= NULL
;
2239 buffer_info
->length
=
2240 (ATL1_MAX_TX_BUF_LEN
>=
2241 data_len
) ? ATL1_MAX_TX_BUF_LEN
: data_len
;
2242 data_len
-= buffer_info
->length
;
2243 page
= virt_to_page(skb
->data
+
2244 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
));
2245 offset
= (unsigned long)(skb
->data
+
2246 (hdr_len
+ i
* ATL1_MAX_TX_BUF_LEN
)) &
2248 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2249 page
, offset
, buffer_info
->length
,
2251 if (++next_to_use
== tpd_ring
->count
)
2257 buffer_info
->length
= buf_len
;
2258 page
= virt_to_page(skb
->data
);
2259 offset
= (unsigned long)skb
->data
& ~PAGE_MASK
;
2260 buffer_info
->dma
= pci_map_page(adapter
->pdev
, page
,
2261 offset
, buf_len
, PCI_DMA_TODEVICE
);
2262 if (++next_to_use
== tpd_ring
->count
)
2266 for (f
= 0; f
< nr_frags
; f
++) {
2267 struct skb_frag_struct
*frag
;
2270 frag
= &skb_shinfo(skb
)->frags
[f
];
2271 buf_len
= frag
->size
;
2273 nseg
= (buf_len
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2274 ATL1_MAX_TX_BUF_LEN
;
2275 for (i
= 0; i
< nseg
; i
++) {
2276 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2277 if (unlikely(buffer_info
->skb
))
2279 buffer_info
->skb
= NULL
;
2280 buffer_info
->length
= (buf_len
> ATL1_MAX_TX_BUF_LEN
) ?
2281 ATL1_MAX_TX_BUF_LEN
: buf_len
;
2282 buf_len
-= buffer_info
->length
;
2283 buffer_info
->dma
= pci_map_page(adapter
->pdev
,
2285 frag
->page_offset
+ (i
* ATL1_MAX_TX_BUF_LEN
),
2286 buffer_info
->length
, PCI_DMA_TODEVICE
);
2288 if (++next_to_use
== tpd_ring
->count
)
2293 /* last tpd's buffer-info */
2294 buffer_info
->skb
= skb
;
2297 static void atl1_tx_queue(struct atl1_adapter
*adapter
, u16 count
,
2298 struct tx_packet_desc
*ptpd
)
2300 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2301 struct atl1_buffer
*buffer_info
;
2302 struct tx_packet_desc
*tpd
;
2305 u16 next_to_use
= (u16
) atomic_read(&tpd_ring
->next_to_use
);
2307 for (j
= 0; j
< count
; j
++) {
2308 buffer_info
= &tpd_ring
->buffer_info
[next_to_use
];
2309 tpd
= ATL1_TPD_DESC(&adapter
->tpd_ring
, next_to_use
);
2311 memcpy(tpd
, ptpd
, sizeof(struct tx_packet_desc
));
2312 tpd
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
2313 tpd
->word2
&= ~(TPD_BUFLEN_MASK
<< TPD_BUFLEN_SHIFT
);
2314 tpd
->word2
|= (cpu_to_le16(buffer_info
->length
) &
2315 TPD_BUFLEN_MASK
) << TPD_BUFLEN_SHIFT
;
2318 * if this is the first packet in a TSO chain, set
2319 * TPD_HDRFLAG, otherwise, clear it.
2321 val
= (tpd
->word3
>> TPD_SEGMENT_EN_SHIFT
) &
2322 TPD_SEGMENT_EN_MASK
;
2325 tpd
->word3
|= 1 << TPD_HDRFLAG_SHIFT
;
2327 tpd
->word3
&= ~(1 << TPD_HDRFLAG_SHIFT
);
2330 if (j
== (count
- 1))
2331 tpd
->word3
|= 1 << TPD_EOP_SHIFT
;
2333 if (++next_to_use
== tpd_ring
->count
)
2337 * Force memory writes to complete before letting h/w
2338 * know there are new descriptors to fetch. (Only
2339 * applicable for weak-ordered memory model archs,
2344 atomic_set(&tpd_ring
->next_to_use
, next_to_use
);
2347 static int atl1_xmit_frame(struct sk_buff
*skb
, struct net_device
*netdev
)
2349 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2350 struct atl1_tpd_ring
*tpd_ring
= &adapter
->tpd_ring
;
2355 struct tx_packet_desc
*ptpd
;
2358 unsigned int nr_frags
= 0;
2359 unsigned int mss
= 0;
2361 unsigned int proto_hdr_len
;
2363 len
-= skb
->data_len
;
2365 if (unlikely(skb
->len
<= 0)) {
2366 dev_kfree_skb_any(skb
);
2367 return NETDEV_TX_OK
;
2370 nr_frags
= skb_shinfo(skb
)->nr_frags
;
2371 for (f
= 0; f
< nr_frags
; f
++) {
2372 frag_size
= skb_shinfo(skb
)->frags
[f
].size
;
2374 count
+= (frag_size
+ ATL1_MAX_TX_BUF_LEN
- 1) /
2375 ATL1_MAX_TX_BUF_LEN
;
2378 mss
= skb_shinfo(skb
)->gso_size
;
2380 if (skb
->protocol
== ntohs(ETH_P_IP
)) {
2381 proto_hdr_len
= (skb_transport_offset(skb
) +
2383 if (unlikely(proto_hdr_len
> len
)) {
2384 dev_kfree_skb_any(skb
);
2385 return NETDEV_TX_OK
;
2387 /* need additional TPD ? */
2388 if (proto_hdr_len
!= len
)
2389 count
+= (len
- proto_hdr_len
+
2390 ATL1_MAX_TX_BUF_LEN
- 1) /
2391 ATL1_MAX_TX_BUF_LEN
;
2395 if (atl1_tpd_avail(&adapter
->tpd_ring
) < count
) {
2396 /* not enough descriptors */
2397 netif_stop_queue(netdev
);
2398 if (netif_msg_tx_queued(adapter
))
2399 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2401 return NETDEV_TX_BUSY
;
2404 ptpd
= ATL1_TPD_DESC(tpd_ring
,
2405 (u16
) atomic_read(&tpd_ring
->next_to_use
));
2406 memset(ptpd
, 0, sizeof(struct tx_packet_desc
));
2408 if (adapter
->vlgrp
&& vlan_tx_tag_present(skb
)) {
2409 vlan_tag
= vlan_tx_tag_get(skb
);
2410 vlan_tag
= (vlan_tag
<< 4) | (vlan_tag
>> 13) |
2411 ((vlan_tag
>> 9) & 0x8);
2412 ptpd
->word3
|= 1 << TPD_INS_VL_TAG_SHIFT
;
2413 ptpd
->word2
|= (vlan_tag
& TPD_VLANTAG_MASK
) <<
2417 tso
= atl1_tso(adapter
, skb
, ptpd
);
2419 dev_kfree_skb_any(skb
);
2420 return NETDEV_TX_OK
;
2424 ret_val
= atl1_tx_csum(adapter
, skb
, ptpd
);
2426 dev_kfree_skb_any(skb
);
2427 return NETDEV_TX_OK
;
2431 atl1_tx_map(adapter
, skb
, ptpd
);
2432 atl1_tx_queue(adapter
, count
, ptpd
);
2433 atl1_update_mailbox(adapter
);
2435 netdev
->trans_start
= jiffies
;
2436 return NETDEV_TX_OK
;
2440 * atl1_intr - Interrupt Handler
2441 * @irq: interrupt number
2442 * @data: pointer to a network interface device structure
2443 * @pt_regs: CPU registers structure
2445 static irqreturn_t
atl1_intr(int irq
, void *data
)
2447 struct atl1_adapter
*adapter
= netdev_priv(data
);
2451 status
= adapter
->cmb
.cmb
->int_stats
;
2456 /* clear CMB interrupt status at once */
2457 adapter
->cmb
.cmb
->int_stats
= 0;
2459 if (status
& ISR_GPHY
) /* clear phy status */
2460 atlx_clear_phy_int(adapter
);
2462 /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
2463 iowrite32(status
| ISR_DIS_INT
, adapter
->hw
.hw_addr
+ REG_ISR
);
2465 /* check if SMB intr */
2466 if (status
& ISR_SMB
)
2467 atl1_inc_smb(adapter
);
2469 /* check if PCIE PHY Link down */
2470 if (status
& ISR_PHY_LINKDOWN
) {
2471 if (netif_msg_intr(adapter
))
2472 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2473 "pcie phy link down %x\n", status
);
2474 if (netif_running(adapter
->netdev
)) { /* reset MAC */
2475 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2476 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2481 /* check if DMA read/write error ? */
2482 if (status
& (ISR_DMAR_TO_RST
| ISR_DMAW_TO_RST
)) {
2483 if (netif_msg_intr(adapter
))
2484 dev_printk(KERN_DEBUG
, &adapter
->pdev
->dev
,
2485 "pcie DMA r/w error (status = 0x%x)\n",
2487 iowrite32(0, adapter
->hw
.hw_addr
+ REG_IMR
);
2488 schedule_work(&adapter
->pcie_dma_to_rst_task
);
2493 if (status
& ISR_GPHY
) {
2494 adapter
->soft_stats
.tx_carrier_errors
++;
2495 atl1_check_for_link(adapter
);
2498 /* transmit event */
2499 if (status
& ISR_CMB_TX
)
2500 atl1_intr_tx(adapter
);
2503 if (unlikely(status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2504 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2505 ISR_HOST_RRD_OV
| ISR_CMB_RX
))) {
2506 if (status
& (ISR_RXF_OV
| ISR_RFD_UNRUN
|
2507 ISR_RRD_OV
| ISR_HOST_RFD_UNRUN
|
2509 if (netif_msg_intr(adapter
))
2510 dev_printk(KERN_DEBUG
,
2511 &adapter
->pdev
->dev
,
2512 "rx exception, ISR = 0x%x\n",
2514 atl1_intr_rx(adapter
);
2520 } while ((status
= adapter
->cmb
.cmb
->int_stats
));
2522 /* re-enable Interrupt */
2523 iowrite32(ISR_DIS_SMB
| ISR_DIS_DMA
, adapter
->hw
.hw_addr
+ REG_ISR
);
2529 * atl1_phy_config - Timer Call-back
2530 * @data: pointer to netdev cast into an unsigned long
2532 static void atl1_phy_config(unsigned long data
)
2534 struct atl1_adapter
*adapter
= (struct atl1_adapter
*)data
;
2535 struct atl1_hw
*hw
= &adapter
->hw
;
2536 unsigned long flags
;
2538 spin_lock_irqsave(&adapter
->lock
, flags
);
2539 adapter
->phy_timer_pending
= false;
2540 atl1_write_phy_reg(hw
, MII_ADVERTISE
, hw
->mii_autoneg_adv_reg
);
2541 atl1_write_phy_reg(hw
, MII_ATLX_CR
, hw
->mii_1000t_ctrl_reg
);
2542 atl1_write_phy_reg(hw
, MII_BMCR
, MII_CR_RESET
| MII_CR_AUTO_NEG_EN
);
2543 spin_unlock_irqrestore(&adapter
->lock
, flags
);
2547 * Orphaned vendor comment left intact here:
2549 * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
2550 * will assert. We do soft reset <0x1400=1> according
2551 * with the SPEC. BUT, it seemes that PCIE or DMA
2552 * state-machine will not be reset. DMAR_TO_INT will
2553 * assert again and again.
2557 static int atl1_reset(struct atl1_adapter
*adapter
)
2560 ret
= atl1_reset_hw(&adapter
->hw
);
2563 return atl1_init_hw(&adapter
->hw
);
2566 static s32
atl1_up(struct atl1_adapter
*adapter
)
2568 struct net_device
*netdev
= adapter
->netdev
;
2570 int irq_flags
= IRQF_SAMPLE_RANDOM
;
2572 /* hardware has been reset, we need to reload some things */
2573 atlx_set_multi(netdev
);
2574 atl1_init_ring_ptrs(adapter
);
2575 atlx_restore_vlan(adapter
);
2576 err
= atl1_alloc_rx_buffers(adapter
);
2578 /* no RX BUFFER allocated */
2581 if (unlikely(atl1_configure(adapter
))) {
2586 err
= pci_enable_msi(adapter
->pdev
);
2588 if (netif_msg_ifup(adapter
))
2589 dev_info(&adapter
->pdev
->dev
,
2590 "Unable to enable MSI: %d\n", err
);
2591 irq_flags
|= IRQF_SHARED
;
2594 err
= request_irq(adapter
->pdev
->irq
, &atl1_intr
, irq_flags
,
2595 netdev
->name
, netdev
);
2599 atlx_irq_enable(adapter
);
2600 atl1_check_link(adapter
);
2601 netif_start_queue(netdev
);
2605 pci_disable_msi(adapter
->pdev
);
2606 /* free rx_buffers */
2607 atl1_clean_rx_ring(adapter
);
2611 static void atl1_down(struct atl1_adapter
*adapter
)
2613 struct net_device
*netdev
= adapter
->netdev
;
2615 netif_stop_queue(netdev
);
2616 del_timer_sync(&adapter
->phy_config_timer
);
2617 adapter
->phy_timer_pending
= false;
2619 atlx_irq_disable(adapter
);
2620 free_irq(adapter
->pdev
->irq
, netdev
);
2621 pci_disable_msi(adapter
->pdev
);
2622 atl1_reset_hw(&adapter
->hw
);
2623 adapter
->cmb
.cmb
->int_stats
= 0;
2625 adapter
->link_speed
= SPEED_0
;
2626 adapter
->link_duplex
= -1;
2627 netif_carrier_off(netdev
);
2629 atl1_clean_tx_ring(adapter
);
2630 atl1_clean_rx_ring(adapter
);
2633 static void atl1_tx_timeout_task(struct work_struct
*work
)
2635 struct atl1_adapter
*adapter
=
2636 container_of(work
, struct atl1_adapter
, tx_timeout_task
);
2637 struct net_device
*netdev
= adapter
->netdev
;
2639 netif_device_detach(netdev
);
2642 netif_device_attach(netdev
);
2646 * atl1_change_mtu - Change the Maximum Transfer Unit
2647 * @netdev: network interface device structure
2648 * @new_mtu: new value for maximum frame size
2650 * Returns 0 on success, negative on failure
2652 static int atl1_change_mtu(struct net_device
*netdev
, int new_mtu
)
2654 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2655 int old_mtu
= netdev
->mtu
;
2656 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
2658 if ((max_frame
< ETH_ZLEN
+ ETH_FCS_LEN
) ||
2659 (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
2660 if (netif_msg_link(adapter
))
2661 dev_warn(&adapter
->pdev
->dev
, "invalid MTU setting\n");
2665 adapter
->hw
.max_frame_size
= max_frame
;
2666 adapter
->hw
.tx_jumbo_task_th
= (max_frame
+ 7) >> 3;
2667 adapter
->rx_buffer_len
= (max_frame
+ 7) & ~7;
2668 adapter
->hw
.rx_jumbo_th
= adapter
->rx_buffer_len
/ 8;
2670 netdev
->mtu
= new_mtu
;
2671 if ((old_mtu
!= new_mtu
) && netif_running(netdev
)) {
2680 * atl1_open - Called when a network interface is made active
2681 * @netdev: network interface device structure
2683 * Returns 0 on success, negative value on failure
2685 * The open entry point is called when a network interface is made
2686 * active by the system (IFF_UP). At this point all resources needed
2687 * for transmit and receive operations are allocated, the interrupt
2688 * handler is registered with the OS, the watchdog timer is started,
2689 * and the stack is notified that the interface is ready.
2691 static int atl1_open(struct net_device
*netdev
)
2693 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2696 netif_carrier_off(netdev
);
2698 /* allocate transmit descriptors */
2699 err
= atl1_setup_ring_resources(adapter
);
2703 err
= atl1_up(adapter
);
2710 atl1_reset(adapter
);
2715 * atl1_close - Disables a network interface
2716 * @netdev: network interface device structure
2718 * Returns 0, this is not allowed to fail
2720 * The close entry point is called when an interface is de-activated
2721 * by the OS. The hardware is still under the drivers control, but
2722 * needs to be disabled. A global MAC reset is issued to stop the
2723 * hardware, and all transmit and receive resources are freed.
2725 static int atl1_close(struct net_device
*netdev
)
2727 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2729 atl1_free_ring_resources(adapter
);
2734 static int atl1_suspend(struct pci_dev
*pdev
, pm_message_t state
)
2736 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2737 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2738 struct atl1_hw
*hw
= &adapter
->hw
;
2740 u32 wufc
= adapter
->wol
;
2746 netif_device_detach(netdev
);
2747 if (netif_running(netdev
))
2750 retval
= pci_save_state(pdev
);
2754 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2755 atl1_read_phy_reg(hw
, MII_BMSR
, (u16
*) & ctrl
);
2756 val
= ctrl
& BMSR_LSTATUS
;
2758 wufc
&= ~ATLX_WUFC_LNKC
;
2761 val
= atl1_get_speed_and_duplex(hw
, &speed
, &duplex
);
2763 if (netif_msg_ifdown(adapter
))
2764 dev_printk(KERN_DEBUG
, &pdev
->dev
,
2765 "error getting speed/duplex\n");
2771 /* enable magic packet WOL */
2772 if (wufc
& ATLX_WUFC_MAG
)
2773 ctrl
|= (WOL_MAGIC_EN
| WOL_MAGIC_PME_EN
);
2774 iowrite32(ctrl
, hw
->hw_addr
+ REG_WOL_CTRL
);
2775 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2777 /* configure the mac */
2778 ctrl
= MAC_CTRL_RX_EN
;
2779 ctrl
|= ((u32
)((speed
== SPEED_1000
) ? MAC_CTRL_SPEED_1000
:
2780 MAC_CTRL_SPEED_10_100
) << MAC_CTRL_SPEED_SHIFT
);
2781 if (duplex
== FULL_DUPLEX
)
2782 ctrl
|= MAC_CTRL_DUPLX
;
2783 ctrl
|= (((u32
)adapter
->hw
.preamble_len
&
2784 MAC_CTRL_PRMLEN_MASK
) << MAC_CTRL_PRMLEN_SHIFT
);
2786 ctrl
|= MAC_CTRL_RMV_VLAN
;
2787 if (wufc
& ATLX_WUFC_MAG
)
2788 ctrl
|= MAC_CTRL_BC_EN
;
2789 iowrite32(ctrl
, hw
->hw_addr
+ REG_MAC_CTRL
);
2790 ioread32(hw
->hw_addr
+ REG_MAC_CTRL
);
2793 ctrl
= ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2794 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
2795 iowrite32(ctrl
, hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2796 ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2798 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
2803 ctrl
|= (WOL_LINK_CHG_EN
| WOL_LINK_CHG_PME_EN
);
2804 iowrite32(ctrl
, hw
->hw_addr
+ REG_WOL_CTRL
);
2805 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2806 iowrite32(0, hw
->hw_addr
+ REG_MAC_CTRL
);
2807 ioread32(hw
->hw_addr
+ REG_MAC_CTRL
);
2808 hw
->phy_configured
= false;
2809 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 1);
2814 iowrite32(0, hw
->hw_addr
+ REG_WOL_CTRL
);
2815 ioread32(hw
->hw_addr
+ REG_WOL_CTRL
);
2816 ctrl
= ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2817 ctrl
|= PCIE_PHYMISC_FORCE_RCV_DET
;
2818 iowrite32(ctrl
, hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2819 ioread32(hw
->hw_addr
+ REG_PCIE_PHYMISC
);
2820 hw
->phy_configured
= false;
2821 pci_enable_wake(pdev
, pci_choose_state(pdev
, state
), 0);
2823 if (netif_running(netdev
))
2824 pci_disable_msi(adapter
->pdev
);
2825 pci_disable_device(pdev
);
2826 pci_set_power_state(pdev
, pci_choose_state(pdev
, state
));
2831 static int atl1_resume(struct pci_dev
*pdev
)
2833 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2834 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
2837 pci_set_power_state(pdev
, PCI_D0
);
2838 pci_restore_state(pdev
);
2840 err
= pci_enable_device(pdev
);
2842 if (netif_msg_ifup(adapter
))
2843 dev_printk(KERN_DEBUG
, &pdev
->dev
,
2844 "error enabling pci device\n");
2848 pci_set_master(pdev
);
2849 iowrite32(0, adapter
->hw
.hw_addr
+ REG_WOL_CTRL
);
2850 pci_enable_wake(pdev
, PCI_D3hot
, 0);
2851 pci_enable_wake(pdev
, PCI_D3cold
, 0);
2853 atl1_reset_hw(&adapter
->hw
);
2854 adapter
->cmb
.cmb
->int_stats
= 0;
2856 if (netif_running(netdev
))
2858 netif_device_attach(netdev
);
2863 #define atl1_suspend NULL
2864 #define atl1_resume NULL
2867 static void atl1_shutdown(struct pci_dev
*pdev
)
2870 atl1_suspend(pdev
, PMSG_SUSPEND
);
2874 #ifdef CONFIG_NET_POLL_CONTROLLER
2875 static void atl1_poll_controller(struct net_device
*netdev
)
2877 disable_irq(netdev
->irq
);
2878 atl1_intr(netdev
->irq
, netdev
);
2879 enable_irq(netdev
->irq
);
2883 static const struct net_device_ops atl1_netdev_ops
= {
2884 .ndo_open
= atl1_open
,
2885 .ndo_stop
= atl1_close
,
2886 .ndo_start_xmit
= atl1_xmit_frame
,
2887 .ndo_set_multicast_list
= atlx_set_multi
,
2888 .ndo_validate_addr
= eth_validate_addr
,
2889 .ndo_set_mac_address
= atl1_set_mac
,
2890 .ndo_change_mtu
= atl1_change_mtu
,
2891 .ndo_do_ioctl
= atlx_ioctl
,
2892 .ndo_tx_timeout
= atlx_tx_timeout
,
2893 .ndo_vlan_rx_register
= atlx_vlan_rx_register
,
2894 #ifdef CONFIG_NET_POLL_CONTROLLER
2895 .ndo_poll_controller
= atl1_poll_controller
,
2900 * atl1_probe - Device Initialization Routine
2901 * @pdev: PCI device information struct
2902 * @ent: entry in atl1_pci_tbl
2904 * Returns 0 on success, negative on failure
2906 * atl1_probe initializes an adapter identified by a pci_dev structure.
2907 * The OS initialization, configuring of the adapter private structure,
2908 * and a hardware reset occur.
2910 static int __devinit
atl1_probe(struct pci_dev
*pdev
,
2911 const struct pci_device_id
*ent
)
2913 struct net_device
*netdev
;
2914 struct atl1_adapter
*adapter
;
2915 static int cards_found
= 0;
2918 err
= pci_enable_device(pdev
);
2923 * The atl1 chip can DMA to 64-bit addresses, but it uses a single
2924 * shared register for the high 32 bits, so only a single, aligned,
2925 * 4 GB physical address range can be used at a time.
2927 * Supporting 64-bit DMA on this hardware is more trouble than it's
2928 * worth. It is far easier to limit to 32-bit DMA than update
2929 * various kernel subsystems to support the mechanics required by a
2930 * fixed-high-32-bit system.
2932 err
= pci_set_dma_mask(pdev
, DMA_32BIT_MASK
);
2934 dev_err(&pdev
->dev
, "no usable DMA configuration\n");
2938 * Mark all PCI regions associated with PCI device
2939 * pdev as being reserved by owner atl1_driver_name
2941 err
= pci_request_regions(pdev
, ATLX_DRIVER_NAME
);
2943 goto err_request_regions
;
2946 * Enables bus-mastering on the device and calls
2947 * pcibios_set_master to do the needed arch specific settings
2949 pci_set_master(pdev
);
2951 netdev
= alloc_etherdev(sizeof(struct atl1_adapter
));
2954 goto err_alloc_etherdev
;
2956 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2958 pci_set_drvdata(pdev
, netdev
);
2959 adapter
= netdev_priv(netdev
);
2960 adapter
->netdev
= netdev
;
2961 adapter
->pdev
= pdev
;
2962 adapter
->hw
.back
= adapter
;
2963 adapter
->msg_enable
= netif_msg_init(debug
, atl1_default_msg
);
2965 adapter
->hw
.hw_addr
= pci_iomap(pdev
, 0, 0);
2966 if (!adapter
->hw
.hw_addr
) {
2970 /* get device revision number */
2971 adapter
->hw
.dev_rev
= ioread16(adapter
->hw
.hw_addr
+
2972 (REG_MASTER_CTRL
+ 2));
2973 if (netif_msg_probe(adapter
))
2974 dev_info(&pdev
->dev
, "version %s\n", ATLX_DRIVER_VERSION
);
2976 /* set default ring resource counts */
2977 adapter
->rfd_ring
.count
= adapter
->rrd_ring
.count
= ATL1_DEFAULT_RFD
;
2978 adapter
->tpd_ring
.count
= ATL1_DEFAULT_TPD
;
2980 adapter
->mii
.dev
= netdev
;
2981 adapter
->mii
.mdio_read
= mdio_read
;
2982 adapter
->mii
.mdio_write
= mdio_write
;
2983 adapter
->mii
.phy_id_mask
= 0x1f;
2984 adapter
->mii
.reg_num_mask
= 0x1f;
2986 netdev
->netdev_ops
= &atl1_netdev_ops
;
2987 netdev
->watchdog_timeo
= 5 * HZ
;
2989 netdev
->ethtool_ops
= &atl1_ethtool_ops
;
2990 adapter
->bd_number
= cards_found
;
2992 /* setup the private structure */
2993 err
= atl1_sw_init(adapter
);
2997 netdev
->features
= NETIF_F_HW_CSUM
;
2998 netdev
->features
|= NETIF_F_SG
;
2999 netdev
->features
|= (NETIF_F_HW_VLAN_TX
| NETIF_F_HW_VLAN_RX
);
3002 * patch for some L1 of old version,
3003 * the final version of L1 may not need these
3006 /* atl1_pcie_patch(adapter); */
3008 /* really reset GPHY core */
3009 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3012 * reset the controller to
3013 * put the device in a known good starting state
3015 if (atl1_reset_hw(&adapter
->hw
)) {
3020 /* copy the MAC address out of the EEPROM */
3021 atl1_read_mac_addr(&adapter
->hw
);
3022 memcpy(netdev
->dev_addr
, adapter
->hw
.mac_addr
, netdev
->addr_len
);
3024 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
3029 atl1_check_options(adapter
);
3031 /* pre-init the MAC, and setup link */
3032 err
= atl1_init_hw(&adapter
->hw
);
3038 atl1_pcie_patch(adapter
);
3039 /* assume we have no link for now */
3040 netif_carrier_off(netdev
);
3041 netif_stop_queue(netdev
);
3043 setup_timer(&adapter
->phy_config_timer
, &atl1_phy_config
,
3044 (unsigned long)adapter
);
3045 adapter
->phy_timer_pending
= false;
3047 INIT_WORK(&adapter
->tx_timeout_task
, atl1_tx_timeout_task
);
3049 INIT_WORK(&adapter
->link_chg_task
, atlx_link_chg_task
);
3051 INIT_WORK(&adapter
->pcie_dma_to_rst_task
, atl1_tx_timeout_task
);
3053 err
= register_netdev(netdev
);
3058 atl1_via_workaround(adapter
);
3062 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3064 free_netdev(netdev
);
3066 pci_release_regions(pdev
);
3068 err_request_regions
:
3069 pci_disable_device(pdev
);
3074 * atl1_remove - Device Removal Routine
3075 * @pdev: PCI device information struct
3077 * atl1_remove is called by the PCI subsystem to alert the driver
3078 * that it should release a PCI device. The could be caused by a
3079 * Hot-Plug event, or because the driver is going to be removed from
3082 static void __devexit
atl1_remove(struct pci_dev
*pdev
)
3084 struct net_device
*netdev
= pci_get_drvdata(pdev
);
3085 struct atl1_adapter
*adapter
;
3086 /* Device not available. Return. */
3090 adapter
= netdev_priv(netdev
);
3093 * Some atl1 boards lack persistent storage for their MAC, and get it
3094 * from the BIOS during POST. If we've been messing with the MAC
3095 * address, we need to save the permanent one.
3097 if (memcmp(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
, ETH_ALEN
)) {
3098 memcpy(adapter
->hw
.mac_addr
, adapter
->hw
.perm_mac_addr
,
3100 atl1_set_mac_addr(&adapter
->hw
);
3103 iowrite16(0, adapter
->hw
.hw_addr
+ REG_PHY_ENABLE
);
3104 unregister_netdev(netdev
);
3105 pci_iounmap(pdev
, adapter
->hw
.hw_addr
);
3106 pci_release_regions(pdev
);
3107 free_netdev(netdev
);
3108 pci_disable_device(pdev
);
3111 static struct pci_driver atl1_driver
= {
3112 .name
= ATLX_DRIVER_NAME
,
3113 .id_table
= atl1_pci_tbl
,
3114 .probe
= atl1_probe
,
3115 .remove
= __devexit_p(atl1_remove
),
3116 .suspend
= atl1_suspend
,
3117 .resume
= atl1_resume
,
3118 .shutdown
= atl1_shutdown
3122 * atl1_exit_module - Driver Exit Cleanup Routine
3124 * atl1_exit_module is called just before the driver is removed
3127 static void __exit
atl1_exit_module(void)
3129 pci_unregister_driver(&atl1_driver
);
3133 * atl1_init_module - Driver Registration Routine
3135 * atl1_init_module is the first routine called when the driver is
3136 * loaded. All it does is register with the PCI subsystem.
3138 static int __init
atl1_init_module(void)
3140 return pci_register_driver(&atl1_driver
);
3143 module_init(atl1_init_module
);
3144 module_exit(atl1_exit_module
);
3147 char stat_string
[ETH_GSTRING_LEN
];
3152 #define ATL1_STAT(m) \
3153 sizeof(((struct atl1_adapter *)0)->m), offsetof(struct atl1_adapter, m)
3155 static struct atl1_stats atl1_gstrings_stats
[] = {
3156 {"rx_packets", ATL1_STAT(soft_stats
.rx_packets
)},
3157 {"tx_packets", ATL1_STAT(soft_stats
.tx_packets
)},
3158 {"rx_bytes", ATL1_STAT(soft_stats
.rx_bytes
)},
3159 {"tx_bytes", ATL1_STAT(soft_stats
.tx_bytes
)},
3160 {"rx_errors", ATL1_STAT(soft_stats
.rx_errors
)},
3161 {"tx_errors", ATL1_STAT(soft_stats
.tx_errors
)},
3162 {"multicast", ATL1_STAT(soft_stats
.multicast
)},
3163 {"collisions", ATL1_STAT(soft_stats
.collisions
)},
3164 {"rx_length_errors", ATL1_STAT(soft_stats
.rx_length_errors
)},
3165 {"rx_over_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3166 {"rx_crc_errors", ATL1_STAT(soft_stats
.rx_crc_errors
)},
3167 {"rx_frame_errors", ATL1_STAT(soft_stats
.rx_frame_errors
)},
3168 {"rx_fifo_errors", ATL1_STAT(soft_stats
.rx_fifo_errors
)},
3169 {"rx_missed_errors", ATL1_STAT(soft_stats
.rx_missed_errors
)},
3170 {"tx_aborted_errors", ATL1_STAT(soft_stats
.tx_aborted_errors
)},
3171 {"tx_carrier_errors", ATL1_STAT(soft_stats
.tx_carrier_errors
)},
3172 {"tx_fifo_errors", ATL1_STAT(soft_stats
.tx_fifo_errors
)},
3173 {"tx_window_errors", ATL1_STAT(soft_stats
.tx_window_errors
)},
3174 {"tx_abort_exce_coll", ATL1_STAT(soft_stats
.excecol
)},
3175 {"tx_abort_late_coll", ATL1_STAT(soft_stats
.latecol
)},
3176 {"tx_deferred_ok", ATL1_STAT(soft_stats
.deffer
)},
3177 {"tx_single_coll_ok", ATL1_STAT(soft_stats
.scc
)},
3178 {"tx_multi_coll_ok", ATL1_STAT(soft_stats
.mcc
)},
3179 {"tx_underun", ATL1_STAT(soft_stats
.tx_underun
)},
3180 {"tx_trunc", ATL1_STAT(soft_stats
.tx_trunc
)},
3181 {"tx_pause", ATL1_STAT(soft_stats
.tx_pause
)},
3182 {"rx_pause", ATL1_STAT(soft_stats
.rx_pause
)},
3183 {"rx_rrd_ov", ATL1_STAT(soft_stats
.rx_rrd_ov
)},
3184 {"rx_trunc", ATL1_STAT(soft_stats
.rx_trunc
)}
3187 static void atl1_get_ethtool_stats(struct net_device
*netdev
,
3188 struct ethtool_stats
*stats
, u64
*data
)
3190 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3194 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3195 p
= (char *)adapter
+atl1_gstrings_stats
[i
].stat_offset
;
3196 data
[i
] = (atl1_gstrings_stats
[i
].sizeof_stat
==
3197 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
3202 static int atl1_get_sset_count(struct net_device
*netdev
, int sset
)
3206 return ARRAY_SIZE(atl1_gstrings_stats
);
3212 static int atl1_get_settings(struct net_device
*netdev
,
3213 struct ethtool_cmd
*ecmd
)
3215 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3216 struct atl1_hw
*hw
= &adapter
->hw
;
3218 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
3219 SUPPORTED_10baseT_Full
|
3220 SUPPORTED_100baseT_Half
|
3221 SUPPORTED_100baseT_Full
|
3222 SUPPORTED_1000baseT_Full
|
3223 SUPPORTED_Autoneg
| SUPPORTED_TP
);
3224 ecmd
->advertising
= ADVERTISED_TP
;
3225 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3226 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3227 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3228 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
) {
3229 ecmd
->advertising
|= ADVERTISED_Autoneg
;
3230 ecmd
->advertising
|=
3231 (ADVERTISED_10baseT_Half
|
3232 ADVERTISED_10baseT_Full
|
3233 ADVERTISED_100baseT_Half
|
3234 ADVERTISED_100baseT_Full
|
3235 ADVERTISED_1000baseT_Full
);
3237 ecmd
->advertising
|= (ADVERTISED_1000baseT_Full
);
3239 ecmd
->port
= PORT_TP
;
3240 ecmd
->phy_address
= 0;
3241 ecmd
->transceiver
= XCVR_INTERNAL
;
3243 if (netif_carrier_ok(adapter
->netdev
)) {
3244 u16 link_speed
, link_duplex
;
3245 atl1_get_speed_and_duplex(hw
, &link_speed
, &link_duplex
);
3246 ecmd
->speed
= link_speed
;
3247 if (link_duplex
== FULL_DUPLEX
)
3248 ecmd
->duplex
= DUPLEX_FULL
;
3250 ecmd
->duplex
= DUPLEX_HALF
;
3255 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3256 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3257 ecmd
->autoneg
= AUTONEG_ENABLE
;
3259 ecmd
->autoneg
= AUTONEG_DISABLE
;
3264 static int atl1_set_settings(struct net_device
*netdev
,
3265 struct ethtool_cmd
*ecmd
)
3267 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3268 struct atl1_hw
*hw
= &adapter
->hw
;
3271 u16 old_media_type
= hw
->media_type
;
3273 if (netif_running(adapter
->netdev
)) {
3274 if (netif_msg_link(adapter
))
3275 dev_dbg(&adapter
->pdev
->dev
,
3276 "ethtool shutting down adapter\n");
3280 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
3281 hw
->media_type
= MEDIA_TYPE_AUTO_SENSOR
;
3283 if (ecmd
->speed
== SPEED_1000
) {
3284 if (ecmd
->duplex
!= DUPLEX_FULL
) {
3285 if (netif_msg_link(adapter
))
3286 dev_warn(&adapter
->pdev
->dev
,
3287 "1000M half is invalid\n");
3291 hw
->media_type
= MEDIA_TYPE_1000M_FULL
;
3292 } else if (ecmd
->speed
== SPEED_100
) {
3293 if (ecmd
->duplex
== DUPLEX_FULL
)
3294 hw
->media_type
= MEDIA_TYPE_100M_FULL
;
3296 hw
->media_type
= MEDIA_TYPE_100M_HALF
;
3298 if (ecmd
->duplex
== DUPLEX_FULL
)
3299 hw
->media_type
= MEDIA_TYPE_10M_FULL
;
3301 hw
->media_type
= MEDIA_TYPE_10M_HALF
;
3304 switch (hw
->media_type
) {
3305 case MEDIA_TYPE_AUTO_SENSOR
:
3307 ADVERTISED_10baseT_Half
|
3308 ADVERTISED_10baseT_Full
|
3309 ADVERTISED_100baseT_Half
|
3310 ADVERTISED_100baseT_Full
|
3311 ADVERTISED_1000baseT_Full
|
3312 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3314 case MEDIA_TYPE_1000M_FULL
:
3316 ADVERTISED_1000baseT_Full
|
3317 ADVERTISED_Autoneg
| ADVERTISED_TP
;
3320 ecmd
->advertising
= 0;
3323 if (atl1_phy_setup_autoneg_adv(hw
)) {
3325 if (netif_msg_link(adapter
))
3326 dev_warn(&adapter
->pdev
->dev
,
3327 "invalid ethtool speed/duplex setting\n");
3330 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3331 hw
->media_type
== MEDIA_TYPE_1000M_FULL
)
3332 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3334 switch (hw
->media_type
) {
3335 case MEDIA_TYPE_100M_FULL
:
3337 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_100
|
3340 case MEDIA_TYPE_100M_HALF
:
3341 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3343 case MEDIA_TYPE_10M_FULL
:
3345 MII_CR_FULL_DUPLEX
| MII_CR_SPEED_10
| MII_CR_RESET
;
3348 /* MEDIA_TYPE_10M_HALF: */
3349 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3353 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3356 hw
->media_type
= old_media_type
;
3358 if (netif_running(adapter
->netdev
)) {
3359 if (netif_msg_link(adapter
))
3360 dev_dbg(&adapter
->pdev
->dev
,
3361 "ethtool starting adapter\n");
3363 } else if (!ret_val
) {
3364 if (netif_msg_link(adapter
))
3365 dev_dbg(&adapter
->pdev
->dev
,
3366 "ethtool resetting adapter\n");
3367 atl1_reset(adapter
);
3372 static void atl1_get_drvinfo(struct net_device
*netdev
,
3373 struct ethtool_drvinfo
*drvinfo
)
3375 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3377 strncpy(drvinfo
->driver
, ATLX_DRIVER_NAME
, sizeof(drvinfo
->driver
));
3378 strncpy(drvinfo
->version
, ATLX_DRIVER_VERSION
,
3379 sizeof(drvinfo
->version
));
3380 strncpy(drvinfo
->fw_version
, "N/A", sizeof(drvinfo
->fw_version
));
3381 strncpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
),
3382 sizeof(drvinfo
->bus_info
));
3383 drvinfo
->eedump_len
= ATL1_EEDUMP_LEN
;
3386 static void atl1_get_wol(struct net_device
*netdev
,
3387 struct ethtool_wolinfo
*wol
)
3389 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3391 wol
->supported
= WAKE_MAGIC
;
3393 if (adapter
->wol
& ATLX_WUFC_MAG
)
3394 wol
->wolopts
|= WAKE_MAGIC
;
3398 static int atl1_set_wol(struct net_device
*netdev
,
3399 struct ethtool_wolinfo
*wol
)
3401 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3403 if (wol
->wolopts
& (WAKE_PHY
| WAKE_UCAST
| WAKE_MCAST
| WAKE_BCAST
|
3404 WAKE_ARP
| WAKE_MAGICSECURE
))
3407 if (wol
->wolopts
& WAKE_MAGIC
)
3408 adapter
->wol
|= ATLX_WUFC_MAG
;
3412 static u32
atl1_get_msglevel(struct net_device
*netdev
)
3414 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3415 return adapter
->msg_enable
;
3418 static void atl1_set_msglevel(struct net_device
*netdev
, u32 value
)
3420 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3421 adapter
->msg_enable
= value
;
3424 static int atl1_get_regs_len(struct net_device
*netdev
)
3426 return ATL1_REG_COUNT
* sizeof(u32
);
3429 static void atl1_get_regs(struct net_device
*netdev
, struct ethtool_regs
*regs
,
3432 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3433 struct atl1_hw
*hw
= &adapter
->hw
;
3437 for (i
= 0; i
< ATL1_REG_COUNT
; i
++) {
3439 * This switch statement avoids reserved regions
3440 * of register space.
3465 /* reserved region; don't read it */
3469 /* unreserved region */
3470 regbuf
[i
] = ioread32(hw
->hw_addr
+ (i
* sizeof(u32
)));
3475 static void atl1_get_ringparam(struct net_device
*netdev
,
3476 struct ethtool_ringparam
*ring
)
3478 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3479 struct atl1_tpd_ring
*txdr
= &adapter
->tpd_ring
;
3480 struct atl1_rfd_ring
*rxdr
= &adapter
->rfd_ring
;
3482 ring
->rx_max_pending
= ATL1_MAX_RFD
;
3483 ring
->tx_max_pending
= ATL1_MAX_TPD
;
3484 ring
->rx_mini_max_pending
= 0;
3485 ring
->rx_jumbo_max_pending
= 0;
3486 ring
->rx_pending
= rxdr
->count
;
3487 ring
->tx_pending
= txdr
->count
;
3488 ring
->rx_mini_pending
= 0;
3489 ring
->rx_jumbo_pending
= 0;
3492 static int atl1_set_ringparam(struct net_device
*netdev
,
3493 struct ethtool_ringparam
*ring
)
3495 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3496 struct atl1_tpd_ring
*tpdr
= &adapter
->tpd_ring
;
3497 struct atl1_rrd_ring
*rrdr
= &adapter
->rrd_ring
;
3498 struct atl1_rfd_ring
*rfdr
= &adapter
->rfd_ring
;
3500 struct atl1_tpd_ring tpd_old
, tpd_new
;
3501 struct atl1_rfd_ring rfd_old
, rfd_new
;
3502 struct atl1_rrd_ring rrd_old
, rrd_new
;
3503 struct atl1_ring_header rhdr_old
, rhdr_new
;
3506 tpd_old
= adapter
->tpd_ring
;
3507 rfd_old
= adapter
->rfd_ring
;
3508 rrd_old
= adapter
->rrd_ring
;
3509 rhdr_old
= adapter
->ring_header
;
3511 if (netif_running(adapter
->netdev
))
3514 rfdr
->count
= (u16
) max(ring
->rx_pending
, (u32
) ATL1_MIN_RFD
);
3515 rfdr
->count
= rfdr
->count
> ATL1_MAX_RFD
? ATL1_MAX_RFD
:
3517 rfdr
->count
= (rfdr
->count
+ 3) & ~3;
3518 rrdr
->count
= rfdr
->count
;
3520 tpdr
->count
= (u16
) max(ring
->tx_pending
, (u32
) ATL1_MIN_TPD
);
3521 tpdr
->count
= tpdr
->count
> ATL1_MAX_TPD
? ATL1_MAX_TPD
:
3523 tpdr
->count
= (tpdr
->count
+ 3) & ~3;
3525 if (netif_running(adapter
->netdev
)) {
3526 /* try to get new resources before deleting old */
3527 err
= atl1_setup_ring_resources(adapter
);
3529 goto err_setup_ring
;
3532 * save the new, restore the old in order to free it,
3533 * then restore the new back again
3536 rfd_new
= adapter
->rfd_ring
;
3537 rrd_new
= adapter
->rrd_ring
;
3538 tpd_new
= adapter
->tpd_ring
;
3539 rhdr_new
= adapter
->ring_header
;
3540 adapter
->rfd_ring
= rfd_old
;
3541 adapter
->rrd_ring
= rrd_old
;
3542 adapter
->tpd_ring
= tpd_old
;
3543 adapter
->ring_header
= rhdr_old
;
3544 atl1_free_ring_resources(adapter
);
3545 adapter
->rfd_ring
= rfd_new
;
3546 adapter
->rrd_ring
= rrd_new
;
3547 adapter
->tpd_ring
= tpd_new
;
3548 adapter
->ring_header
= rhdr_new
;
3550 err
= atl1_up(adapter
);
3557 adapter
->rfd_ring
= rfd_old
;
3558 adapter
->rrd_ring
= rrd_old
;
3559 adapter
->tpd_ring
= tpd_old
;
3560 adapter
->ring_header
= rhdr_old
;
3565 static void atl1_get_pauseparam(struct net_device
*netdev
,
3566 struct ethtool_pauseparam
*epause
)
3568 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3569 struct atl1_hw
*hw
= &adapter
->hw
;
3571 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3572 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3573 epause
->autoneg
= AUTONEG_ENABLE
;
3575 epause
->autoneg
= AUTONEG_DISABLE
;
3577 epause
->rx_pause
= 1;
3578 epause
->tx_pause
= 1;
3581 static int atl1_set_pauseparam(struct net_device
*netdev
,
3582 struct ethtool_pauseparam
*epause
)
3584 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3585 struct atl1_hw
*hw
= &adapter
->hw
;
3587 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3588 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3589 epause
->autoneg
= AUTONEG_ENABLE
;
3591 epause
->autoneg
= AUTONEG_DISABLE
;
3594 epause
->rx_pause
= 1;
3595 epause
->tx_pause
= 1;
3600 /* FIXME: is this right? -- CHS */
3601 static u32
atl1_get_rx_csum(struct net_device
*netdev
)
3606 static void atl1_get_strings(struct net_device
*netdev
, u32 stringset
,
3612 switch (stringset
) {
3614 for (i
= 0; i
< ARRAY_SIZE(atl1_gstrings_stats
); i
++) {
3615 memcpy(p
, atl1_gstrings_stats
[i
].stat_string
,
3617 p
+= ETH_GSTRING_LEN
;
3623 static int atl1_nway_reset(struct net_device
*netdev
)
3625 struct atl1_adapter
*adapter
= netdev_priv(netdev
);
3626 struct atl1_hw
*hw
= &adapter
->hw
;
3628 if (netif_running(netdev
)) {
3632 if (hw
->media_type
== MEDIA_TYPE_AUTO_SENSOR
||
3633 hw
->media_type
== MEDIA_TYPE_1000M_FULL
) {
3634 phy_data
= MII_CR_RESET
| MII_CR_AUTO_NEG_EN
;
3636 switch (hw
->media_type
) {
3637 case MEDIA_TYPE_100M_FULL
:
3638 phy_data
= MII_CR_FULL_DUPLEX
|
3639 MII_CR_SPEED_100
| MII_CR_RESET
;
3641 case MEDIA_TYPE_100M_HALF
:
3642 phy_data
= MII_CR_SPEED_100
| MII_CR_RESET
;
3644 case MEDIA_TYPE_10M_FULL
:
3645 phy_data
= MII_CR_FULL_DUPLEX
|
3646 MII_CR_SPEED_10
| MII_CR_RESET
;
3649 /* MEDIA_TYPE_10M_HALF */
3650 phy_data
= MII_CR_SPEED_10
| MII_CR_RESET
;
3653 atl1_write_phy_reg(hw
, MII_BMCR
, phy_data
);
3659 const struct ethtool_ops atl1_ethtool_ops
= {
3660 .get_settings
= atl1_get_settings
,
3661 .set_settings
= atl1_set_settings
,
3662 .get_drvinfo
= atl1_get_drvinfo
,
3663 .get_wol
= atl1_get_wol
,
3664 .set_wol
= atl1_set_wol
,
3665 .get_msglevel
= atl1_get_msglevel
,
3666 .set_msglevel
= atl1_set_msglevel
,
3667 .get_regs_len
= atl1_get_regs_len
,
3668 .get_regs
= atl1_get_regs
,
3669 .get_ringparam
= atl1_get_ringparam
,
3670 .set_ringparam
= atl1_set_ringparam
,
3671 .get_pauseparam
= atl1_get_pauseparam
,
3672 .set_pauseparam
= atl1_set_pauseparam
,
3673 .get_rx_csum
= atl1_get_rx_csum
,
3674 .set_tx_csum
= ethtool_op_set_tx_hw_csum
,
3675 .get_link
= ethtool_op_get_link
,
3676 .set_sg
= ethtool_op_set_sg
,
3677 .get_strings
= atl1_get_strings
,
3678 .nway_reset
= atl1_nway_reset
,
3679 .get_ethtool_stats
= atl1_get_ethtool_stats
,
3680 .get_sset_count
= atl1_get_sset_count
,
3681 .set_tso
= ethtool_op_set_tso
,