arch/x86/include/asm/kvm.h

   1 #ifndef _ASM_X86_KVM_H
   2 #define _ASM_X86_KVM_H
   3
   4 /*
   5  * KVM x86 specific structures and definitions
   6  *
   7  */
   8
   9 #include <linux/types.h>
  10 #include <linux/ioctl.h>
  11
  12 /* Select x86 specific features in <linux/kvm.h> */
  13 #define __KVM_HAVE_PIT
  14 #define __KVM_HAVE_IOAPIC
  15 #define __KVM_HAVE_DEVICE_ASSIGNMENT
  16 #define __KVM_HAVE_MSI
  17 #define __KVM_HAVE_USER_NMI
  18 #define __KVM_HAVE_GUEST_DEBUG
  19 #define __KVM_HAVE_MSIX
  20
  21 /* Architectural interrupt line count. */
  22 #define KVM_NR_INTERRUPTS 256
  23
  24 struct kvm_memory_alias {
  25         __u32 slot;  /* this has a different namespace than memory slots */
  26         __u32 flags;
  27         __u64 guest_phys_addr;
  28         __u64 memory_size;
  29         __u64 target_phys_addr;
  30 };
  31
  32 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
  33 struct kvm_pic_state {
  34         __u8 last_irr;  /* edge detection */
  35         __u8 irr;               /* interrupt request register */
  36         __u8 imr;               /* interrupt mask register */
  37         __u8 isr;               /* interrupt service register */
  38         __u8 priority_add;      /* highest irq priority */
  39         __u8 irq_base;
  40         __u8 read_reg_select;
  41         __u8 poll;
  42         __u8 special_mask;
  43         __u8 init_state;
  44         __u8 auto_eoi;
  45         __u8 rotate_on_auto_eoi;
  46         __u8 special_fully_nested_mode;
  47         __u8 init4;             /* true if 4 byte init */
  48         __u8 elcr;              /* PIIX edge/trigger selection */
  49         __u8 elcr_mask;
  50 };
  51
  52 #define KVM_IOAPIC_NUM_PINS  24
  53 struct kvm_ioapic_state {
  54         __u64 base_address;
  55         __u32 ioregsel;
  56         __u32 id;
  57         __u32 irr;
  58         __u32 pad;
  59         union {
  60                 __u64 bits;
  61                 struct {
  62                         __u8 vector;
  63                         __u8 delivery_mode:3;
  64                         __u8 dest_mode:1;
  65                         __u8 delivery_status:1;
  66                         __u8 polarity:1;
  67                         __u8 remote_irr:1;
  68                         __u8 trig_mode:1;
  69                         __u8 mask:1;
  70                         __u8 reserve:7;
  71                         __u8 reserved[4];
  72                         __u8 dest_id;
  73                 } fields;
  74         } redirtbl[KVM_IOAPIC_NUM_PINS];
  75 };
  76
  77 #define KVM_IRQCHIP_PIC_MASTER   0
  78 #define KVM_IRQCHIP_PIC_SLAVE    1
  79 #define KVM_IRQCHIP_IOAPIC       2
  80
  81 /* for KVM_GET_REGS and KVM_SET_REGS */
  82 struct kvm_regs {
  83         /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
  84         __u64 rax, rbx, rcx, rdx;
  85         __u64 rsi, rdi, rsp, rbp;
  86         __u64 r8,  r9,  r10, r11;
  87         __u64 r12, r13, r14, r15;
  88         __u64 rip, rflags;
  89 };
  90
  91 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
  92 #define KVM_APIC_REG_SIZE 0x400
  93 struct kvm_lapic_state {
  94         char regs[KVM_APIC_REG_SIZE];
  95 };
  96
  97 struct kvm_segment {
  98         __u64 base;
  99         __u32 limit;
 100         __u16 selector;
 101         __u8  type;
 102         __u8  present, dpl, db, s, l, g, avl;
 103         __u8  unusable;
 104         __u8  padding;
 105 };
 106
 107 struct kvm_dtable {
 108         __u64 base;
 109         __u16 limit;
 110         __u16 padding[3];
 111 };
 112
 113
 114 /* for KVM_GET_SREGS and KVM_SET_SREGS */
 115 struct kvm_sregs {
 116         /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
 117         struct kvm_segment cs, ds, es, fs, gs, ss;
 118         struct kvm_segment tr, ldt;
 119         struct kvm_dtable gdt, idt;
 120         __u64 cr0, cr2, cr3, cr4, cr8;
 121         __u64 efer;
 122         __u64 apic_base;
 123         __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
 124 };
 125
 126 /* for KVM_GET_FPU and KVM_SET_FPU */
 127 struct kvm_fpu {
 128         __u8  fpr[8][16];
 129         __u16 fcw;
 130         __u16 fsw;
 131         __u8  ftwx;  /* in fxsave format */
 132         __u8  pad1;
 133         __u16 last_opcode;
 134         __u64 last_ip;
 135         __u64 last_dp;
 136         __u8  xmm[16][16];
 137         __u32 mxcsr;
 138         __u32 pad2;
 139 };
 140
 141 struct kvm_msr_entry {
 142         __u32 index;
 143         __u32 reserved;
 144         __u64 data;
 145 };
 146
 147 /* for KVM_GET_MSRS and KVM_SET_MSRS */
 148 struct kvm_msrs {
 149         __u32 nmsrs; /* number of msrs in entries */
 150         __u32 pad;
 151
 152         struct kvm_msr_entry entries[0];
 153 };
 154
 155 /* for KVM_GET_MSR_INDEX_LIST */
 156 struct kvm_msr_list {
 157         __u32 nmsrs; /* number of msrs in entries */
 158         __u32 indices[0];
 159 };
 160
 161
 162 struct kvm_cpuid_entry {
 163         __u32 function;
 164         __u32 eax;
 165         __u32 ebx;
 166         __u32 ecx;
 167         __u32 edx;
 168         __u32 padding;
 169 };
 170
 171 /* for KVM_SET_CPUID */
 172 struct kvm_cpuid {
 173         __u32 nent;
 174         __u32 padding;
 175         struct kvm_cpuid_entry entries[0];
 176 };
 177
 178 struct kvm_cpuid_entry2 {
 179         __u32 function;
 180         __u32 index;
 181         __u32 flags;
 182         __u32 eax;
 183         __u32 ebx;
 184         __u32 ecx;
 185         __u32 edx;
 186         __u32 padding[3];
 187 };
 188
 189 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
 190 #define KVM_CPUID_FLAG_STATEFUL_FUNC    2
 191 #define KVM_CPUID_FLAG_STATE_READ_NEXT  4
 192
 193 /* for KVM_SET_CPUID2 */
 194 struct kvm_cpuid2 {
 195         __u32 nent;
 196         __u32 padding;
 197         struct kvm_cpuid_entry2 entries[0];
 198 };
 199
 200 /* for KVM_GET_PIT and KVM_SET_PIT */
 201 struct kvm_pit_channel_state {
 202         __u32 count; /* can be 65536 */
 203         __u16 latched_count;
 204         __u8 count_latched;
 205         __u8 status_latched;
 206         __u8 status;
 207         __u8 read_state;
 208         __u8 write_state;
 209         __u8 write_latch;
 210         __u8 rw_mode;
 211         __u8 mode;
 212         __u8 bcd;
 213         __u8 gate;
 214         __s64 count_load_time;
 215 };
 216
 217 struct kvm_debug_exit_arch {
 218         __u32 exception;
 219         __u32 pad;
 220         __u64 pc;
 221         __u64 dr6;
 222         __u64 dr7;
 223 };
 224
 225 #define KVM_GUESTDBG_USE_SW_BP          0x00010000
 226 #define KVM_GUESTDBG_USE_HW_BP          0x00020000
 227 #define KVM_GUESTDBG_INJECT_DB          0x00040000
 228 #define KVM_GUESTDBG_INJECT_BP          0x00080000
 229
 230 /* for KVM_SET_GUEST_DEBUG */
 231 struct kvm_guest_debug_arch {
 232         __u64 debugreg[8];
 233 };
 234
 235 struct kvm_pit_state {
 236         struct kvm_pit_channel_state channels[3];
 237 };
 238
 239 struct kvm_reinject_control {
 240         __u8 pit_reinject;
 241         __u8 reserved[31];
 242 };
 243 #endif /* _ASM_X86_KVM_H */