2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
9 * Erich Boleyn : MP v1.4 and additional changes.
10 * Alan Cox : Added EBDA scanning
11 * Ingo Molnar : various cleanups and rewrites
12 * Maciej W. Rozycki: Bits for default MP configurations
13 * Paul Diefenbaugh: Added full ACPI support
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/bootmem.h>
20 #include <linux/kernel_stat.h>
21 #include <linux/mc146818rtc.h>
22 #include <linux/acpi.h>
23 #include <linux/module.h>
27 #include <asm/mpspec.h>
28 #include <asm/pgalloc.h>
29 #include <asm/io_apic.h>
30 #include <asm/proto.h>
32 #include <asm/bios_ebda.h>
34 #include <mach_apic.h>
36 /* Have we found an MP table */
40 * Various Linux-internal data structures created from the
43 DECLARE_BITMAP(mp_bus_not_pci
, MAX_MP_BUSSES
);
44 int mp_bus_id_to_pci_bus
[MAX_MP_BUSSES
] = {[0 ... MAX_MP_BUSSES
- 1] = -1 };
46 static int mp_current_pci_id
= 0;
49 * Intel MP BIOS table parsing routines:
53 * Checksum an MP configuration block.
56 static int __init
mpf_checksum(unsigned char *mp
, int len
)
66 static void __cpuinit
MP_processor_info(struct mpc_config_processor
*m
)
69 char *bootup_cpu
= "";
71 if (!(m
->mpc_cpuflag
& CPU_ENABLED
)) {
75 #ifdef CONFIG_X86_NUMAQ
76 apicid
= mpc_apic_id(m
, translation_table
[mpc_record
]);
78 apicid
= m
->mpc_apicid
;
80 if (m
->mpc_cpuflag
& CPU_BOOTPROCESSOR
) {
81 bootup_cpu
= " (Bootup-CPU)";
82 boot_cpu_physical_apicid
= m
->mpc_apicid
;
85 printk(KERN_INFO
"Processor #%d%s\n", m
->mpc_apicid
, bootup_cpu
);
86 generic_processor_info(apicid
, m
->mpc_apicver
);
89 static void __init
MP_bus_info(struct mpc_config_bus
*m
)
93 memcpy(str
, m
->mpc_bustype
, 6);
96 #ifdef CONFIG_X86_NUMAQ
97 mpc_oem_bus_info(m
, str
, translation_table
[mpc_record
]);
99 Dprintk("Bus #%d is %s\n", m
->mpc_busid
, str
);
102 #if MAX_MP_BUSSES < 256
103 if (m
->mpc_busid
>= MAX_MP_BUSSES
) {
104 printk(KERN_WARNING
"MP table busid value (%d) for bustype %s "
105 " is too large, max. supported is %d\n",
106 m
->mpc_busid
, str
, MAX_MP_BUSSES
- 1);
111 if (strncmp(str
, BUSTYPE_ISA
, sizeof(BUSTYPE_ISA
) - 1) == 0) {
112 set_bit(m
->mpc_busid
, mp_bus_not_pci
);
113 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
114 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_ISA
;
116 } else if (strncmp(str
, BUSTYPE_PCI
, sizeof(BUSTYPE_PCI
) - 1) == 0) {
117 #ifdef CONFIG_X86_NUMAQ
118 mpc_oem_pci_bus(m
, translation_table
[mpc_record
]);
120 clear_bit(m
->mpc_busid
, mp_bus_not_pci
);
121 mp_bus_id_to_pci_bus
[m
->mpc_busid
] = mp_current_pci_id
;
123 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
124 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_PCI
;
125 } else if (strncmp(str
, BUSTYPE_EISA
, sizeof(BUSTYPE_EISA
) - 1) == 0) {
126 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_EISA
;
127 } else if (strncmp(str
, BUSTYPE_MCA
, sizeof(BUSTYPE_MCA
) - 1) == 0) {
128 mp_bus_id_to_type
[m
->mpc_busid
] = MP_BUS_MCA
;
131 printk(KERN_WARNING
"Unknown bustype %s - ignoring\n", str
);
134 static int bad_ioapic(unsigned long address
)
136 if (nr_ioapics
>= MAX_IO_APICS
) {
137 printk(KERN_ERR
"ERROR: Max # of I/O APICs (%d) exceeded "
138 "(found %d)\n", MAX_IO_APICS
, nr_ioapics
);
139 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
142 printk(KERN_ERR
"WARNING: Bogus (zero) I/O APIC address"
143 " found in table, skipping!\n");
149 static void __init
MP_ioapic_info(struct mpc_config_ioapic
*m
)
151 if (!(m
->mpc_flags
& MPC_APIC_USABLE
))
154 printk(KERN_INFO
"I/O APIC #%d at 0x%X.\n", m
->mpc_apicid
,
157 if (bad_ioapic(m
->mpc_apicaddr
))
160 mp_ioapics
[nr_ioapics
] = *m
;
164 static void __init
MP_intsrc_info(struct mpc_config_intsrc
*m
)
166 mp_irqs
[mp_irq_entries
] = *m
;
167 Dprintk("Int: type %d, pol %d, trig %d, bus %d,"
168 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
169 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
170 (m
->mpc_irqflag
>> 2) & 3, m
->mpc_srcbus
,
171 m
->mpc_srcbusirq
, m
->mpc_dstapic
, m
->mpc_dstirq
);
172 if (++mp_irq_entries
>= MAX_IRQ_SOURCES
)
173 panic("Max # of irq sources exceeded!!\n");
176 static void __init
MP_lintsrc_info(struct mpc_config_lintsrc
*m
)
178 Dprintk("Lint: type %d, pol %d, trig %d, bus %d,"
179 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
180 m
->mpc_irqtype
, m
->mpc_irqflag
& 3,
181 (m
->mpc_irqflag
>> 2) & 3, m
->mpc_srcbusid
,
182 m
->mpc_srcbusirq
, m
->mpc_destapic
, m
->mpc_destapiclint
);
188 static int __init
smp_read_mpc(struct mp_config_table
*mpc
, unsigned early
)
192 int count
= sizeof(*mpc
);
193 unsigned char *mpt
= ((unsigned char *)mpc
) + count
;
195 if (memcmp(mpc
->mpc_signature
, MPC_SIGNATURE
, 4)) {
196 printk(KERN_ERR
"MPTABLE: bad signature [%c%c%c%c]!\n",
197 mpc
->mpc_signature
[0], mpc
->mpc_signature
[1],
198 mpc
->mpc_signature
[2], mpc
->mpc_signature
[3]);
201 if (mpf_checksum((unsigned char *)mpc
, mpc
->mpc_length
)) {
202 printk(KERN_ERR
"MPTABLE: checksum error!\n");
205 if (mpc
->mpc_spec
!= 0x01 && mpc
->mpc_spec
!= 0x04) {
206 printk(KERN_ERR
"MPTABLE: bad table version (%d)!!\n",
210 if (!mpc
->mpc_lapic
) {
211 printk(KERN_ERR
"MPTABLE: null local APIC address!\n");
214 memcpy(oem
, mpc
->mpc_oem
, 8);
216 printk(KERN_INFO
"MPTABLE: OEM ID: %s ", oem
);
218 memcpy(str
, mpc
->mpc_productid
, 12);
220 printk("Product ID: %s ", str
);
223 mps_oem_check(mpc
, oem
, str
);
225 printk(KERN_INFO
"MPTABLE: Product ID: %s ", str
);
227 printk(KERN_INFO
"MPTABLE: APIC at: 0x%X\n", mpc
->mpc_lapic
);
229 /* save the local APIC address, it might be non-default */
231 mp_lapic_addr
= mpc
->mpc_lapic
;
237 * Now process the configuration blocks.
239 #ifdef CONFIG_X86_NUMAQ
242 while (count
< mpc
->mpc_length
) {
246 struct mpc_config_processor
*m
=
247 (struct mpc_config_processor
*)mpt
;
248 /* ACPI may have already provided this data */
250 MP_processor_info(m
);
257 struct mpc_config_bus
*m
=
258 (struct mpc_config_bus
*)mpt
;
266 struct mpc_config_ioapic
*m
=
267 (struct mpc_config_ioapic
*)mpt
;
275 struct mpc_config_intsrc
*m
=
276 (struct mpc_config_intsrc
*)mpt
;
285 struct mpc_config_lintsrc
*m
=
286 (struct mpc_config_lintsrc
*)mpt
;
294 count
= mpc
->mpc_length
;
298 #ifdef CONFIG_X86_NUMAQ
302 setup_apic_routing();
304 printk(KERN_ERR
"MPTABLE: no processors registered!\n");
305 return num_processors
;
308 static int __init
ELCR_trigger(unsigned int irq
)
312 port
= 0x4d0 + (irq
>> 3);
313 return (inb(port
) >> (irq
& 7)) & 1;
316 static void __init
construct_default_ioirq_mptable(int mpc_default_type
)
318 struct mpc_config_intsrc intsrc
;
320 int ELCR_fallback
= 0;
322 intsrc
.mpc_type
= MP_INTSRC
;
323 intsrc
.mpc_irqflag
= 0; /* conforming */
324 intsrc
.mpc_srcbus
= 0;
325 intsrc
.mpc_dstapic
= mp_ioapics
[0].mpc_apicid
;
327 intsrc
.mpc_irqtype
= mp_INT
;
330 * If true, we have an ISA/PCI system with no IRQ entries
331 * in the MP table. To prevent the PCI interrupts from being set up
332 * incorrectly, we try to use the ELCR. The sanity check to see if
333 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
334 * never be level sensitive, so we simply see if the ELCR agrees.
335 * If it does, we assume it's valid.
337 if (mpc_default_type
== 5) {
338 printk(KERN_INFO
"ISA/PCI bus type with no IRQ information... "
339 "falling back to ELCR\n");
341 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
343 printk(KERN_ERR
"ELCR contains invalid data... "
347 "Using ELCR to identify PCI interrupts\n");
352 for (i
= 0; i
< 16; i
++) {
353 switch (mpc_default_type
) {
355 if (i
== 0 || i
== 13)
356 continue; /* IRQ0 & IRQ13 not connected */
360 continue; /* IRQ2 is never connected */
365 * If the ELCR indicates a level-sensitive interrupt, we
366 * copy that information over to the MP table in the
367 * irqflag field (level sensitive, active high polarity).
370 intsrc
.mpc_irqflag
= 13;
372 intsrc
.mpc_irqflag
= 0;
375 intsrc
.mpc_srcbusirq
= i
;
376 intsrc
.mpc_dstirq
= i
? i
: 2; /* IRQ0 to INTIN2 */
377 MP_intsrc_info(&intsrc
);
380 intsrc
.mpc_irqtype
= mp_ExtINT
;
381 intsrc
.mpc_srcbusirq
= 0;
382 intsrc
.mpc_dstirq
= 0; /* 8259A to INTIN0 */
383 MP_intsrc_info(&intsrc
);
386 static inline void __init
construct_default_ISA_mptable(int mpc_default_type
)
388 struct mpc_config_processor processor
;
389 struct mpc_config_bus bus
;
390 struct mpc_config_ioapic ioapic
;
391 struct mpc_config_lintsrc lintsrc
;
392 int linttypes
[2] = { mp_ExtINT
, mp_NMI
};
396 * local APIC has default address
398 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
401 * 2 CPUs, numbered 0 & 1.
403 processor
.mpc_type
= MP_PROCESSOR
;
404 processor
.mpc_apicver
= 0;
405 processor
.mpc_cpuflag
= CPU_ENABLED
;
406 processor
.mpc_cpufeature
= 0;
407 processor
.mpc_featureflag
= 0;
408 processor
.mpc_reserved
[0] = 0;
409 processor
.mpc_reserved
[1] = 0;
410 for (i
= 0; i
< 2; i
++) {
411 processor
.mpc_apicid
= i
;
412 MP_processor_info(&processor
);
415 bus
.mpc_type
= MP_BUS
;
417 switch (mpc_default_type
) {
419 printk(KERN_ERR
"???\nUnknown standard configuration %d\n",
424 memcpy(bus
.mpc_bustype
, "ISA ", 6);
428 if (mpc_default_type
> 4) {
430 memcpy(bus
.mpc_bustype
, "PCI ", 6);
434 ioapic
.mpc_type
= MP_IOAPIC
;
435 ioapic
.mpc_apicid
= 2;
436 ioapic
.mpc_apicver
= 0;
437 ioapic
.mpc_flags
= MPC_APIC_USABLE
;
438 ioapic
.mpc_apicaddr
= 0xFEC00000;
439 MP_ioapic_info(&ioapic
);
442 * We set up most of the low 16 IO-APIC pins according to MPS rules.
444 construct_default_ioirq_mptable(mpc_default_type
);
446 lintsrc
.mpc_type
= MP_LINTSRC
;
447 lintsrc
.mpc_irqflag
= 0; /* conforming */
448 lintsrc
.mpc_srcbusid
= 0;
449 lintsrc
.mpc_srcbusirq
= 0;
450 lintsrc
.mpc_destapic
= MP_APIC_ALL
;
451 for (i
= 0; i
< 2; i
++) {
452 lintsrc
.mpc_irqtype
= linttypes
[i
];
453 lintsrc
.mpc_destapiclint
= i
;
454 MP_lintsrc_info(&lintsrc
);
458 static struct intel_mp_floating
*mpf_found
;
461 * Scan the memory blocks for an SMP configuration block.
463 static void __init
__get_smp_config(unsigned early
)
465 struct intel_mp_floating
*mpf
= mpf_found
;
467 if (acpi_lapic
&& early
)
470 * ACPI supports both logical (e.g. Hyper-Threading) and physical
471 * processors, where MPS only supports physical.
473 if (acpi_lapic
&& acpi_ioapic
) {
474 printk(KERN_INFO
"Using ACPI (MADT) for SMP configuration "
477 } else if (acpi_lapic
)
478 printk(KERN_INFO
"Using ACPI for processor (LAPIC) "
479 "configuration information\n");
481 printk(KERN_INFO
"Intel MultiProcessor Specification v1.%d\n",
482 mpf
->mpf_specification
);
485 * Now see if we need to read further.
487 if (mpf
->mpf_feature1
!= 0) {
490 * local APIC has default address
492 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
496 printk(KERN_INFO
"Default MP configuration #%d\n",
498 construct_default_ISA_mptable(mpf
->mpf_feature1
);
500 } else if (mpf
->mpf_physptr
) {
503 * Read the physical hardware table. Anything here will
504 * override the defaults.
506 if (!smp_read_mpc(phys_to_virt(mpf
->mpf_physptr
), early
)) {
507 smp_found_config
= 0;
509 "BIOS bug, MP table errors detected!...\n");
510 printk(KERN_ERR
"... disabling SMP support. "
511 "(tell your hw vendor)\n");
518 * If there are no explicit MP IRQ entries, then we are
519 * broken. We set up most of the low 16 IO-APIC pins to
520 * ISA defaults and hope it will work.
522 if (!mp_irq_entries
) {
523 struct mpc_config_bus bus
;
525 printk(KERN_ERR
"BIOS bug, no explicit IRQ entries, "
526 "using default mptable. "
527 "(tell your hw vendor)\n");
529 bus
.mpc_type
= MP_BUS
;
531 memcpy(bus
.mpc_bustype
, "ISA ", 6);
534 construct_default_ioirq_mptable(0);
541 printk(KERN_INFO
"Processors: %d\n", num_processors
);
543 * Only use the first configuration found.
547 void __init
early_get_smp_config(void)
552 void __init
get_smp_config(void)
557 static int __init
smp_scan_config(unsigned long base
, unsigned long length
,
560 extern void __bad_mpf_size(void);
561 unsigned int *bp
= phys_to_virt(base
);
562 struct intel_mp_floating
*mpf
;
564 Dprintk("Scan SMP from %p for %ld bytes.\n", bp
, length
);
565 if (sizeof(*mpf
) != 16)
569 mpf
= (struct intel_mp_floating
*)bp
;
570 if ((*bp
== SMP_MAGIC_IDENT
) &&
571 (mpf
->mpf_length
== 1) &&
572 !mpf_checksum((unsigned char *)bp
, 16) &&
573 ((mpf
->mpf_specification
== 1)
574 || (mpf
->mpf_specification
== 4))) {
576 smp_found_config
= 1;
582 reserve_bootmem_generic(virt_to_phys(mpf
), PAGE_SIZE
);
583 if (mpf
->mpf_physptr
)
584 reserve_bootmem_generic(mpf
->mpf_physptr
,
594 static void __init
__find_smp_config(unsigned reserve
)
596 unsigned int address
;
599 * FIXME: Linux assumes you have 640K of base ram..
600 * this continues the error...
602 * 1) Scan the bottom 1K for a signature
603 * 2) Scan the top 1K of base RAM
604 * 3) Scan the 64K of bios
606 if (smp_scan_config(0x0, 0x400, reserve
) ||
607 smp_scan_config(639 * 0x400, 0x400, reserve
) ||
608 smp_scan_config(0xF0000, 0x10000, reserve
))
611 * If it is an SMP machine we should know now.
613 * there is a real-mode segmented pointer pointing to the
614 * 4K EBDA area at 0x40E, calculate and scan it here.
616 * NOTE! There are Linux loaders that will corrupt the EBDA
617 * area, and as such this kind of SMP config may be less
618 * trustworthy, simply because the SMP table may have been
619 * stomped on during early boot. These loaders are buggy and
622 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
625 address
= get_bios_ebda();
627 smp_scan_config(address
, 0x400, reserve
);
630 void __init
early_find_smp_config(void)
632 __find_smp_config(0);
635 void __init
find_smp_config(void)
637 __find_smp_config(1);
640 /* --------------------------------------------------------------------------
641 ACPI-based MP Configuration
642 -------------------------------------------------------------------------- */
647 #define MP_MAX_IOAPIC_PIN 127
649 extern struct mp_ioapic_routing mp_ioapic_routing
[MAX_IO_APICS
];
651 static int mp_find_ioapic(int gsi
)
655 /* Find the IOAPIC that manages this GSI. */
656 for (i
= 0; i
< nr_ioapics
; i
++) {
657 if ((gsi
>= mp_ioapic_routing
[i
].gsi_base
)
658 && (gsi
<= mp_ioapic_routing
[i
].gsi_end
))
662 printk(KERN_ERR
"ERROR: Unable to locate IOAPIC for GSI %d\n", gsi
);
666 static u8
uniq_ioapic_id(u8 id
)
669 DECLARE_BITMAP(used
, 256);
670 bitmap_zero(used
, 256);
671 for (i
= 0; i
< nr_ioapics
; i
++) {
672 struct mpc_config_ioapic
*ia
= &mp_ioapics
[i
];
673 __set_bit(ia
->mpc_apicid
, used
);
675 if (!test_bit(id
, used
))
677 return find_first_zero_bit(used
, 256);
680 void __init
mp_register_ioapic(int id
, u32 address
, u32 gsi_base
)
684 if (bad_ioapic(address
))
689 mp_ioapics
[idx
].mpc_type
= MP_IOAPIC
;
690 mp_ioapics
[idx
].mpc_flags
= MPC_APIC_USABLE
;
691 mp_ioapics
[idx
].mpc_apicaddr
= address
;
693 set_fixmap_nocache(FIX_IO_APIC_BASE_0
+ idx
, address
);
694 mp_ioapics
[idx
].mpc_apicid
= uniq_ioapic_id(id
);
695 mp_ioapics
[idx
].mpc_apicver
= 0;
698 * Build basic IRQ lookup table to facilitate gsi->io_apic lookups
699 * and to prevent reprogramming of IOAPIC pins (PCI IRQs).
701 mp_ioapic_routing
[idx
].apic_id
= mp_ioapics
[idx
].mpc_apicid
;
702 mp_ioapic_routing
[idx
].gsi_base
= gsi_base
;
703 mp_ioapic_routing
[idx
].gsi_end
= gsi_base
+
704 io_apic_get_redir_entries(idx
);
706 printk(KERN_INFO
"IOAPIC[%d]: apic_id %d, address 0x%x, "
707 "GSI %d-%d\n", idx
, mp_ioapics
[idx
].mpc_apicid
,
708 mp_ioapics
[idx
].mpc_apicaddr
,
709 mp_ioapic_routing
[idx
].gsi_base
,
710 mp_ioapic_routing
[idx
].gsi_end
);
715 void __init
mp_override_legacy_irq(u8 bus_irq
, u8 polarity
, u8 trigger
, u32 gsi
)
717 struct mpc_config_intsrc intsrc
;
722 * Convert 'gsi' to 'ioapic.pin'.
724 ioapic
= mp_find_ioapic(gsi
);
727 pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
730 * TBD: This check is for faulty timer entries, where the override
731 * erroneously sets the trigger to level, resulting in a HUGE
732 * increase of timer interrupts!
734 if ((bus_irq
== 0) && (trigger
== 3))
737 intsrc
.mpc_type
= MP_INTSRC
;
738 intsrc
.mpc_irqtype
= mp_INT
;
739 intsrc
.mpc_irqflag
= (trigger
<< 2) | polarity
;
740 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
741 intsrc
.mpc_srcbusirq
= bus_irq
; /* IRQ */
742 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
; /* APIC ID */
743 intsrc
.mpc_dstirq
= pin
; /* INTIN# */
745 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, %d-%d\n",
746 intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
747 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
748 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
, intsrc
.mpc_dstirq
);
750 mp_irqs
[mp_irq_entries
] = intsrc
;
751 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
752 panic("Max # of irq sources exceeded!\n");
755 void __init
mp_config_acpi_legacy_irqs(void)
757 struct mpc_config_intsrc intsrc
;
762 * Fabricate the legacy ISA bus (bus #31).
764 set_bit(MP_ISA_BUS
, mp_bus_not_pci
);
767 * Locate the IOAPIC that manages the ISA IRQs (0-15).
769 ioapic
= mp_find_ioapic(0);
773 intsrc
.mpc_type
= MP_INTSRC
;
774 intsrc
.mpc_irqflag
= 0; /* Conforming */
775 intsrc
.mpc_srcbus
= MP_ISA_BUS
;
776 intsrc
.mpc_dstapic
= mp_ioapics
[ioapic
].mpc_apicid
;
779 * Use the default configuration for the IRQs 0-15. Unless
780 * overridden by (MADT) interrupt source override entries.
782 for (i
= 0; i
< 16; i
++) {
785 for (idx
= 0; idx
< mp_irq_entries
; idx
++) {
786 struct mpc_config_intsrc
*irq
= mp_irqs
+ idx
;
788 /* Do we already have a mapping for this ISA IRQ? */
789 if (irq
->mpc_srcbus
== MP_ISA_BUS
790 && irq
->mpc_srcbusirq
== i
)
793 /* Do we already have a mapping for this IOAPIC pin */
794 if ((irq
->mpc_dstapic
== intsrc
.mpc_dstapic
) &&
795 (irq
->mpc_dstirq
== i
))
799 if (idx
!= mp_irq_entries
) {
800 printk(KERN_DEBUG
"ACPI: IRQ%d used by override.\n", i
);
801 continue; /* IRQ already used */
804 intsrc
.mpc_irqtype
= mp_INT
;
805 intsrc
.mpc_srcbusirq
= i
; /* Identity mapped */
806 intsrc
.mpc_dstirq
= i
;
808 Dprintk("Int: type %d, pol %d, trig %d, bus %d, irq %d, "
809 "%d-%d\n", intsrc
.mpc_irqtype
, intsrc
.mpc_irqflag
& 3,
810 (intsrc
.mpc_irqflag
>> 2) & 3, intsrc
.mpc_srcbus
,
811 intsrc
.mpc_srcbusirq
, intsrc
.mpc_dstapic
,
814 mp_irqs
[mp_irq_entries
] = intsrc
;
815 if (++mp_irq_entries
== MAX_IRQ_SOURCES
)
816 panic("Max # of irq sources exceeded!\n");
820 int mp_register_gsi(u32 gsi
, int triggering
, int polarity
)
826 if (acpi_irq_model
!= ACPI_IRQ_MODEL_IOAPIC
)
829 /* Don't set up the ACPI SCI because it's already set up */
830 if (acpi_gbl_FADT
.sci_interrupt
== gsi
)
833 ioapic
= mp_find_ioapic(gsi
);
835 printk(KERN_WARNING
"No IOAPIC for GSI %u\n", gsi
);
839 ioapic_pin
= gsi
- mp_ioapic_routing
[ioapic
].gsi_base
;
842 * Avoid pin reprogramming. PRTs typically include entries
843 * with redundant pin->gsi mappings (but unique PCI devices);
844 * we only program the IOAPIC on the first.
846 bit
= ioapic_pin
% 32;
847 idx
= (ioapic_pin
< 32) ? 0 : (ioapic_pin
/ 32);
849 printk(KERN_ERR
"Invalid reference to IOAPIC pin "
850 "%d-%d\n", mp_ioapic_routing
[ioapic
].apic_id
,
854 if ((1 << bit
) & mp_ioapic_routing
[ioapic
].pin_programmed
[idx
]) {
855 Dprintk(KERN_DEBUG
"Pin %d-%d already programmed\n",
856 mp_ioapic_routing
[ioapic
].apic_id
, ioapic_pin
);
860 mp_ioapic_routing
[ioapic
].pin_programmed
[idx
] |= (1 << bit
);
862 io_apic_set_pci_routing(ioapic
, ioapic_pin
, gsi
,
863 triggering
== ACPI_EDGE_SENSITIVE
? 0 : 1,
864 polarity
== ACPI_ACTIVE_HIGH
? 0 : 1);
867 #endif /* CONFIG_ACPI */