arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  */
   9
  10 /*
  11  * This file handles the architecture-dependent parts of initialization
  12  */
  13
  14 #include <linux/errno.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mm.h>
  18 #include <linux/stddef.h>
  19 #include <linux/unistd.h>
  20 #include <linux/ptrace.h>
  21 #include <linux/slab.h>
  22 #include <linux/user.h>
  23 #include <linux/a.out.h>
  24 #include <linux/screen_info.h>
  25 #include <linux/ioport.h>
  26 #include <linux/delay.h>
  27 #include <linux/init.h>
  28 #include <linux/initrd.h>
  29 #include <linux/highmem.h>
  30 #include <linux/bootmem.h>
  31 #include <linux/module.h>
  32 #include <asm/processor.h>
  33 #include <linux/console.h>
  34 #include <linux/seq_file.h>
  35 #include <linux/crash_dump.h>
  36 #include <linux/root_dev.h>
  37 #include <linux/pci.h>
  38 #include <linux/acpi.h>
  39 #include <linux/kallsyms.h>
  40 #include <linux/edd.h>
  41 #include <linux/mmzone.h>
  42 #include <linux/kexec.h>
  43 #include <linux/cpufreq.h>
  44 #include <linux/dmi.h>
  45 #include <linux/dma-mapping.h>
  46 #include <linux/ctype.h>
  47
  48 #include <asm/mtrr.h>
  49 #include <asm/uaccess.h>
  50 #include <asm/system.h>
  51 #include <asm/io.h>
  52 #include <asm/smp.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <video/edid.h>
  56 #include <asm/e820.h>
  57 #include <asm/dma.h>
  58 #include <asm/mpspec.h>
  59 #include <asm/mmu_context.h>
  60 #include <asm/bootsetup.h>
  61 #include <asm/proto.h>
  62 #include <asm/setup.h>
  63 #include <asm/mach_apic.h>
  64 #include <asm/numa.h>
  65 #include <asm/sections.h>
  66 #include <asm/dmi.h>
  67
  68 /*
  69  * Machine setup..
  70  */
  71
  72 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  73 EXPORT_SYMBOL(boot_cpu_data);
  74
  75 unsigned long mmu_cr4_features;
  76
  77 int acpi_disabled;
  78 EXPORT_SYMBOL(acpi_disabled);
  79 #ifdef  CONFIG_ACPI
  80 extern int __initdata acpi_ht;
  81 extern acpi_interrupt_flags     acpi_sci_flags;
  82 int __initdata acpi_force = 0;
  83 #endif
  84
  85 int acpi_numa __initdata;
  86
  87 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  88 int bootloader_type;
  89
  90 unsigned long saved_video_mode;
  91
  92 /*
  93  * Early DMI memory
  94  */
  95 int dmi_alloc_index;
  96 char dmi_alloc_data[DMI_MAX_DATA];
  97
  98 /*
  99  * Setup options
 100  */
 101 struct screen_info screen_info;
 102 EXPORT_SYMBOL(screen_info);
 103 struct sys_desc_table_struct {
 104         unsigned short length;
 105         unsigned char table[0];
 106 };
 107
 108 struct edid_info edid_info;
 109 EXPORT_SYMBOL_GPL(edid_info);
 110 struct e820map e820;
 111
 112 extern int root_mountflags;
 113
 114 char command_line[COMMAND_LINE_SIZE];
 115
 116 struct resource standard_io_resources[] = {
 117         { .name = "dma1", .start = 0x00, .end = 0x1f,
 118                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 119         { .name = "pic1", .start = 0x20, .end = 0x21,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "timer0", .start = 0x40, .end = 0x43,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "timer1", .start = 0x50, .end = 0x53,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 129         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 130                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 131         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 132                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 133         { .name = "fpu", .start = 0xf0, .end = 0xff,
 134                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 135 };
 136
 137 #define STANDARD_IO_RESOURCES \
 138         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 139
 140 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 141
 142 struct resource data_resource = {
 143         .name = "Kernel data",
 144         .start = 0,
 145         .end = 0,
 146         .flags = IORESOURCE_RAM,
 147 };
 148 struct resource code_resource = {
 149         .name = "Kernel code",
 150         .start = 0,
 151         .end = 0,
 152         .flags = IORESOURCE_RAM,
 153 };
 154
 155 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 156
 157 static struct resource system_rom_resource = {
 158         .name = "System ROM",
 159         .start = 0xf0000,
 160         .end = 0xfffff,
 161         .flags = IORESOURCE_ROM,
 162 };
 163
 164 static struct resource extension_rom_resource = {
 165         .name = "Extension ROM",
 166         .start = 0xe0000,
 167         .end = 0xeffff,
 168         .flags = IORESOURCE_ROM,
 169 };
 170
 171 static struct resource adapter_rom_resources[] = {
 172         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 173                 .flags = IORESOURCE_ROM },
 174         { .name = "Adapter ROM", .start = 0, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM },
 178         { .name = "Adapter ROM", .start = 0, .end = 0,
 179                 .flags = IORESOURCE_ROM },
 180         { .name = "Adapter ROM", .start = 0, .end = 0,
 181                 .flags = IORESOURCE_ROM },
 182         { .name = "Adapter ROM", .start = 0, .end = 0,
 183                 .flags = IORESOURCE_ROM }
 184 };
 185
 186 #define ADAPTER_ROM_RESOURCES \
 187         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 188
 189 static struct resource video_rom_resource = {
 190         .name = "Video ROM",
 191         .start = 0xc0000,
 192         .end = 0xc7fff,
 193         .flags = IORESOURCE_ROM,
 194 };
 195
 196 static struct resource video_ram_resource = {
 197         .name = "Video RAM area",
 198         .start = 0xa0000,
 199         .end = 0xbffff,
 200         .flags = IORESOURCE_RAM,
 201 };
 202
 203 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 204
 205 static int __init romchecksum(unsigned char *rom, unsigned long length)
 206 {
 207         unsigned char *p, sum = 0;
 208
 209         for (p = rom; p < rom + length; p++)
 210                 sum += *p;
 211         return sum == 0;
 212 }
 213
 214 static void __init probe_roms(void)
 215 {
 216         unsigned long start, length, upper;
 217         unsigned char *rom;
 218         int           i;
 219
 220         /* video rom */
 221         upper = adapter_rom_resources[0].start;
 222         for (start = video_rom_resource.start; start < upper; start += 2048) {
 223                 rom = isa_bus_to_virt(start);
 224                 if (!romsignature(rom))
 225                         continue;
 226
 227                 video_rom_resource.start = start;
 228
 229                 /* 0 < length <= 0x7f * 512, historically */
 230                 length = rom[2] * 512;
 231
 232                 /* if checksum okay, trust length byte */
 233                 if (length && romchecksum(rom, length))
 234                         video_rom_resource.end = start + length - 1;
 235
 236                 request_resource(&iomem_resource, &video_rom_resource);
 237                 break;
 238                         }
 239
 240         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 241         if (start < upper)
 242                 start = upper;
 243
 244         /* system rom */
 245         request_resource(&iomem_resource, &system_rom_resource);
 246         upper = system_rom_resource.start;
 247
 248         /* check for extension rom (ignore length byte!) */
 249         rom = isa_bus_to_virt(extension_rom_resource.start);
 250         if (romsignature(rom)) {
 251                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 252                 if (romchecksum(rom, length)) {
 253                         request_resource(&iomem_resource, &extension_rom_resource);
 254                         upper = extension_rom_resource.start;
 255                 }
 256         }
 257
 258         /* check for adapter roms on 2k boundaries */
 259         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 260                 rom = isa_bus_to_virt(start);
 261                 if (!romsignature(rom))
 262                         continue;
 263
 264                 /* 0 < length <= 0x7f * 512, historically */
 265                 length = rom[2] * 512;
 266
 267                 /* but accept any length that fits if checksum okay */
 268                 if (!length || start + length > upper || !romchecksum(rom, length))
 269                         continue;
 270
 271                 adapter_rom_resources[i].start = start;
 272                 adapter_rom_resources[i].end = start + length - 1;
 273                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 274
 275                 start = adapter_rom_resources[i++].end & ~2047UL;
 276         }
 277 }
 278
 279 /* Check for full argument with no trailing characters */
 280 static int fullarg(char *p, char *arg)
 281 {
 282         int l = strlen(arg);
 283         return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
 284 }
 285
 286 static __init void parse_cmdline_early (char ** cmdline_p)
 287 {
 288         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 289         int len = 0;
 290         int userdef = 0;
 291
 292         for (;;) {
 293                 if (c != ' ')
 294                         goto next_char;
 295
 296 #ifdef  CONFIG_SMP
 297                 /*
 298                  * If the BIOS enumerates physical processors before logical,
 299                  * maxcpus=N at enumeration-time can be used to disable HT.
 300                  */
 301                 else if (!memcmp(from, "maxcpus=", 8)) {
 302                         extern unsigned int maxcpus;
 303
 304                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 305                 }
 306 #endif
 307 #ifdef CONFIG_ACPI
 308                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 309                 if (fullarg(from,"acpi=off"))
 310                         disable_acpi();
 311
 312                 if (fullarg(from, "acpi=force")) {
 313                         /* add later when we do DMI horrors: */
 314                         acpi_force = 1;
 315                         acpi_disabled = 0;
 316                 }
 317
 318                 /* acpi=ht just means: do ACPI MADT parsing
 319                    at bootup, but don't enable the full ACPI interpreter */
 320                 if (fullarg(from, "acpi=ht")) {
 321                         if (!acpi_force)
 322                                 disable_acpi();
 323                         acpi_ht = 1;
 324                 }
 325                 else if (fullarg(from, "pci=noacpi"))
 326                         acpi_disable_pci();
 327                 else if (fullarg(from, "acpi=noirq"))
 328                         acpi_noirq_set();
 329
 330                 else if (fullarg(from, "acpi_sci=edge"))
 331                         acpi_sci_flags.trigger =  1;
 332                 else if (fullarg(from, "acpi_sci=level"))
 333                         acpi_sci_flags.trigger = 3;
 334                 else if (fullarg(from, "acpi_sci=high"))
 335                         acpi_sci_flags.polarity = 1;
 336                 else if (fullarg(from, "acpi_sci=low"))
 337                         acpi_sci_flags.polarity = 3;
 338
 339                 /* acpi=strict disables out-of-spec workarounds */
 340                 else if (fullarg(from, "acpi=strict")) {
 341                         acpi_strict = 1;
 342                 }
 343 #ifdef CONFIG_X86_IO_APIC
 344                 else if (fullarg(from, "acpi_skip_timer_override"))
 345                         acpi_skip_timer_override = 1;
 346 #endif
 347 #endif
 348
 349                 if (fullarg(from, "disable_timer_pin_1"))
 350                         disable_timer_pin_1 = 1;
 351                 if (fullarg(from, "enable_timer_pin_1"))
 352                         disable_timer_pin_1 = -1;
 353
 354                 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
 355                         clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
 356                         disable_apic = 1;
 357                 }
 358
 359                 if (fullarg(from, "noapic"))
 360                         skip_ioapic_setup = 1;
 361
 362                 if (fullarg(from,"apic")) {
 363                         skip_ioapic_setup = 0;
 364                         ioapic_force = 1;
 365                 }
 366
 367                 if (!memcmp(from, "mem=", 4))
 368                         parse_memopt(from+4, &from);
 369
 370                 if (!memcmp(from, "memmap=", 7)) {
 371                         /* exactmap option is for used defined memory */
 372                         if (!memcmp(from+7, "exactmap", 8)) {
 373 #ifdef CONFIG_CRASH_DUMP
 374                                 /* If we are doing a crash dump, we
 375                                  * still need to know the real mem
 376                                  * size before original memory map is
 377                                  * reset.
 378                                  */
 379                                 saved_max_pfn = e820_end_of_ram();
 380 #endif
 381                                 from += 8+7;
 382                                 end_pfn_map = 0;
 383                                 e820.nr_map = 0;
 384                                 userdef = 1;
 385                         }
 386                         else {
 387                                 parse_memmapopt(from+7, &from);
 388                                 userdef = 1;
 389                         }
 390                 }
 391
 392 #ifdef CONFIG_NUMA
 393                 if (!memcmp(from, "numa=", 5))
 394                         numa_setup(from+5);
 395 #endif
 396
 397                 if (!memcmp(from,"iommu=",6)) {
 398                         iommu_setup(from+6);
 399                 }
 400
 401                 if (fullarg(from,"oops=panic"))
 402                         panic_on_oops = 1;
 403
 404                 if (!memcmp(from, "noexec=", 7))
 405                         nonx_setup(from + 7);
 406
 407 #ifdef CONFIG_KEXEC
 408                 /* crashkernel=size@addr specifies the location to reserve for
 409                  * a crash kernel.  By reserving this memory we guarantee
 410                  * that linux never set's it up as a DMA target.
 411                  * Useful for holding code to do something appropriate
 412                  * after a kernel panic.
 413                  */
 414                 else if (!memcmp(from, "crashkernel=", 12)) {
 415                         unsigned long size, base;
 416                         size = memparse(from+12, &from);
 417                         if (*from == '@') {
 418                                 base = memparse(from+1, &from);
 419                                 /* FIXME: Do I want a sanity check
 420                                  * to validate the memory range?
 421                                  */
 422                                 crashk_res.start = base;
 423                                 crashk_res.end   = base + size - 1;
 424                         }
 425                 }
 426 #endif
 427
 428 #ifdef CONFIG_PROC_VMCORE
 429                 /* elfcorehdr= specifies the location of elf core header
 430                  * stored by the crashed kernel. This option will be passed
 431                  * by kexec loader to the capture kernel.
 432                  */
 433                 else if(!memcmp(from, "elfcorehdr=", 11))
 434                         elfcorehdr_addr = memparse(from+11, &from);
 435 #endif
 436
 437 #ifdef CONFIG_HOTPLUG_CPU
 438                 else if (!memcmp(from, "additional_cpus=", 16))
 439                         setup_additional_cpus(from+16);
 440 #endif
 441
 442         next_char:
 443                 c = *(from++);
 444                 if (!c)
 445                         break;
 446                 if (COMMAND_LINE_SIZE <= ++len)
 447                         break;
 448                 *(to++) = c;
 449         }
 450         if (userdef) {
 451                 printk(KERN_INFO "user-defined physical RAM map:\n");
 452                 e820_print_map("user");
 453         }
 454         *to = '\0';
 455         *cmdline_p = command_line;
 456 }
 457
 458 #ifndef CONFIG_NUMA
 459 static void __init
 460 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 461 {
 462         unsigned long bootmap_size, bootmap;
 463
 464         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 465         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 466         if (bootmap == -1L)
 467                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 468         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 469         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 470         reserve_bootmem(bootmap, bootmap_size);
 471 }
 472 #endif
 473
 474 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 475 struct edd edd;
 476 #ifdef CONFIG_EDD_MODULE
 477 EXPORT_SYMBOL(edd);
 478 #endif
 479 /**
 480  * copy_edd() - Copy the BIOS EDD information
 481  *              from boot_params into a safe place.
 482  *
 483  */
 484 static inline void copy_edd(void)
 485 {
 486      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 487      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 488      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 489      edd.edd_info_nr = EDD_NR;
 490 }
 491 #else
 492 static inline void copy_edd(void)
 493 {
 494 }
 495 #endif
 496
 497 #define EBDA_ADDR_POINTER 0x40E
 498
 499 unsigned __initdata ebda_addr;
 500 unsigned __initdata ebda_size;
 501
 502 static void discover_ebda(void)
 503 {
 504         /*
 505          * there is a real-mode segmented pointer pointing to the
 506          * 4K EBDA area at 0x40E
 507          */
 508         ebda_addr = *(unsigned short *)EBDA_ADDR_POINTER;
 509         ebda_addr <<= 4;
 510
 511         ebda_size = *(unsigned short *)(unsigned long)ebda_addr;
 512
 513         /* Round EBDA up to pages */
 514         if (ebda_size == 0)
 515                 ebda_size = 1;
 516         ebda_size <<= 10;
 517         ebda_size = round_up(ebda_size + (ebda_addr & ~PAGE_MASK), PAGE_SIZE);
 518         if (ebda_size > 64*1024)
 519                 ebda_size = 64*1024;
 520 }
 521
 522 void __init setup_arch(char **cmdline_p)
 523 {
 524         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 525         screen_info = SCREEN_INFO;
 526         edid_info = EDID_INFO;
 527         saved_video_mode = SAVED_VIDEO_MODE;
 528         bootloader_type = LOADER_TYPE;
 529
 530 #ifdef CONFIG_BLK_DEV_RAM
 531         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 532         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 533         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 534 #endif
 535         setup_memory_region();
 536         copy_edd();
 537
 538         if (!MOUNT_ROOT_RDONLY)
 539                 root_mountflags &= ~MS_RDONLY;
 540         init_mm.start_code = (unsigned long) &_text;
 541         init_mm.end_code = (unsigned long) &_etext;
 542         init_mm.end_data = (unsigned long) &_edata;
 543         init_mm.brk = (unsigned long) &_end;
 544
 545         code_resource.start = virt_to_phys(&_text);
 546         code_resource.end = virt_to_phys(&_etext)-1;
 547         data_resource.start = virt_to_phys(&_etext);
 548         data_resource.end = virt_to_phys(&_edata)-1;
 549
 550         parse_cmdline_early(cmdline_p);
 551
 552         early_identify_cpu(&boot_cpu_data);
 553
 554         /*
 555          * partially used pages are not usable - thus
 556          * we are rounding upwards:
 557          */
 558         end_pfn = e820_end_of_ram();
 559         num_physpages = end_pfn;                /* for pfn_valid */
 560
 561         check_efer();
 562
 563         discover_ebda();
 564
 565         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 566
 567         dmi_scan_machine();
 568
 569         zap_low_mappings(0);
 570
 571 #ifdef CONFIG_ACPI
 572         /*
 573          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 574          * Call this early for SRAT node setup.
 575          */
 576         acpi_boot_table_init();
 577 #endif
 578
 579 #ifdef CONFIG_ACPI_NUMA
 580         /*
 581          * Parse SRAT to discover nodes.
 582          */
 583         acpi_numa_init();
 584 #endif
 585
 586 #ifdef CONFIG_NUMA
 587         numa_initmem_init(0, end_pfn);
 588 #else
 589         contig_initmem_init(0, end_pfn);
 590 #endif
 591
 592         /* Reserve direct mapping */
 593         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 594                                 (table_end - table_start) << PAGE_SHIFT);
 595
 596         /* reserve kernel */
 597         reserve_bootmem_generic(__pa_symbol(&_text),
 598                                 __pa_symbol(&_end) - __pa_symbol(&_text));
 599
 600         /*
 601          * reserve physical page 0 - it's a special BIOS page on many boxes,
 602          * enabling clean reboots, SMP operation, laptop functions.
 603          */
 604         reserve_bootmem_generic(0, PAGE_SIZE);
 605
 606         /* reserve ebda region */
 607         if (ebda_addr)
 608                 reserve_bootmem_generic(ebda_addr, ebda_size);
 609
 610 #ifdef CONFIG_SMP
 611         /*
 612          * But first pinch a few for the stack/trampoline stuff
 613          * FIXME: Don't need the extra page at 4K, but need to fix
 614          * trampoline before removing it. (see the GDT stuff)
 615          */
 616         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 617
 618         /* Reserve SMP trampoline */
 619         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 620 #endif
 621
 622 #ifdef CONFIG_ACPI_SLEEP
 623        /*
 624         * Reserve low memory region for sleep support.
 625         */
 626        acpi_reserve_bootmem();
 627 #endif
 628 #ifdef CONFIG_X86_LOCAL_APIC
 629         /*
 630          * Find and reserve possible boot-time SMP configuration:
 631          */
 632         find_smp_config();
 633 #endif
 634 #ifdef CONFIG_BLK_DEV_INITRD
 635         if (LOADER_TYPE && INITRD_START) {
 636                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 637                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 638                         initrd_start =
 639                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 640                         initrd_end = initrd_start+INITRD_SIZE;
 641                 }
 642                 else {
 643                         printk(KERN_ERR "initrd extends beyond end of memory "
 644                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 645                             (unsigned long)(INITRD_START + INITRD_SIZE),
 646                             (unsigned long)(end_pfn << PAGE_SHIFT));
 647                         initrd_start = 0;
 648                 }
 649         }
 650 #endif
 651 #ifdef CONFIG_KEXEC
 652         if (crashk_res.start != crashk_res.end) {
 653                 reserve_bootmem_generic(crashk_res.start,
 654                         crashk_res.end - crashk_res.start + 1);
 655         }
 656 #endif
 657
 658         paging_init();
 659
 660         check_ioapic();
 661
 662         /*
 663          * set this early, so we dont allocate cpu0
 664          * if MADT list doesnt list BSP first
 665          * mpparse.c/MP_processor_info() allocates logical cpu numbers.
 666          */
 667         cpu_set(0, cpu_present_map);
 668 #ifdef CONFIG_ACPI
 669         /*
 670          * Read APIC and some other early information from ACPI tables.
 671          */
 672         acpi_boot_init();
 673 #endif
 674
 675         init_cpu_to_node();
 676
 677 #ifdef CONFIG_X86_LOCAL_APIC
 678         /*
 679          * get boot-time SMP configuration:
 680          */
 681         if (smp_found_config)
 682                 get_smp_config();
 683         init_apic_mappings();
 684 #endif
 685
 686         /*
 687          * Request address space for all standard RAM and ROM resources
 688          * and also for regions reported as reserved by the e820.
 689          */
 690         probe_roms();
 691         e820_reserve_resources();
 692         e820_mark_nosave_regions();
 693
 694         request_resource(&iomem_resource, &video_ram_resource);
 695
 696         {
 697         unsigned i;
 698         /* request I/O space for devices used on all i[345]86 PCs */
 699         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 700                 request_resource(&ioport_resource, &standard_io_resources[i]);
 701         }
 702
 703         e820_setup_gap();
 704
 705 #ifdef CONFIG_VT
 706 #if defined(CONFIG_VGA_CONSOLE)
 707         conswitchp = &vga_con;
 708 #elif defined(CONFIG_DUMMY_CONSOLE)
 709         conswitchp = &dummy_con;
 710 #endif
 711 #endif
 712 }
 713
 714 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 715 {
 716         unsigned int *v;
 717
 718         if (c->extended_cpuid_level < 0x80000004)
 719                 return 0;
 720
 721         v = (unsigned int *) c->x86_model_id;
 722         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 723         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 724         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 725         c->x86_model_id[48] = 0;
 726         return 1;
 727 }
 728
 729
 730 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 731 {
 732         unsigned int n, dummy, eax, ebx, ecx, edx;
 733
 734         n = c->extended_cpuid_level;
 735
 736         if (n >= 0x80000005) {
 737                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 738                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 739                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 740                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 741                 /* On K8 L1 TLB is inclusive, so don't count it */
 742                 c->x86_tlbsize = 0;
 743         }
 744
 745         if (n >= 0x80000006) {
 746                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 747                 ecx = cpuid_ecx(0x80000006);
 748                 c->x86_cache_size = ecx >> 16;
 749                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 750
 751                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 752                 c->x86_cache_size, ecx & 0xFF);
 753         }
 754
 755         if (n >= 0x80000007)
 756                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 757         if (n >= 0x80000008) {
 758                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 759                 c->x86_virt_bits = (eax >> 8) & 0xff;
 760                 c->x86_phys_bits = eax & 0xff;
 761         }
 762 }
 763
 764 #ifdef CONFIG_NUMA
 765 static int nearby_node(int apicid)
 766 {
 767         int i;
 768         for (i = apicid - 1; i >= 0; i--) {
 769                 int node = apicid_to_node[i];
 770                 if (node != NUMA_NO_NODE && node_online(node))
 771                         return node;
 772         }
 773         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 774                 int node = apicid_to_node[i];
 775                 if (node != NUMA_NO_NODE && node_online(node))
 776                         return node;
 777         }
 778         return first_node(node_online_map); /* Shouldn't happen */
 779 }
 780 #endif
 781
 782 /*
 783  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 784  * Assumes number of cores is a power of two.
 785  */
 786 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 787 {
 788 #ifdef CONFIG_SMP
 789         unsigned bits;
 790 #ifdef CONFIG_NUMA
 791         int cpu = smp_processor_id();
 792         int node = 0;
 793         unsigned apicid = hard_smp_processor_id();
 794 #endif
 795         unsigned ecx = cpuid_ecx(0x80000008);
 796
 797         c->x86_max_cores = (ecx & 0xff) + 1;
 798
 799         /* CPU telling us the core id bits shift? */
 800         bits = (ecx >> 12) & 0xF;
 801
 802         /* Otherwise recompute */
 803         if (bits == 0) {
 804                 while ((1 << bits) < c->x86_max_cores)
 805                         bits++;
 806         }
 807
 808         /* Low order bits define the core id (index of core in socket) */
 809         c->cpu_core_id = c->phys_proc_id & ((1 << bits)-1);
 810         /* Convert the APIC ID into the socket ID */
 811         c->phys_proc_id = phys_pkg_id(bits);
 812
 813 #ifdef CONFIG_NUMA
 814         node = c->phys_proc_id;
 815         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 816                 node = apicid_to_node[apicid];
 817         if (!node_online(node)) {
 818                 /* Two possibilities here:
 819                    - The CPU is missing memory and no node was created.
 820                    In that case try picking one from a nearby CPU
 821                    - The APIC IDs differ from the HyperTransport node IDs
 822                    which the K8 northbridge parsing fills in.
 823                    Assume they are all increased by a constant offset,
 824                    but in the same order as the HT nodeids.
 825                    If that doesn't result in a usable node fall back to the
 826                    path for the previous case.  */
 827                 int ht_nodeid = apicid - (cpu_data[0].phys_proc_id << bits);
 828                 if (ht_nodeid >= 0 &&
 829                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 830                         node = apicid_to_node[ht_nodeid];
 831                 /* Pick a nearby node */
 832                 if (!node_online(node))
 833                         node = nearby_node(apicid);
 834         }
 835         numa_set_node(cpu, node);
 836
 837         printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
 838 #endif
 839 #endif
 840 }
 841
 842 static void __init init_amd(struct cpuinfo_x86 *c)
 843 {
 844         unsigned level;
 845
 846 #ifdef CONFIG_SMP
 847         unsigned long value;
 848
 849         /*
 850          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 851          * bit 6 of msr C001_0015
 852          *
 853          * Errata 63 for SH-B3 steppings
 854          * Errata 122 for all steppings (F+ have it disabled by default)
 855          */
 856         if (c->x86 == 15) {
 857                 rdmsrl(MSR_K8_HWCR, value);
 858                 value |= 1 << 6;
 859                 wrmsrl(MSR_K8_HWCR, value);
 860         }
 861 #endif
 862
 863         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 864            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 865         clear_bit(0*32+31, &c->x86_capability);
 866
 867         /* On C+ stepping K8 rep microcode works well for copy/memset */
 868         level = cpuid_eax(1);
 869         if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
 870                 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
 871
 872         /* Enable workaround for FXSAVE leak */
 873         if (c->x86 >= 6)
 874                 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
 875
 876         level = get_model_name(c);
 877         if (!level) {
 878                 switch (c->x86) {
 879                 case 15:
 880                         /* Should distinguish Models here, but this is only
 881                            a fallback anyways. */
 882                         strcpy(c->x86_model_id, "Hammer");
 883                         break;
 884                 }
 885         }
 886         display_cacheinfo(c);
 887
 888         /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
 889         if (c->x86_power & (1<<8))
 890                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 891
 892         /* Multi core CPU? */
 893         if (c->extended_cpuid_level >= 0x80000008)
 894                 amd_detect_cmp(c);
 895
 896         /* Fix cpuid4 emulation for more */
 897         num_cache_leaves = 3;
 898 }
 899
 900 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 901 {
 902 #ifdef CONFIG_SMP
 903         u32     eax, ebx, ecx, edx;
 904         int     index_msb, core_bits;
 905
 906         cpuid(1, &eax, &ebx, &ecx, &edx);
 907
 908
 909         if (!cpu_has(c, X86_FEATURE_HT))
 910                 return;
 911         if (cpu_has(c, X86_FEATURE_CMP_LEGACY))
 912                 goto out;
 913
 914         smp_num_siblings = (ebx & 0xff0000) >> 16;
 915
 916         if (smp_num_siblings == 1) {
 917                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 918         } else if (smp_num_siblings > 1 ) {
 919
 920                 if (smp_num_siblings > NR_CPUS) {
 921                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 922                         smp_num_siblings = 1;
 923                         return;
 924                 }
 925
 926                 index_msb = get_count_order(smp_num_siblings);
 927                 c->phys_proc_id = phys_pkg_id(index_msb);
 928
 929                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 930
 931                 index_msb = get_count_order(smp_num_siblings) ;
 932
 933                 core_bits = get_count_order(c->x86_max_cores);
 934
 935                 c->cpu_core_id = phys_pkg_id(index_msb) &
 936                                                ((1 << core_bits) - 1);
 937         }
 938 out:
 939         if ((c->x86_max_cores * smp_num_siblings) > 1) {
 940                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n", c->phys_proc_id);
 941                 printk(KERN_INFO  "CPU: Processor Core ID: %d\n", c->cpu_core_id);
 942         }
 943
 944 #endif
 945 }
 946
 947 /*
 948  * find out the number of processor cores on the die
 949  */
 950 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
 951 {
 952         unsigned int eax, t;
 953
 954         if (c->cpuid_level < 4)
 955                 return 1;
 956
 957         cpuid_count(4, 0, &eax, &t, &t, &t);
 958
 959         if (eax & 0x1f)
 960                 return ((eax >> 26) + 1);
 961         else
 962                 return 1;
 963 }
 964
 965 static void srat_detect_node(void)
 966 {
 967 #ifdef CONFIG_NUMA
 968         unsigned node;
 969         int cpu = smp_processor_id();
 970         int apicid = hard_smp_processor_id();
 971
 972         /* Don't do the funky fallback heuristics the AMD version employs
 973            for now. */
 974         node = apicid_to_node[apicid];
 975         if (node == NUMA_NO_NODE)
 976                 node = first_node(node_online_map);
 977         numa_set_node(cpu, node);
 978
 979         if (acpi_numa > 0)
 980                 printk(KERN_INFO "CPU %d/%x -> Node %d\n", cpu, apicid, node);
 981 #endif
 982 }
 983
 984 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
 985 {
 986         /* Cache sizes */
 987         unsigned n;
 988
 989         init_intel_cacheinfo(c);
 990         if (c->cpuid_level > 9 ) {
 991                 unsigned eax = cpuid_eax(10);
 992                 /* Check for version and the number of counters */
 993                 if ((eax & 0xff) && (((eax>>8) & 0xff) > 1))
 994                         set_bit(X86_FEATURE_ARCH_PERFMON, &c->x86_capability);
 995         }
 996
 997         n = c->extended_cpuid_level;
 998         if (n >= 0x80000008) {
 999                 unsigned eax = cpuid_eax(0x80000008);
1000                 c->x86_virt_bits = (eax >> 8) & 0xff;
1001                 c->x86_phys_bits = eax & 0xff;
1002                 /* CPUID workaround for Intel 0F34 CPU */
1003                 if (c->x86_vendor == X86_VENDOR_INTEL &&
1004                     c->x86 == 0xF && c->x86_model == 0x3 &&
1005                     c->x86_mask == 0x4)
1006                         c->x86_phys_bits = 36;
1007         }
1008
1009         if (c->x86 == 15)
1010                 c->x86_cache_alignment = c->x86_clflush_size * 2;
1011         if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1012             (c->x86 == 0x6 && c->x86_model >= 0x0e))
1013                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1014         set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1015         c->x86_max_cores = intel_num_cpu_cores(c);
1016
1017         srat_detect_node();
1018 }
1019
1020 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1021 {
1022         char *v = c->x86_vendor_id;
1023
1024         if (!strcmp(v, "AuthenticAMD"))
1025                 c->x86_vendor = X86_VENDOR_AMD;
1026         else if (!strcmp(v, "GenuineIntel"))
1027                 c->x86_vendor = X86_VENDOR_INTEL;
1028         else
1029                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1030 }
1031
1032 struct cpu_model_info {
1033         int vendor;
1034         int family;
1035         char *model_names[16];
1036 };
1037
1038 /* Do some early cpuid on the boot CPU to get some parameter that are
1039    needed before check_bugs. Everything advanced is in identify_cpu
1040    below. */
1041 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1042 {
1043         u32 tfms;
1044
1045         c->loops_per_jiffy = loops_per_jiffy;
1046         c->x86_cache_size = -1;
1047         c->x86_vendor = X86_VENDOR_UNKNOWN;
1048         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1049         c->x86_vendor_id[0] = '\0'; /* Unset */
1050         c->x86_model_id[0] = '\0';  /* Unset */
1051         c->x86_clflush_size = 64;
1052         c->x86_cache_alignment = c->x86_clflush_size;
1053         c->x86_max_cores = 1;
1054         c->extended_cpuid_level = 0;
1055         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1056
1057         /* Get vendor name */
1058         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1059               (unsigned int *)&c->x86_vendor_id[0],
1060               (unsigned int *)&c->x86_vendor_id[8],
1061               (unsigned int *)&c->x86_vendor_id[4]);
1062
1063         get_cpu_vendor(c);
1064
1065         /* Initialize the standard set of capabilities */
1066         /* Note that the vendor-specific code below might override */
1067
1068         /* Intel-defined flags: level 0x00000001 */
1069         if (c->cpuid_level >= 0x00000001) {
1070                 __u32 misc;
1071                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1072                       &c->x86_capability[0]);
1073                 c->x86 = (tfms >> 8) & 0xf;
1074                 c->x86_model = (tfms >> 4) & 0xf;
1075                 c->x86_mask = tfms & 0xf;
1076                 if (c->x86 == 0xf)
1077                         c->x86 += (tfms >> 20) & 0xff;
1078                 if (c->x86 >= 0x6)
1079                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1080                 if (c->x86_capability[0] & (1<<19))
1081                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1082         } else {
1083                 /* Have CPUID level 0 only - unheard of */
1084                 c->x86 = 4;
1085         }
1086
1087 #ifdef CONFIG_SMP
1088         c->phys_proc_id = (cpuid_ebx(1) >> 24) & 0xff;
1089 #endif
1090 }
1091
1092 /*
1093  * This does the hard work of actually picking apart the CPU stuff...
1094  */
1095 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1096 {
1097         int i;
1098         u32 xlvl;
1099
1100         early_identify_cpu(c);
1101
1102         /* AMD-defined flags: level 0x80000001 */
1103         xlvl = cpuid_eax(0x80000000);
1104         c->extended_cpuid_level = xlvl;
1105         if ((xlvl & 0xffff0000) == 0x80000000) {
1106                 if (xlvl >= 0x80000001) {
1107                         c->x86_capability[1] = cpuid_edx(0x80000001);
1108                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1109                 }
1110                 if (xlvl >= 0x80000004)
1111                         get_model_name(c); /* Default name */
1112         }
1113
1114         /* Transmeta-defined flags: level 0x80860001 */
1115         xlvl = cpuid_eax(0x80860000);
1116         if ((xlvl & 0xffff0000) == 0x80860000) {
1117                 /* Don't set x86_cpuid_level here for now to not confuse. */
1118                 if (xlvl >= 0x80860001)
1119                         c->x86_capability[2] = cpuid_edx(0x80860001);
1120         }
1121
1122         c->apicid = phys_pkg_id(0);
1123
1124         /*
1125          * Vendor-specific initialization.  In this section we
1126          * canonicalize the feature flags, meaning if there are
1127          * features a certain CPU supports which CPUID doesn't
1128          * tell us, CPUID claiming incorrect flags, or other bugs,
1129          * we handle them here.
1130          *
1131          * At the end of this section, c->x86_capability better
1132          * indicate the features this CPU genuinely supports!
1133          */
1134         switch (c->x86_vendor) {
1135         case X86_VENDOR_AMD:
1136                 init_amd(c);
1137                 break;
1138
1139         case X86_VENDOR_INTEL:
1140                 init_intel(c);
1141                 break;
1142
1143         case X86_VENDOR_UNKNOWN:
1144         default:
1145                 display_cacheinfo(c);
1146                 break;
1147         }
1148
1149         select_idle_routine(c);
1150         detect_ht(c);
1151
1152         /*
1153          * On SMP, boot_cpu_data holds the common feature set between
1154          * all CPUs; so make sure that we indicate which features are
1155          * common between the CPUs.  The first time this routine gets
1156          * executed, c == &boot_cpu_data.
1157          */
1158         if (c != &boot_cpu_data) {
1159                 /* AND the already accumulated flags with these */
1160                 for (i = 0 ; i < NCAPINTS ; i++)
1161                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1162         }
1163
1164 #ifdef CONFIG_X86_MCE
1165         mcheck_init(c);
1166 #endif
1167         if (c == &boot_cpu_data)
1168                 mtrr_bp_init();
1169         else
1170                 mtrr_ap_init();
1171 #ifdef CONFIG_NUMA
1172         numa_add_cpu(smp_processor_id());
1173 #endif
1174 }
1175
1176
1177 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1178 {
1179         if (c->x86_model_id[0])
1180                 printk("%s", c->x86_model_id);
1181
1182         if (c->x86_mask || c->cpuid_level >= 0)
1183                 printk(" stepping %02x\n", c->x86_mask);
1184         else
1185                 printk("\n");
1186 }
1187
1188 /*
1189  *      Get CPU information for use by the procfs.
1190  */
1191
1192 static int show_cpuinfo(struct seq_file *m, void *v)
1193 {
1194         struct cpuinfo_x86 *c = v;
1195
1196         /*
1197          * These flag bits must match the definitions in <asm/cpufeature.h>.
1198          * NULL means this bit is undefined or reserved; either way it doesn't
1199          * have meaning as far as Linux is concerned.  Note that it's important
1200          * to realize there is a difference between this table and CPUID -- if
1201          * applications want to get the raw CPUID data, they should access
1202          * /dev/cpu/<cpu_nr>/cpuid instead.
1203          */
1204         static char *x86_cap_flags[] = {
1205                 /* Intel-defined */
1206                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1207                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1208                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1209                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1210
1211                 /* AMD-defined */
1212                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1213                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1214                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1215                 NULL, "fxsr_opt", NULL, "rdtscp", NULL, "lm", "3dnowext", "3dnow",
1216
1217                 /* Transmeta-defined */
1218                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1219                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1220                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1221                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1222
1223                 /* Other (Linux-defined) */
1224                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1225                 "constant_tsc", NULL, NULL,
1226                 "up", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1227                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1228                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1229
1230                 /* Intel-defined (#2) */
1231                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1232                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1233                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1234                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1235
1236                 /* VIA/Cyrix/Centaur-defined */
1237                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1238                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1239                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1240                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1241
1242                 /* AMD-defined (#2) */
1243                 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1244                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1245                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1246                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1247         };
1248         static char *x86_power_flags[] = {
1249                 "ts",   /* temperature sensor */
1250                 "fid",  /* frequency id control */
1251                 "vid",  /* voltage id control */
1252                 "ttp",  /* thermal trip */
1253                 "tm",
1254                 "stc",
1255                 NULL,
1256                 /* nothing */   /* constant_tsc - moved to flags */
1257         };
1258
1259
1260 #ifdef CONFIG_SMP
1261         if (!cpu_online(c-cpu_data))
1262                 return 0;
1263 #endif
1264
1265         seq_printf(m,"processor\t: %u\n"
1266                      "vendor_id\t: %s\n"
1267                      "cpu family\t: %d\n"
1268                      "model\t\t: %d\n"
1269                      "model name\t: %s\n",
1270                      (unsigned)(c-cpu_data),
1271                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1272                      c->x86,
1273                      (int)c->x86_model,
1274                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1275
1276         if (c->x86_mask || c->cpuid_level >= 0)
1277                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1278         else
1279                 seq_printf(m, "stepping\t: unknown\n");
1280
1281         if (cpu_has(c,X86_FEATURE_TSC)) {
1282                 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1283                 if (!freq)
1284                         freq = cpu_khz;
1285                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1286                              freq / 1000, (freq % 1000));
1287         }
1288
1289         /* Cache size */
1290         if (c->x86_cache_size >= 0)
1291                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1292
1293 #ifdef CONFIG_SMP
1294         if (smp_num_siblings * c->x86_max_cores > 1) {
1295                 int cpu = c - cpu_data;
1296                 seq_printf(m, "physical id\t: %d\n", c->phys_proc_id);
1297                 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1298                 seq_printf(m, "core id\t\t: %d\n", c->cpu_core_id);
1299                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1300         }
1301 #endif
1302
1303         seq_printf(m,
1304                 "fpu\t\t: yes\n"
1305                 "fpu_exception\t: yes\n"
1306                 "cpuid level\t: %d\n"
1307                 "wp\t\t: yes\n"
1308                 "flags\t\t:",
1309                    c->cpuid_level);
1310
1311         {
1312                 int i;
1313                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1314                         if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1315                                 seq_printf(m, " %s", x86_cap_flags[i]);
1316         }
1317
1318         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1319                    c->loops_per_jiffy/(500000/HZ),
1320                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1321
1322         if (c->x86_tlbsize > 0)
1323                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1324         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1325         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1326
1327         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1328                    c->x86_phys_bits, c->x86_virt_bits);
1329
1330         seq_printf(m, "power management:");
1331         {
1332                 unsigned i;
1333                 for (i = 0; i < 32; i++)
1334                         if (c->x86_power & (1 << i)) {
1335                                 if (i < ARRAY_SIZE(x86_power_flags) &&
1336                                         x86_power_flags[i])
1337                                         seq_printf(m, "%s%s",
1338                                                 x86_power_flags[i][0]?" ":"",
1339                                                 x86_power_flags[i]);
1340                                 else
1341                                         seq_printf(m, " [%d]", i);
1342                         }
1343         }
1344
1345         seq_printf(m, "\n\n");
1346
1347         return 0;
1348 }
1349
1350 static void *c_start(struct seq_file *m, loff_t *pos)
1351 {
1352         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1353 }
1354
1355 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1356 {
1357         ++*pos;
1358         return c_start(m, pos);
1359 }
1360
1361 static void c_stop(struct seq_file *m, void *v)
1362 {
1363 }
1364
1365 struct seq_operations cpuinfo_op = {
1366         .start =c_start,
1367         .next = c_next,
1368         .stop = c_stop,
1369         .show = show_cpuinfo,
1370 };
1371
1372 #if defined(CONFIG_INPUT_PCSPKR) || defined(CONFIG_INPUT_PCSPKR_MODULE)
1373 #include <linux/platform_device.h>
1374 static __init int add_pcspkr(void)
1375 {
1376         struct platform_device *pd;
1377         int ret;
1378
1379         pd = platform_device_alloc("pcspkr", -1);
1380         if (!pd)
1381                 return -ENOMEM;
1382
1383         ret = platform_device_add(pd);
1384         if (ret)
1385                 platform_device_put(pd);
1386
1387         return ret;
1388 }
1389 device_initcall(add_pcspkr);
1390 #endif