x86, delay: tsc based udelay should have rdtsc_barrier
[linux-2.6/mini2440.git] / drivers / net / netxen / netxen_nic_phan_reg.h
blobb73a62ca74f8b835a9dfe184195f0356ac5afb4d
1 /*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
31 #ifndef __NIC_PHAN_REG_H_
32 #define __NIC_PHAN_REG_H_
35 * CRB Registers or queue message done only at initialization time.
37 #define NIC_CRB_BASE NETXEN_CAM_RAM(0x200)
38 #define NETXEN_NIC_REG(X) (NIC_CRB_BASE+(X))
39 #define NIC_CRB_BASE_2 NETXEN_CAM_RAM(0x700)
40 #define NETXEN_NIC_REG_2(X) (NIC_CRB_BASE_2+(X))
42 #define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00)
43 #define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04)
44 #define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08)
45 #define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
46 #define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10)
47 #define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
48 #define NX_CDRP_CRB_OFFSET NETXEN_NIC_REG(0x18)
49 #define NX_ARG1_CRB_OFFSET NETXEN_NIC_REG(0x1c)
50 #define NX_ARG2_CRB_OFFSET NETXEN_NIC_REG(0x20)
51 #define NX_ARG3_CRB_OFFSET NETXEN_NIC_REG(0x24)
52 #define NX_SIGN_CRB_OFFSET NETXEN_NIC_REG(0x28)
53 #define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20)
54 #define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24)
55 #define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28)
56 #define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x2c)
57 #define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x30)
58 #define CRB_MMAP_ADDR_3 NETXEN_NIC_REG(0x34)
59 #define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x38)
60 #define CRB_HOST_DUMMY_BUF_ADDR_HI NETXEN_NIC_REG(0x3c)
61 #define CRB_HOST_DUMMY_BUF_ADDR_LO NETXEN_NIC_REG(0x40)
62 #define CRB_MMAP_ADDR_0 NETXEN_NIC_REG(0x44)
63 #define CRB_MMAP_ADDR_1 NETXEN_NIC_REG(0x48)
64 #define CRB_MMAP_ADDR_2 NETXEN_NIC_REG(0x4c)
65 #define CRB_CMDPEG_STATE NETXEN_NIC_REG(0x50)
66 #define CRB_MMAP_SIZE_0 NETXEN_NIC_REG(0x54)
67 #define CRB_MMAP_SIZE_1 NETXEN_NIC_REG(0x58)
68 #define CRB_MMAP_SIZE_2 NETXEN_NIC_REG(0x5c)
69 #define CRB_MMAP_SIZE_3 NETXEN_NIC_REG(0x60)
70 #define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x64)
71 #define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x68)
72 #define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x6c)
73 #define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x70)
74 #define CRB_RX_PKT_TIMER NETXEN_NIC_REG(0x74)
75 #define CRB_TX_PKT_TIMER NETXEN_NIC_REG(0x78)
76 #define CRB_RX_PKT_CNT NETXEN_NIC_REG(0x7c)
77 #define CRB_RX_TMR_CNT NETXEN_NIC_REG(0x80)
78 #define CRB_RX_LRO_TIMER NETXEN_NIC_REG(0x84)
79 #define CRB_RX_LRO_MID_TIMER NETXEN_NIC_REG(0x88)
80 #define CRB_DMA_MAX_RCV_BUFS NETXEN_NIC_REG(0x8c)
81 #define CRB_MAX_DMA_ENTRIES NETXEN_NIC_REG(0x90)
82 #define CRB_XG_STATE NETXEN_NIC_REG(0x94) /* XG Link status */
83 #define CRB_XG_STATE_P3 NETXEN_NIC_REG(0x98) /* XG PF Link status */
84 #define CRB_AGENT_TX_SIZE NETXEN_NIC_REG(0x9c)
85 #define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xa0)
86 #define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xa4)
87 #define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xa8)
88 #define CRB_TX_STATE NETXEN_NIC_REG(0xac)
89 #define CRB_TX_COUNT NETXEN_NIC_REG(0xb0)
90 #define CRB_RX_STATE NETXEN_NIC_REG(0xb4)
91 #define CRB_RX_PERF_DEBUG_1 NETXEN_NIC_REG(0xb8)
92 #define CRB_RX_LRO_CONTROL NETXEN_NIC_REG(0xbc)
93 #define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
94 #define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4)
95 #define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
96 #define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc)
97 #define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
98 #define CRB_CTX_RESET NETXEN_NIC_REG(0xd8)
99 #define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc)
100 #define CRB_HOST_STS_CONS NETXEN_NIC_REG(0xe0)
101 #define CRB_PEG_CMD_PROD NETXEN_NIC_REG(0xe4)
102 #define CRB_PF_LINK_SPEED_1 NETXEN_NIC_REG(0xe8)
103 #define CRB_PF_LINK_SPEED_2 NETXEN_NIC_REG(0xec)
104 #define CRB_HOST_BUFFER_CONS NETXEN_NIC_REG(0xf0)
105 #define CRB_JUMBO_BUFFER_PROD NETXEN_NIC_REG(0xf4)
106 #define CRB_JUMBO_BUFFER_CONS NETXEN_NIC_REG(0xf8)
107 #define CRB_HOST_DUMMY_BUF NETXEN_NIC_REG(0xfc)
109 #define CRB_RCVPEG_STATE NETXEN_NIC_REG(0x13c)
110 #define CRB_CMD_PRODUCER_OFFSET_1 NETXEN_NIC_REG(0x1ac)
111 #define CRB_CMD_CONSUMER_OFFSET_1 NETXEN_NIC_REG(0x1b0)
112 #define CRB_CMD_PRODUCER_OFFSET_2 NETXEN_NIC_REG(0x1b8)
113 #define CRB_CMD_CONSUMER_OFFSET_2 NETXEN_NIC_REG(0x1bc)
114 #define CRB_CMD_PRODUCER_OFFSET_3 NETXEN_NIC_REG(0x1d0)
115 #define CRB_CMD_CONSUMER_OFFSET_3 NETXEN_NIC_REG(0x1d4)
116 #define CRB_TEMP_STATE NETXEN_NIC_REG(0x1b4)
118 #define CRB_V2P_0 NETXEN_NIC_REG(0x290)
119 #define CRB_V2P_1 NETXEN_NIC_REG(0x294)
120 #define CRB_V2P_2 NETXEN_NIC_REG(0x298)
121 #define CRB_V2P_3 NETXEN_NIC_REG(0x29c)
122 #define CRB_V2P(port) (CRB_V2P_0+((port)*4))
123 #define CRB_DRIVER_VERSION NETXEN_NIC_REG(0x2a0)
124 #define CRB_SW_INT_MASK_0 NETXEN_NIC_REG(0x1d8)
125 #define CRB_SW_INT_MASK_1 NETXEN_NIC_REG(0x1e0)
126 #define CRB_SW_INT_MASK_2 NETXEN_NIC_REG(0x1e4)
127 #define CRB_SW_INT_MASK_3 NETXEN_NIC_REG(0x1e8)
129 #define CRB_FW_CAPABILITIES_1 NETXEN_CAM_RAM(0x128)
130 #define CRB_MAC_BLOCK_START NETXEN_CAM_RAM(0x1c0)
133 * capabilities register, can be used to selectively enable/disable features
134 * for backward compability
136 #define CRB_NIC_CAPABILITIES_HOST NETXEN_NIC_REG(0x1a8)
137 #define CRB_NIC_CAPABILITIES_FW NETXEN_NIC_REG(0x1dc)
138 #define CRB_NIC_MSI_MODE_HOST NETXEN_NIC_REG(0x270)
139 #define CRB_NIC_MSI_MODE_FW NETXEN_NIC_REG(0x274)
141 #define INTR_SCHEME_PERPORT 0x1
142 #define MSI_MODE_MULTIFUNC 0x1
144 /* used for ethtool tests */
145 #define CRB_SCRATCHPAD_TEST NETXEN_NIC_REG(0x280)
148 * CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
149 * which can be read by the Phantom host to get producer/consumer indexes from
150 * Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
151 * registers will be used for the addresses of the ring's shared memory
152 * on the Phantom.
155 #define nx_get_temp_val(x) ((x) >> 16)
156 #define nx_get_temp_state(x) ((x) & 0xffff)
157 #define nx_encode_temp(val, state) (((val) << 16) | (state))
160 * CRB registers used by the receive peg logic.
163 struct netxen_recv_crb {
164 u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];
165 u32 crb_sts_consumer[NUM_STS_DESC_RINGS];
166 u32 sw_int_mask[NUM_STS_DESC_RINGS];
170 * Temperature control.
172 enum {
173 NX_TEMP_NORMAL = 0x1, /* Normal operating range */
174 NX_TEMP_WARN, /* Sound alert, temperature getting high */
175 NX_TEMP_PANIC /* Fatal error, hardware has shut down. */
178 #endif /* __NIC_PHAN_REG_H_ */