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x86, delay: tsc based udelay should have rdtsc_barrier
[linux-2.6/mini2440.git] / drivers / net / cnic.c
blob44f77eb1180f4c57fbf523fc809ea08254ca8454
1 /* cnic.c: Broadcom CNIC core network driver.
2 *
3 * Copyright (c) 2006-2009 Broadcom Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
13 #include <linux/module.h>
14
15 #include <linux/kernel.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/slab.h>
19 #include <linux/pci.h>
20 #include <linux/init.h>
21 #include <linux/netdevice.h>
22 #include <linux/uio_driver.h>
23 #include <linux/in.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/delay.h>
26 #include <linux/ethtool.h>
27 #include <linux/if_vlan.h>
28 #include <linux/module.h>
29
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
31 #define BCM_VLAN 1
32 #endif
33 #include <net/ip.h>
34 #include <net/tcp.h>
35 #include <net/route.h>
36 #include <net/ipv6.h>
37 #include <net/ip6_route.h>
38 #include <scsi/iscsi_if.h>
39
40 #include "cnic_if.h"
41 #include "bnx2.h"
42 #include "cnic.h"
43 #include "cnic_defs.h"
44
45 #define DRV_MODULE_NAME "cnic"
46 #define PFX DRV_MODULE_NAME ": "
47
48 static char version[] __devinitdata =
49 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
50
51 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
52 "Chen (zongxi@broadcom.com");
53 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
54 MODULE_LICENSE("GPL");
55 MODULE_VERSION(CNIC_MODULE_VERSION);
56
57 static LIST_HEAD(cnic_dev_list);
58 static DEFINE_RWLOCK(cnic_dev_lock);
59 static DEFINE_MUTEX(cnic_lock);
60
61 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
62
63 static int cnic_service_bnx2(void *, void *);
64 static int cnic_ctl(void *, struct cnic_ctl_info *);
65
66 static struct cnic_ops cnic_bnx2_ops = {
67 .cnic_owner = THIS_MODULE,
68 .cnic_handler = cnic_service_bnx2,
69 .cnic_ctl = cnic_ctl,
70 };
71
72 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *);
73 static void cnic_init_bnx2_tx_ring(struct cnic_dev *);
74 static void cnic_init_bnx2_rx_ring(struct cnic_dev *);
75 static int cnic_cm_set_pg(struct cnic_sock *);
76
77 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
78 {
79 struct cnic_dev *dev = uinfo->priv;
80 struct cnic_local *cp = dev->cnic_priv;
81
82 if (!capable(CAP_NET_ADMIN))
83 return -EPERM;
84
85 if (cp->uio_dev != -1)
86 return -EBUSY;
87
88 cp->uio_dev = iminor(inode);
89
90 cnic_shutdown_bnx2_rx_ring(dev);
91
92 cnic_init_bnx2_tx_ring(dev);
93 cnic_init_bnx2_rx_ring(dev);
94
95 return 0;
96 }
97
98 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
99 {
100 struct cnic_dev *dev = uinfo->priv;
101 struct cnic_local *cp = dev->cnic_priv;
102
103 cp->uio_dev = -1;
104 return 0;
105 }
106
107 static inline void cnic_hold(struct cnic_dev *dev)
108 {
109 atomic_inc(&dev->ref_count);
110 }
111
112 static inline void cnic_put(struct cnic_dev *dev)
113 {
114 atomic_dec(&dev->ref_count);
115 }
116
117 static inline void csk_hold(struct cnic_sock *csk)
118 {
119 atomic_inc(&csk->ref_count);
120 }
121
122 static inline void csk_put(struct cnic_sock *csk)
123 {
124 atomic_dec(&csk->ref_count);
125 }
126
127 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
128 {
129 struct cnic_dev *cdev;
130
131 read_lock(&cnic_dev_lock);
132 list_for_each_entry(cdev, &cnic_dev_list, list) {
133 if (netdev == cdev->netdev) {
134 cnic_hold(cdev);
135 read_unlock(&cnic_dev_lock);
136 return cdev;
137 }
138 }
139 read_unlock(&cnic_dev_lock);
140 return NULL;
141 }
142
143 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
144 {
145 struct cnic_local *cp = dev->cnic_priv;
146 struct cnic_eth_dev *ethdev = cp->ethdev;
147 struct drv_ctl_info info;
148 struct drv_ctl_io *io = &info.data.io;
149
150 info.cmd = DRV_CTL_CTX_WR_CMD;
151 io->cid_addr = cid_addr;
152 io->offset = off;
153 io->data = val;
154 ethdev->drv_ctl(dev->netdev, &info);
155 }
156
157 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
158 {
159 struct cnic_local *cp = dev->cnic_priv;
160 struct cnic_eth_dev *ethdev = cp->ethdev;
161 struct drv_ctl_info info;
162 struct drv_ctl_io *io = &info.data.io;
163
164 info.cmd = DRV_CTL_IO_WR_CMD;
165 io->offset = off;
166 io->data = val;
167 ethdev->drv_ctl(dev->netdev, &info);
168 }
169
170 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
171 {
172 struct cnic_local *cp = dev->cnic_priv;
173 struct cnic_eth_dev *ethdev = cp->ethdev;
174 struct drv_ctl_info info;
175 struct drv_ctl_io *io = &info.data.io;
176
177 info.cmd = DRV_CTL_IO_RD_CMD;
178 io->offset = off;
179 ethdev->drv_ctl(dev->netdev, &info);
180 return io->data;
181 }
182
183 static int cnic_in_use(struct cnic_sock *csk)
184 {
185 return test_bit(SK_F_INUSE, &csk->flags);
186 }
187
188 static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
189 {
190 struct cnic_local *cp = dev->cnic_priv;
191 struct cnic_eth_dev *ethdev = cp->ethdev;
192 struct drv_ctl_info info;
193
194 info.cmd = DRV_CTL_COMPLETION_CMD;
195 info.data.comp.comp_count = count;
196 ethdev->drv_ctl(dev->netdev, &info);
197 }
198
199 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
200 struct cnic_sock *csk)
201 {
202 struct iscsi_path path_req;
203 char *buf = NULL;
204 u16 len = 0;
205 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
206 struct cnic_ulp_ops *ulp_ops;
207
208 if (cp->uio_dev == -1)
209 return -ENODEV;
210
211 if (csk) {
212 len = sizeof(path_req);
213 buf = (char *) &path_req;
214 memset(&path_req, 0, len);
215
216 msg_type = ISCSI_KEVENT_PATH_REQ;
217 path_req.handle = (u64) csk->l5_cid;
218 if (test_bit(SK_F_IPV6, &csk->flags)) {
219 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
220 sizeof(struct in6_addr));
221 path_req.ip_addr_len = 16;
222 } else {
223 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
224 sizeof(struct in_addr));
225 path_req.ip_addr_len = 4;
226 }
227 path_req.vlan_id = csk->vlan_id;
228 path_req.pmtu = csk->mtu;
229 }
230
231 rcu_read_lock();
232 ulp_ops = rcu_dereference(cp->ulp_ops[CNIC_ULP_ISCSI]);
233 if (ulp_ops)
234 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
235 rcu_read_unlock();
236 return 0;
237 }
238
239 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
240 char *buf, u16 len)
241 {
242 int rc = -EINVAL;
243
244 switch (msg_type) {
245 case ISCSI_UEVENT_PATH_UPDATE: {
246 struct cnic_local *cp;
247 u32 l5_cid;
248 struct cnic_sock *csk;
249 struct iscsi_path *path_resp;
250
251 if (len < sizeof(*path_resp))
252 break;
253
254 path_resp = (struct iscsi_path *) buf;
255 cp = dev->cnic_priv;
256 l5_cid = (u32) path_resp->handle;
257 if (l5_cid >= MAX_CM_SK_TBL_SZ)
258 break;
259
260 csk = &cp->csk_tbl[l5_cid];
261 csk_hold(csk);
262 if (cnic_in_use(csk)) {
263 memcpy(csk->ha, path_resp->mac_addr, 6);
264 if (test_bit(SK_F_IPV6, &csk->flags))
265 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
266 sizeof(struct in6_addr));
267 else
268 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
269 sizeof(struct in_addr));
270 if (is_valid_ether_addr(csk->ha))
271 cnic_cm_set_pg(csk);
272 }
273 csk_put(csk);
274 rc = 0;
275 }
276 }
277
278 return rc;
279 }
280
281 static int cnic_offld_prep(struct cnic_sock *csk)
282 {
283 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
284 return 0;
285
286 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
287 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
288 return 0;
289 }
290
291 return 1;
292 }
293
294 static int cnic_close_prep(struct cnic_sock *csk)
295 {
296 clear_bit(SK_F_CONNECT_START, &csk->flags);
297 smp_mb__after_clear_bit();
298
299 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
300 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
301 msleep(1);
302
303 return 1;
304 }
305 return 0;
306 }
307
308 static int cnic_abort_prep(struct cnic_sock *csk)
309 {
310 clear_bit(SK_F_CONNECT_START, &csk->flags);
311 smp_mb__after_clear_bit();
312
313 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
314 msleep(1);
315
316 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
317 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
318 return 1;
319 }
320
321 return 0;
322 }
323
324 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
325 {
326 struct cnic_dev *dev;
327
328 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
329 printk(KERN_ERR PFX "cnic_register_driver: Bad type %d\n",
330 ulp_type);
331 return -EINVAL;
332 }
333 mutex_lock(&cnic_lock);
334 if (cnic_ulp_tbl[ulp_type]) {
335 printk(KERN_ERR PFX "cnic_register_driver: Type %d has already "
336 "been registered\n", ulp_type);
337 mutex_unlock(&cnic_lock);
338 return -EBUSY;
339 }
340
341 read_lock(&cnic_dev_lock);
342 list_for_each_entry(dev, &cnic_dev_list, list) {
343 struct cnic_local *cp = dev->cnic_priv;
344
345 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
346 }
347 read_unlock(&cnic_dev_lock);
348
349 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
350 mutex_unlock(&cnic_lock);
351
352 /* Prevent race conditions with netdev_event */
353 rtnl_lock();
354 read_lock(&cnic_dev_lock);
355 list_for_each_entry(dev, &cnic_dev_list, list) {
356 struct cnic_local *cp = dev->cnic_priv;
357
358 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
359 ulp_ops->cnic_init(dev);
360 }
361 read_unlock(&cnic_dev_lock);
362 rtnl_unlock();
363
364 return 0;
365 }
366
367 int cnic_unregister_driver(int ulp_type)
368 {
369 struct cnic_dev *dev;
370
371 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
372 printk(KERN_ERR PFX "cnic_unregister_driver: Bad type %d\n",
373 ulp_type);
374 return -EINVAL;
375 }
376 mutex_lock(&cnic_lock);
377 if (!cnic_ulp_tbl[ulp_type]) {
378 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d has not "
379 "been registered\n", ulp_type);
380 goto out_unlock;
381 }
382 read_lock(&cnic_dev_lock);
383 list_for_each_entry(dev, &cnic_dev_list, list) {
384 struct cnic_local *cp = dev->cnic_priv;
385
386 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
387 printk(KERN_ERR PFX "cnic_unregister_driver: Type %d "
388 "still has devices registered\n", ulp_type);
389 read_unlock(&cnic_dev_lock);
390 goto out_unlock;
391 }
392 }
393 read_unlock(&cnic_dev_lock);
394
395 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
396
397 mutex_unlock(&cnic_lock);
398 synchronize_rcu();
399 return 0;
400
401 out_unlock:
402 mutex_unlock(&cnic_lock);
403 return -EINVAL;
404 }
405
406 static int cnic_start_hw(struct cnic_dev *);
407 static void cnic_stop_hw(struct cnic_dev *);
408
409 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
410 void *ulp_ctx)
411 {
412 struct cnic_local *cp = dev->cnic_priv;
413 struct cnic_ulp_ops *ulp_ops;
414
415 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
416 printk(KERN_ERR PFX "cnic_register_device: Bad type %d\n",
417 ulp_type);
418 return -EINVAL;
419 }
420 mutex_lock(&cnic_lock);
421 if (cnic_ulp_tbl[ulp_type] == NULL) {
422 printk(KERN_ERR PFX "cnic_register_device: Driver with type %d "
423 "has not been registered\n", ulp_type);
424 mutex_unlock(&cnic_lock);
425 return -EAGAIN;
426 }
427 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
428 printk(KERN_ERR PFX "cnic_register_device: Type %d has already "
429 "been registered to this device\n", ulp_type);
430 mutex_unlock(&cnic_lock);
431 return -EBUSY;
432 }
433
434 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
435 cp->ulp_handle[ulp_type] = ulp_ctx;
436 ulp_ops = cnic_ulp_tbl[ulp_type];
437 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
438 cnic_hold(dev);
439
440 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
441 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
442 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
443
444 mutex_unlock(&cnic_lock);
445
446 return 0;
447
448 }
449 EXPORT_SYMBOL(cnic_register_driver);
450
451 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
452 {
453 struct cnic_local *cp = dev->cnic_priv;
454
455 if (ulp_type >= MAX_CNIC_ULP_TYPE) {
456 printk(KERN_ERR PFX "cnic_unregister_device: Bad type %d\n",
457 ulp_type);
458 return -EINVAL;
459 }
460 mutex_lock(&cnic_lock);
461 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
462 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
463 cnic_put(dev);
464 } else {
465 printk(KERN_ERR PFX "cnic_unregister_device: device not "
466 "registered to this ulp type %d\n", ulp_type);
467 mutex_unlock(&cnic_lock);
468 return -EINVAL;
469 }
470 mutex_unlock(&cnic_lock);
471
472 synchronize_rcu();
473
474 return 0;
475 }
476 EXPORT_SYMBOL(cnic_unregister_driver);
477
478 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
479 {
480 id_tbl->start = start_id;
481 id_tbl->max = size;
482 id_tbl->next = 0;
483 spin_lock_init(&id_tbl->lock);
484 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
485 if (!id_tbl->table)
486 return -ENOMEM;
487
488 return 0;
489 }
490
491 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
492 {
493 kfree(id_tbl->table);
494 id_tbl->table = NULL;
495 }
496
497 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
498 {
499 int ret = -1;
500
501 id -= id_tbl->start;
502 if (id >= id_tbl->max)
503 return ret;
504
505 spin_lock(&id_tbl->lock);
506 if (!test_bit(id, id_tbl->table)) {
507 set_bit(id, id_tbl->table);
508 ret = 0;
509 }
510 spin_unlock(&id_tbl->lock);
511 return ret;
512 }
513
514 /* Returns -1 if not successful */
515 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
516 {
517 u32 id;
518
519 spin_lock(&id_tbl->lock);
520 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
521 if (id >= id_tbl->max) {
522 id = -1;
523 if (id_tbl->next != 0) {
524 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
525 if (id >= id_tbl->next)
526 id = -1;
527 }
528 }
529
530 if (id < id_tbl->max) {
531 set_bit(id, id_tbl->table);
532 id_tbl->next = (id + 1) & (id_tbl->max - 1);
533 id += id_tbl->start;
534 }
535
536 spin_unlock(&id_tbl->lock);
537
538 return id;
539 }
540
541 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
542 {
543 if (id == -1)
544 return;
545
546 id -= id_tbl->start;
547 if (id >= id_tbl->max)
548 return;
549
550 clear_bit(id, id_tbl->table);
551 }
552
553 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
554 {
555 int i;
556
557 if (!dma->pg_arr)
558 return;
559
560 for (i = 0; i < dma->num_pages; i++) {
561 if (dma->pg_arr[i]) {
562 pci_free_consistent(dev->pcidev, BCM_PAGE_SIZE,
563 dma->pg_arr[i], dma->pg_map_arr[i]);
564 dma->pg_arr[i] = NULL;
565 }
566 }
567 if (dma->pgtbl) {
568 pci_free_consistent(dev->pcidev, dma->pgtbl_size,
569 dma->pgtbl, dma->pgtbl_map);
570 dma->pgtbl = NULL;
571 }
572 kfree(dma->pg_arr);
573 dma->pg_arr = NULL;
574 dma->num_pages = 0;
575 }
576
577 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
578 {
579 int i;
580 u32 *page_table = dma->pgtbl;
581
582 for (i = 0; i < dma->num_pages; i++) {
583 /* Each entry needs to be in big endian format. */
584 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
585 page_table++;
586 *page_table = (u32) dma->pg_map_arr[i];
587 page_table++;
588 }
589 }
590
591 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
592 int pages, int use_pg_tbl)
593 {
594 int i, size;
595 struct cnic_local *cp = dev->cnic_priv;
596
597 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
598 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
599 if (dma->pg_arr == NULL)
600 return -ENOMEM;
601
602 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
603 dma->num_pages = pages;
604
605 for (i = 0; i < pages; i++) {
606 dma->pg_arr[i] = pci_alloc_consistent(dev->pcidev,
607 BCM_PAGE_SIZE,
608 &dma->pg_map_arr[i]);
609 if (dma->pg_arr[i] == NULL)
610 goto error;
611 }
612 if (!use_pg_tbl)
613 return 0;
614
615 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
616 ~(BCM_PAGE_SIZE - 1);
617 dma->pgtbl = pci_alloc_consistent(dev->pcidev, dma->pgtbl_size,
618 &dma->pgtbl_map);
619 if (dma->pgtbl == NULL)
620 goto error;
621
622 cp->setup_pgtbl(dev, dma);
623
624 return 0;
625
626 error:
627 cnic_free_dma(dev, dma);
628 return -ENOMEM;
629 }
630
631 static void cnic_free_resc(struct cnic_dev *dev)
632 {
633 struct cnic_local *cp = dev->cnic_priv;
634 int i = 0;
635
636 if (cp->cnic_uinfo) {
637 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
638 while (cp->uio_dev != -1 && i < 15) {
639 msleep(100);
640 i++;
641 }
642 uio_unregister_device(cp->cnic_uinfo);
643 kfree(cp->cnic_uinfo);
644 cp->cnic_uinfo = NULL;
645 }
646
647 if (cp->l2_buf) {
648 pci_free_consistent(dev->pcidev, cp->l2_buf_size,
649 cp->l2_buf, cp->l2_buf_map);
650 cp->l2_buf = NULL;
651 }
652
653 if (cp->l2_ring) {
654 pci_free_consistent(dev->pcidev, cp->l2_ring_size,
655 cp->l2_ring, cp->l2_ring_map);
656 cp->l2_ring = NULL;
657 }
658
659 for (i = 0; i < cp->ctx_blks; i++) {
660 if (cp->ctx_arr[i].ctx) {
661 pci_free_consistent(dev->pcidev, cp->ctx_blk_size,
662 cp->ctx_arr[i].ctx,
663 cp->ctx_arr[i].mapping);
664 cp->ctx_arr[i].ctx = NULL;
665 }
666 }
667 kfree(cp->ctx_arr);
668 cp->ctx_arr = NULL;
669 cp->ctx_blks = 0;
670
671 cnic_free_dma(dev, &cp->gbl_buf_info);
672 cnic_free_dma(dev, &cp->conn_buf_info);
673 cnic_free_dma(dev, &cp->kwq_info);
674 cnic_free_dma(dev, &cp->kcq_info);
675 kfree(cp->iscsi_tbl);
676 cp->iscsi_tbl = NULL;
677 kfree(cp->ctx_tbl);
678 cp->ctx_tbl = NULL;
679
680 cnic_free_id_tbl(&cp->cid_tbl);
681 }
682
683 static int cnic_alloc_context(struct cnic_dev *dev)
684 {
685 struct cnic_local *cp = dev->cnic_priv;
686
687 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
688 int i, k, arr_size;
689
690 cp->ctx_blk_size = BCM_PAGE_SIZE;
691 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
692 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
693 sizeof(struct cnic_ctx);
694 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
695 if (cp->ctx_arr == NULL)
696 return -ENOMEM;
697
698 k = 0;
699 for (i = 0; i < 2; i++) {
700 u32 j, reg, off, lo, hi;
701
702 if (i == 0)
703 off = BNX2_PG_CTX_MAP;
704 else
705 off = BNX2_ISCSI_CTX_MAP;
706
707 reg = cnic_reg_rd_ind(dev, off);
708 lo = reg >> 16;
709 hi = reg & 0xffff;
710 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
711 cp->ctx_arr[k].cid = j;
712 }
713
714 cp->ctx_blks = k;
715 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
716 cp->ctx_blks = 0;
717 return -ENOMEM;
718 }
719
720 for (i = 0; i < cp->ctx_blks; i++) {
721 cp->ctx_arr[i].ctx =
722 pci_alloc_consistent(dev->pcidev, BCM_PAGE_SIZE,
723 &cp->ctx_arr[i].mapping);
724 if (cp->ctx_arr[i].ctx == NULL)
725 return -ENOMEM;
726 }
727 }
728 return 0;
729 }
730
731 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
732 {
733 struct cnic_local *cp = dev->cnic_priv;
734 struct uio_info *uinfo;
735 int ret;
736
737 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
738 if (ret)
739 goto error;
740 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
741
742 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
743 if (ret)
744 goto error;
745 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
746
747 ret = cnic_alloc_context(dev);
748 if (ret)
749 goto error;
750
751 cp->l2_ring_size = 2 * BCM_PAGE_SIZE;
752 cp->l2_ring = pci_alloc_consistent(dev->pcidev, cp->l2_ring_size,
753 &cp->l2_ring_map);
754 if (!cp->l2_ring)
755 goto error;
756
757 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
758 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
759 cp->l2_buf = pci_alloc_consistent(dev->pcidev, cp->l2_buf_size,
760 &cp->l2_buf_map);
761 if (!cp->l2_buf)
762 goto error;
763
764 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
765 if (!uinfo)
766 goto error;
767
768 uinfo->mem[0].addr = dev->netdev->base_addr;
769 uinfo->mem[0].internal_addr = dev->regview;
770 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
771 uinfo->mem[0].memtype = UIO_MEM_PHYS;
772
773 uinfo->mem[1].addr = (unsigned long) cp->status_blk & PAGE_MASK;
774 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
775 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
776 else
777 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
778 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
779
780 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
781 uinfo->mem[2].size = cp->l2_ring_size;
782 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
783
784 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
785 uinfo->mem[3].size = cp->l2_buf_size;
786 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
787
788 uinfo->name = "bnx2_cnic";
789 uinfo->version = CNIC_MODULE_VERSION;
790 uinfo->irq = UIO_IRQ_CUSTOM;
791
792 uinfo->open = cnic_uio_open;
793 uinfo->release = cnic_uio_close;
794
795 uinfo->priv = dev;
796
797 ret = uio_register_device(&dev->pcidev->dev, uinfo);
798 if (ret) {
799 kfree(uinfo);
800 goto error;
801 }
802
803 cp->cnic_uinfo = uinfo;
804
805 return 0;
806
807 error:
808 cnic_free_resc(dev);
809 return ret;
810 }
811
812 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
813 {
814 return cp->max_kwq_idx -
815 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
816 }
817
818 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
819 u32 num_wqes)
820 {
821 struct cnic_local *cp = dev->cnic_priv;
822 struct kwqe *prod_qe;
823 u16 prod, sw_prod, i;
824
825 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
826 return -EAGAIN; /* bnx2 is down */
827
828 spin_lock_bh(&cp->cnic_ulp_lock);
829 if (num_wqes > cnic_kwq_avail(cp) &&
830 !(cp->cnic_local_flags & CNIC_LCL_FL_KWQ_INIT)) {
831 spin_unlock_bh(&cp->cnic_ulp_lock);
832 return -EAGAIN;
833 }
834
835 cp->cnic_local_flags &= ~CNIC_LCL_FL_KWQ_INIT;
836
837 prod = cp->kwq_prod_idx;
838 sw_prod = prod & MAX_KWQ_IDX;
839 for (i = 0; i < num_wqes; i++) {
840 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
841 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
842 prod++;
843 sw_prod = prod & MAX_KWQ_IDX;
844 }
845 cp->kwq_prod_idx = prod;
846
847 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
848
849 spin_unlock_bh(&cp->cnic_ulp_lock);
850 return 0;
851 }
852
853 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
854 {
855 struct cnic_local *cp = dev->cnic_priv;
856 int i, j;
857
858 i = 0;
859 j = 1;
860 while (num_cqes) {
861 struct cnic_ulp_ops *ulp_ops;
862 int ulp_type;
863 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
864 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
865
866 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
867 cnic_kwq_completion(dev, 1);
868
869 while (j < num_cqes) {
870 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
871
872 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
873 break;
874
875 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
876 cnic_kwq_completion(dev, 1);
877 j++;
878 }
879
880 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
881 ulp_type = CNIC_ULP_RDMA;
882 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
883 ulp_type = CNIC_ULP_ISCSI;
884 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
885 ulp_type = CNIC_ULP_L4;
886 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
887 goto end;
888 else {
889 printk(KERN_ERR PFX "%s: Unknown type of KCQE(0x%x)\n",
890 dev->netdev->name, kcqe_op_flag);
891 goto end;
892 }
893
894 rcu_read_lock();
895 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
896 if (likely(ulp_ops)) {
897 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
898 cp->completed_kcq + i, j);
899 }
900 rcu_read_unlock();
901 end:
902 num_cqes -= j;
903 i += j;
904 j = 1;
905 }
906 return;
907 }
908
909 static u16 cnic_bnx2_next_idx(u16 idx)
910 {
911 return idx + 1;
912 }
913
914 static u16 cnic_bnx2_hw_idx(u16 idx)
915 {
916 return idx;
917 }
918
919 static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
920 {
921 struct cnic_local *cp = dev->cnic_priv;
922 u16 i, ri, last;
923 struct kcqe *kcqe;
924 int kcqe_cnt = 0, last_cnt = 0;
925
926 i = ri = last = *sw_prod;
927 ri &= MAX_KCQ_IDX;
928
929 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
930 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
931 cp->completed_kcq[kcqe_cnt++] = kcqe;
932 i = cp->next_idx(i);
933 ri = i & MAX_KCQ_IDX;
934 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
935 last_cnt = kcqe_cnt;
936 last = i;
937 }
938 }
939
940 *sw_prod = last;
941 return last_cnt;
942 }
943
944 static void cnic_chk_bnx2_pkt_rings(struct cnic_local *cp)
945 {
946 u16 rx_cons = *cp->rx_cons_ptr;
947 u16 tx_cons = *cp->tx_cons_ptr;
948
949 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
950 cp->tx_cons = tx_cons;
951 cp->rx_cons = rx_cons;
952 uio_event_notify(cp->cnic_uinfo);
953 }
954 }
955
956 static int cnic_service_bnx2(void *data, void *status_blk)
957 {
958 struct cnic_dev *dev = data;
959 struct status_block *sblk = status_blk;
960 struct cnic_local *cp = dev->cnic_priv;
961 u32 status_idx = sblk->status_idx;
962 u16 hw_prod, sw_prod;
963 int kcqe_cnt;
964
965 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
966 return status_idx;
967
968 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
969
970 hw_prod = sblk->status_completion_producer_index;
971 sw_prod = cp->kcq_prod_idx;
972 while (sw_prod != hw_prod) {
973 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
974 if (kcqe_cnt == 0)
975 goto done;
976
977 service_kcqes(dev, kcqe_cnt);
978
979 /* Tell compiler that status_blk fields can change. */
980 barrier();
981 if (status_idx != sblk->status_idx) {
982 status_idx = sblk->status_idx;
983 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
984 hw_prod = sblk->status_completion_producer_index;
985 } else
986 break;
987 }
988
989 done:
990 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
991
992 cp->kcq_prod_idx = sw_prod;
993
994 cnic_chk_bnx2_pkt_rings(cp);
995 return status_idx;
996 }
997
998 static void cnic_service_bnx2_msix(unsigned long data)
999 {
1000 struct cnic_dev *dev = (struct cnic_dev *) data;
1001 struct cnic_local *cp = dev->cnic_priv;
1002 struct status_block_msix *status_blk = cp->bnx2_status_blk;
1003 u32 status_idx = status_blk->status_idx;
1004 u16 hw_prod, sw_prod;
1005 int kcqe_cnt;
1006
1007 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
1008
1009 hw_prod = status_blk->status_completion_producer_index;
1010 sw_prod = cp->kcq_prod_idx;
1011 while (sw_prod != hw_prod) {
1012 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
1013 if (kcqe_cnt == 0)
1014 goto done;
1015
1016 service_kcqes(dev, kcqe_cnt);
1017
1018 /* Tell compiler that status_blk fields can change. */
1019 barrier();
1020 if (status_idx != status_blk->status_idx) {
1021 status_idx = status_blk->status_idx;
1022 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
1023 hw_prod = status_blk->status_completion_producer_index;
1024 } else
1025 break;
1026 }
1027
1028 done:
1029 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
1030 cp->kcq_prod_idx = sw_prod;
1031
1032 cnic_chk_bnx2_pkt_rings(cp);
1033
1034 cp->last_status_idx = status_idx;
1035 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
1036 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
1037 }
1038
1039 static irqreturn_t cnic_irq(int irq, void *dev_instance)
1040 {
1041 struct cnic_dev *dev = dev_instance;
1042 struct cnic_local *cp = dev->cnic_priv;
1043 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
1044
1045 if (cp->ack_int)
1046 cp->ack_int(dev);
1047
1048 prefetch(cp->status_blk);
1049 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
1050
1051 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags)))
1052 tasklet_schedule(&cp->cnic_irq_task);
1053
1054 return IRQ_HANDLED;
1055 }
1056
1057 static void cnic_ulp_stop(struct cnic_dev *dev)
1058 {
1059 struct cnic_local *cp = dev->cnic_priv;
1060 int if_type;
1061
1062 rcu_read_lock();
1063 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
1064 struct cnic_ulp_ops *ulp_ops;
1065
1066 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
1067 if (!ulp_ops)
1068 continue;
1069
1070 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
1071 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
1072 }
1073 rcu_read_unlock();
1074 }
1075
1076 static void cnic_ulp_start(struct cnic_dev *dev)
1077 {
1078 struct cnic_local *cp = dev->cnic_priv;
1079 int if_type;
1080
1081 rcu_read_lock();
1082 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
1083 struct cnic_ulp_ops *ulp_ops;
1084
1085 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
1086 if (!ulp_ops || !ulp_ops->cnic_start)
1087 continue;
1088
1089 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
1090 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
1091 }
1092 rcu_read_unlock();
1093 }
1094
1095 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
1096 {
1097 struct cnic_dev *dev = data;
1098
1099 switch (info->cmd) {
1100 case CNIC_CTL_STOP_CMD:
1101 cnic_hold(dev);
1102 mutex_lock(&cnic_lock);
1103
1104 cnic_ulp_stop(dev);
1105 cnic_stop_hw(dev);
1106
1107 mutex_unlock(&cnic_lock);
1108 cnic_put(dev);
1109 break;
1110 case CNIC_CTL_START_CMD:
1111 cnic_hold(dev);
1112 mutex_lock(&cnic_lock);
1113
1114 if (!cnic_start_hw(dev))
1115 cnic_ulp_start(dev);
1116
1117 mutex_unlock(&cnic_lock);
1118 cnic_put(dev);
1119 break;
1120 default:
1121 return -EINVAL;
1122 }
1123 return 0;
1124 }
1125
1126 static void cnic_ulp_init(struct cnic_dev *dev)
1127 {
1128 int i;
1129 struct cnic_local *cp = dev->cnic_priv;
1130
1131 rcu_read_lock();
1132 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
1133 struct cnic_ulp_ops *ulp_ops;
1134
1135 ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
1136 if (!ulp_ops || !ulp_ops->cnic_init)
1137 continue;
1138
1139 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
1140 ulp_ops->cnic_init(dev);
1141
1142 }
1143 rcu_read_unlock();
1144 }
1145
1146 static void cnic_ulp_exit(struct cnic_dev *dev)
1147 {
1148 int i;
1149 struct cnic_local *cp = dev->cnic_priv;
1150
1151 rcu_read_lock();
1152 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
1153 struct cnic_ulp_ops *ulp_ops;
1154
1155 ulp_ops = rcu_dereference(cnic_ulp_tbl[i]);
1156 if (!ulp_ops || !ulp_ops->cnic_exit)
1157 continue;
1158
1159 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
1160 ulp_ops->cnic_exit(dev);
1161
1162 }
1163 rcu_read_unlock();
1164 }
1165
1166 static int cnic_cm_offload_pg(struct cnic_sock *csk)
1167 {
1168 struct cnic_dev *dev = csk->dev;
1169 struct l4_kwq_offload_pg *l4kwqe;
1170 struct kwqe *wqes[1];
1171
1172 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
1173 memset(l4kwqe, 0, sizeof(*l4kwqe));
1174 wqes[0] = (struct kwqe *) l4kwqe;
1175
1176 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
1177 l4kwqe->flags =
1178 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
1179 l4kwqe->l2hdr_nbytes = ETH_HLEN;
1180
1181 l4kwqe->da0 = csk->ha[0];
1182 l4kwqe->da1 = csk->ha[1];
1183 l4kwqe->da2 = csk->ha[2];
1184 l4kwqe->da3 = csk->ha[3];
1185 l4kwqe->da4 = csk->ha[4];
1186 l4kwqe->da5 = csk->ha[5];
1187
1188 l4kwqe->sa0 = dev->mac_addr[0];
1189 l4kwqe->sa1 = dev->mac_addr[1];
1190 l4kwqe->sa2 = dev->mac_addr[2];
1191 l4kwqe->sa3 = dev->mac_addr[3];
1192 l4kwqe->sa4 = dev->mac_addr[4];
1193 l4kwqe->sa5 = dev->mac_addr[5];
1194
1195 l4kwqe->etype = ETH_P_IP;
1196 l4kwqe->ipid_count = DEF_IPID_COUNT;
1197 l4kwqe->host_opaque = csk->l5_cid;
1198
1199 if (csk->vlan_id) {
1200 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
1201 l4kwqe->vlan_tag = csk->vlan_id;
1202 l4kwqe->l2hdr_nbytes += 4;
1203 }
1204
1205 return dev->submit_kwqes(dev, wqes, 1);
1206 }
1207
1208 static int cnic_cm_update_pg(struct cnic_sock *csk)
1209 {
1210 struct cnic_dev *dev = csk->dev;
1211 struct l4_kwq_update_pg *l4kwqe;
1212 struct kwqe *wqes[1];
1213
1214 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
1215 memset(l4kwqe, 0, sizeof(*l4kwqe));
1216 wqes[0] = (struct kwqe *) l4kwqe;
1217
1218 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
1219 l4kwqe->flags =
1220 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
1221 l4kwqe->pg_cid = csk->pg_cid;
1222
1223 l4kwqe->da0 = csk->ha[0];
1224 l4kwqe->da1 = csk->ha[1];
1225 l4kwqe->da2 = csk->ha[2];
1226 l4kwqe->da3 = csk->ha[3];
1227 l4kwqe->da4 = csk->ha[4];
1228 l4kwqe->da5 = csk->ha[5];
1229
1230 l4kwqe->pg_host_opaque = csk->l5_cid;
1231 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
1232
1233 return dev->submit_kwqes(dev, wqes, 1);
1234 }
1235
1236 static int cnic_cm_upload_pg(struct cnic_sock *csk)
1237 {
1238 struct cnic_dev *dev = csk->dev;
1239 struct l4_kwq_upload *l4kwqe;
1240 struct kwqe *wqes[1];
1241
1242 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
1243 memset(l4kwqe, 0, sizeof(*l4kwqe));
1244 wqes[0] = (struct kwqe *) l4kwqe;
1245
1246 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
1247 l4kwqe->flags =
1248 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
1249 l4kwqe->cid = csk->pg_cid;
1250
1251 return dev->submit_kwqes(dev, wqes, 1);
1252 }
1253
1254 static int cnic_cm_conn_req(struct cnic_sock *csk)
1255 {
1256 struct cnic_dev *dev = csk->dev;
1257 struct l4_kwq_connect_req1 *l4kwqe1;
1258 struct l4_kwq_connect_req2 *l4kwqe2;
1259 struct l4_kwq_connect_req3 *l4kwqe3;
1260 struct kwqe *wqes[3];
1261 u8 tcp_flags = 0;
1262 int num_wqes = 2;
1263
1264 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
1265 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
1266 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
1267 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
1268 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
1269 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
1270
1271 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
1272 l4kwqe3->flags =
1273 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
1274 l4kwqe3->ka_timeout = csk->ka_timeout;
1275 l4kwqe3->ka_interval = csk->ka_interval;
1276 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
1277 l4kwqe3->tos = csk->tos;
1278 l4kwqe3->ttl = csk->ttl;
1279 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
1280 l4kwqe3->pmtu = csk->mtu;
1281 l4kwqe3->rcv_buf = csk->rcv_buf;
1282 l4kwqe3->snd_buf = csk->snd_buf;
1283 l4kwqe3->seed = csk->seed;
1284
1285 wqes[0] = (struct kwqe *) l4kwqe1;
1286 if (test_bit(SK_F_IPV6, &csk->flags)) {
1287 wqes[1] = (struct kwqe *) l4kwqe2;
1288 wqes[2] = (struct kwqe *) l4kwqe3;
1289 num_wqes = 3;
1290
1291 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
1292 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
1293 l4kwqe2->flags =
1294 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
1295 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
1296 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
1297 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
1298 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
1299 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
1300 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
1301 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
1302 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
1303 sizeof(struct tcphdr);
1304 } else {
1305 wqes[1] = (struct kwqe *) l4kwqe3;
1306 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
1307 sizeof(struct tcphdr);
1308 }
1309
1310 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
1311 l4kwqe1->flags =
1312 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
1313 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
1314 l4kwqe1->cid = csk->cid;
1315 l4kwqe1->pg_cid = csk->pg_cid;
1316 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
1317 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
1318 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
1319 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
1320 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
1321 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
1322 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
1323 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
1324 if (csk->tcp_flags & SK_TCP_NAGLE)
1325 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
1326 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
1327 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
1328 if (csk->tcp_flags & SK_TCP_SACK)
1329 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
1330 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
1331 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
1332
1333 l4kwqe1->tcp_flags = tcp_flags;
1334
1335 return dev->submit_kwqes(dev, wqes, num_wqes);
1336 }
1337
1338 static int cnic_cm_close_req(struct cnic_sock *csk)
1339 {
1340 struct cnic_dev *dev = csk->dev;
1341 struct l4_kwq_close_req *l4kwqe;
1342 struct kwqe *wqes[1];
1343
1344 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
1345 memset(l4kwqe, 0, sizeof(*l4kwqe));
1346 wqes[0] = (struct kwqe *) l4kwqe;
1347
1348 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
1349 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
1350 l4kwqe->cid = csk->cid;
1351
1352 return dev->submit_kwqes(dev, wqes, 1);
1353 }
1354
1355 static int cnic_cm_abort_req(struct cnic_sock *csk)
1356 {
1357 struct cnic_dev *dev = csk->dev;
1358 struct l4_kwq_reset_req *l4kwqe;
1359 struct kwqe *wqes[1];
1360
1361 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
1362 memset(l4kwqe, 0, sizeof(*l4kwqe));
1363 wqes[0] = (struct kwqe *) l4kwqe;
1364
1365 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
1366 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
1367 l4kwqe->cid = csk->cid;
1368
1369 return dev->submit_kwqes(dev, wqes, 1);
1370 }
1371
1372 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
1373 u32 l5_cid, struct cnic_sock **csk, void *context)
1374 {
1375 struct cnic_local *cp = dev->cnic_priv;
1376 struct cnic_sock *csk1;
1377
1378 if (l5_cid >= MAX_CM_SK_TBL_SZ)
1379 return -EINVAL;
1380
1381 csk1 = &cp->csk_tbl[l5_cid];
1382 if (atomic_read(&csk1->ref_count))
1383 return -EAGAIN;
1384
1385 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
1386 return -EBUSY;
1387
1388 csk1->dev = dev;
1389 csk1->cid = cid;
1390 csk1->l5_cid = l5_cid;
1391 csk1->ulp_type = ulp_type;
1392 csk1->context = context;
1393
1394 csk1->ka_timeout = DEF_KA_TIMEOUT;
1395 csk1->ka_interval = DEF_KA_INTERVAL;
1396 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
1397 csk1->tos = DEF_TOS;
1398 csk1->ttl = DEF_TTL;
1399 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
1400 csk1->rcv_buf = DEF_RCV_BUF;
1401 csk1->snd_buf = DEF_SND_BUF;
1402 csk1->seed = DEF_SEED;
1403
1404 *csk = csk1;
1405 return 0;
1406 }
1407
1408 static void cnic_cm_cleanup(struct cnic_sock *csk)
1409 {
1410 if (csk->src_port) {
1411 struct cnic_dev *dev = csk->dev;
1412 struct cnic_local *cp = dev->cnic_priv;
1413
1414 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
1415 csk->src_port = 0;
1416 }
1417 }
1418
1419 static void cnic_close_conn(struct cnic_sock *csk)
1420 {
1421 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
1422 cnic_cm_upload_pg(csk);
1423 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
1424 }
1425 cnic_cm_cleanup(csk);
1426 }
1427
1428 static int cnic_cm_destroy(struct cnic_sock *csk)
1429 {
1430 if (!cnic_in_use(csk))
1431 return -EINVAL;
1432
1433 csk_hold(csk);
1434 clear_bit(SK_F_INUSE, &csk->flags);
1435 smp_mb__after_clear_bit();
1436 while (atomic_read(&csk->ref_count) != 1)
1437 msleep(1);
1438 cnic_cm_cleanup(csk);
1439
1440 csk->flags = 0;
1441 csk_put(csk);
1442 return 0;
1443 }
1444
1445 static inline u16 cnic_get_vlan(struct net_device *dev,
1446 struct net_device **vlan_dev)
1447 {
1448 if (dev->priv_flags & IFF_802_1Q_VLAN) {
1449 *vlan_dev = vlan_dev_real_dev(dev);
1450 return vlan_dev_vlan_id(dev);
1451 }
1452 *vlan_dev = dev;
1453 return 0;
1454 }
1455
1456 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
1457 struct dst_entry **dst)
1458 {
1459 #if defined(CONFIG_INET)
1460 struct flowi fl;
1461 int err;
1462 struct rtable *rt;
1463
1464 memset(&fl, 0, sizeof(fl));
1465 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
1466
1467 err = ip_route_output_key(&init_net, &rt, &fl);
1468 if (!err)
1469 *dst = &rt->u.dst;
1470 return err;
1471 #else
1472 return -ENETUNREACH;
1473 #endif
1474 }
1475
1476 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
1477 struct dst_entry **dst)
1478 {
1479 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
1480 struct flowi fl;
1481
1482 memset(&fl, 0, sizeof(fl));
1483 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
1484 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
1485 fl.oif = dst_addr->sin6_scope_id;
1486
1487 *dst = ip6_route_output(&init_net, NULL, &fl);
1488 if (*dst)
1489 return 0;
1490 #endif
1491
1492 return -ENETUNREACH;
1493 }
1494
1495 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
1496 int ulp_type)
1497 {
1498 struct cnic_dev *dev = NULL;
1499 struct dst_entry *dst;
1500 struct net_device *netdev = NULL;
1501 int err = -ENETUNREACH;
1502
1503 if (dst_addr->sin_family == AF_INET)
1504 err = cnic_get_v4_route(dst_addr, &dst);
1505 else if (dst_addr->sin_family == AF_INET6) {
1506 struct sockaddr_in6 *dst_addr6 =
1507 (struct sockaddr_in6 *) dst_addr;
1508
1509 err = cnic_get_v6_route(dst_addr6, &dst);
1510 } else
1511 return NULL;
1512
1513 if (err)
1514 return NULL;
1515
1516 if (!dst->dev)
1517 goto done;
1518
1519 cnic_get_vlan(dst->dev, &netdev);
1520
1521 dev = cnic_from_netdev(netdev);
1522
1523 done:
1524 dst_release(dst);
1525 if (dev)
1526 cnic_put(dev);
1527 return dev;
1528 }
1529
1530 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1531 {
1532 struct cnic_dev *dev = csk->dev;
1533 struct cnic_local *cp = dev->cnic_priv;
1534
1535 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
1536 }
1537
1538 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1539 {
1540 struct cnic_dev *dev = csk->dev;
1541 struct cnic_local *cp = dev->cnic_priv;
1542 int is_v6, err, rc = -ENETUNREACH;
1543 struct dst_entry *dst;
1544 struct net_device *realdev;
1545 u32 local_port;
1546
1547 if (saddr->local.v6.sin6_family == AF_INET6 &&
1548 saddr->remote.v6.sin6_family == AF_INET6)
1549 is_v6 = 1;
1550 else if (saddr->local.v4.sin_family == AF_INET &&
1551 saddr->remote.v4.sin_family == AF_INET)
1552 is_v6 = 0;
1553 else
1554 return -EINVAL;
1555
1556 clear_bit(SK_F_IPV6, &csk->flags);
1557
1558 if (is_v6) {
1559 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
1560 set_bit(SK_F_IPV6, &csk->flags);
1561 err = cnic_get_v6_route(&saddr->remote.v6, &dst);
1562 if (err)
1563 return err;
1564
1565 if (!dst || dst->error || !dst->dev)
1566 goto err_out;
1567
1568 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
1569 sizeof(struct in6_addr));
1570 csk->dst_port = saddr->remote.v6.sin6_port;
1571 local_port = saddr->local.v6.sin6_port;
1572 #else
1573 return rc;
1574 #endif
1575
1576 } else {
1577 err = cnic_get_v4_route(&saddr->remote.v4, &dst);
1578 if (err)
1579 return err;
1580
1581 if (!dst || dst->error || !dst->dev)
1582 goto err_out;
1583
1584 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
1585 csk->dst_port = saddr->remote.v4.sin_port;
1586 local_port = saddr->local.v4.sin_port;
1587 }
1588
1589 csk->vlan_id = cnic_get_vlan(dst->dev, &realdev);
1590 if (realdev != dev->netdev)
1591 goto err_out;
1592
1593 if (local_port >= CNIC_LOCAL_PORT_MIN &&
1594 local_port < CNIC_LOCAL_PORT_MAX) {
1595 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
1596 local_port = 0;
1597 } else
1598 local_port = 0;
1599
1600 if (!local_port) {
1601 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
1602 if (local_port == -1) {
1603 rc = -ENOMEM;
1604 goto err_out;
1605 }
1606 }
1607 csk->src_port = local_port;
1608
1609 csk->mtu = dst_mtu(dst);
1610 rc = 0;
1611
1612 err_out:
1613 dst_release(dst);
1614 return rc;
1615 }
1616
1617 static void cnic_init_csk_state(struct cnic_sock *csk)
1618 {
1619 csk->state = 0;
1620 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1621 clear_bit(SK_F_CLOSING, &csk->flags);
1622 }
1623
1624 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
1625 {
1626 int err = 0;
1627
1628 if (!cnic_in_use(csk))
1629 return -EINVAL;
1630
1631 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
1632 return -EINVAL;
1633
1634 cnic_init_csk_state(csk);
1635
1636 err = cnic_get_route(csk, saddr);
1637 if (err)
1638 goto err_out;
1639
1640 err = cnic_resolve_addr(csk, saddr);
1641 if (!err)
1642 return 0;
1643
1644 err_out:
1645 clear_bit(SK_F_CONNECT_START, &csk->flags);
1646 return err;
1647 }
1648
1649 static int cnic_cm_abort(struct cnic_sock *csk)
1650 {
1651 struct cnic_local *cp = csk->dev->cnic_priv;
1652 u32 opcode;
1653
1654 if (!cnic_in_use(csk))
1655 return -EINVAL;
1656
1657 if (cnic_abort_prep(csk))
1658 return cnic_cm_abort_req(csk);
1659
1660 /* Getting here means that we haven't started connect, or
1661 * connect was not successful.
1662 */
1663
1664 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
1665 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
1666 opcode = csk->state;
1667 else
1668 opcode = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
1669 cp->close_conn(csk, opcode);
1670
1671 return 0;
1672 }
1673
1674 static int cnic_cm_close(struct cnic_sock *csk)
1675 {
1676 if (!cnic_in_use(csk))
1677 return -EINVAL;
1678
1679 if (cnic_close_prep(csk)) {
1680 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
1681 return cnic_cm_close_req(csk);
1682 }
1683 return 0;
1684 }
1685
1686 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
1687 u8 opcode)
1688 {
1689 struct cnic_ulp_ops *ulp_ops;
1690 int ulp_type = csk->ulp_type;
1691
1692 rcu_read_lock();
1693 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1694 if (ulp_ops) {
1695 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
1696 ulp_ops->cm_connect_complete(csk);
1697 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
1698 ulp_ops->cm_close_complete(csk);
1699 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
1700 ulp_ops->cm_remote_abort(csk);
1701 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
1702 ulp_ops->cm_abort_complete(csk);
1703 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
1704 ulp_ops->cm_remote_close(csk);
1705 }
1706 rcu_read_unlock();
1707 }
1708
1709 static int cnic_cm_set_pg(struct cnic_sock *csk)
1710 {
1711 if (cnic_offld_prep(csk)) {
1712 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
1713 cnic_cm_update_pg(csk);
1714 else
1715 cnic_cm_offload_pg(csk);
1716 }
1717 return 0;
1718 }
1719
1720 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
1721 {
1722 struct cnic_local *cp = dev->cnic_priv;
1723 u32 l5_cid = kcqe->pg_host_opaque;
1724 u8 opcode = kcqe->op_code;
1725 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1726
1727 csk_hold(csk);
1728 if (!cnic_in_use(csk))
1729 goto done;
1730
1731 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
1732 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1733 goto done;
1734 }
1735 csk->pg_cid = kcqe->pg_cid;
1736 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
1737 cnic_cm_conn_req(csk);
1738
1739 done:
1740 csk_put(csk);
1741 }
1742
1743 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
1744 {
1745 struct cnic_local *cp = dev->cnic_priv;
1746 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
1747 u8 opcode = l4kcqe->op_code;
1748 u32 l5_cid;
1749 struct cnic_sock *csk;
1750
1751 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
1752 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
1753 cnic_cm_process_offld_pg(dev, l4kcqe);
1754 return;
1755 }
1756
1757 l5_cid = l4kcqe->conn_id;
1758 if (opcode & 0x80)
1759 l5_cid = l4kcqe->cid;
1760 if (l5_cid >= MAX_CM_SK_TBL_SZ)
1761 return;
1762
1763 csk = &cp->csk_tbl[l5_cid];
1764 csk_hold(csk);
1765
1766 if (!cnic_in_use(csk)) {
1767 csk_put(csk);
1768 return;
1769 }
1770
1771 switch (opcode) {
1772 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
1773 if (l4kcqe->status == 0)
1774 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
1775
1776 smp_mb__before_clear_bit();
1777 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
1778 cnic_cm_upcall(cp, csk, opcode);
1779 break;
1780
1781 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
1782 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags))
1783 csk->state = opcode;
1784 /* fall through */
1785 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
1786 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
1787 cp->close_conn(csk, opcode);
1788 break;
1789
1790 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
1791 cnic_cm_upcall(cp, csk, opcode);
1792 break;
1793 }
1794 csk_put(csk);
1795 }
1796
1797 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
1798 {
1799 struct cnic_dev *dev = data;
1800 int i;
1801
1802 for (i = 0; i < num; i++)
1803 cnic_cm_process_kcqe(dev, kcqe[i]);
1804 }
1805
1806 static struct cnic_ulp_ops cm_ulp_ops = {
1807 .indicate_kcqes = cnic_cm_indicate_kcqe,
1808 };
1809
1810 static void cnic_cm_free_mem(struct cnic_dev *dev)
1811 {
1812 struct cnic_local *cp = dev->cnic_priv;
1813
1814 kfree(cp->csk_tbl);
1815 cp->csk_tbl = NULL;
1816 cnic_free_id_tbl(&cp->csk_port_tbl);
1817 }
1818
1819 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
1820 {
1821 struct cnic_local *cp = dev->cnic_priv;
1822
1823 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
1824 GFP_KERNEL);
1825 if (!cp->csk_tbl)
1826 return -ENOMEM;
1827
1828 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
1829 CNIC_LOCAL_PORT_MIN)) {
1830 cnic_cm_free_mem(dev);
1831 return -ENOMEM;
1832 }
1833 return 0;
1834 }
1835
1836 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
1837 {
1838 if ((opcode == csk->state) ||
1839 (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED &&
1840 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)) {
1841 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags))
1842 return 1;
1843 }
1844 return 0;
1845 }
1846
1847 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
1848 {
1849 struct cnic_dev *dev = csk->dev;
1850 struct cnic_local *cp = dev->cnic_priv;
1851
1852 clear_bit(SK_F_CONNECT_START, &csk->flags);
1853 if (cnic_ready_to_close(csk, opcode)) {
1854 cnic_close_conn(csk);
1855 cnic_cm_upcall(cp, csk, opcode);
1856 }
1857 }
1858
1859 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
1860 {
1861 }
1862
1863 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
1864 {
1865 u32 seed;
1866
1867 get_random_bytes(&seed, 4);
1868 cnic_ctx_wr(dev, 45, 0, seed);
1869 return 0;
1870 }
1871
1872 static int cnic_cm_open(struct cnic_dev *dev)
1873 {
1874 struct cnic_local *cp = dev->cnic_priv;
1875 int err;
1876
1877 err = cnic_cm_alloc_mem(dev);
1878 if (err)
1879 return err;
1880
1881 err = cp->start_cm(dev);
1882
1883 if (err)
1884 goto err_out;
1885
1886 dev->cm_create = cnic_cm_create;
1887 dev->cm_destroy = cnic_cm_destroy;
1888 dev->cm_connect = cnic_cm_connect;
1889 dev->cm_abort = cnic_cm_abort;
1890 dev->cm_close = cnic_cm_close;
1891 dev->cm_select_dev = cnic_cm_select_dev;
1892
1893 cp->ulp_handle[CNIC_ULP_L4] = dev;
1894 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
1895 return 0;
1896
1897 err_out:
1898 cnic_cm_free_mem(dev);
1899 return err;
1900 }
1901
1902 static int cnic_cm_shutdown(struct cnic_dev *dev)
1903 {
1904 struct cnic_local *cp = dev->cnic_priv;
1905 int i;
1906
1907 cp->stop_cm(dev);
1908
1909 if (!cp->csk_tbl)
1910 return 0;
1911
1912 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
1913 struct cnic_sock *csk = &cp->csk_tbl[i];
1914
1915 clear_bit(SK_F_INUSE, &csk->flags);
1916 cnic_cm_cleanup(csk);
1917 }
1918 cnic_cm_free_mem(dev);
1919
1920 return 0;
1921 }
1922
1923 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
1924 {
1925 struct cnic_local *cp = dev->cnic_priv;
1926 u32 cid_addr;
1927 int i;
1928
1929 if (CHIP_NUM(cp) == CHIP_NUM_5709)
1930 return;
1931
1932 cid_addr = GET_CID_ADDR(cid);
1933
1934 for (i = 0; i < CTX_SIZE; i += 4)
1935 cnic_ctx_wr(dev, cid_addr, i, 0);
1936 }
1937
1938 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
1939 {
1940 struct cnic_local *cp = dev->cnic_priv;
1941 int ret = 0, i;
1942 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
1943
1944 if (CHIP_NUM(cp) != CHIP_NUM_5709)
1945 return 0;
1946
1947 for (i = 0; i < cp->ctx_blks; i++) {
1948 int j;
1949 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
1950 u32 val;
1951
1952 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
1953
1954 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
1955 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
1956 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
1957 (u64) cp->ctx_arr[i].mapping >> 32);
1958 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
1959 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
1960 for (j = 0; j < 10; j++) {
1961
1962 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
1963 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
1964 break;
1965 udelay(5);
1966 }
1967 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
1968 ret = -EBUSY;
1969 break;
1970 }
1971 }
1972 return ret;
1973 }
1974
1975 static void cnic_free_irq(struct cnic_dev *dev)
1976 {
1977 struct cnic_local *cp = dev->cnic_priv;
1978 struct cnic_eth_dev *ethdev = cp->ethdev;
1979
1980 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
1981 cp->disable_int_sync(dev);
1982 tasklet_disable(&cp->cnic_irq_task);
1983 free_irq(ethdev->irq_arr[0].vector, dev);
1984 }
1985 }
1986
1987 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
1988 {
1989 struct cnic_local *cp = dev->cnic_priv;
1990 struct cnic_eth_dev *ethdev = cp->ethdev;
1991
1992 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
1993 int err, i = 0;
1994 int sblk_num = cp->status_blk_num;
1995 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
1996 BNX2_HC_SB_CONFIG_1;
1997
1998 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
1999
2000 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
2001 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
2002 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
2003
2004 cp->bnx2_status_blk = cp->status_blk;
2005 cp->last_status_idx = cp->bnx2_status_blk->status_idx;
2006 tasklet_init(&cp->cnic_irq_task, &cnic_service_bnx2_msix,
2007 (unsigned long) dev);
2008 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
2009 "cnic", dev);
2010 if (err) {
2011 tasklet_disable(&cp->cnic_irq_task);
2012 return err;
2013 }
2014 while (cp->bnx2_status_blk->status_completion_producer_index &&
2015 i < 10) {
2016 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
2017 1 << (11 + sblk_num));
2018 udelay(10);
2019 i++;
2020 barrier();
2021 }
2022 if (cp->bnx2_status_blk->status_completion_producer_index) {
2023 cnic_free_irq(dev);
2024 goto failed;
2025 }
2026
2027 } else {
2028 struct status_block *sblk = cp->status_blk;
2029 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
2030 int i = 0;
2031
2032 while (sblk->status_completion_producer_index && i < 10) {
2033 CNIC_WR(dev, BNX2_HC_COMMAND,
2034 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
2035 udelay(10);
2036 i++;
2037 barrier();
2038 }
2039 if (sblk->status_completion_producer_index)
2040 goto failed;
2041
2042 }
2043 return 0;
2044
2045 failed:
2046 printk(KERN_ERR PFX "%s: " "KCQ index not resetting to 0.\n",
2047 dev->netdev->name);
2048 return -EBUSY;
2049 }
2050
2051 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
2052 {
2053 struct cnic_local *cp = dev->cnic_priv;
2054 struct cnic_eth_dev *ethdev = cp->ethdev;
2055
2056 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2057 return;
2058
2059 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2060 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2061 }
2062
2063 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
2064 {
2065 struct cnic_local *cp = dev->cnic_priv;
2066 struct cnic_eth_dev *ethdev = cp->ethdev;
2067
2068 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2069 return;
2070
2071 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2072 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
2073 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
2074 synchronize_irq(ethdev->irq_arr[0].vector);
2075 }
2076
2077 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
2078 {
2079 struct cnic_local *cp = dev->cnic_priv;
2080 struct cnic_eth_dev *ethdev = cp->ethdev;
2081 u32 cid_addr, tx_cid, sb_id;
2082 u32 val, offset0, offset1, offset2, offset3;
2083 int i;
2084 struct tx_bd *txbd;
2085 dma_addr_t buf_map;
2086 struct status_block *s_blk = cp->status_blk;
2087
2088 sb_id = cp->status_blk_num;
2089 tx_cid = 20;
2090 cnic_init_context(dev, tx_cid);
2091 cnic_init_context(dev, tx_cid + 1);
2092 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
2093 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2094 struct status_block_msix *sblk = cp->status_blk;
2095
2096 tx_cid = TX_TSS_CID + sb_id - 1;
2097 cnic_init_context(dev, tx_cid);
2098 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
2099 (TX_TSS_CID << 7));
2100 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
2101 }
2102 cp->tx_cons = *cp->tx_cons_ptr;
2103
2104 cid_addr = GET_CID_ADDR(tx_cid);
2105 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
2106 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
2107
2108 for (i = 0; i < PHY_CTX_SIZE; i += 4)
2109 cnic_ctx_wr(dev, cid_addr2, i, 0);
2110
2111 offset0 = BNX2_L2CTX_TYPE_XI;
2112 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
2113 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
2114 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
2115 } else {
2116 offset0 = BNX2_L2CTX_TYPE;
2117 offset1 = BNX2_L2CTX_CMD_TYPE;
2118 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
2119 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
2120 }
2121 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
2122 cnic_ctx_wr(dev, cid_addr, offset0, val);
2123
2124 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
2125 cnic_ctx_wr(dev, cid_addr, offset1, val);
2126
2127 txbd = (struct tx_bd *) cp->l2_ring;
2128
2129 buf_map = cp->l2_buf_map;
2130 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
2131 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
2132 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
2133 }
2134 val = (u64) cp->l2_ring_map >> 32;
2135 cnic_ctx_wr(dev, cid_addr, offset2, val);
2136 txbd->tx_bd_haddr_hi = val;
2137
2138 val = (u64) cp->l2_ring_map & 0xffffffff;
2139 cnic_ctx_wr(dev, cid_addr, offset3, val);
2140 txbd->tx_bd_haddr_lo = val;
2141 }
2142
2143 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
2144 {
2145 struct cnic_local *cp = dev->cnic_priv;
2146 struct cnic_eth_dev *ethdev = cp->ethdev;
2147 u32 cid_addr, sb_id, val, coal_reg, coal_val;
2148 int i;
2149 struct rx_bd *rxbd;
2150 struct status_block *s_blk = cp->status_blk;
2151
2152 sb_id = cp->status_blk_num;
2153 cnic_init_context(dev, 2);
2154 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
2155 coal_reg = BNX2_HC_COMMAND;
2156 coal_val = CNIC_RD(dev, coal_reg);
2157 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2158 struct status_block_msix *sblk = cp->status_blk;
2159
2160 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
2161 coal_reg = BNX2_HC_COALESCE_NOW;
2162 coal_val = 1 << (11 + sb_id);
2163 }
2164 i = 0;
2165 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
2166 CNIC_WR(dev, coal_reg, coal_val);
2167 udelay(10);
2168 i++;
2169 barrier();
2170 }
2171 cp->rx_cons = *cp->rx_cons_ptr;
2172
2173 cid_addr = GET_CID_ADDR(2);
2174 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
2175 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
2176 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
2177
2178 if (sb_id == 0)
2179 val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT;
2180 else
2181 val = BNX2_L2CTX_STATUSB_NUM(sb_id);
2182 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
2183
2184 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
2185 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
2186 dma_addr_t buf_map;
2187 int n = (i % cp->l2_rx_ring_size) + 1;
2188
2189 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
2190 rxbd->rx_bd_len = cp->l2_single_buf_size;
2191 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
2192 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
2193 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
2194 }
2195 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
2196 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
2197 rxbd->rx_bd_haddr_hi = val;
2198
2199 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
2200 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
2201 rxbd->rx_bd_haddr_lo = val;
2202
2203 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
2204 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
2205 }
2206
2207 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
2208 {
2209 struct kwqe *wqes[1], l2kwqe;
2210
2211 memset(&l2kwqe, 0, sizeof(l2kwqe));
2212 wqes[0] = &l2kwqe;
2213 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
2214 (L2_KWQE_OPCODE_VALUE_FLUSH <<
2215 KWQE_OPCODE_SHIFT) | 2;
2216 dev->submit_kwqes(dev, wqes, 1);
2217 }
2218
2219 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
2220 {
2221 struct cnic_local *cp = dev->cnic_priv;
2222 u32 val;
2223
2224 val = cp->func << 2;
2225
2226 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
2227
2228 val = cnic_reg_rd_ind(dev, cp->shmem_base +
2229 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
2230 dev->mac_addr[0] = (u8) (val >> 8);
2231 dev->mac_addr[1] = (u8) val;
2232
2233 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
2234
2235 val = cnic_reg_rd_ind(dev, cp->shmem_base +
2236 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
2237 dev->mac_addr[2] = (u8) (val >> 24);
2238 dev->mac_addr[3] = (u8) (val >> 16);
2239 dev->mac_addr[4] = (u8) (val >> 8);
2240 dev->mac_addr[5] = (u8) val;
2241
2242 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
2243
2244 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
2245 if (CHIP_NUM(cp) != CHIP_NUM_5709)
2246 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
2247
2248 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
2249 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
2250 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
2251 }
2252
2253 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
2254 {
2255 struct cnic_local *cp = dev->cnic_priv;
2256 struct cnic_eth_dev *ethdev = cp->ethdev;
2257 struct status_block *sblk = cp->status_blk;
2258 u32 val;
2259 int err;
2260
2261 cnic_set_bnx2_mac(dev);
2262
2263 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
2264 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
2265 if (BCM_PAGE_BITS > 12)
2266 val |= (12 - 8) << 4;
2267 else
2268 val |= (BCM_PAGE_BITS - 8) << 4;
2269
2270 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
2271
2272 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
2273 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
2274 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
2275
2276 err = cnic_setup_5709_context(dev, 1);
2277 if (err)
2278 return err;
2279
2280 cnic_init_context(dev, KWQ_CID);
2281 cnic_init_context(dev, KCQ_CID);
2282
2283 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
2284 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
2285
2286 cp->max_kwq_idx = MAX_KWQ_IDX;
2287 cp->kwq_prod_idx = 0;
2288 cp->kwq_con_idx = 0;
2289 cp->cnic_local_flags |= CNIC_LCL_FL_KWQ_INIT;
2290
2291 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
2292 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
2293 else
2294 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
2295
2296 /* Initialize the kernel work queue context. */
2297 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2298 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
2299 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
2300
2301 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
2302 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
2303
2304 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
2305 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
2306
2307 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
2308 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
2309
2310 val = (u32) cp->kwq_info.pgtbl_map;
2311 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
2312
2313 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
2314 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
2315
2316 cp->kcq_prod_idx = 0;
2317
2318 /* Initialize the kernel complete queue context. */
2319 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
2320 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
2321 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
2322
2323 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
2324 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
2325
2326 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
2327 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
2328
2329 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
2330 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
2331
2332 val = (u32) cp->kcq_info.pgtbl_map;
2333 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
2334
2335 cp->int_num = 0;
2336 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2337 u32 sb_id = cp->status_blk_num;
2338 u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id);
2339
2340 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
2341 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
2342 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
2343 }
2344
2345 /* Enable Commnad Scheduler notification when we write to the
2346 * host producer index of the kernel contexts. */
2347 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
2348
2349 /* Enable Command Scheduler notification when we write to either
2350 * the Send Queue or Receive Queue producer indexes of the kernel
2351 * bypass contexts. */
2352 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
2353 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
2354
2355 /* Notify COM when the driver post an application buffer. */
2356 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
2357
2358 /* Set the CP and COM doorbells. These two processors polls the
2359 * doorbell for a non zero value before running. This must be done
2360 * after setting up the kernel queue contexts. */
2361 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
2362 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
2363
2364 cnic_init_bnx2_tx_ring(dev);
2365 cnic_init_bnx2_rx_ring(dev);
2366
2367 err = cnic_init_bnx2_irq(dev);
2368 if (err) {
2369 printk(KERN_ERR PFX "%s: cnic_init_irq failed\n",
2370 dev->netdev->name);
2371 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
2372 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
2373 return err;
2374 }
2375
2376 return 0;
2377 }
2378
2379 static int cnic_start_hw(struct cnic_dev *dev)
2380 {
2381 struct cnic_local *cp = dev->cnic_priv;
2382 struct cnic_eth_dev *ethdev = cp->ethdev;
2383 int err;
2384
2385 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
2386 return -EALREADY;
2387
2388 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
2389 if (err) {
2390 printk(KERN_ERR PFX "%s: register_cnic failed\n",
2391 dev->netdev->name);
2392 goto err2;
2393 }
2394
2395 dev->regview = ethdev->io_base;
2396 cp->chip_id = ethdev->chip_id;
2397 pci_dev_get(dev->pcidev);
2398 cp->func = PCI_FUNC(dev->pcidev->devfn);
2399 cp->status_blk = ethdev->irq_arr[0].status_blk;
2400 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
2401
2402 err = cp->alloc_resc(dev);
2403 if (err) {
2404 printk(KERN_ERR PFX "%s: allocate resource failure\n",
2405 dev->netdev->name);
2406 goto err1;
2407 }
2408
2409 err = cp->start_hw(dev);
2410 if (err)
2411 goto err1;
2412
2413 err = cnic_cm_open(dev);
2414 if (err)
2415 goto err1;
2416
2417 set_bit(CNIC_F_CNIC_UP, &dev->flags);
2418
2419 cp->enable_int(dev);
2420
2421 return 0;
2422
2423 err1:
2424 ethdev->drv_unregister_cnic(dev->netdev);
2425 cp->free_resc(dev);
2426 pci_dev_put(dev->pcidev);
2427 err2:
2428 return err;
2429 }
2430
2431 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
2432 {
2433 struct cnic_local *cp = dev->cnic_priv;
2434 struct cnic_eth_dev *ethdev = cp->ethdev;
2435
2436 cnic_disable_bnx2_int_sync(dev);
2437
2438 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
2439 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
2440
2441 cnic_init_context(dev, KWQ_CID);
2442 cnic_init_context(dev, KCQ_CID);
2443
2444 cnic_setup_5709_context(dev, 0);
2445 cnic_free_irq(dev);
2446
2447 ethdev->drv_unregister_cnic(dev->netdev);
2448
2449 cnic_free_resc(dev);
2450 }
2451
2452 static void cnic_stop_hw(struct cnic_dev *dev)
2453 {
2454 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
2455 struct cnic_local *cp = dev->cnic_priv;
2456
2457 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
2458 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
2459 synchronize_rcu();
2460 cnic_cm_shutdown(dev);
2461 cp->stop_hw(dev);
2462 pci_dev_put(dev->pcidev);
2463 }
2464 }
2465
2466 static void cnic_free_dev(struct cnic_dev *dev)
2467 {
2468 int i = 0;
2469
2470 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
2471 msleep(100);
2472 i++;
2473 }
2474 if (atomic_read(&dev->ref_count) != 0)
2475 printk(KERN_ERR PFX "%s: Failed waiting for ref count to go"
2476 " to zero.\n", dev->netdev->name);
2477
2478 printk(KERN_INFO PFX "Removed CNIC device: %s\n", dev->netdev->name);
2479 dev_put(dev->netdev);
2480 kfree(dev);
2481 }
2482
2483 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
2484 struct pci_dev *pdev)
2485 {
2486 struct cnic_dev *cdev;
2487 struct cnic_local *cp;
2488 int alloc_size;
2489
2490 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
2491
2492 cdev = kzalloc(alloc_size , GFP_KERNEL);
2493 if (cdev == NULL) {
2494 printk(KERN_ERR PFX "%s: allocate dev struct failure\n",
2495 dev->name);
2496 return NULL;
2497 }
2498
2499 cdev->netdev = dev;
2500 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
2501 cdev->register_device = cnic_register_device;
2502 cdev->unregister_device = cnic_unregister_device;
2503 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
2504
2505 cp = cdev->cnic_priv;
2506 cp->dev = cdev;
2507 cp->uio_dev = -1;
2508 cp->l2_single_buf_size = 0x400;
2509 cp->l2_rx_ring_size = 3;
2510
2511 spin_lock_init(&cp->cnic_ulp_lock);
2512
2513 printk(KERN_INFO PFX "Added CNIC device: %s\n", dev->name);
2514
2515 return cdev;
2516 }
2517
2518 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
2519 {
2520 struct pci_dev *pdev;
2521 struct cnic_dev *cdev;
2522 struct cnic_local *cp;
2523 struct cnic_eth_dev *ethdev = NULL;
2524 struct cnic_eth_dev *(*probe)(void *) = NULL;
2525
2526 probe = __symbol_get("bnx2_cnic_probe");
2527 if (probe) {
2528 ethdev = (*probe)(dev);
2529 symbol_put_addr(probe);
2530 }
2531 if (!ethdev)
2532 return NULL;
2533
2534 pdev = ethdev->pdev;
2535 if (!pdev)
2536 return NULL;
2537
2538 dev_hold(dev);
2539 pci_dev_get(pdev);
2540 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
2541 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
2542 u8 rev;
2543
2544 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2545 if (rev < 0x10) {
2546 pci_dev_put(pdev);
2547 goto cnic_err;
2548 }
2549 }
2550 pci_dev_put(pdev);
2551
2552 cdev = cnic_alloc_dev(dev, pdev);
2553 if (cdev == NULL)
2554 goto cnic_err;
2555
2556 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
2557 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
2558
2559 cp = cdev->cnic_priv;
2560 cp->ethdev = ethdev;
2561 cdev->pcidev = pdev;
2562
2563 cp->cnic_ops = &cnic_bnx2_ops;
2564 cp->start_hw = cnic_start_bnx2_hw;
2565 cp->stop_hw = cnic_stop_bnx2_hw;
2566 cp->setup_pgtbl = cnic_setup_page_tbl;
2567 cp->alloc_resc = cnic_alloc_bnx2_resc;
2568 cp->free_resc = cnic_free_resc;
2569 cp->start_cm = cnic_cm_init_bnx2_hw;
2570 cp->stop_cm = cnic_cm_stop_bnx2_hw;
2571 cp->enable_int = cnic_enable_bnx2_int;
2572 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
2573 cp->close_conn = cnic_close_bnx2_conn;
2574 cp->next_idx = cnic_bnx2_next_idx;
2575 cp->hw_idx = cnic_bnx2_hw_idx;
2576 return cdev;
2577
2578 cnic_err:
2579 dev_put(dev);
2580 return NULL;
2581 }
2582
2583 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
2584 {
2585 struct ethtool_drvinfo drvinfo;
2586 struct cnic_dev *cdev = NULL;
2587
2588 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
2589 memset(&drvinfo, 0, sizeof(drvinfo));
2590 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
2591
2592 if (!strcmp(drvinfo.driver, "bnx2"))
2593 cdev = init_bnx2_cnic(dev);
2594 if (cdev) {
2595 write_lock(&cnic_dev_lock);
2596 list_add(&cdev->list, &cnic_dev_list);
2597 write_unlock(&cnic_dev_lock);
2598 }
2599 }
2600 return cdev;
2601 }
2602
2603 /**
2604 * netdev event handler
2605 */
2606 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
2607 void *ptr)
2608 {
2609 struct net_device *netdev = ptr;
2610 struct cnic_dev *dev;
2611 int if_type;
2612 int new_dev = 0;
2613
2614 dev = cnic_from_netdev(netdev);
2615
2616 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
2617 /* Check for the hot-plug device */
2618 dev = is_cnic_dev(netdev);
2619 if (dev) {
2620 new_dev = 1;
2621 cnic_hold(dev);
2622 }
2623 }
2624 if (dev) {
2625 struct cnic_local *cp = dev->cnic_priv;
2626
2627 if (new_dev)
2628 cnic_ulp_init(dev);
2629 else if (event == NETDEV_UNREGISTER)
2630 cnic_ulp_exit(dev);
2631 else if (event == NETDEV_UP) {
2632 mutex_lock(&cnic_lock);
2633 if (!cnic_start_hw(dev))
2634 cnic_ulp_start(dev);
2635 mutex_unlock(&cnic_lock);
2636 }
2637
2638 rcu_read_lock();
2639 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2640 struct cnic_ulp_ops *ulp_ops;
2641 void *ctx;
2642
2643 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
2644 if (!ulp_ops || !ulp_ops->indicate_netevent)
2645 continue;
2646
2647 ctx = cp->ulp_handle[if_type];
2648
2649 ulp_ops->indicate_netevent(ctx, event);
2650 }
2651 rcu_read_unlock();
2652
2653 if (event == NETDEV_GOING_DOWN) {
2654 mutex_lock(&cnic_lock);
2655 cnic_ulp_stop(dev);
2656 cnic_stop_hw(dev);
2657 mutex_unlock(&cnic_lock);
2658 } else if (event == NETDEV_UNREGISTER) {
2659 write_lock(&cnic_dev_lock);
2660 list_del_init(&dev->list);
2661 write_unlock(&cnic_dev_lock);
2662
2663 cnic_put(dev);
2664 cnic_free_dev(dev);
2665 goto done;
2666 }
2667 cnic_put(dev);
2668 }
2669 done:
2670 return NOTIFY_DONE;
2671 }
2672
2673 static struct notifier_block cnic_netdev_notifier = {
2674 .notifier_call = cnic_netdev_event
2675 };
2676
2677 static void cnic_release(void)
2678 {
2679 struct cnic_dev *dev;
2680
2681 while (!list_empty(&cnic_dev_list)) {
2682 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
2683 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
2684 cnic_ulp_stop(dev);
2685 cnic_stop_hw(dev);
2686 }
2687
2688 cnic_ulp_exit(dev);
2689 list_del_init(&dev->list);
2690 cnic_free_dev(dev);
2691 }
2692 }
2693
2694 static int __init cnic_init(void)
2695 {
2696 int rc = 0;
2697
2698 printk(KERN_INFO "%s", version);
2699
2700 rc = register_netdevice_notifier(&cnic_netdev_notifier);
2701 if (rc) {
2702 cnic_release();
2703 return rc;
2704 }
2705
2706 return 0;
2707 }
2708
2709 static void __exit cnic_exit(void)
2710 {
2711 unregister_netdevice_notifier(&cnic_netdev_notifier);
2712 cnic_release();
2713 return;
2714 }
2715
2716 module_init(cnic_init);
2717 module_exit(cnic_exit);
Support for the Chinese Samsung S3C2440 based development boards