x86, delay: tsc based udelay should have rdtsc_barrier
[linux-2.6/mini2440.git] / drivers / i2c / busses / i2c-nforce2.c
blobec11d1c4e77bdbcd79e45e337ce05dffa0894bb8
1 /*
2 SMBus driver for nVidia nForce2 MCP
4 Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
5 Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
6 Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
7 Based on
8 SMBus 2.0 driver for AMD-8111 IO-Hub
9 Copyright (c) 2002 Vojtech Pavlik
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 SUPPORTED DEVICES PCI ID
28 nForce2 MCP 0064
29 nForce2 Ultra 400 MCP 0084
30 nForce3 Pro150 MCP 00D4
31 nForce3 250Gb MCP 00E4
32 nForce4 MCP 0052
33 nForce4 MCP-04 0034
34 nForce MCP51 0264
35 nForce MCP55 0368
36 nForce MCP61 03EB
37 nForce MCP65 0446
38 nForce MCP67 0542
39 nForce MCP73 07D8
40 nForce MCP78S 0752
41 nForce MCP79 0AA2
43 This driver supports the 2 SMBuses that are included in the MCP of the
44 nForce2/3/4/5xx chipsets.
47 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
49 #include <linux/module.h>
50 #include <linux/pci.h>
51 #include <linux/kernel.h>
52 #include <linux/stddef.h>
53 #include <linux/ioport.h>
54 #include <linux/init.h>
55 #include <linux/i2c.h>
56 #include <linux/delay.h>
57 #include <linux/dmi.h>
58 #include <linux/acpi.h>
59 #include <asm/io.h>
61 MODULE_LICENSE("GPL");
62 MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
63 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
66 struct nforce2_smbus {
67 struct i2c_adapter adapter;
68 int base;
69 int size;
70 int blockops;
71 int can_abort;
76 * nVidia nForce2 SMBus control register definitions
77 * (Newer incarnations use standard BARs 4 and 5 instead)
79 #define NFORCE_PCI_SMB1 0x50
80 #define NFORCE_PCI_SMB2 0x54
84 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
86 #define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
87 #define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
88 #define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
89 #define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
90 #define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
91 #define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
92 bytes */
93 #define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
94 check the status of
95 the abort command */
96 #define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
98 #define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
99 abort succeeded */
100 #define NVIDIA_SMB_CTRL_ABORT 0x20
101 #define NVIDIA_SMB_STS_DONE 0x80
102 #define NVIDIA_SMB_STS_ALRM 0x40
103 #define NVIDIA_SMB_STS_RES 0x20
104 #define NVIDIA_SMB_STS_STATUS 0x1f
106 #define NVIDIA_SMB_PRTCL_WRITE 0x00
107 #define NVIDIA_SMB_PRTCL_READ 0x01
108 #define NVIDIA_SMB_PRTCL_QUICK 0x02
109 #define NVIDIA_SMB_PRTCL_BYTE 0x04
110 #define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
111 #define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
112 #define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
113 #define NVIDIA_SMB_PRTCL_PEC 0x80
115 /* Misc definitions */
116 #define MAX_TIMEOUT 100
118 /* We disable the second SMBus channel on these boards */
119 static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
121 .ident = "DFI Lanparty NF4 Expert",
122 .matches = {
123 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
124 DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
130 static struct pci_driver nforce2_driver;
132 /* For multiplexing support, we need a global reference to the 1st
133 SMBus channel */
134 #if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
135 struct i2c_adapter *nforce2_smbus;
136 EXPORT_SYMBOL_GPL(nforce2_smbus);
138 static void nforce2_set_reference(struct i2c_adapter *adap)
140 nforce2_smbus = adap;
142 #else
143 static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
144 #endif
146 static void nforce2_abort(struct i2c_adapter *adap)
148 struct nforce2_smbus *smbus = adap->algo_data;
149 int timeout = 0;
150 unsigned char temp;
152 dev_dbg(&adap->dev, "Aborting current transaction\n");
154 outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
155 do {
156 msleep(1);
157 temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
158 } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
159 (timeout++ < MAX_TIMEOUT));
160 if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
161 dev_err(&adap->dev, "Can't reset the smbus\n");
162 outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
165 static int nforce2_check_status(struct i2c_adapter *adap)
167 struct nforce2_smbus *smbus = adap->algo_data;
168 int timeout = 0;
169 unsigned char temp;
171 do {
172 msleep(1);
173 temp = inb_p(NVIDIA_SMB_STS);
174 } while ((!temp) && (timeout++ < MAX_TIMEOUT));
176 if (timeout > MAX_TIMEOUT) {
177 dev_dbg(&adap->dev, "SMBus Timeout!\n");
178 if (smbus->can_abort)
179 nforce2_abort(adap);
180 return -ETIMEDOUT;
182 if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
183 dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
184 return -EIO;
186 return 0;
189 /* Return negative errno on error */
190 static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
191 unsigned short flags, char read_write,
192 u8 command, int size, union i2c_smbus_data * data)
194 struct nforce2_smbus *smbus = adap->algo_data;
195 unsigned char protocol, pec;
196 u8 len;
197 int i, status;
199 protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
200 NVIDIA_SMB_PRTCL_WRITE;
201 pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
203 switch (size) {
205 case I2C_SMBUS_QUICK:
206 protocol |= NVIDIA_SMB_PRTCL_QUICK;
207 read_write = I2C_SMBUS_WRITE;
208 break;
210 case I2C_SMBUS_BYTE:
211 if (read_write == I2C_SMBUS_WRITE)
212 outb_p(command, NVIDIA_SMB_CMD);
213 protocol |= NVIDIA_SMB_PRTCL_BYTE;
214 break;
216 case I2C_SMBUS_BYTE_DATA:
217 outb_p(command, NVIDIA_SMB_CMD);
218 if (read_write == I2C_SMBUS_WRITE)
219 outb_p(data->byte, NVIDIA_SMB_DATA);
220 protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
221 break;
223 case I2C_SMBUS_WORD_DATA:
224 outb_p(command, NVIDIA_SMB_CMD);
225 if (read_write == I2C_SMBUS_WRITE) {
226 outb_p(data->word, NVIDIA_SMB_DATA);
227 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
229 protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
230 break;
232 case I2C_SMBUS_BLOCK_DATA:
233 outb_p(command, NVIDIA_SMB_CMD);
234 if (read_write == I2C_SMBUS_WRITE) {
235 len = data->block[0];
236 if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
237 dev_err(&adap->dev,
238 "Transaction failed "
239 "(requested block size: %d)\n",
240 len);
241 return -EINVAL;
243 outb_p(len, NVIDIA_SMB_BCNT);
244 for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
245 outb_p(data->block[i + 1],
246 NVIDIA_SMB_DATA+i);
248 protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
249 break;
251 default:
252 dev_err(&adap->dev, "Unsupported transaction %d\n", size);
253 return -EOPNOTSUPP;
256 outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
257 outb_p(protocol, NVIDIA_SMB_PRTCL);
259 status = nforce2_check_status(adap);
260 if (status)
261 return status;
263 if (read_write == I2C_SMBUS_WRITE)
264 return 0;
266 switch (size) {
268 case I2C_SMBUS_BYTE:
269 case I2C_SMBUS_BYTE_DATA:
270 data->byte = inb_p(NVIDIA_SMB_DATA);
271 break;
273 case I2C_SMBUS_WORD_DATA:
274 data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
275 break;
277 case I2C_SMBUS_BLOCK_DATA:
278 len = inb_p(NVIDIA_SMB_BCNT);
279 if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
280 dev_err(&adap->dev, "Transaction failed "
281 "(received block size: 0x%02x)\n",
282 len);
283 return -EPROTO;
285 for (i = 0; i < len; i++)
286 data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
287 data->block[0] = len;
288 break;
291 return 0;
295 static u32 nforce2_func(struct i2c_adapter *adapter)
297 /* other functionality might be possible, but is not tested */
298 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
299 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
300 I2C_FUNC_SMBUS_PEC |
301 (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
302 I2C_FUNC_SMBUS_BLOCK_DATA : 0);
305 static struct i2c_algorithm smbus_algorithm = {
306 .smbus_xfer = nforce2_access,
307 .functionality = nforce2_func,
311 static struct pci_device_id nforce2_ids[] = {
312 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
313 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
314 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
315 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
316 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
317 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
318 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
319 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
320 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
321 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
322 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
323 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
324 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
325 { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
326 { 0 }
329 MODULE_DEVICE_TABLE (pci, nforce2_ids);
332 static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
333 int alt_reg, struct nforce2_smbus *smbus, const char *name)
335 int error;
337 smbus->base = pci_resource_start(dev, bar);
338 if (smbus->base) {
339 smbus->size = pci_resource_len(dev, bar);
340 } else {
341 /* Older incarnations of the device used non-standard BARs */
342 u16 iobase;
344 if (pci_read_config_word(dev, alt_reg, &iobase)
345 != PCIBIOS_SUCCESSFUL) {
346 dev_err(&dev->dev, "Error reading PCI config for %s\n",
347 name);
348 return -EIO;
351 smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
352 smbus->size = 64;
355 error = acpi_check_region(smbus->base, smbus->size,
356 nforce2_driver.name);
357 if (error)
358 return -1;
360 if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
361 dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
362 smbus->base, smbus->base+smbus->size-1, name);
363 return -EBUSY;
365 smbus->adapter.owner = THIS_MODULE;
366 smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
367 smbus->adapter.algo = &smbus_algorithm;
368 smbus->adapter.algo_data = smbus;
369 smbus->adapter.dev.parent = &dev->dev;
370 snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
371 "SMBus nForce2 adapter at %04x", smbus->base);
373 error = i2c_add_adapter(&smbus->adapter);
374 if (error) {
375 dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
376 release_region(smbus->base, smbus->size);
377 return error;
379 dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
380 return 0;
384 static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
386 struct nforce2_smbus *smbuses;
387 int res1, res2;
389 /* we support 2 SMBus adapters */
390 if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
391 return -ENOMEM;
392 pci_set_drvdata(dev, smbuses);
394 switch(dev->device) {
395 case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
396 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
397 case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
398 smbuses[0].blockops = 1;
399 smbuses[1].blockops = 1;
400 smbuses[0].can_abort = 1;
401 smbuses[1].can_abort = 1;
404 /* SMBus adapter 1 */
405 res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
406 if (res1 < 0) {
407 dev_err(&dev->dev, "Error probing SMB1.\n");
408 smbuses[0].base = 0; /* to have a check value */
410 /* SMBus adapter 2 */
411 if (dmi_check_system(nforce2_dmi_blacklist2)) {
412 dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
413 res2 = -EPERM;
414 smbuses[1].base = 0;
415 } else {
416 res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
417 "SMB2");
418 if (res2 < 0) {
419 dev_err(&dev->dev, "Error probing SMB2.\n");
420 smbuses[1].base = 0; /* to have a check value */
423 if ((res1 < 0) && (res2 < 0)) {
424 /* we did not find even one of the SMBuses, so we give up */
425 kfree(smbuses);
426 return -ENODEV;
429 nforce2_set_reference(&smbuses[0].adapter);
430 return 0;
434 static void __devexit nforce2_remove(struct pci_dev *dev)
436 struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);
438 nforce2_set_reference(NULL);
439 if (smbuses[0].base) {
440 i2c_del_adapter(&smbuses[0].adapter);
441 release_region(smbuses[0].base, smbuses[0].size);
443 if (smbuses[1].base) {
444 i2c_del_adapter(&smbuses[1].adapter);
445 release_region(smbuses[1].base, smbuses[1].size);
447 kfree(smbuses);
450 static struct pci_driver nforce2_driver = {
451 .name = "nForce2_smbus",
452 .id_table = nforce2_ids,
453 .probe = nforce2_probe,
454 .remove = __devexit_p(nforce2_remove),
457 static int __init nforce2_init(void)
459 return pci_register_driver(&nforce2_driver);
462 static void __exit nforce2_exit(void)
464 pci_unregister_driver(&nforce2_driver);
467 module_init(nforce2_init);
468 module_exit(nforce2_exit);