drivers/media/video/em28xx/em28xx-core.c

   1 /*
   2    em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
   3
   4    Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
   5                       Markus Rechberger <mrechberger@gmail.com>
   6                       Mauro Carvalho Chehab <mchehab@infradead.org>
   7                       Sascha Sommer <saschasommer@freenet.de>
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/list.h>
  26 #include <linux/module.h>
  27 #include <linux/usb.h>
  28 #include <linux/vmalloc.h>
  29
  30 #include "em28xx.h"
  31
  32 /* #define ENABLE_DEBUG_ISOC_FRAMES */
  33
  34 static unsigned int core_debug;
  35 module_param(core_debug,int,0644);
  36 MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  37
  38 #define em28xx_coredbg(fmt, arg...) do {\
  39         if (core_debug) \
  40                 printk(KERN_INFO "%s %s :"fmt, \
  41                          dev->name, __func__ , ##arg); } while (0)
  42
  43 static unsigned int reg_debug;
  44 module_param(reg_debug,int,0644);
  45 MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  46
  47 #define em28xx_regdbg(fmt, arg...) do {\
  48         if (reg_debug) \
  49                 printk(KERN_INFO "%s %s :"fmt, \
  50                          dev->name, __func__ , ##arg); } while (0)
  51
  52 static int alt = EM28XX_PINOUT;
  53 module_param(alt, int, 0644);
  54 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  55
  56 /* FIXME */
  57 #define em28xx_isocdbg(fmt, arg...) do {\
  58         if (core_debug) \
  59                 printk(KERN_INFO "%s %s :"fmt, \
  60                          dev->name, __func__ , ##arg); } while (0)
  61
  62 /*
  63  * em28xx_read_reg_req()
  64  * reads data from the usb device specifying bRequest
  65  */
  66 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  67                                    char *buf, int len)
  68 {
  69         int ret, byte;
  70
  71         if (dev->state & DEV_DISCONNECTED)
  72                 return -ENODEV;
  73
  74         if (len > URB_MAX_CTRL_SIZE)
  75                 return -EINVAL;
  76
  77         em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  78
  79         mutex_lock(&dev->ctrl_urb_lock);
  80         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  81                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  82                               0x0000, reg, dev->urb_buf, len, HZ);
  83         if (ret < 0) {
  84                 if (reg_debug)
  85                         printk(" failed!\n");
  86                 mutex_unlock(&dev->ctrl_urb_lock);
  87                 return ret;
  88         }
  89
  90         if (len)
  91                 memcpy(buf, dev->urb_buf, len);
  92
  93         mutex_unlock(&dev->ctrl_urb_lock);
  94
  95         if (reg_debug) {
  96                 printk("%02x values: ", ret);
  97                 for (byte = 0; byte < len; byte++)
  98                         printk(" %02x", (unsigned char)buf[byte]);
  99                 printk("\n");
 100         }
 101
 102         return ret;
 103 }
 104
 105 /*
 106  * em28xx_read_reg_req()
 107  * reads data from the usb device specifying bRequest
 108  */
 109 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
 110 {
 111         u8 val;
 112         int ret;
 113
 114         if (dev->state & DEV_DISCONNECTED)
 115                 return(-ENODEV);
 116
 117         em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
 118
 119         mutex_lock(&dev->ctrl_urb_lock);
 120         ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
 121                               USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 122                               0x0000, reg, dev->urb_buf, 1, HZ);
 123         val = dev->urb_buf[0];
 124         mutex_unlock(&dev->ctrl_urb_lock);
 125
 126         if (ret < 0) {
 127                 printk(" failed!\n");
 128                 return ret;
 129         }
 130
 131         if (reg_debug)
 132                 printk("%02x\n", (unsigned char) val);
 133
 134         return val;
 135 }
 136
 137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
 138 {
 139         return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
 140 }
 141
 142 /*
 143  * em28xx_write_regs_req()
 144  * sends data to the usb device, specifying bRequest
 145  */
 146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
 147                                  int len)
 148 {
 149         int ret;
 150
 151         if (dev->state & DEV_DISCONNECTED)
 152                 return -ENODEV;
 153
 154         if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
 155                 return -EINVAL;
 156
 157         em28xx_regdbg("req=%02x reg=%02x:", req, reg);
 158         if (reg_debug) {
 159                 int i;
 160                 for (i = 0; i < len; ++i)
 161                         printk(" %02x", (unsigned char)buf[i]);
 162                 printk("\n");
 163         }
 164
 165         mutex_lock(&dev->ctrl_urb_lock);
 166         memcpy(dev->urb_buf, buf, len);
 167         ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
 168                               USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
 169                               0x0000, reg, dev->urb_buf, len, HZ);
 170         mutex_unlock(&dev->ctrl_urb_lock);
 171
 172         if (dev->wait_after_write)
 173                 msleep(dev->wait_after_write);
 174
 175         return ret;
 176 }
 177
 178 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
 179 {
 180         int rc;
 181
 182         rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
 183
 184         /* Stores GPO/GPIO values at the cache, if changed
 185            Only write values should be stored, since input on a GPIO
 186            register will return the input bits.
 187            Not sure what happens on reading GPO register.
 188          */
 189         if (rc >= 0) {
 190                 if (reg == dev->reg_gpo_num)
 191                         dev->reg_gpo = buf[0];
 192                 else if (reg == dev->reg_gpio_num)
 193                         dev->reg_gpio = buf[0];
 194         }
 195
 196         return rc;
 197 }
 198
 199 /* Write a single register */
 200 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
 201 {
 202         return em28xx_write_regs(dev, reg, &val, 1);
 203 }
 204
 205 /*
 206  * em28xx_write_reg_bits()
 207  * sets only some bits (specified by bitmask) of a register, by first reading
 208  * the actual value
 209  */
 210 static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
 211                                  u8 bitmask)
 212 {
 213         int oldval;
 214         u8 newval;
 215
 216         /* Uses cache for gpo/gpio registers */
 217         if (reg == dev->reg_gpo_num)
 218                 oldval = dev->reg_gpo;
 219         else if (reg == dev->reg_gpio_num)
 220                 oldval = dev->reg_gpio;
 221         else
 222                 oldval = em28xx_read_reg(dev, reg);
 223
 224         if (oldval < 0)
 225                 return oldval;
 226
 227         newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
 228
 229         return em28xx_write_regs(dev, reg, &newval, 1);
 230 }
 231
 232 /*
 233  * em28xx_is_ac97_ready()
 234  * Checks if ac97 is ready
 235  */
 236 static int em28xx_is_ac97_ready(struct em28xx *dev)
 237 {
 238         int ret, i;
 239
 240         /* Wait up to 50 ms for AC97 command to complete */
 241         for (i = 0; i < 10; i++, msleep(5)) {
 242                 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
 243                 if (ret < 0)
 244                         return ret;
 245
 246                 if (!(ret & 0x01))
 247                         return 0;
 248         }
 249
 250         em28xx_warn("AC97 command still being executed: not handled properly!\n");
 251         return -EBUSY;
 252 }
 253
 254 /*
 255  * em28xx_read_ac97()
 256  * write a 16 bit value to the specified AC97 address (LSB first!)
 257  */
 258 static int em28xx_read_ac97(struct em28xx *dev, u8 reg)
 259 {
 260         int ret;
 261         u8 addr = (reg & 0x7f) | 0x80;
 262         u16 val;
 263
 264         ret = em28xx_is_ac97_ready(dev);
 265         if (ret < 0)
 266                 return ret;
 267
 268         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 269         if (ret < 0)
 270                 return ret;
 271
 272         ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
 273                                            (u8 *)&val, sizeof(val));
 274
 275         if (ret < 0)
 276                 return ret;
 277         return le16_to_cpu(val);
 278 }
 279
 280 /*
 281  * em28xx_write_ac97()
 282  * write a 16 bit value to the specified AC97 address (LSB first!)
 283  */
 284 static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
 285 {
 286         int ret;
 287         u8 addr = reg & 0x7f;
 288         __le16 value;
 289
 290         value = cpu_to_le16(val);
 291
 292         ret = em28xx_is_ac97_ready(dev);
 293         if (ret < 0)
 294                 return ret;
 295
 296         ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
 297         if (ret < 0)
 298                 return ret;
 299
 300         ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
 301         if (ret < 0)
 302                 return ret;
 303
 304         return 0;
 305 }
 306
 307 struct em28xx_vol_table {
 308         enum em28xx_amux mux;
 309         u8               reg;
 310 };
 311
 312 static struct em28xx_vol_table inputs[] = {
 313         { EM28XX_AMUX_VIDEO,    AC97_VIDEO_VOL   },
 314         { EM28XX_AMUX_LINE_IN,  AC97_LINEIN_VOL  },
 315         { EM28XX_AMUX_PHONE,    AC97_PHONE_VOL   },
 316         { EM28XX_AMUX_MIC,      AC97_MIC_VOL     },
 317         { EM28XX_AMUX_CD,       AC97_CD_VOL      },
 318         { EM28XX_AMUX_AUX,      AC97_AUX_VOL     },
 319         { EM28XX_AMUX_PCM_OUT,  AC97_PCM_OUT_VOL },
 320 };
 321
 322 static int set_ac97_input(struct em28xx *dev)
 323 {
 324         int ret, i;
 325         enum em28xx_amux amux = dev->ctl_ainput;
 326
 327         /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
 328            em28xx should point to LINE IN, while AC97 should use VIDEO
 329          */
 330         if (amux == EM28XX_AMUX_VIDEO2)
 331                 amux = EM28XX_AMUX_VIDEO;
 332
 333         /* Mute all entres but the one that were selected */
 334         for (i = 0; i < ARRAY_SIZE(inputs); i++) {
 335                 if (amux == inputs[i].mux)
 336                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
 337                 else
 338                         ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
 339
 340                 if (ret < 0)
 341                         em28xx_warn("couldn't setup AC97 register %d\n",
 342                                      inputs[i].reg);
 343         }
 344         return 0;
 345 }
 346
 347 static int em28xx_set_audio_source(struct em28xx *dev)
 348 {
 349         int ret;
 350         u8 input;
 351
 352         if (dev->is_em2800) {
 353                 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
 354                         input = EM2800_AUDIO_SRC_TUNER;
 355                 else
 356                         input = EM2800_AUDIO_SRC_LINE;
 357
 358                 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
 359                 if (ret < 0)
 360                         return ret;
 361         }
 362
 363         if (dev->has_msp34xx)
 364                 input = EM28XX_AUDIO_SRC_TUNER;
 365         else {
 366                 switch (dev->ctl_ainput) {
 367                 case EM28XX_AMUX_VIDEO:
 368                         input = EM28XX_AUDIO_SRC_TUNER;
 369                         break;
 370                 default:
 371                         input = EM28XX_AUDIO_SRC_LINE;
 372                         break;
 373                 }
 374         }
 375
 376         ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
 377         if (ret < 0)
 378                 return ret;
 379         msleep(5);
 380
 381         switch (dev->audio_mode.ac97) {
 382         case EM28XX_NO_AC97:
 383                 break;
 384         default:
 385                 ret = set_ac97_input(dev);
 386         }
 387
 388         return ret;
 389 }
 390
 391 struct em28xx_vol_table outputs[] = {
 392         { EM28XX_AOUT_MASTER, AC97_MASTER_VOL      },
 393         { EM28XX_AOUT_LINE,   AC97_LINE_LEVEL_VOL  },
 394         { EM28XX_AOUT_MONO,   AC97_MASTER_MONO_VOL },
 395         { EM28XX_AOUT_LFE,    AC97_LFE_MASTER_VOL  },
 396         { EM28XX_AOUT_SURR,   AC97_SURR_MASTER_VOL },
 397 };
 398
 399 int em28xx_audio_analog_set(struct em28xx *dev)
 400 {
 401         int ret, i;
 402         u8 xclk = 0x07;
 403
 404         if (!dev->audio_mode.has_audio)
 405                 return 0;
 406
 407         /* It is assumed that all devices use master volume for output.
 408            It would be possible to use also line output.
 409          */
 410         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 411                 /* Mute all outputs */
 412                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 413                         ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
 414                         if (ret < 0)
 415                                 em28xx_warn("couldn't setup AC97 register %d\n",
 416                                      outputs[i].reg);
 417                 }
 418         }
 419
 420         if (dev->has_12mhz_i2s)
 421                 xclk |= 0x20;
 422
 423         if (!dev->mute)
 424                 xclk |= 0x80;
 425
 426         ret = em28xx_write_reg_bits(dev, EM28XX_R0F_XCLK, xclk, 0xa7);
 427         if (ret < 0)
 428                 return ret;
 429         msleep(10);
 430
 431         /* Selects the proper audio input */
 432         ret = em28xx_set_audio_source(dev);
 433
 434         /* Sets volume */
 435         if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
 436                 int vol;
 437
 438                 /* LSB: left channel - both channels with the same level */
 439                 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
 440
 441                 /* Mute device, if needed */
 442                 if (dev->mute)
 443                         vol |= 0x8000;
 444
 445                 /* Sets volume */
 446                 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
 447                         if (dev->ctl_aoutput & outputs[i].mux)
 448                                 ret = em28xx_write_ac97(dev, outputs[i].reg,
 449                                                         vol);
 450                         if (ret < 0)
 451                                 em28xx_warn("couldn't setup AC97 register %d\n",
 452                                      outputs[i].reg);
 453                 }
 454         }
 455
 456         return ret;
 457 }
 458 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
 459
 460 int em28xx_audio_setup(struct em28xx *dev)
 461 {
 462         int vid1, vid2, feat, cfg;
 463         u32 vid;
 464
 465         if (dev->chip_id == CHIP_ID_EM2874) {
 466                 /* Digital only device - don't load any alsa module */
 467                 dev->audio_mode.has_audio = 0;
 468                 dev->has_audio_class = 0;
 469                 dev->has_alsa_audio = 0;
 470                 return 0;
 471         }
 472
 473         /* If device doesn't support Usb Audio Class, use vendor class */
 474         if (!dev->has_audio_class)
 475                 dev->has_alsa_audio = 1;
 476
 477         dev->audio_mode.has_audio = 1;
 478
 479         /* See how this device is configured */
 480         cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
 481         if (cfg < 0)
 482                 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
 483         else
 484                 em28xx_info("Config register raw data: 0x%02x\n", cfg);
 485
 486         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 487                     EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
 488                 em28xx_info("I2S Audio (3 sample rates)\n");
 489                 dev->audio_mode.i2s_3rates = 1;
 490         }
 491         if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
 492                     EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
 493                 em28xx_info("I2S Audio (5 sample rates)\n");
 494                 dev->audio_mode.i2s_5rates = 1;
 495         }
 496
 497         if (!(cfg & EM28XX_CHIPCFG_AC97)) {
 498                 dev->audio_mode.ac97 = EM28XX_NO_AC97;
 499                 goto init_audio;
 500         }
 501
 502         dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
 503
 504         vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
 505         if (vid1 < 0) {
 506                 /* Device likely doesn't support AC97 */
 507                 em28xx_warn("AC97 chip type couldn't be determined\n");
 508                 goto init_audio;
 509         }
 510
 511         vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
 512         if (vid2 < 0)
 513                 goto init_audio;
 514
 515         vid = vid1 << 16 | vid2;
 516
 517         dev->audio_mode.ac97_vendor_id = vid;
 518         em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
 519
 520         feat = em28xx_read_ac97(dev, AC97_RESET);
 521         if (feat < 0)
 522                 goto init_audio;
 523
 524         dev->audio_mode.ac97_feat = feat;
 525         em28xx_warn("AC97 features = 0x%04x\n", feat);
 526
 527         /* Try to identify what audio processor we have */
 528         if ((vid == 0xffffffff) && (feat == 0x6a90))
 529                 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
 530         else if ((vid >> 8) == 0x838476)
 531                 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
 532
 533 init_audio:
 534         /* Reports detected AC97 processor */
 535         switch (dev->audio_mode.ac97) {
 536         case EM28XX_NO_AC97:
 537                 em28xx_info("No AC97 audio processor\n");
 538                 break;
 539         case EM28XX_AC97_EM202:
 540                 em28xx_info("Empia 202 AC97 audio processor detected\n");
 541                 break;
 542         case EM28XX_AC97_SIGMATEL:
 543                 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
 544                             dev->audio_mode.ac97_vendor_id & 0xff);
 545                 break;
 546         case EM28XX_AC97_OTHER:
 547                 em28xx_warn("Unknown AC97 audio processor detected!\n");
 548                 break;
 549         default:
 550                 break;
 551         }
 552
 553         return em28xx_audio_analog_set(dev);
 554 }
 555 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
 556
 557 int em28xx_colorlevels_set_default(struct em28xx *dev)
 558 {
 559         em28xx_write_regs(dev, EM28XX_R20_YGAIN, "\x10", 1);    /* contrast */
 560         em28xx_write_regs(dev, EM28XX_R21_YOFFSET, "\x00", 1);  /* brightness */
 561         em28xx_write_regs(dev, EM28XX_R22_UVGAIN, "\x10", 1);   /* saturation */
 562         em28xx_write_regs(dev, EM28XX_R23_UOFFSET, "\x00", 1);
 563         em28xx_write_regs(dev, EM28XX_R24_VOFFSET, "\x00", 1);
 564         em28xx_write_regs(dev, EM28XX_R25_SHARPNESS, "\x00", 1);
 565
 566         em28xx_write_regs(dev, EM28XX_R14_GAMMA, "\x20", 1);
 567         em28xx_write_regs(dev, EM28XX_R15_RGAIN, "\x20", 1);
 568         em28xx_write_regs(dev, EM28XX_R16_GGAIN, "\x20", 1);
 569         em28xx_write_regs(dev, EM28XX_R17_BGAIN, "\x20", 1);
 570         em28xx_write_regs(dev, EM28XX_R18_ROFFSET, "\x00", 1);
 571         em28xx_write_regs(dev, EM28XX_R19_GOFFSET, "\x00", 1);
 572         return em28xx_write_regs(dev, EM28XX_R1A_BOFFSET, "\x00", 1);
 573 }
 574
 575 int em28xx_capture_start(struct em28xx *dev, int start)
 576 {
 577         int rc;
 578
 579         if (dev->chip_id == CHIP_ID_EM2874) {
 580                 /* The Transport Stream Enable Register moved in em2874 */
 581                 if (!start) {
 582                         rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 583                                                    0x00,
 584                                                    EM2874_TS1_CAPTURE_ENABLE);
 585                         return rc;
 586                 }
 587
 588                 /* Enable Transport Stream */
 589                 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
 590                                            EM2874_TS1_CAPTURE_ENABLE,
 591                                            EM2874_TS1_CAPTURE_ENABLE);
 592                 return rc;
 593         }
 594
 595
 596         /* FIXME: which is the best order? */
 597         /* video registers are sampled by VREF */
 598         rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
 599                                    start ? 0x10 : 0x00, 0x10);
 600         if (rc < 0)
 601                 return rc;
 602
 603         if (!start) {
 604                 /* disable video capture */
 605                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x27", 1);
 606                 return rc;
 607         }
 608
 609         /* enable video capture */
 610         rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 611
 612         if (dev->mode == EM28XX_ANALOG_MODE)
 613                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x67", 1);
 614         else
 615                 rc = em28xx_write_regs(dev, EM28XX_R12_VINENABLE, "\x37", 1);
 616
 617         msleep(6);
 618
 619         return rc;
 620 }
 621
 622 int em28xx_outfmt_set_yuv422(struct em28xx *dev)
 623 {
 624         em28xx_write_regs(dev, EM28XX_R27_OUTFMT, "\x34", 1);
 625         em28xx_write_regs(dev, EM28XX_R10_VINMODE, "\x10", 1);
 626         return em28xx_write_regs(dev, EM28XX_R11_VINCTRL, "\x11", 1);
 627 }
 628
 629 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
 630                                   u8 ymin, u8 ymax)
 631 {
 632         em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
 633                         xmin, ymin, xmax, ymax);
 634
 635         em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
 636         em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
 637         em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
 638         return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
 639 }
 640
 641 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
 642                                    u16 width, u16 height)
 643 {
 644         u8 cwidth = width;
 645         u8 cheight = height;
 646         u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
 647
 648         em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
 649                         (width | (overflow & 2) << 7),
 650                         (height | (overflow & 1) << 8));
 651
 652         em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
 653         em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
 654         em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
 655         em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
 656         return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
 657 }
 658
 659 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
 660 {
 661         u8 mode;
 662         /* the em2800 scaler only supports scaling down to 50% */
 663         if (dev->is_em2800)
 664                 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
 665         else {
 666                 u8 buf[2];
 667                 buf[0] = h;
 668                 buf[1] = h >> 8;
 669                 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
 670                 buf[0] = v;
 671                 buf[1] = v >> 8;
 672                 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
 673                 /* it seems that both H and V scalers must be active
 674                    to work correctly */
 675                 mode = (h || v)? 0x30: 0x00;
 676         }
 677         return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
 678 }
 679
 680 /* FIXME: this only function read values from dev */
 681 int em28xx_resolution_set(struct em28xx *dev)
 682 {
 683         int width, height;
 684         width = norm_maxw(dev);
 685         height = norm_maxh(dev) >> 1;
 686
 687         em28xx_outfmt_set_yuv422(dev);
 688         em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
 689         em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
 690         return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
 691 }
 692
 693 int em28xx_set_alternate(struct em28xx *dev)
 694 {
 695         int errCode, prev_alt = dev->alt;
 696         int i;
 697         unsigned int min_pkt_size = dev->width * 2 + 4;
 698
 699         /* When image size is bigger than a certain value,
 700            the frame size should be increased, otherwise, only
 701            green screen will be received.
 702          */
 703         if (dev->width * 2 * dev->height > 720 * 240 * 2)
 704                 min_pkt_size *= 2;
 705
 706         for (i = 0; i < dev->num_alt; i++) {
 707                 /* stop when the selected alt setting offers enough bandwidth */
 708                 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
 709                         dev->alt = i;
 710                         break;
 711                 /* otherwise make sure that we end up with the maximum bandwidth
 712                    because the min_pkt_size equation might be wrong...
 713                 */
 714                 } else if (dev->alt_max_pkt_size[i] >
 715                            dev->alt_max_pkt_size[dev->alt])
 716                         dev->alt = i;
 717         }
 718
 719         if (dev->alt != prev_alt) {
 720                 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
 721                                 min_pkt_size, dev->alt);
 722                 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
 723                 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
 724                                dev->alt, dev->max_pkt_size);
 725                 errCode = usb_set_interface(dev->udev, 0, dev->alt);
 726                 if (errCode < 0) {
 727                         em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
 728                                         dev->alt, errCode);
 729                         return errCode;
 730                 }
 731         }
 732         return 0;
 733 }
 734
 735 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
 736 {
 737         int rc = 0;
 738
 739         if (!gpio)
 740                 return rc;
 741
 742         dev->em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
 743         if (dev->mode == EM28XX_ANALOG_MODE)
 744                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x67", 1);
 745         else
 746                 dev->em28xx_write_regs_req(dev, 0x00, 0x12, "\x37", 1);
 747         msleep(6);
 748
 749         /* Send GPIO reset sequences specified at board entry */
 750         while (gpio->sleep >= 0) {
 751                 if (gpio->reg >= 0) {
 752                         rc = em28xx_write_reg_bits(dev,
 753                                                    gpio->reg,
 754                                                    gpio->val,
 755                                                    gpio->mask);
 756                         if (rc < 0)
 757                                 return rc;
 758                 }
 759                 if (gpio->sleep > 0)
 760                         msleep(gpio->sleep);
 761
 762                 gpio++;
 763         }
 764         return rc;
 765 }
 766
 767 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
 768 {
 769         if (dev->mode == set_mode)
 770                 return 0;
 771
 772         if (set_mode == EM28XX_MODE_UNDEFINED) {
 773                 dev->mode = set_mode;
 774                 return 0;
 775         }
 776
 777         dev->mode = set_mode;
 778
 779         if (dev->mode == EM28XX_DIGITAL_MODE)
 780                 return em28xx_gpio_set(dev, dev->digital_gpio);
 781         else
 782                 return em28xx_gpio_set(dev, dev->analog_gpio);
 783 }
 784 EXPORT_SYMBOL_GPL(em28xx_set_mode);
 785
 786 /* ------------------------------------------------------------------
 787         URB control
 788    ------------------------------------------------------------------*/
 789
 790 /*
 791  * IRQ callback, called by URB callback
 792  */
 793 static void em28xx_irq_callback(struct urb *urb)
 794 {
 795         struct em28xx_dmaqueue  *dma_q = urb->context;
 796         struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
 797         int rc, i;
 798
 799         /* Copy data from URB */
 800         spin_lock(&dev->slock);
 801         rc = dev->isoc_ctl.isoc_copy(dev, urb);
 802         spin_unlock(&dev->slock);
 803
 804         /* Reset urb buffers */
 805         for (i = 0; i < urb->number_of_packets; i++) {
 806                 urb->iso_frame_desc[i].status = 0;
 807                 urb->iso_frame_desc[i].actual_length = 0;
 808         }
 809         urb->status = 0;
 810
 811         urb->status = usb_submit_urb(urb, GFP_ATOMIC);
 812         if (urb->status) {
 813                 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
 814                                urb->status);
 815         }
 816 }
 817
 818 /*
 819  * Stop and Deallocate URBs
 820  */
 821 void em28xx_uninit_isoc(struct em28xx *dev)
 822 {
 823         struct urb *urb;
 824         int i;
 825
 826         em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
 827
 828         dev->isoc_ctl.nfields = -1;
 829         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 830                 urb = dev->isoc_ctl.urb[i];
 831                 if (urb) {
 832                         usb_kill_urb(urb);
 833                         usb_unlink_urb(urb);
 834                         if (dev->isoc_ctl.transfer_buffer[i]) {
 835                                 usb_buffer_free(dev->udev,
 836                                         urb->transfer_buffer_length,
 837                                         dev->isoc_ctl.transfer_buffer[i],
 838                                         urb->transfer_dma);
 839                         }
 840                         usb_free_urb(urb);
 841                         dev->isoc_ctl.urb[i] = NULL;
 842                 }
 843                 dev->isoc_ctl.transfer_buffer[i] = NULL;
 844         }
 845
 846         kfree(dev->isoc_ctl.urb);
 847         kfree(dev->isoc_ctl.transfer_buffer);
 848
 849         dev->isoc_ctl.urb = NULL;
 850         dev->isoc_ctl.transfer_buffer = NULL;
 851         dev->isoc_ctl.num_bufs = 0;
 852
 853         em28xx_capture_start(dev, 0);
 854 }
 855 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
 856
 857 /*
 858  * Allocate URBs and start IRQ
 859  */
 860 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
 861                      int num_bufs, int max_pkt_size,
 862                      int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
 863 {
 864         struct em28xx_dmaqueue *dma_q = &dev->vidq;
 865         int i;
 866         int sb_size, pipe;
 867         struct urb *urb;
 868         int j, k;
 869         int rc;
 870
 871         em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
 872
 873         /* De-allocates all pending stuff */
 874         em28xx_uninit_isoc(dev);
 875
 876         dev->isoc_ctl.isoc_copy = isoc_copy;
 877         dev->isoc_ctl.num_bufs = num_bufs;
 878
 879         dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs,  GFP_KERNEL);
 880         if (!dev->isoc_ctl.urb) {
 881                 em28xx_errdev("cannot alloc memory for usb buffers\n");
 882                 return -ENOMEM;
 883         }
 884
 885         dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
 886                                               GFP_KERNEL);
 887         if (!dev->isoc_ctl.transfer_buffer) {
 888                 em28xx_errdev("cannot allocate memory for usbtransfer\n");
 889                 kfree(dev->isoc_ctl.urb);
 890                 return -ENOMEM;
 891         }
 892
 893         dev->isoc_ctl.max_pkt_size = max_pkt_size;
 894         dev->isoc_ctl.buf = NULL;
 895
 896         sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
 897
 898         /* allocate urbs and transfer buffers */
 899         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 900                 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
 901                 if (!urb) {
 902                         em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
 903                         em28xx_uninit_isoc(dev);
 904                         return -ENOMEM;
 905                 }
 906                 dev->isoc_ctl.urb[i] = urb;
 907
 908                 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
 909                         sb_size, GFP_KERNEL, &urb->transfer_dma);
 910                 if (!dev->isoc_ctl.transfer_buffer[i]) {
 911                         em28xx_err("unable to allocate %i bytes for transfer"
 912                                         " buffer %i%s\n",
 913                                         sb_size, i,
 914                                         in_interrupt()?" while in int":"");
 915                         em28xx_uninit_isoc(dev);
 916                         return -ENOMEM;
 917                 }
 918                 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
 919
 920                 /* FIXME: this is a hack - should be
 921                         'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
 922                         should also be using 'desc.bInterval'
 923                  */
 924                 pipe = usb_rcvisocpipe(dev->udev,
 925                         dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
 926
 927                 usb_fill_int_urb(urb, dev->udev, pipe,
 928                                  dev->isoc_ctl.transfer_buffer[i], sb_size,
 929                                  em28xx_irq_callback, dma_q, 1);
 930
 931                 urb->number_of_packets = max_packets;
 932                 urb->transfer_flags = URB_ISO_ASAP;
 933
 934                 k = 0;
 935                 for (j = 0; j < max_packets; j++) {
 936                         urb->iso_frame_desc[j].offset = k;
 937                         urb->iso_frame_desc[j].length =
 938                                                 dev->isoc_ctl.max_pkt_size;
 939                         k += dev->isoc_ctl.max_pkt_size;
 940                 }
 941         }
 942
 943         init_waitqueue_head(&dma_q->wq);
 944
 945         em28xx_capture_start(dev, 1);
 946
 947         /* submit urbs and enables IRQ */
 948         for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
 949                 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
 950                 if (rc) {
 951                         em28xx_err("submit of urb %i failed (error=%i)\n", i,
 952                                    rc);
 953                         em28xx_uninit_isoc(dev);
 954                         return rc;
 955                 }
 956         }
 957
 958         return 0;
 959 }
 960 EXPORT_SYMBOL_GPL(em28xx_init_isoc);