arch/arm/mach-ep93xx/core.c

   1 /*
   2  * arch/arm/mach-ep93xx/core.c
   3  * Core routines for Cirrus EP93xx chips.
   4  *
   5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
   6  *
   7  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
   8  * role in the ep93xx linux community.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/kernel.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/serial.h>
  23 #include <linux/tty.h>
  24 #include <linux/bitops.h>
  25 #include <linux/serial.h>
  26 #include <linux/serial_8250.h>
  27 #include <linux/serial_core.h>
  28 #include <linux/device.h>
  29 #include <linux/mm.h>
  30 #include <linux/time.h>
  31 #include <linux/timex.h>
  32 #include <linux/delay.h>
  33 #include <linux/amba/bus.h>
  34
  35 #include <asm/types.h>
  36 #include <asm/setup.h>
  37 #include <asm/memory.h>
  38 #include <asm/hardware.h>
  39 #include <asm/irq.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42 #include <asm/pgtable.h>
  43 #include <asm/io.h>
  44
  45 #include <asm/mach/map.h>
  46 #include <asm/mach/time.h>
  47 #include <asm/mach/irq.h>
  48
  49 #include <asm/hardware/vic.h>
  50
  51
  52 /*************************************************************************
  53  * Static I/O mappings that are needed for all EP93xx platforms
  54  *************************************************************************/
  55 static struct map_desc ep93xx_io_desc[] __initdata = {
  56         {
  57                 .virtual        = EP93XX_AHB_VIRT_BASE,
  58                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  59                 .length         = EP93XX_AHB_SIZE,
  60                 .type           = MT_DEVICE,
  61         }, {
  62                 .virtual        = EP93XX_APB_VIRT_BASE,
  63                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  64                 .length         = EP93XX_APB_SIZE,
  65                 .type           = MT_DEVICE,
  66         },
  67 };
  68
  69 void __init ep93xx_map_io(void)
  70 {
  71         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  72 }
  73
  74
  75 /*************************************************************************
  76  * Timer handling for EP93xx
  77  *************************************************************************
  78  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
  79  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  80  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
  81  * is free-running, and can't generate interrupts.
  82  *
  83  * The 508 kHz timers are ideal for use for the timer interrupt, as the
  84  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
  85  * bit timers (timer 1) since we don't need more than 16 bits of reload
  86  * value as long as HZ >= 8.
  87  *
  88  * The higher clock rate of timer 4 makes it a better choice than the
  89  * other timers for use in gettimeoffset(), while the fact that it can't
  90  * generate interrupts means we don't have to worry about not being able
  91  * to use this timer for something else.  We also use timer 4 for keeping
  92  * track of lost jiffies.
  93  */
  94 static unsigned int last_jiffy_time;
  95
  96 #define TIMER4_TICKS_PER_JIFFY          ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
  97
  98 static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  99 {
 100         write_seqlock(&xtime_lock);
 101
 102         __raw_writel(1, EP93XX_TIMER1_CLEAR);
 103         while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
 104                                                 >= TIMER4_TICKS_PER_JIFFY) {
 105                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
 106                 timer_tick(regs);
 107         }
 108
 109         write_sequnlock(&xtime_lock);
 110
 111         return IRQ_HANDLED;
 112 }
 113
 114 static struct irqaction ep93xx_timer_irq = {
 115         .name           = "ep93xx timer",
 116         .flags          = SA_INTERRUPT | SA_TIMER,
 117         .handler        = ep93xx_timer_interrupt,
 118 };
 119
 120 static void __init ep93xx_timer_init(void)
 121 {
 122         /* Enable periodic HZ timer.  */
 123         __raw_writel(0x48, EP93XX_TIMER1_CONTROL);
 124         __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
 125         __raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
 126
 127         /* Enable lost jiffy timer.  */
 128         __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
 129
 130         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
 131 }
 132
 133 static unsigned long ep93xx_gettimeoffset(void)
 134 {
 135         int offset;
 136
 137         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
 138
 139         /* Calculate (1000000 / 983040) * offset.  */
 140         return offset + (53 * offset / 3072);
 141 }
 142
 143 struct sys_timer ep93xx_timer = {
 144         .init           = ep93xx_timer_init,
 145         .offset         = ep93xx_gettimeoffset,
 146 };
 147
 148
 149 /*************************************************************************
 150  * EP93xx IRQ handling
 151  *************************************************************************/
 152 void __init ep93xx_init_irq(void)
 153 {
 154         vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
 155         vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
 156 }
 157
 158
 159 /*************************************************************************
 160  * EP93xx peripheral handling
 161  *************************************************************************/
 162 void __init ep93xx_init_devices(void)
 163 {
 164         unsigned int v;
 165
 166         /*
 167          * Disallow access to MaverickCrunch initially.
 168          */
 169         v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
 170         v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
 171         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 172         __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
 173 }