drivers/video/sis/sis.h

   1 /*
   2  * SiS 300/540/630[S]/730[S],
   3  * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
   4  * XGI V3XT/V5/V8, Z7
   5  * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
   6  *
   7  * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the named License,
  12  * or any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  22  */
  23
  24 #ifndef _SIS_H_
  25 #define _SIS_H_
  26
  27 #include <linux/version.h>
  28
  29 #include "osdef.h"
  30 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  31 #include <video/sisfb.h>
  32 #else
  33 #include <linux/sisfb.h>
  34 #endif
  35
  36 #include "vgatypes.h"
  37 #include "vstruct.h"
  38
  39 #define VER_MAJOR               1
  40 #define VER_MINOR               8
  41 #define VER_LEVEL               9
  42
  43 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
  44 #include <linux/spinlock.h>
  45 #define SIS_PCI_GET_CLASS(a, b) pci_get_class(a, b)
  46 #define SIS_PCI_GET_DEVICE(a,b,c) pci_get_device(a,b,c)
  47 #define SIS_PCI_GET_SLOT(a,b) pci_get_slot(a,b)
  48 #define SIS_PCI_PUT_DEVICE(a) pci_dev_put(a)
  49 #ifdef CONFIG_COMPAT
  50 #if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
  51 #include <linux/ioctl32.h>
  52 #define SIS_OLD_CONFIG_COMPAT
  53 #else
  54 #define SIS_NEW_CONFIG_COMPAT
  55 #endif
  56 #endif  /* CONFIG_COMPAT */
  57 #else  /* 2.4 */
  58 #define SIS_PCI_GET_CLASS(a, b) pci_find_class(a, b)
  59 #define SIS_PCI_GET_DEVICE(a,b,c) pci_find_device(a,b,c)
  60 #define SIS_PCI_GET_SLOT(a,b) pci_find_slot(a,b)
  61 #define SIS_PCI_PUT_DEVICE(a)
  62 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
  63 #ifdef __x86_64__       /* Shouldn't we check for CONFIG_IA32_EMULATION here? */
  64 #include <asm/ioctl32.h>
  65 #define SIS_OLD_CONFIG_COMPAT
  66 #endif
  67 #endif
  68 #endif /* 2.4 */
  69 #if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
  70 #define SIS_IOTYPE1 void __iomem
  71 #define SIS_IOTYPE2 __iomem
  72 #define SISINITSTATIC static
  73 #else
  74 #define SIS_IOTYPE1 unsigned char
  75 #define SIS_IOTYPE2
  76 #define SISINITSTATIC
  77 #endif
  78
  79 #undef SISFBDEBUG
  80
  81 #ifdef SISFBDEBUG
  82 #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
  83 #define TWDEBUG(x) printk(KERN_INFO x "\n");
  84 #else
  85 #define DPRINTK(fmt, args...)
  86 #define TWDEBUG(x)
  87 #endif
  88
  89 #define SISFAIL(x) do { printk(x "\n"); return -EINVAL; } while(0)
  90
  91 /* To be included in pci_ids.h */
  92 #ifndef PCI_DEVICE_ID_SI_650_VGA
  93 #define PCI_DEVICE_ID_SI_650_VGA        0x6325
  94 #endif
  95 #ifndef PCI_DEVICE_ID_SI_650
  96 #define PCI_DEVICE_ID_SI_650            0x0650
  97 #endif
  98 #ifndef PCI_DEVICE_ID_SI_651
  99 #define PCI_DEVICE_ID_SI_651            0x0651
 100 #endif
 101 #ifndef PCI_DEVICE_ID_SI_740
 102 #define PCI_DEVICE_ID_SI_740            0x0740
 103 #endif
 104 #ifndef PCI_DEVICE_ID_SI_330
 105 #define PCI_DEVICE_ID_SI_330            0x0330
 106 #endif
 107 #ifndef PCI_DEVICE_ID_SI_660_VGA
 108 #define PCI_DEVICE_ID_SI_660_VGA        0x6330
 109 #endif
 110 #ifndef PCI_DEVICE_ID_SI_661
 111 #define PCI_DEVICE_ID_SI_661            0x0661
 112 #endif
 113 #ifndef PCI_DEVICE_ID_SI_741
 114 #define PCI_DEVICE_ID_SI_741            0x0741
 115 #endif
 116 #ifndef PCI_DEVICE_ID_SI_660
 117 #define PCI_DEVICE_ID_SI_660            0x0660
 118 #endif
 119 #ifndef PCI_DEVICE_ID_SI_760
 120 #define PCI_DEVICE_ID_SI_760            0x0760
 121 #endif
 122 #ifndef PCI_DEVICE_ID_SI_761
 123 #define PCI_DEVICE_ID_SI_761            0x0761
 124 #endif
 125
 126 #ifndef PCI_VENDOR_ID_XGI
 127 #define PCI_VENDOR_ID_XGI               0x18ca
 128 #endif
 129
 130 #ifndef PCI_DEVICE_ID_XGI_20
 131 #define PCI_DEVICE_ID_XGI_20            0x0020
 132 #endif
 133
 134 #ifndef PCI_DEVICE_ID_XGI_40
 135 #define PCI_DEVICE_ID_XGI_40            0x0040
 136 #endif
 137
 138 /* To be included in fb.h */
 139 #ifndef FB_ACCEL_SIS_GLAMOUR_2
 140 #define FB_ACCEL_SIS_GLAMOUR_2  40      /* SiS 315, 65x, 740, 661, 741  */
 141 #endif
 142 #ifndef FB_ACCEL_SIS_XABRE
 143 #define FB_ACCEL_SIS_XABRE      41      /* SiS 330 ("Xabre"), 76x       */
 144 #endif
 145 #ifndef FB_ACCEL_XGI_VOLARI_V
 146 #define FB_ACCEL_XGI_VOLARI_V   47      /* XGI Volari Vx (V3XT, V5, V8) */
 147 #endif
 148 #ifndef FB_ACCEL_XGI_VOLARI_Z
 149 #define FB_ACCEL_XGI_VOLARI_Z   48      /* XGI Volari Z7                */
 150 #endif
 151
 152 /* ivideo->caps */
 153 #define HW_CURSOR_CAP           0x80
 154 #define TURBO_QUEUE_CAP         0x40
 155 #define AGP_CMD_QUEUE_CAP       0x20
 156 #define VM_CMD_QUEUE_CAP        0x10
 157 #define MMIO_CMD_QUEUE_CAP      0x08
 158
 159 /* For 300 series */
 160 #define TURBO_QUEUE_AREA_SIZE   (512 * 1024)    /* 512K */
 161 #define HW_CURSOR_AREA_SIZE_300 4096            /* 4K */
 162
 163 /* For 315/Xabre series */
 164 #define COMMAND_QUEUE_AREA_SIZE (512 * 1024)    /* 512K */
 165 #define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
 166 #define HW_CURSOR_AREA_SIZE_315 16384           /* 16K */
 167 #define COMMAND_QUEUE_THRESHOLD 0x1F
 168
 169 #define SIS_OH_ALLOC_SIZE       4000
 170 #define SENTINEL                0x7fffffff
 171
 172 #define SEQ_ADR                 0x14
 173 #define SEQ_DATA                0x15
 174 #define DAC_ADR                 0x18
 175 #define DAC_DATA                0x19
 176 #define CRTC_ADR                0x24
 177 #define CRTC_DATA               0x25
 178 #define DAC2_ADR                (0x16-0x30)
 179 #define DAC2_DATA               (0x17-0x30)
 180 #define VB_PART1_ADR            (0x04-0x30)
 181 #define VB_PART1_DATA           (0x05-0x30)
 182 #define VB_PART2_ADR            (0x10-0x30)
 183 #define VB_PART2_DATA           (0x11-0x30)
 184 #define VB_PART3_ADR            (0x12-0x30)
 185 #define VB_PART3_DATA           (0x13-0x30)
 186 #define VB_PART4_ADR            (0x14-0x30)
 187 #define VB_PART4_DATA           (0x15-0x30)
 188
 189 #define SISSR                   ivideo->SiS_Pr.SiS_P3c4
 190 #define SISCR                   ivideo->SiS_Pr.SiS_P3d4
 191 #define SISDACA                 ivideo->SiS_Pr.SiS_P3c8
 192 #define SISDACD                 ivideo->SiS_Pr.SiS_P3c9
 193 #define SISPART1                ivideo->SiS_Pr.SiS_Part1Port
 194 #define SISPART2                ivideo->SiS_Pr.SiS_Part2Port
 195 #define SISPART3                ivideo->SiS_Pr.SiS_Part3Port
 196 #define SISPART4                ivideo->SiS_Pr.SiS_Part4Port
 197 #define SISPART5                ivideo->SiS_Pr.SiS_Part5Port
 198 #define SISDAC2A                SISPART5
 199 #define SISDAC2D                (SISPART5 + 1)
 200 #define SISMISCR                (ivideo->SiS_Pr.RelIO + 0x1c)
 201 #define SISMISCW                ivideo->SiS_Pr.SiS_P3c2
 202 #define SISINPSTAT              (ivideo->SiS_Pr.RelIO + 0x2a)
 203 #define SISPEL                  ivideo->SiS_Pr.SiS_P3c6
 204 #define SISVGAENABLE            (ivideo->SiS_Pr.RelIO + 0x13)
 205 #define SISVID                  (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
 206 #define SISCAP                  (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
 207
 208 #define IND_SIS_PASSWORD                0x05  /* SRs */
 209 #define IND_SIS_COLOR_MODE              0x06
 210 #define IND_SIS_RAMDAC_CONTROL          0x07
 211 #define IND_SIS_DRAM_SIZE               0x14
 212 #define IND_SIS_MODULE_ENABLE           0x1E
 213 #define IND_SIS_PCI_ADDRESS_SET         0x20
 214 #define IND_SIS_TURBOQUEUE_ADR          0x26
 215 #define IND_SIS_TURBOQUEUE_SET          0x27
 216 #define IND_SIS_POWER_ON_TRAP           0x38
 217 #define IND_SIS_POWER_ON_TRAP2          0x39
 218 #define IND_SIS_CMDQUEUE_SET            0x26
 219 #define IND_SIS_CMDQUEUE_THRESHOLD      0x27
 220
 221 #define IND_SIS_AGP_IO_PAD      0x48
 222
 223 #define SIS_CRT2_WENABLE_300    0x24  /* Part1 */
 224 #define SIS_CRT2_WENABLE_315    0x2F
 225
 226 #define SIS_PASSWORD            0x86  /* SR05 */
 227
 228 #define SIS_INTERLACED_MODE     0x20  /* SR06 */
 229 #define SIS_8BPP_COLOR_MODE     0x0
 230 #define SIS_15BPP_COLOR_MODE    0x1
 231 #define SIS_16BPP_COLOR_MODE    0x2
 232 #define SIS_32BPP_COLOR_MODE    0x4
 233
 234 #define SIS_ENABLE_2D           0x40  /* SR1E */
 235
 236 #define SIS_MEM_MAP_IO_ENABLE   0x01  /* SR20 */
 237 #define SIS_PCI_ADDR_ENABLE     0x80
 238
 239 #define SIS_AGP_CMDQUEUE_ENABLE         0x80  /* 315/330/340 series SR26 */
 240 #define SIS_VRAM_CMDQUEUE_ENABLE        0x40
 241 #define SIS_MMIO_CMD_ENABLE             0x20
 242 #define SIS_CMD_QUEUE_SIZE_512k         0x00
 243 #define SIS_CMD_QUEUE_SIZE_1M           0x04
 244 #define SIS_CMD_QUEUE_SIZE_2M           0x08
 245 #define SIS_CMD_QUEUE_SIZE_4M           0x0C
 246 #define SIS_CMD_QUEUE_RESET             0x01
 247 #define SIS_CMD_AUTO_CORR               0x02
 248
 249 #define SIS_CMD_QUEUE_SIZE_Z7_64k       0x00 /* XGI Z7 */
 250 #define SIS_CMD_QUEUE_SIZE_Z7_128k      0x04
 251
 252 #define SIS_SIMULTANEOUS_VIEW_ENABLE    0x01  /* CR30 */
 253 #define SIS_MODE_SELECT_CRT2            0x02
 254 #define SIS_VB_OUTPUT_COMPOSITE         0x04
 255 #define SIS_VB_OUTPUT_SVIDEO            0x08
 256 #define SIS_VB_OUTPUT_SCART             0x10
 257 #define SIS_VB_OUTPUT_LCD               0x20
 258 #define SIS_VB_OUTPUT_CRT2              0x40
 259 #define SIS_VB_OUTPUT_HIVISION          0x80
 260
 261 #define SIS_VB_OUTPUT_DISABLE   0x20  /* CR31 */
 262 #define SIS_DRIVER_MODE         0x40
 263
 264 #define SIS_VB_COMPOSITE        0x01  /* CR32 */
 265 #define SIS_VB_SVIDEO           0x02
 266 #define SIS_VB_SCART            0x04
 267 #define SIS_VB_LCD              0x08
 268 #define SIS_VB_CRT2             0x10
 269 #define SIS_CRT1                0x20
 270 #define SIS_VB_HIVISION         0x40
 271 #define SIS_VB_YPBPR            0x80
 272 #define SIS_VB_TV               (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
 273                                 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
 274
 275 #define SIS_EXTERNAL_CHIP_MASK                  0x0E  /* CR37 (< SiS 660) */
 276 #define SIS_EXTERNAL_CHIP_SIS301                0x01  /* in CR37 << 1 ! */
 277 #define SIS_EXTERNAL_CHIP_LVDS                  0x02
 278 #define SIS_EXTERNAL_CHIP_TRUMPION              0x03
 279 #define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL         0x04
 280 #define SIS_EXTERNAL_CHIP_CHRONTEL              0x05
 281 #define SIS310_EXTERNAL_CHIP_LVDS               0x02
 282 #define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL      0x03
 283
 284 #define SIS_AGP_2X              0x20  /* CR48 */
 285
 286 /* vbflags, private entries (others in sisfb.h) */
 287 #define VB_CONEXANT             0x00000800      /* 661 series only */
 288 #define VB_TRUMPION             VB_CONEXANT     /* 300 series only */
 289 #define VB_302ELV               0x00004000
 290 #define VB_301                  0x00100000      /* Video bridge type */
 291 #define VB_301B                 0x00200000
 292 #define VB_302B                 0x00400000
 293 #define VB_30xBDH               0x00800000      /* 30xB DH version (w/o LCD support) */
 294 #define VB_LVDS                 0x01000000
 295 #define VB_CHRONTEL             0x02000000
 296 #define VB_301LV                0x04000000
 297 #define VB_302LV                0x08000000
 298 #define VB_301C                 0x10000000
 299
 300 #define VB_SISBRIDGE            (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
 301 #define VB_VIDEOBRIDGE          (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
 302
 303 /* vbflags2 (static stuff only!) */
 304 #define VB2_SISUMC              0x00000001
 305 #define VB2_301                 0x00000002      /* Video bridge type */
 306 #define VB2_301B                0x00000004
 307 #define VB2_301C                0x00000008
 308 #define VB2_307T                0x00000010
 309 #define VB2_302B                0x00000800
 310 #define VB2_301LV               0x00001000
 311 #define VB2_302LV               0x00002000
 312 #define VB2_302ELV              0x00004000
 313 #define VB2_307LV               0x00008000
 314 #define VB2_30xBDH              0x08000000      /* 30xB DH version (w/o LCD support) */
 315 #define VB2_CONEXANT            0x10000000
 316 #define VB2_TRUMPION            0x20000000
 317 #define VB2_LVDS                0x40000000
 318 #define VB2_CHRONTEL            0x80000000
 319
 320 #define VB2_SISLVDSBRIDGE       (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 321 #define VB2_SISTMDSBRIDGE       (VB2_301   | VB2_301B  | VB2_301C   | VB2_302B | VB2_307T)
 322 #define VB2_SISBRIDGE           (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
 323
 324 #define VB2_SISTMDSLCDABRIDGE   (VB2_301C | VB2_307T)
 325 #define VB2_SISLCDABRIDGE       (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
 326
 327 #define VB2_SISHIVISIONBRIDGE   (VB2_301  | VB2_301B | VB2_302B)
 328 #define VB2_SISYPBPRBRIDGE      (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
 329 #define VB2_SISYPBPRARBRIDGE    (VB2_301C | VB2_307T | VB2_307LV)
 330 #define VB2_SISTAP4SCALER       (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
 331 #define VB2_SISTVBRIDGE         (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
 332
 333 #define VB2_SISVGA2BRIDGE       (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
 334
 335 #define VB2_VIDEOBRIDGE         (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
 336
 337 #define VB2_30xB                (VB2_301B  | VB2_301C   | VB2_302B  | VB2_307T)
 338 #define VB2_30xBLV              (VB2_30xB  | VB2_SISLVDSBRIDGE)
 339 #define VB2_30xC                (VB2_301C  | VB2_307T)
 340 #define VB2_30xCLV              (VB2_301C  | VB2_307T   | VB2_302ELV| VB2_307LV)
 341 #define VB2_SISEMIBRIDGE        (VB2_302LV | VB2_302ELV | VB2_307LV)
 342 #define VB2_LCD162MHZBRIDGE     (VB2_301C  | VB2_307T)
 343 #define VB2_LCDOVER1280BRIDGE   (VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
 344 #define VB2_LCDOVER1600BRIDGE   (VB2_307T  | VB2_307LV)
 345 #define VB2_RAMDAC202MHZBRIDGE  (VB2_301C  | VB2_307T)
 346
 347 /* I/O port access macros */
 348 #define inSISREG(base)          inb(base)
 349
 350 #define outSISREG(base,val)     outb(val,base)
 351
 352 #define orSISREG(base,val)                              \
 353                 do {                                    \
 354                         u8 __Temp = inSISREG(base);     \
 355                         outSISREG(base, __Temp | (val));\
 356                 } while (0)
 357
 358 #define andSISREG(base,val)                             \
 359                 do {                                    \
 360                         u8 __Temp = inSISREG(base);     \
 361                         outSISREG(base, __Temp & (val));\
 362                 } while (0)
 363
 364 #define inSISIDXREG(base,idx,var)                       \
 365                 do {                                    \
 366                         outSISREG(base, idx);           \
 367                         var = inSISREG((base)+1);       \
 368                 } while (0)
 369
 370 #define outSISIDXREG(base,idx,val)                      \
 371                 do {                                    \
 372                         outSISREG(base, idx);           \
 373                         outSISREG((base)+1, val);       \
 374                 } while (0)
 375
 376 #define orSISIDXREG(base,idx,val)                               \
 377                 do {                                            \
 378                         u8 __Temp;                              \
 379                         outSISREG(base, idx);                   \
 380                         __Temp = inSISREG((base)+1) | (val);    \
 381                         outSISREG((base)+1, __Temp);            \
 382                 } while (0)
 383
 384 #define andSISIDXREG(base,idx,and)                              \
 385                 do {                                            \
 386                         u8 __Temp;                              \
 387                         outSISREG(base, idx);                   \
 388                         __Temp = inSISREG((base)+1) & (and);    \
 389                         outSISREG((base)+1, __Temp);            \
 390                 } while (0)
 391
 392 #define setSISIDXREG(base,idx,and,or)                                   \
 393                 do {                                                    \
 394                         u8 __Temp;                                      \
 395                         outSISREG(base, idx);                           \
 396                         __Temp = (inSISREG((base)+1) & (and)) | (or);   \
 397                         outSISREG((base)+1, __Temp);                    \
 398                 } while (0)
 399
 400 /* MMIO access macros */
 401 #define MMIO_IN8(base, offset)  readb((base+offset))
 402 #define MMIO_IN16(base, offset) readw((base+offset))
 403 #define MMIO_IN32(base, offset) readl((base+offset))
 404
 405 #define MMIO_OUT8(base, offset, val)  writeb(((u8)(val)), (base+offset))
 406 #define MMIO_OUT16(base, offset, val) writew(((u16)(val)), (base+offset))
 407 #define MMIO_OUT32(base, offset, val) writel(((u32)(val)), (base+offset))
 408
 409 /* Queue control MMIO registers */
 410 #define Q_BASE_ADDR             0x85C0  /* Base address of software queue */
 411 #define Q_WRITE_PTR             0x85C4  /* Current write pointer */
 412 #define Q_READ_PTR              0x85C8  /* Current read pointer */
 413 #define Q_STATUS                0x85CC  /* queue status */
 414
 415 #define MMIO_QUEUE_PHYBASE      Q_BASE_ADDR
 416 #define MMIO_QUEUE_WRITEPORT    Q_WRITE_PTR
 417 #define MMIO_QUEUE_READPORT     Q_READ_PTR
 418
 419 #ifndef FB_BLANK_UNBLANK
 420 #define FB_BLANK_UNBLANK        0
 421 #endif
 422 #ifndef FB_BLANK_NORMAL
 423 #define FB_BLANK_NORMAL         1
 424 #endif
 425 #ifndef FB_BLANK_VSYNC_SUSPEND
 426 #define FB_BLANK_VSYNC_SUSPEND  2
 427 #endif
 428 #ifndef FB_BLANK_HSYNC_SUSPEND
 429 #define FB_BLANK_HSYNC_SUSPEND  3
 430 #endif
 431 #ifndef FB_BLANK_POWERDOWN
 432 #define FB_BLANK_POWERDOWN      4
 433 #endif
 434
 435 enum _SIS_LCD_TYPE {
 436     LCD_INVALID = 0,
 437     LCD_800x600,
 438     LCD_1024x768,
 439     LCD_1280x1024,
 440     LCD_1280x960,
 441     LCD_640x480,
 442     LCD_1600x1200,
 443     LCD_1920x1440,
 444     LCD_2048x1536,
 445     LCD_320x240,        /* FSTN */
 446     LCD_1400x1050,
 447     LCD_1152x864,
 448     LCD_1152x768,
 449     LCD_1280x768,
 450     LCD_1024x600,
 451     LCD_320x240_2,      /* DSTN */
 452     LCD_320x240_3,      /* DSTN */
 453     LCD_848x480,
 454     LCD_1280x800,
 455     LCD_1680x1050,
 456     LCD_1280x720,
 457     LCD_1280x854,
 458     LCD_CUSTOM,
 459     LCD_UNKNOWN
 460 };
 461
 462 enum _SIS_CMDTYPE {
 463     MMIO_CMD = 0,
 464     AGP_CMD_QUEUE,
 465     VM_CMD_QUEUE,
 466 };
 467
 468 struct SIS_OH {
 469         struct SIS_OH *poh_next;
 470         struct SIS_OH *poh_prev;
 471         u32            offset;
 472         u32            size;
 473 };
 474
 475 struct SIS_OHALLOC {
 476         struct SIS_OHALLOC *poha_next;
 477         struct SIS_OH aoh[1];
 478 };
 479
 480 struct SIS_HEAP {
 481         struct SIS_OH   oh_free;
 482         struct SIS_OH   oh_used;
 483         struct SIS_OH   *poh_freelist;
 484         struct SIS_OHALLOC *poha_chain;
 485         u32             max_freesize;
 486         struct sis_video_info *vinfo;
 487 };
 488
 489 /* Our "par" */
 490 struct sis_video_info {
 491         int             cardnumber;
 492         struct fb_info  *memyselfandi;
 493
 494         struct SiS_Private SiS_Pr;
 495
 496         struct sisfb_info sisfbinfo;    /* For ioctl SISFB_GET_INFO */
 497
 498         struct fb_var_screeninfo default_var;
 499
 500 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
 501         struct fb_fix_screeninfo sisfb_fix;
 502         u32             pseudo_palette[17];
 503 #endif
 504
 505 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 506         struct display           sis_disp;
 507         struct display_switch    sisfb_sw;
 508         struct {
 509                 u16 red, green, blue, pad;
 510         }               sis_palette[256];
 511         union {
 512 #ifdef FBCON_HAS_CFB16
 513                 u16 cfb16[16];
 514 #endif
 515 #ifdef FBCON_HAS_CFB32
 516                 u32 cfb32[16];
 517 #endif
 518         }               sis_fbcon_cmap;
 519 #endif
 520
 521         struct sisfb_monitor {
 522                 u16 hmin;
 523                 u16 hmax;
 524                 u16 vmin;
 525                 u16 vmax;
 526                 u32 dclockmax;
 527                 u8  feature;
 528                 bool datavalid;
 529         }               sisfb_thismonitor;
 530
 531         unsigned short  chip_id;        /* PCI ID of chip */
 532         unsigned short  chip_vendor;    /* PCI ID of vendor */
 533         char            myid[40];
 534
 535         struct pci_dev  *nbridge;
 536         struct pci_dev  *lpcdev;
 537
 538         int             mni;    /* Mode number index */
 539
 540 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 541         int             currcon;
 542 #endif
 543
 544         unsigned long   video_size;
 545         unsigned long   video_base;
 546         unsigned long   mmio_size;
 547         unsigned long   mmio_base;
 548         unsigned long   vga_base;
 549
 550         unsigned long   video_offset;
 551
 552         unsigned long   UMAsize, LFBsize;
 553
 554         SIS_IOTYPE1     *video_vbase;
 555         SIS_IOTYPE1     *mmio_vbase;
 556
 557         unsigned char   *bios_abase;
 558
 559         int             mtrr;
 560
 561         u32             sisfb_mem;
 562
 563         u32             sisfb_parm_mem;
 564         int             sisfb_accel;
 565         int             sisfb_ypan;
 566         int             sisfb_max;
 567         int             sisfb_userom;
 568         int             sisfb_useoem;
 569         int             sisfb_mode_idx;
 570         int             sisfb_parm_rate;
 571         int             sisfb_crt1off;
 572         int             sisfb_forcecrt1;
 573         int             sisfb_crt2type;
 574         int             sisfb_crt2flags;
 575         int             sisfb_dstn;
 576         int             sisfb_fstn;
 577         int             sisfb_tvplug;
 578         int             sisfb_tvstd;
 579         int             sisfb_nocrt2rate;
 580 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
 581         int             sisfb_inverse;
 582 #endif
 583
 584         u32             heapstart;              /* offset  */
 585         SIS_IOTYPE1     *sisfb_heap_start;      /* address */
 586         SIS_IOTYPE1     *sisfb_heap_end;        /* address */
 587         u32             sisfb_heap_size;
 588         int             havenoheap;
 589
 590         struct SIS_HEAP sisfb_heap;             /* This card's vram heap */
 591
 592         int             video_bpp;
 593         int             video_cmap_len;
 594         int             video_width;
 595         int             video_height;
 596         unsigned int    refresh_rate;
 597
 598         unsigned int    chip;
 599         u8              revision_id;
 600         int             sisvga_enabled;         /* PCI device was enabled */
 601
 602         int             video_linelength;       /* real pitch */
 603         int             scrnpitchCRT1;          /* pitch regarding interlace */
 604
 605         u16             DstColor;               /* For 2d acceleration */
 606         u32             SiS310_AccelDepth;
 607         u32             CommandReg;
 608         int             cmdqueuelength;         /* Current (for accel) */
 609         u32             cmdQueueSize;           /* Total size in KB */
 610
 611         spinlock_t      lockaccel;              /* Do not use outside of kernel! */
 612
 613         unsigned int    pcibus;
 614         unsigned int    pcislot;
 615         unsigned int    pcifunc;
 616
 617         int             accel;
 618         int             engineok;
 619
 620         u16             subsysvendor;
 621         u16             subsysdevice;
 622
 623         u32             vbflags;                /* Replacing deprecated stuff from above */
 624         u32             currentvbflags;
 625         u32             vbflags2;
 626
 627         int             lcdxres, lcdyres;
 628         int             lcddefmodeidx, tvdefmodeidx, defmodeidx;
 629         u32             CRT2LCDType;            /* defined in "SIS_LCD_TYPE" */
 630         u32             curFSTN, curDSTN;
 631
 632         int             current_bpp;
 633         int             current_width;
 634         int             current_height;
 635         int             current_htotal;
 636         int             current_vtotal;
 637         int             current_linelength;
 638         __u32           current_pixclock;
 639         int             current_refresh_rate;
 640
 641         unsigned int    current_base;
 642
 643         u8              mode_no;
 644         u8              rate_idx;
 645         int             modechanged;
 646         unsigned char   modeprechange;
 647
 648 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
 649         u8              sisfb_lastrates[128];
 650 #endif
 651
 652         int             newrom;
 653         int             haveXGIROM;
 654         int             registered;
 655         int             warncount;
 656 #ifdef SIS_OLD_CONFIG_COMPAT
 657         int             ioctl32registered;
 658 #endif
 659
 660         int             sisvga_engine;
 661         int             hwcursor_size;
 662         int             CRT2_write_enable;
 663         u8              caps;
 664
 665         u8              detectedpdc;
 666         u8              detectedpdca;
 667         u8              detectedlcda;
 668
 669         SIS_IOTYPE1     *hwcursor_vbase;
 670
 671         int             chronteltype;
 672         int             tvxpos, tvypos;
 673         u8              p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
 674         int             tvx, tvy;
 675
 676         u8              sisfblocked;
 677
 678         struct sisfb_info sisfb_infoblock;
 679
 680         struct sisfb_cmd sisfb_command;
 681
 682         u32             sisfb_id;
 683
 684         u8              sisfb_can_post;
 685         u8              sisfb_card_posted;
 686         u8              sisfb_was_boot_device;
 687
 688         struct sis_video_info *next;
 689 };
 690
 691 #endif