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pkt_sched: remove bogus block (cleanup)
[linux-2.6/mini2440.git] / drivers / video / fsl-diu-fb.c
blobbd320a2bfb7c5ef92b5e803aa30bbb648979da4a
1 /*
2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * Freescale DIU Frame Buffer device driver
5 *
6 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
7 * Paul Widmer <paul.widmer@freescale.com>
8 * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
9 * York Sun <yorksun@freescale.com>
10 *
11 * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
25 #include <linux/fb.h>
26 #include <linux/init.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/uaccess.h>
32 #include <linux/vmalloc.h>
33
34 #include <linux/of_platform.h>
35
36 #include <sysdev/fsl_soc.h>
37 #include "fsl-diu-fb.h"
38
39 /*
40 * These parameters give default parameters
41 * for video output 1024x768,
42 * FIXME - change timing to proper amounts
43 * hsync 31.5kHz, vsync 60Hz
44 */
45 static struct fb_videomode __devinitdata fsl_diu_default_mode = {
46 .refresh = 60,
47 .xres = 1024,
48 .yres = 768,
49 .pixclock = 15385,
50 .left_margin = 160,
51 .right_margin = 24,
52 .upper_margin = 29,
53 .lower_margin = 3,
54 .hsync_len = 136,
55 .vsync_len = 6,
56 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
57 .vmode = FB_VMODE_NONINTERLACED
58 };
59
60 static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
61 {
62 .name = "1024x768-60",
63 .refresh = 60,
64 .xres = 1024,
65 .yres = 768,
66 .pixclock = 15385,
67 .left_margin = 160,
68 .right_margin = 24,
69 .upper_margin = 29,
70 .lower_margin = 3,
71 .hsync_len = 136,
72 .vsync_len = 6,
73 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
74 .vmode = FB_VMODE_NONINTERLACED
75 },
76 {
77 .name = "1024x768-70",
78 .refresh = 70,
79 .xres = 1024,
80 .yres = 768,
81 .pixclock = 16886,
82 .left_margin = 3,
83 .right_margin = 3,
84 .upper_margin = 2,
85 .lower_margin = 2,
86 .hsync_len = 40,
87 .vsync_len = 18,
88 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
89 .vmode = FB_VMODE_NONINTERLACED
90 },
91 {
92 .name = "1024x768-75",
93 .refresh = 75,
94 .xres = 1024,
95 .yres = 768,
96 .pixclock = 15009,
97 .left_margin = 3,
98 .right_margin = 3,
99 .upper_margin = 2,
100 .lower_margin = 2,
101 .hsync_len = 80,
102 .vsync_len = 32,
103 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
104 .vmode = FB_VMODE_NONINTERLACED
105 },
106 {
107 .name = "1280x1024-60",
108 .refresh = 60,
109 .xres = 1280,
110 .yres = 1024,
111 .pixclock = 9375,
112 .left_margin = 38,
113 .right_margin = 128,
114 .upper_margin = 2,
115 .lower_margin = 7,
116 .hsync_len = 216,
117 .vsync_len = 37,
118 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
119 .vmode = FB_VMODE_NONINTERLACED
120 },
121 {
122 .name = "1280x1024-70",
123 .refresh = 70,
124 .xres = 1280,
125 .yres = 1024,
126 .pixclock = 9380,
127 .left_margin = 6,
128 .right_margin = 6,
129 .upper_margin = 4,
130 .lower_margin = 4,
131 .hsync_len = 60,
132 .vsync_len = 94,
133 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
134 .vmode = FB_VMODE_NONINTERLACED
135 },
136 {
137 .name = "1280x1024-75",
138 .refresh = 75,
139 .xres = 1280,
140 .yres = 1024,
141 .pixclock = 9380,
142 .left_margin = 6,
143 .right_margin = 6,
144 .upper_margin = 4,
145 .lower_margin = 4,
146 .hsync_len = 60,
147 .vsync_len = 15,
148 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
149 .vmode = FB_VMODE_NONINTERLACED
150 },
151 {
152 .name = "320x240", /* for AOI only */
153 .refresh = 60,
154 .xres = 320,
155 .yres = 240,
156 .pixclock = 15385,
157 .left_margin = 0,
158 .right_margin = 0,
159 .upper_margin = 0,
160 .lower_margin = 0,
161 .hsync_len = 0,
162 .vsync_len = 0,
163 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
164 .vmode = FB_VMODE_NONINTERLACED
165 },
166 {
167 .name = "1280x480-60",
168 .refresh = 60,
169 .xres = 1280,
170 .yres = 480,
171 .pixclock = 18939,
172 .left_margin = 353,
173 .right_margin = 47,
174 .upper_margin = 39,
175 .lower_margin = 4,
176 .hsync_len = 8,
177 .vsync_len = 2,
178 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
179 .vmode = FB_VMODE_NONINTERLACED
180 },
181 };
182
183 static char *fb_mode = "1024x768-32@60";
184 static unsigned long default_bpp = 32;
185 static int monitor_port;
186
187 #if defined(CONFIG_NOT_COHERENT_CACHE)
188 static u8 *coherence_data;
189 static size_t coherence_data_size;
190 static unsigned int d_cache_line_size;
191 #endif
192
193 static DEFINE_SPINLOCK(diu_lock);
194
195 struct fsl_diu_data {
196 struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
197 /*FSL_AOI_NUM has one dummy AOI */
198 struct device_attribute dev_attr;
199 struct diu_ad *dummy_ad;
200 void *dummy_aoi_virt;
201 unsigned int irq;
202 int fb_enabled;
203 int monitor_port;
204 };
205
206 struct mfb_info {
207 int index;
208 int type;
209 char *id;
210 int registered;
211 int blank;
212 unsigned long pseudo_palette[16];
213 struct diu_ad *ad;
214 int cursor_reset;
215 unsigned char g_alpha;
216 unsigned int count;
217 int x_aoi_d; /* aoi display x offset to physical screen */
218 int y_aoi_d; /* aoi display y offset to physical screen */
219 struct fsl_diu_data *parent;
220 };
221
222
223 static struct mfb_info mfb_template[] = {
224 { /* AOI 0 for plane 0 */
225 .index = 0,
226 .type = MFB_TYPE_OUTPUT,
227 .id = "Panel0",
228 .registered = 0,
229 .count = 0,
230 .x_aoi_d = 0,
231 .y_aoi_d = 0,
232 },
233 { /* AOI 0 for plane 1 */
234 .index = 1,
235 .type = MFB_TYPE_OUTPUT,
236 .id = "Panel1 AOI0",
237 .registered = 0,
238 .g_alpha = 0xff,
239 .count = 0,
240 .x_aoi_d = 0,
241 .y_aoi_d = 0,
242 },
243 { /* AOI 1 for plane 1 */
244 .index = 2,
245 .type = MFB_TYPE_OUTPUT,
246 .id = "Panel1 AOI1",
247 .registered = 0,
248 .g_alpha = 0xff,
249 .count = 0,
250 .x_aoi_d = 0,
251 .y_aoi_d = 480,
252 },
253 { /* AOI 0 for plane 2 */
254 .index = 3,
255 .type = MFB_TYPE_OUTPUT,
256 .id = "Panel2 AOI0",
257 .registered = 0,
258 .g_alpha = 0xff,
259 .count = 0,
260 .x_aoi_d = 640,
261 .y_aoi_d = 0,
262 },
263 { /* AOI 1 for plane 2 */
264 .index = 4,
265 .type = MFB_TYPE_OUTPUT,
266 .id = "Panel2 AOI1",
267 .registered = 0,
268 .g_alpha = 0xff,
269 .count = 0,
270 .x_aoi_d = 640,
271 .y_aoi_d = 480,
272 },
273 };
274
275 static struct diu_hw dr = {
276 .mode = MFB_MODE1,
277 .reg_lock = __SPIN_LOCK_UNLOCKED(diu_hw.reg_lock),
278 };
279
280 static struct diu_pool pool;
281
282 /**
283 * fsl_diu_alloc - allocate memory for the DIU
284 * @size: number of bytes to allocate
285 * @param: returned physical address of memory
286 *
287 * This function allocates a physically-contiguous block of memory.
288 */
289 static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
290 {
291 void *virt;
292
293 pr_debug("size=%zu\n", size);
294
295 virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
296 if (virt) {
297 *phys = virt_to_phys(virt);
298 pr_debug("virt=%p phys=%llx\n", virt,
299 (unsigned long long)*phys);
300 }
301
302 return virt;
303 }
304
305 /**
306 * fsl_diu_free - release DIU memory
307 * @virt: pointer returned by fsl_diu_alloc()
308 * @size: number of bytes allocated by fsl_diu_alloc()
309 *
310 * This function releases memory allocated by fsl_diu_alloc().
311 */
312 static void fsl_diu_free(void *virt, size_t size)
313 {
314 pr_debug("virt=%p size=%zu\n", virt, size);
315
316 if (virt && size)
317 free_pages_exact(virt, size);
318 }
319
320 static int fsl_diu_enable_panel(struct fb_info *info)
321 {
322 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
323 struct diu *hw = dr.diu_reg;
324 struct diu_ad *ad = mfbi->ad;
325 struct fsl_diu_data *machine_data = mfbi->parent;
326 int res = 0;
327
328 pr_debug("enable_panel index %d\n", mfbi->index);
329 if (mfbi->type != MFB_TYPE_OFF) {
330 switch (mfbi->index) {
331 case 0: /* plane 0 */
332 if (hw->desc[0] != ad->paddr)
333 out_be32(&hw->desc[0], ad->paddr);
334 break;
335 case 1: /* plane 1 AOI 0 */
336 cmfbi = machine_data->fsl_diu_info[2]->par;
337 if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
338 if (cmfbi->count > 0) /* AOI1 open */
339 ad->next_ad =
340 cpu_to_le32(cmfbi->ad->paddr);
341 else
342 ad->next_ad = 0;
343 out_be32(&hw->desc[1], ad->paddr);
344 }
345 break;
346 case 3: /* plane 2 AOI 0 */
347 cmfbi = machine_data->fsl_diu_info[4]->par;
348 if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
349 if (cmfbi->count > 0) /* AOI1 open */
350 ad->next_ad =
351 cpu_to_le32(cmfbi->ad->paddr);
352 else
353 ad->next_ad = 0;
354 out_be32(&hw->desc[2], ad->paddr);
355 }
356 break;
357 case 2: /* plane 1 AOI 1 */
358 pmfbi = machine_data->fsl_diu_info[1]->par;
359 ad->next_ad = 0;
360 if (hw->desc[1] == machine_data->dummy_ad->paddr)
361 out_be32(&hw->desc[1], ad->paddr);
362 else /* AOI0 open */
363 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
364 break;
365 case 4: /* plane 2 AOI 1 */
366 pmfbi = machine_data->fsl_diu_info[3]->par;
367 ad->next_ad = 0;
368 if (hw->desc[2] == machine_data->dummy_ad->paddr)
369 out_be32(&hw->desc[2], ad->paddr);
370 else /* AOI0 was open */
371 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
372 break;
373 default:
374 res = -EINVAL;
375 break;
376 }
377 } else
378 res = -EINVAL;
379 return res;
380 }
381
382 static int fsl_diu_disable_panel(struct fb_info *info)
383 {
384 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
385 struct diu *hw = dr.diu_reg;
386 struct diu_ad *ad = mfbi->ad;
387 struct fsl_diu_data *machine_data = mfbi->parent;
388 int res = 0;
389
390 switch (mfbi->index) {
391 case 0: /* plane 0 */
392 if (hw->desc[0] != machine_data->dummy_ad->paddr)
393 out_be32(&hw->desc[0],
394 machine_data->dummy_ad->paddr);
395 break;
396 case 1: /* plane 1 AOI 0 */
397 cmfbi = machine_data->fsl_diu_info[2]->par;
398 if (cmfbi->count > 0) /* AOI1 is open */
399 out_be32(&hw->desc[1], cmfbi->ad->paddr);
400 /* move AOI1 to the first */
401 else /* AOI1 was closed */
402 out_be32(&hw->desc[1],
403 machine_data->dummy_ad->paddr);
404 /* close AOI 0 */
405 break;
406 case 3: /* plane 2 AOI 0 */
407 cmfbi = machine_data->fsl_diu_info[4]->par;
408 if (cmfbi->count > 0) /* AOI1 is open */
409 out_be32(&hw->desc[2], cmfbi->ad->paddr);
410 /* move AOI1 to the first */
411 else /* AOI1 was closed */
412 out_be32(&hw->desc[2],
413 machine_data->dummy_ad->paddr);
414 /* close AOI 0 */
415 break;
416 case 2: /* plane 1 AOI 1 */
417 pmfbi = machine_data->fsl_diu_info[1]->par;
418 if (hw->desc[1] != ad->paddr) {
419 /* AOI1 is not the first in the chain */
420 if (pmfbi->count > 0)
421 /* AOI0 is open, must be the first */
422 pmfbi->ad->next_ad = 0;
423 } else /* AOI1 is the first in the chain */
424 out_be32(&hw->desc[1], machine_data->dummy_ad->paddr);
425 /* close AOI 1 */
426 break;
427 case 4: /* plane 2 AOI 1 */
428 pmfbi = machine_data->fsl_diu_info[3]->par;
429 if (hw->desc[2] != ad->paddr) {
430 /* AOI1 is not the first in the chain */
431 if (pmfbi->count > 0)
432 /* AOI0 is open, must be the first */
433 pmfbi->ad->next_ad = 0;
434 } else /* AOI1 is the first in the chain */
435 out_be32(&hw->desc[2], machine_data->dummy_ad->paddr);
436 /* close AOI 1 */
437 break;
438 default:
439 res = -EINVAL;
440 break;
441 }
442
443 return res;
444 }
445
446 static void enable_lcdc(struct fb_info *info)
447 {
448 struct diu *hw = dr.diu_reg;
449 struct mfb_info *mfbi = info->par;
450 struct fsl_diu_data *machine_data = mfbi->parent;
451
452 if (!machine_data->fb_enabled) {
453 out_be32(&hw->diu_mode, dr.mode);
454 machine_data->fb_enabled++;
455 }
456 }
457
458 static void disable_lcdc(struct fb_info *info)
459 {
460 struct diu *hw = dr.diu_reg;
461 struct mfb_info *mfbi = info->par;
462 struct fsl_diu_data *machine_data = mfbi->parent;
463
464 if (machine_data->fb_enabled) {
465 out_be32(&hw->diu_mode, 0);
466 machine_data->fb_enabled = 0;
467 }
468 }
469
470 static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
471 struct fb_info *info)
472 {
473 struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
474 struct fsl_diu_data *machine_data = mfbi->parent;
475 int available_height, upper_aoi_bottom, index = mfbi->index;
476 int lower_aoi_is_open, upper_aoi_is_open;
477 __u32 base_plane_width, base_plane_height, upper_aoi_height;
478
479 base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
480 base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
481
482 switch (index) {
483 case 0:
484 if (mfbi->x_aoi_d != 0)
485 mfbi->x_aoi_d = 0;
486 if (mfbi->y_aoi_d != 0)
487 mfbi->y_aoi_d = 0;
488 break;
489 case 1: /* AOI 0 */
490 case 3:
491 lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
492 lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
493 if (var->xres > base_plane_width)
494 var->xres = base_plane_width;
495 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
496 mfbi->x_aoi_d = base_plane_width - var->xres;
497
498 if (lower_aoi_is_open)
499 available_height = lower_aoi_mfbi->y_aoi_d;
500 else
501 available_height = base_plane_height;
502 if (var->yres > available_height)
503 var->yres = available_height;
504 if ((mfbi->y_aoi_d + var->yres) > available_height)
505 mfbi->y_aoi_d = available_height - var->yres;
506 break;
507 case 2: /* AOI 1 */
508 case 4:
509 upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
510 upper_aoi_height =
511 machine_data->fsl_diu_info[index-1]->var.yres;
512 upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
513 upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
514 if (var->xres > base_plane_width)
515 var->xres = base_plane_width;
516 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
517 mfbi->x_aoi_d = base_plane_width - var->xres;
518 if (mfbi->y_aoi_d < 0)
519 mfbi->y_aoi_d = 0;
520 if (upper_aoi_is_open) {
521 if (mfbi->y_aoi_d < upper_aoi_bottom)
522 mfbi->y_aoi_d = upper_aoi_bottom;
523 available_height = base_plane_height
524 - upper_aoi_bottom;
525 } else
526 available_height = base_plane_height;
527 if (var->yres > available_height)
528 var->yres = available_height;
529 if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
530 mfbi->y_aoi_d = base_plane_height - var->yres;
531 break;
532 }
533 }
534 /*
535 * Checks to see if the hardware supports the state requested by var passed
536 * in. This function does not alter the hardware state! If the var passed in
537 * is slightly off by what the hardware can support then we alter the var
538 * PASSED in to what we can do. If the hardware doesn't support mode change
539 * a -EINVAL will be returned by the upper layers.
540 */
541 static int fsl_diu_check_var(struct fb_var_screeninfo *var,
542 struct fb_info *info)
543 {
544 unsigned long htotal, vtotal;
545
546 pr_debug("check_var xres: %d\n", var->xres);
547 pr_debug("check_var yres: %d\n", var->yres);
548
549 if (var->xres_virtual < var->xres)
550 var->xres_virtual = var->xres;
551 if (var->yres_virtual < var->yres)
552 var->yres_virtual = var->yres;
553
554 if (var->xoffset < 0)
555 var->xoffset = 0;
556
557 if (var->yoffset < 0)
558 var->yoffset = 0;
559
560 if (var->xoffset + info->var.xres > info->var.xres_virtual)
561 var->xoffset = info->var.xres_virtual - info->var.xres;
562
563 if (var->yoffset + info->var.yres > info->var.yres_virtual)
564 var->yoffset = info->var.yres_virtual - info->var.yres;
565
566 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
567 (var->bits_per_pixel != 16))
568 var->bits_per_pixel = default_bpp;
569
570 switch (var->bits_per_pixel) {
571 case 16:
572 var->red.length = 5;
573 var->red.offset = 11;
574 var->red.msb_right = 0;
575
576 var->green.length = 6;
577 var->green.offset = 5;
578 var->green.msb_right = 0;
579
580 var->blue.length = 5;
581 var->blue.offset = 0;
582 var->blue.msb_right = 0;
583
584 var->transp.length = 0;
585 var->transp.offset = 0;
586 var->transp.msb_right = 0;
587 break;
588 case 24:
589 var->red.length = 8;
590 var->red.offset = 0;
591 var->red.msb_right = 0;
592
593 var->green.length = 8;
594 var->green.offset = 8;
595 var->green.msb_right = 0;
596
597 var->blue.length = 8;
598 var->blue.offset = 16;
599 var->blue.msb_right = 0;
600
601 var->transp.length = 0;
602 var->transp.offset = 0;
603 var->transp.msb_right = 0;
604 break;
605 case 32:
606 var->red.length = 8;
607 var->red.offset = 16;
608 var->red.msb_right = 0;
609
610 var->green.length = 8;
611 var->green.offset = 8;
612 var->green.msb_right = 0;
613
614 var->blue.length = 8;
615 var->blue.offset = 0;
616 var->blue.msb_right = 0;
617
618 var->transp.length = 8;
619 var->transp.offset = 24;
620 var->transp.msb_right = 0;
621
622 break;
623 }
624 /* If the pixclock is below the minimum spec'd value then set to
625 * refresh rate for 60Hz since this is supported by most monitors.
626 * Refer to Documentation/fb/ for calculations.
627 */
628 if ((var->pixclock < MIN_PIX_CLK) || (var->pixclock > MAX_PIX_CLK)) {
629 htotal = var->xres + var->right_margin + var->hsync_len +
630 var->left_margin;
631 vtotal = var->yres + var->lower_margin + var->vsync_len +
632 var->upper_margin;
633 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
634 var->pixclock = KHZ2PICOS(var->pixclock);
635 pr_debug("pixclock set for 60Hz refresh = %u ps\n",
636 var->pixclock);
637 }
638
639 var->height = -1;
640 var->width = -1;
641 var->grayscale = 0;
642
643 /* Copy nonstd field to/from sync for fbset usage */
644 var->sync |= var->nonstd;
645 var->nonstd |= var->sync;
646
647 adjust_aoi_size_position(var, info);
648 return 0;
649 }
650
651 static void set_fix(struct fb_info *info)
652 {
653 struct fb_fix_screeninfo *fix = &info->fix;
654 struct fb_var_screeninfo *var = &info->var;
655 struct mfb_info *mfbi = info->par;
656
657 strncpy(fix->id, mfbi->id, strlen(mfbi->id));
658 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
659 fix->type = FB_TYPE_PACKED_PIXELS;
660 fix->accel = FB_ACCEL_NONE;
661 fix->visual = FB_VISUAL_TRUECOLOR;
662 fix->xpanstep = 1;
663 fix->ypanstep = 1;
664 }
665
666 static void update_lcdc(struct fb_info *info)
667 {
668 struct fb_var_screeninfo *var = &info->var;
669 struct mfb_info *mfbi = info->par;
670 struct fsl_diu_data *machine_data = mfbi->parent;
671 struct diu *hw;
672 int i, j;
673 char __iomem *cursor_base, *gamma_table_base;
674
675 u32 temp;
676
677 hw = dr.diu_reg;
678
679 if (mfbi->type == MFB_TYPE_OFF) {
680 fsl_diu_disable_panel(info);
681 return;
682 }
683
684 diu_ops.set_monitor_port(machine_data->monitor_port);
685 gamma_table_base = pool.gamma.vaddr;
686 cursor_base = pool.cursor.vaddr;
687 /* Prep for DIU init - gamma table, cursor table */
688
689 for (i = 0; i <= 2; i++)
690 for (j = 0; j <= 255; j++)
691 *gamma_table_base++ = j;
692
693 diu_ops.set_gamma_table(machine_data->monitor_port, pool.gamma.vaddr);
694
695 pr_debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
696 disable_lcdc(info);
697
698 /* Program DIU registers */
699
700 out_be32(&hw->gamma, pool.gamma.paddr);
701 out_be32(&hw->cursor, pool.cursor.paddr);
702
703 out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
704 out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
705 out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
706 /* DISP SIZE */
707 pr_debug("DIU xres: %d\n", var->xres);
708 pr_debug("DIU yres: %d\n", var->yres);
709
710 out_be32(&hw->wb_size, 0); /* WB SIZE */
711 out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
712
713 /* Horizontal and vertical configuration register */
714 temp = var->left_margin << 22 | /* BP_H */
715 var->hsync_len << 11 | /* PW_H */
716 var->right_margin; /* FP_H */
717
718 out_be32(&hw->hsyn_para, temp);
719
720 temp = var->upper_margin << 22 | /* BP_V */
721 var->vsync_len << 11 | /* PW_V */
722 var->lower_margin; /* FP_V */
723
724 out_be32(&hw->vsyn_para, temp);
725
726 pr_debug("DIU right_margin - %d\n", var->right_margin);
727 pr_debug("DIU left_margin - %d\n", var->left_margin);
728 pr_debug("DIU hsync_len - %d\n", var->hsync_len);
729 pr_debug("DIU upper_margin - %d\n", var->upper_margin);
730 pr_debug("DIU lower_margin - %d\n", var->lower_margin);
731 pr_debug("DIU vsync_len - %d\n", var->vsync_len);
732 pr_debug("DIU HSYNC - 0x%08x\n", hw->hsyn_para);
733 pr_debug("DIU VSYNC - 0x%08x\n", hw->vsyn_para);
734
735 diu_ops.set_pixel_clock(var->pixclock);
736
737 out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
738 out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
739 out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
740 out_be32(&hw->plut, 0x01F5F666);
741
742 /* Enable the DIU */
743 enable_lcdc(info);
744 }
745
746 static int map_video_memory(struct fb_info *info)
747 {
748 phys_addr_t phys;
749
750 pr_debug("info->var.xres_virtual = %d\n", info->var.xres_virtual);
751 pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
752 pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
753
754 info->fix.smem_len = info->fix.line_length * info->var.yres_virtual;
755 pr_debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->fix.smem_len);
756 info->screen_base = fsl_diu_alloc(info->fix.smem_len, &phys);
757 if (info->screen_base == NULL) {
758 printk(KERN_ERR "Unable to allocate fb memory\n");
759 return -ENOMEM;
760 }
761 info->fix.smem_start = (unsigned long) phys;
762 info->screen_size = info->fix.smem_len;
763
764 pr_debug("Allocated fb @ paddr=0x%08lx, size=%d.\n",
765 info->fix.smem_start,
766 info->fix.smem_len);
767 pr_debug("screen base %p\n", info->screen_base);
768
769 return 0;
770 }
771
772 static void unmap_video_memory(struct fb_info *info)
773 {
774 fsl_diu_free(info->screen_base, info->fix.smem_len);
775 info->screen_base = NULL;
776 info->fix.smem_start = 0;
777 info->fix.smem_len = 0;
778 }
779
780 /*
781 * Using the fb_var_screeninfo in fb_info we set the resolution of this
782 * particular framebuffer. This function alters the fb_fix_screeninfo stored
783 * in fb_info. It does not alter var in fb_info since we are using that
784 * data. This means we depend on the data in var inside fb_info to be
785 * supported by the hardware. fsl_diu_check_var is always called before
786 * fsl_diu_set_par to ensure this.
787 */
788 static int fsl_diu_set_par(struct fb_info *info)
789 {
790 unsigned long len;
791 struct fb_var_screeninfo *var = &info->var;
792 struct mfb_info *mfbi = info->par;
793 struct fsl_diu_data *machine_data = mfbi->parent;
794 struct diu_ad *ad = mfbi->ad;
795 struct diu *hw;
796
797 hw = dr.diu_reg;
798
799 set_fix(info);
800 mfbi->cursor_reset = 1;
801
802 len = info->var.yres_virtual * info->fix.line_length;
803 /* Alloc & dealloc each time resolution/bpp change */
804 if (len != info->fix.smem_len) {
805 if (info->fix.smem_start)
806 unmap_video_memory(info);
807 pr_debug("SET PAR: smem_len = %d\n", info->fix.smem_len);
808
809 /* Memory allocation for framebuffer */
810 if (map_video_memory(info)) {
811 printk(KERN_ERR "Unable to allocate fb memory 1\n");
812 return -ENOMEM;
813 }
814 }
815
816 ad->pix_fmt =
817 diu_ops.get_pixel_format(var->bits_per_pixel,
818 machine_data->monitor_port);
819 ad->addr = cpu_to_le32(info->fix.smem_start);
820 ad->src_size_g_alpha = cpu_to_le32((var->yres << 12) |
821 var->xres) | mfbi->g_alpha;
822 /* fix me. AOI should not be greater than display size */
823 ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
824 ad->offset_xyi = 0;
825 ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
826
827 /* Disable chroma keying function */
828 ad->ckmax_r = 0;
829 ad->ckmax_g = 0;
830 ad->ckmax_b = 0;
831
832 ad->ckmin_r = 255;
833 ad->ckmin_g = 255;
834 ad->ckmin_b = 255;
835
836 if (mfbi->index == 0)
837 update_lcdc(info);
838 return 0;
839 }
840
841 static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
842 {
843 return ((val<<width) + 0x7FFF - val)>>16;
844 }
845
846 /*
847 * Set a single color register. The values supplied have a 16 bit magnitude
848 * which needs to be scaled in this function for the hardware. Things to take
849 * into consideration are how many color registers, if any, are supported with
850 * the current color visual. With truecolor mode no color palettes are
851 * supported. Here a psuedo palette is created which we store the value in
852 * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
853 * color palette.
854 */
855 static int fsl_diu_setcolreg(unsigned regno, unsigned red, unsigned green,
856 unsigned blue, unsigned transp, struct fb_info *info)
857 {
858 int ret = 1;
859
860 /*
861 * If greyscale is true, then we convert the RGB value
862 * to greyscale no matter what visual we are using.
863 */
864 if (info->var.grayscale)
865 red = green = blue = (19595 * red + 38470 * green +
866 7471 * blue) >> 16;
867 switch (info->fix.visual) {
868 case FB_VISUAL_TRUECOLOR:
869 /*
870 * 16-bit True Colour. We encode the RGB value
871 * according to the RGB bitfield information.
872 */
873 if (regno < 16) {
874 u32 *pal = info->pseudo_palette;
875 u32 v;
876
877 red = CNVT_TOHW(red, info->var.red.length);
878 green = CNVT_TOHW(green, info->var.green.length);
879 blue = CNVT_TOHW(blue, info->var.blue.length);
880 transp = CNVT_TOHW(transp, info->var.transp.length);
881
882 v = (red << info->var.red.offset) |
883 (green << info->var.green.offset) |
884 (blue << info->var.blue.offset) |
885 (transp << info->var.transp.offset);
886
887 pal[regno] = v;
888 ret = 0;
889 }
890 break;
891 case FB_VISUAL_STATIC_PSEUDOCOLOR:
892 case FB_VISUAL_PSEUDOCOLOR:
893 break;
894 }
895
896 return ret;
897 }
898
899 /*
900 * Pan (or wrap, depending on the `vmode' field) the display using the
901 * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
902 * don't fit, return -EINVAL.
903 */
904 static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
905 struct fb_info *info)
906 {
907 if ((info->var.xoffset == var->xoffset) &&
908 (info->var.yoffset == var->yoffset))
909 return 0; /* No change, do nothing */
910
911 if (var->xoffset < 0 || var->yoffset < 0
912 || var->xoffset + info->var.xres > info->var.xres_virtual
913 || var->yoffset + info->var.yres > info->var.yres_virtual)
914 return -EINVAL;
915
916 info->var.xoffset = var->xoffset;
917 info->var.yoffset = var->yoffset;
918
919 if (var->vmode & FB_VMODE_YWRAP)
920 info->var.vmode |= FB_VMODE_YWRAP;
921 else
922 info->var.vmode &= ~FB_VMODE_YWRAP;
923
924 return 0;
925 }
926
927 /*
928 * Blank the screen if blank_mode != 0, else unblank. Return 0 if blanking
929 * succeeded, != 0 if un-/blanking failed.
930 * blank_mode == 2: suspend vsync
931 * blank_mode == 3: suspend hsync
932 * blank_mode == 4: powerdown
933 */
934 static int fsl_diu_blank(int blank_mode, struct fb_info *info)
935 {
936 struct mfb_info *mfbi = info->par;
937
938 mfbi->blank = blank_mode;
939
940 switch (blank_mode) {
941 case FB_BLANK_VSYNC_SUSPEND:
942 case FB_BLANK_HSYNC_SUSPEND:
943 /* FIXME: fixes to enable_panel and enable lcdc needed */
944 case FB_BLANK_NORMAL:
945 /* fsl_diu_disable_panel(info);*/
946 break;
947 case FB_BLANK_POWERDOWN:
948 /* disable_lcdc(info); */
949 break;
950 case FB_BLANK_UNBLANK:
951 /* fsl_diu_enable_panel(info);*/
952 break;
953 }
954
955 return 0;
956 }
957
958 static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
959 unsigned long arg)
960 {
961 struct mfb_info *mfbi = info->par;
962 struct diu_ad *ad = mfbi->ad;
963 struct mfb_chroma_key ck;
964 unsigned char global_alpha;
965 struct aoi_display_offset aoi_d;
966 __u32 pix_fmt;
967 void __user *buf = (void __user *)arg;
968
969 if (!arg)
970 return -EINVAL;
971 switch (cmd) {
972 case MFB_SET_PIXFMT:
973 if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
974 return -EFAULT;
975 ad->pix_fmt = pix_fmt;
976 pr_debug("Set pixel format to 0x%08x\n", ad->pix_fmt);
977 break;
978 case MFB_GET_PIXFMT:
979 pix_fmt = ad->pix_fmt;
980 if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
981 return -EFAULT;
982 pr_debug("get pixel format 0x%08x\n", ad->pix_fmt);
983 break;
984 case MFB_SET_AOID:
985 if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
986 return -EFAULT;
987 mfbi->x_aoi_d = aoi_d.x_aoi_d;
988 mfbi->y_aoi_d = aoi_d.y_aoi_d;
989 pr_debug("set AOI display offset of index %d to (%d,%d)\n",
990 mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
991 fsl_diu_check_var(&info->var, info);
992 fsl_diu_set_par(info);
993 break;
994 case MFB_GET_AOID:
995 aoi_d.x_aoi_d = mfbi->x_aoi_d;
996 aoi_d.y_aoi_d = mfbi->y_aoi_d;
997 if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
998 return -EFAULT;
999 pr_debug("get AOI display offset of index %d (%d,%d)\n",
1000 mfbi->index, aoi_d.x_aoi_d, aoi_d.y_aoi_d);
1001 break;
1002 case MFB_GET_ALPHA:
1003 global_alpha = mfbi->g_alpha;
1004 if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
1005 return -EFAULT;
1006 pr_debug("get global alpha of index %d\n", mfbi->index);
1007 break;
1008 case MFB_SET_ALPHA:
1009 /* set panel information */
1010 if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
1011 return -EFAULT;
1012 ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
1013 (global_alpha & 0xff);
1014 mfbi->g_alpha = global_alpha;
1015 pr_debug("set global alpha for index %d\n", mfbi->index);
1016 break;
1017 case MFB_SET_CHROMA_KEY:
1018 /* set panel winformation */
1019 if (copy_from_user(&ck, buf, sizeof(ck)))
1020 return -EFAULT;
1021
1022 if (ck.enable &&
1023 (ck.red_max < ck.red_min ||
1024 ck.green_max < ck.green_min ||
1025 ck.blue_max < ck.blue_min))
1026 return -EINVAL;
1027
1028 if (!ck.enable) {
1029 ad->ckmax_r = 0;
1030 ad->ckmax_g = 0;
1031 ad->ckmax_b = 0;
1032 ad->ckmin_r = 255;
1033 ad->ckmin_g = 255;
1034 ad->ckmin_b = 255;
1035 } else {
1036 ad->ckmax_r = ck.red_max;
1037 ad->ckmax_g = ck.green_max;
1038 ad->ckmax_b = ck.blue_max;
1039 ad->ckmin_r = ck.red_min;
1040 ad->ckmin_g = ck.green_min;
1041 ad->ckmin_b = ck.blue_min;
1042 }
1043 pr_debug("set chroma key\n");
1044 break;
1045 case FBIOGET_GWINFO:
1046 if (mfbi->type == MFB_TYPE_OFF)
1047 return -ENODEV;
1048 /* get graphic window information */
1049 if (copy_to_user(buf, ad, sizeof(*ad)))
1050 return -EFAULT;
1051 break;
1052 case FBIOGET_HWCINFO:
1053 pr_debug("FBIOGET_HWCINFO:0x%08x\n", FBIOGET_HWCINFO);
1054 break;
1055 case FBIOPUT_MODEINFO:
1056 pr_debug("FBIOPUT_MODEINFO:0x%08x\n", FBIOPUT_MODEINFO);
1057 break;
1058 case FBIOGET_DISPINFO:
1059 pr_debug("FBIOGET_DISPINFO:0x%08x\n", FBIOGET_DISPINFO);
1060 break;
1061
1062 default:
1063 printk(KERN_ERR "Unknown ioctl command (0x%08X)\n", cmd);
1064 return -ENOIOCTLCMD;
1065 }
1066
1067 return 0;
1068 }
1069
1070 /* turn on fb if count == 1
1071 */
1072 static int fsl_diu_open(struct fb_info *info, int user)
1073 {
1074 struct mfb_info *mfbi = info->par;
1075 int res = 0;
1076
1077 spin_lock(&diu_lock);
1078 mfbi->count++;
1079 if (mfbi->count == 1) {
1080 pr_debug("open plane index %d\n", mfbi->index);
1081 fsl_diu_check_var(&info->var, info);
1082 res = fsl_diu_set_par(info);
1083 if (res < 0)
1084 mfbi->count--;
1085 else {
1086 res = fsl_diu_enable_panel(info);
1087 if (res < 0)
1088 mfbi->count--;
1089 }
1090 }
1091
1092 spin_unlock(&diu_lock);
1093 return res;
1094 }
1095
1096 /* turn off fb if count == 0
1097 */
1098 static int fsl_diu_release(struct fb_info *info, int user)
1099 {
1100 struct mfb_info *mfbi = info->par;
1101 int res = 0;
1102
1103 spin_lock(&diu_lock);
1104 mfbi->count--;
1105 if (mfbi->count == 0) {
1106 pr_debug("release plane index %d\n", mfbi->index);
1107 res = fsl_diu_disable_panel(info);
1108 if (res < 0)
1109 mfbi->count++;
1110 }
1111 spin_unlock(&diu_lock);
1112 return res;
1113 }
1114
1115 static struct fb_ops fsl_diu_ops = {
1116 .owner = THIS_MODULE,
1117 .fb_check_var = fsl_diu_check_var,
1118 .fb_set_par = fsl_diu_set_par,
1119 .fb_setcolreg = fsl_diu_setcolreg,
1120 .fb_blank = fsl_diu_blank,
1121 .fb_pan_display = fsl_diu_pan_display,
1122 .fb_fillrect = cfb_fillrect,
1123 .fb_copyarea = cfb_copyarea,
1124 .fb_imageblit = cfb_imageblit,
1125 .fb_ioctl = fsl_diu_ioctl,
1126 .fb_open = fsl_diu_open,
1127 .fb_release = fsl_diu_release,
1128 };
1129
1130 static int init_fbinfo(struct fb_info *info)
1131 {
1132 struct mfb_info *mfbi = info->par;
1133
1134 info->device = NULL;
1135 info->var.activate = FB_ACTIVATE_NOW;
1136 info->fbops = &fsl_diu_ops;
1137 info->flags = FBINFO_FLAG_DEFAULT;
1138 info->pseudo_palette = &mfbi->pseudo_palette;
1139
1140 /* Allocate colormap */
1141 fb_alloc_cmap(&info->cmap, 16, 0);
1142 return 0;
1143 }
1144
1145 static int __devinit install_fb(struct fb_info *info)
1146 {
1147 int rc;
1148 struct mfb_info *mfbi = info->par;
1149 const char *aoi_mode, *init_aoi_mode = "320x240";
1150
1151 if (init_fbinfo(info))
1152 return -EINVAL;
1153
1154 if (mfbi->index == 0) /* plane 0 */
1155 aoi_mode = fb_mode;
1156 else
1157 aoi_mode = init_aoi_mode;
1158 pr_debug("mode used = %s\n", aoi_mode);
1159 rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
1160 ARRAY_SIZE(fsl_diu_mode_db), &fsl_diu_default_mode, default_bpp);
1161
1162 switch (rc) {
1163 case 1:
1164 pr_debug("using mode specified in @mode\n");
1165 break;
1166 case 2:
1167 pr_debug("using mode specified in @mode "
1168 "with ignored refresh rate\n");
1169 break;
1170 case 3:
1171 pr_debug("using mode default mode\n");
1172 break;
1173 case 4:
1174 pr_debug("using mode from list\n");
1175 break;
1176 default:
1177 pr_debug("rc = %d\n", rc);
1178 pr_debug("failed to find mode\n");
1179 return -EINVAL;
1180 break;
1181 }
1182
1183 pr_debug("xres_virtual %d\n", info->var.xres_virtual);
1184 pr_debug("bits_per_pixel %d\n", info->var.bits_per_pixel);
1185
1186 pr_debug("info->var.yres_virtual = %d\n", info->var.yres_virtual);
1187 pr_debug("info->fix.line_length = %d\n", info->fix.line_length);
1188
1189 if (mfbi->type == MFB_TYPE_OFF)
1190 mfbi->blank = FB_BLANK_NORMAL;
1191 else
1192 mfbi->blank = FB_BLANK_UNBLANK;
1193
1194 if (fsl_diu_check_var(&info->var, info)) {
1195 printk(KERN_ERR "fb_check_var failed");
1196 fb_dealloc_cmap(&info->cmap);
1197 return -EINVAL;
1198 }
1199
1200 if (fsl_diu_set_par(info)) {
1201 printk(KERN_ERR "fb_set_par failed");
1202 fb_dealloc_cmap(&info->cmap);
1203 return -EINVAL;
1204 }
1205
1206 if (register_framebuffer(info) < 0) {
1207 printk(KERN_ERR "register_framebuffer failed");
1208 unmap_video_memory(info);
1209 fb_dealloc_cmap(&info->cmap);
1210 return -EINVAL;
1211 }
1212
1213 mfbi->registered = 1;
1214 printk(KERN_INFO "fb%d: %s fb device registered successfully.\n",
1215 info->node, info->fix.id);
1216
1217 return 0;
1218 }
1219
1220 static void uninstall_fb(struct fb_info *info)
1221 {
1222 struct mfb_info *mfbi = info->par;
1223
1224 if (!mfbi->registered)
1225 return;
1226
1227 unregister_framebuffer(info);
1228 unmap_video_memory(info);
1229 if (&info->cmap)
1230 fb_dealloc_cmap(&info->cmap);
1231
1232 mfbi->registered = 0;
1233 }
1234
1235 static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
1236 {
1237 struct diu *hw = dr.diu_reg;
1238 unsigned int status = in_be32(&hw->int_status);
1239
1240 if (status) {
1241 /* This is the workaround for underrun */
1242 if (status & INT_UNDRUN) {
1243 out_be32(&hw->diu_mode, 0);
1244 pr_debug("Err: DIU occurs underrun!\n");
1245 udelay(1);
1246 out_be32(&hw->diu_mode, 1);
1247 }
1248 #if defined(CONFIG_NOT_COHERENT_CACHE)
1249 else if (status & INT_VSYNC) {
1250 unsigned int i;
1251 for (i = 0; i < coherence_data_size;
1252 i += d_cache_line_size)
1253 __asm__ __volatile__ (
1254 "dcbz 0, %[input]"
1255 ::[input]"r"(&coherence_data[i]));
1256 }
1257 #endif
1258 return IRQ_HANDLED;
1259 }
1260 return IRQ_NONE;
1261 }
1262
1263 static int request_irq_local(int irq)
1264 {
1265 unsigned long status, ints;
1266 struct diu *hw;
1267 int ret;
1268
1269 hw = dr.diu_reg;
1270
1271 /* Read to clear the status */
1272 status = in_be32(&hw->int_status);
1273
1274 ret = request_irq(irq, fsl_diu_isr, 0, "diu", NULL);
1275 if (ret)
1276 pr_info("Request diu IRQ failed.\n");
1277 else {
1278 ints = INT_PARERR | INT_LS_BF_VS;
1279 #if !defined(CONFIG_NOT_COHERENT_CACHE)
1280 ints |= INT_VSYNC;
1281 #endif
1282 if (dr.mode == MFB_MODE2 || dr.mode == MFB_MODE3)
1283 ints |= INT_VSYNC_WB;
1284
1285 /* Read to clear the status */
1286 status = in_be32(&hw->int_status);
1287 out_be32(&hw->int_mask, ints);
1288 }
1289 return ret;
1290 }
1291
1292 static void free_irq_local(int irq)
1293 {
1294 struct diu *hw = dr.diu_reg;
1295
1296 /* Disable all LCDC interrupt */
1297 out_be32(&hw->int_mask, 0x1f);
1298
1299 free_irq(irq, NULL);
1300 }
1301
1302 #ifdef CONFIG_PM
1303 /*
1304 * Power management hooks. Note that we won't be called from IRQ context,
1305 * unlike the blank functions above, so we may sleep.
1306 */
1307 static int fsl_diu_suspend(struct of_device *ofdev, pm_message_t state)
1308 {
1309 struct fsl_diu_data *machine_data;
1310
1311 machine_data = dev_get_drvdata(&ofdev->dev);
1312 disable_lcdc(machine_data->fsl_diu_info[0]);
1313
1314 return 0;
1315 }
1316
1317 static int fsl_diu_resume(struct of_device *ofdev)
1318 {
1319 struct fsl_diu_data *machine_data;
1320
1321 machine_data = dev_get_drvdata(&ofdev->dev);
1322 enable_lcdc(machine_data->fsl_diu_info[0]);
1323
1324 return 0;
1325 }
1326
1327 #else
1328 #define fsl_diu_suspend NULL
1329 #define fsl_diu_resume NULL
1330 #endif /* CONFIG_PM */
1331
1332 /* Align to 64-bit(8-byte), 32-byte, etc. */
1333 static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
1334 {
1335 u32 offset, ssize;
1336 u32 mask;
1337 dma_addr_t paddr = 0;
1338
1339 ssize = size + bytes_align;
1340 buf->vaddr = dma_alloc_coherent(NULL, ssize, &paddr, GFP_DMA |
1341 __GFP_ZERO);
1342 if (!buf->vaddr)
1343 return -ENOMEM;
1344
1345 buf->paddr = (__u32) paddr;
1346
1347 mask = bytes_align - 1;
1348 offset = (u32)buf->paddr & mask;
1349 if (offset) {
1350 buf->offset = bytes_align - offset;
1351 buf->paddr = (u32)buf->paddr + offset;
1352 } else
1353 buf->offset = 0;
1354 return 0;
1355 }
1356
1357 static void free_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
1358 {
1359 dma_free_coherent(NULL, size + bytes_align,
1360 buf->vaddr, (buf->paddr - buf->offset));
1361 return;
1362 }
1363
1364 static ssize_t store_monitor(struct device *device,
1365 struct device_attribute *attr, const char *buf, size_t count)
1366 {
1367 int old_monitor_port;
1368 unsigned long val;
1369 struct fsl_diu_data *machine_data =
1370 container_of(attr, struct fsl_diu_data, dev_attr);
1371
1372 if (strict_strtoul(buf, 10, &val))
1373 return 0;
1374
1375 old_monitor_port = machine_data->monitor_port;
1376 machine_data->monitor_port = diu_ops.set_sysfs_monitor_port(val);
1377
1378 if (old_monitor_port != machine_data->monitor_port) {
1379 /* All AOIs need adjust pixel format
1380 * fsl_diu_set_par only change the pixsel format here
1381 * unlikely to fail. */
1382 fsl_diu_set_par(machine_data->fsl_diu_info[0]);
1383 fsl_diu_set_par(machine_data->fsl_diu_info[1]);
1384 fsl_diu_set_par(machine_data->fsl_diu_info[2]);
1385 fsl_diu_set_par(machine_data->fsl_diu_info[3]);
1386 fsl_diu_set_par(machine_data->fsl_diu_info[4]);
1387 }
1388 return count;
1389 }
1390
1391 static ssize_t show_monitor(struct device *device,
1392 struct device_attribute *attr, char *buf)
1393 {
1394 struct fsl_diu_data *machine_data =
1395 container_of(attr, struct fsl_diu_data, dev_attr);
1396 return diu_ops.show_monitor_port(machine_data->monitor_port, buf);
1397 }
1398
1399 static int __devinit fsl_diu_probe(struct of_device *ofdev,
1400 const struct of_device_id *match)
1401 {
1402 struct device_node *np = ofdev->node;
1403 struct mfb_info *mfbi;
1404 phys_addr_t dummy_ad_addr;
1405 int ret, i, error = 0;
1406 struct resource res;
1407 struct fsl_diu_data *machine_data;
1408
1409 machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
1410 if (!machine_data)
1411 return -ENOMEM;
1412
1413 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
1414 machine_data->fsl_diu_info[i] =
1415 framebuffer_alloc(sizeof(struct mfb_info), &ofdev->dev);
1416 if (!machine_data->fsl_diu_info[i]) {
1417 dev_err(&ofdev->dev, "cannot allocate memory\n");
1418 ret = -ENOMEM;
1419 goto error2;
1420 }
1421 mfbi = machine_data->fsl_diu_info[i]->par;
1422 memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
1423 mfbi->parent = machine_data;
1424 }
1425
1426 ret = of_address_to_resource(np, 0, &res);
1427 if (ret) {
1428 dev_err(&ofdev->dev, "could not obtain DIU address\n");
1429 goto error;
1430 }
1431 if (!res.start) {
1432 dev_err(&ofdev->dev, "invalid DIU address\n");
1433 goto error;
1434 }
1435 dev_dbg(&ofdev->dev, "%s, res.start: 0x%08x\n", __func__, res.start);
1436
1437 dr.diu_reg = ioremap(res.start, sizeof(struct diu));
1438 if (!dr.diu_reg) {
1439 dev_err(&ofdev->dev, "Err: can't map DIU registers!\n");
1440 ret = -EFAULT;
1441 goto error2;
1442 }
1443
1444 out_be32(&dr.diu_reg->diu_mode, 0); /* disable DIU anyway*/
1445
1446 /* Get the IRQ of the DIU */
1447 machine_data->irq = irq_of_parse_and_map(np, 0);
1448
1449 if (!machine_data->irq) {
1450 dev_err(&ofdev->dev, "could not get DIU IRQ\n");
1451 ret = -EINVAL;
1452 goto error;
1453 }
1454 machine_data->monitor_port = monitor_port;
1455
1456 /* Area descriptor memory pool aligns to 64-bit boundary */
1457 if (allocate_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
1458 return -ENOMEM;
1459
1460 /* Get memory for Gamma Table - 32-byte aligned memory */
1461 if (allocate_buf(&pool.gamma, 768, 32)) {
1462 ret = -ENOMEM;
1463 goto error;
1464 }
1465
1466 /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
1467 if (allocate_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32)) {
1468 ret = -ENOMEM;
1469 goto error;
1470 }
1471
1472 i = ARRAY_SIZE(machine_data->fsl_diu_info);
1473 machine_data->dummy_ad = (struct diu_ad *)
1474 ((u32)pool.ad.vaddr + pool.ad.offset) + i;
1475 machine_data->dummy_ad->paddr = pool.ad.paddr +
1476 i * sizeof(struct diu_ad);
1477 machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
1478 if (!machine_data->dummy_aoi_virt) {
1479 ret = -ENOMEM;
1480 goto error;
1481 }
1482 machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
1483 machine_data->dummy_ad->pix_fmt = 0x88882317;
1484 machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
1485 machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
1486 machine_data->dummy_ad->offset_xyi = 0;
1487 machine_data->dummy_ad->offset_xyd = 0;
1488 machine_data->dummy_ad->next_ad = 0;
1489
1490 out_be32(&dr.diu_reg->desc[0], machine_data->dummy_ad->paddr);
1491 out_be32(&dr.diu_reg->desc[1], machine_data->dummy_ad->paddr);
1492 out_be32(&dr.diu_reg->desc[2], machine_data->dummy_ad->paddr);
1493
1494 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
1495 machine_data->fsl_diu_info[i]->fix.smem_start = 0;
1496 mfbi = machine_data->fsl_diu_info[i]->par;
1497 mfbi->ad = (struct diu_ad *)((u32)pool.ad.vaddr
1498 + pool.ad.offset) + i;
1499 mfbi->ad->paddr = pool.ad.paddr + i * sizeof(struct diu_ad);
1500 ret = install_fb(machine_data->fsl_diu_info[i]);
1501 if (ret) {
1502 dev_err(&ofdev->dev,
1503 "Failed to register framebuffer %d\n",
1504 i);
1505 goto error;
1506 }
1507 }
1508
1509 if (request_irq_local(machine_data->irq)) {
1510 dev_err(machine_data->fsl_diu_info[0]->dev,
1511 "could not request irq for diu.");
1512 goto error;
1513 }
1514
1515 machine_data->dev_attr.attr.name = "monitor";
1516 machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
1517 machine_data->dev_attr.show = show_monitor;
1518 machine_data->dev_attr.store = store_monitor;
1519 error = device_create_file(machine_data->fsl_diu_info[0]->dev,
1520 &machine_data->dev_attr);
1521 if (error) {
1522 dev_err(machine_data->fsl_diu_info[0]->dev,
1523 "could not create sysfs %s file\n",
1524 machine_data->dev_attr.attr.name);
1525 }
1526
1527 dev_set_drvdata(&ofdev->dev, machine_data);
1528 return 0;
1529
1530 error:
1531 for (i = ARRAY_SIZE(machine_data->fsl_diu_info);
1532 i > 0; i--)
1533 uninstall_fb(machine_data->fsl_diu_info[i - 1]);
1534 if (pool.ad.vaddr)
1535 free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
1536 if (pool.gamma.vaddr)
1537 free_buf(&pool.gamma, 768, 32);
1538 if (pool.cursor.vaddr)
1539 free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
1540 if (machine_data->dummy_aoi_virt)
1541 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
1542 iounmap(dr.diu_reg);
1543
1544 error2:
1545 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1546 if (machine_data->fsl_diu_info[i])
1547 framebuffer_release(machine_data->fsl_diu_info[i]);
1548 kfree(machine_data);
1549
1550 return ret;
1551 }
1552
1553
1554 static int fsl_diu_remove(struct of_device *ofdev)
1555 {
1556 struct fsl_diu_data *machine_data;
1557 int i;
1558
1559 machine_data = dev_get_drvdata(&ofdev->dev);
1560 disable_lcdc(machine_data->fsl_diu_info[0]);
1561 free_irq_local(machine_data->irq);
1562 for (i = ARRAY_SIZE(machine_data->fsl_diu_info); i > 0; i--)
1563 uninstall_fb(machine_data->fsl_diu_info[i - 1]);
1564 if (pool.ad.vaddr)
1565 free_buf(&pool.ad, sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
1566 if (pool.gamma.vaddr)
1567 free_buf(&pool.gamma, 768, 32);
1568 if (pool.cursor.vaddr)
1569 free_buf(&pool.cursor, MAX_CURS * MAX_CURS * 2, 32);
1570 if (machine_data->dummy_aoi_virt)
1571 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
1572 iounmap(dr.diu_reg);
1573 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1574 if (machine_data->fsl_diu_info[i])
1575 framebuffer_release(machine_data->fsl_diu_info[i]);
1576 kfree(machine_data);
1577
1578 return 0;
1579 }
1580
1581 #ifndef MODULE
1582 static int __init fsl_diu_setup(char *options)
1583 {
1584 char *opt;
1585 unsigned long val;
1586
1587 if (!options || !*options)
1588 return 0;
1589
1590 while ((opt = strsep(&options, ",")) != NULL) {
1591 if (!*opt)
1592 continue;
1593 if (!strncmp(opt, "monitor=", 8)) {
1594 if (!strict_strtoul(opt + 8, 10, &val) && (val <= 2))
1595 monitor_port = val;
1596 } else if (!strncmp(opt, "bpp=", 4)) {
1597 if (!strict_strtoul(opt + 4, 10, &val))
1598 default_bpp = val;
1599 } else
1600 fb_mode = opt;
1601 }
1602
1603 return 0;
1604 }
1605 #endif
1606
1607 static struct of_device_id fsl_diu_match[] = {
1608 {
1609 .compatible = "fsl,diu",
1610 },
1611 {}
1612 };
1613 MODULE_DEVICE_TABLE(of, fsl_diu_match);
1614
1615 static struct of_platform_driver fsl_diu_driver = {
1616 .owner = THIS_MODULE,
1617 .name = "fsl_diu",
1618 .match_table = fsl_diu_match,
1619 .probe = fsl_diu_probe,
1620 .remove = fsl_diu_remove,
1621 .suspend = fsl_diu_suspend,
1622 .resume = fsl_diu_resume,
1623 };
1624
1625 static int __init fsl_diu_init(void)
1626 {
1627 #ifdef CONFIG_NOT_COHERENT_CACHE
1628 struct device_node *np;
1629 const u32 *prop;
1630 #endif
1631 int ret;
1632 #ifndef MODULE
1633 char *option;
1634
1635 /*
1636 * For kernel boot options (in 'video=xxxfb:<options>' format)
1637 */
1638 if (fb_get_options("fslfb", &option))
1639 return -ENODEV;
1640 fsl_diu_setup(option);
1641 #endif
1642 printk(KERN_INFO "Freescale DIU driver\n");
1643
1644 #ifdef CONFIG_NOT_COHERENT_CACHE
1645 np = of_find_node_by_type(NULL, "cpu");
1646 if (!np) {
1647 printk(KERN_ERR "Err: can't find device node 'cpu'\n");
1648 return -ENODEV;
1649 }
1650
1651 prop = of_get_property(np, "d-cache-size", NULL);
1652 if (prop == NULL) {
1653 of_node_put(np);
1654 return -ENODEV;
1655 }
1656
1657 /* Freescale PLRU requires 13/8 times the cache size to do a proper
1658 displacement flush
1659 */
1660 coherence_data_size = *prop * 13;
1661 coherence_data_size /= 8;
1662
1663 prop = of_get_property(np, "d-cache-line-size", NULL);
1664 if (prop == NULL) {
1665 of_node_put(np);
1666 return -ENODEV;
1667 }
1668 d_cache_line_size = *prop;
1669
1670 of_node_put(np);
1671 coherence_data = vmalloc(coherence_data_size);
1672 if (!coherence_data)
1673 return -ENOMEM;
1674 #endif
1675 ret = of_register_platform_driver(&fsl_diu_driver);
1676 if (ret) {
1677 printk(KERN_ERR
1678 "fsl-diu: failed to register platform driver\n");
1679 #if defined(CONFIG_NOT_COHERENT_CACHE)
1680 vfree(coherence_data);
1681 #endif
1682 iounmap(dr.diu_reg);
1683 }
1684 return ret;
1685 }
1686
1687 static void __exit fsl_diu_exit(void)
1688 {
1689 of_unregister_platform_driver(&fsl_diu_driver);
1690 #if defined(CONFIG_NOT_COHERENT_CACHE)
1691 vfree(coherence_data);
1692 #endif
1693 }
1694
1695 module_init(fsl_diu_init);
1696 module_exit(fsl_diu_exit);
1697
1698 MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
1699 MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
1700 MODULE_LICENSE("GPL");
1701
1702 module_param_named(mode, fb_mode, charp, 0);
1703 MODULE_PARM_DESC(mode,
1704 "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
1705 module_param_named(bpp, default_bpp, ulong, 0);
1706 MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
1707 module_param_named(monitor, monitor_port, int, 0);
1708 MODULE_PARM_DESC(monitor,
1709 "Specify the monitor port (0, 1 or 2) if supported by the platform");
1710
Support for the Chinese Samsung S3C2440 based development boards