2 * core routines for the asynchronous memory transfer/transform api
4 * Copyright © 2006, Intel Corporation.
6 * Dan Williams <dan.j.williams@intel.com>
8 * with architecture considerations by:
9 * Neil Brown <neilb@suse.de>
10 * Jeff Garzik <jeff@garzik.org>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms and conditions of the GNU General Public License,
14 * version 2, as published by the Free Software Foundation.
16 * This program is distributed in the hope it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program; if not, write to the Free Software Foundation, Inc.,
23 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 #include <linux/rculist.h>
27 #include <linux/kernel.h>
28 #include <linux/async_tx.h>
30 #ifdef CONFIG_DMA_ENGINE
31 static int __init
async_tx_init(void)
33 async_dmaengine_get();
35 printk(KERN_INFO
"async_tx: api initialized (async)\n");
40 static void __exit
async_tx_exit(void)
42 async_dmaengine_put();
46 * __async_tx_find_channel - find a channel to carry out the operation or let
47 * the transaction execute synchronously
48 * @depend_tx: transaction dependency
49 * @tx_type: transaction type
52 __async_tx_find_channel(struct dma_async_tx_descriptor
*depend_tx
,
53 enum dma_transaction_type tx_type
)
55 /* see if we can keep the chain on one channel */
57 dma_has_cap(tx_type
, depend_tx
->chan
->device
->cap_mask
))
58 return depend_tx
->chan
;
59 return async_dma_find_channel(tx_type
);
61 EXPORT_SYMBOL_GPL(__async_tx_find_channel
);
63 static int __init
async_tx_init(void)
65 printk(KERN_INFO
"async_tx: api initialized (sync-only)\n");
69 static void __exit
async_tx_exit(void)
77 * async_tx_channel_switch - queue an interrupt descriptor with a dependency
79 * @depend_tx: the operation that must finish before the new operation runs
80 * @tx: the new operation
83 async_tx_channel_switch(struct dma_async_tx_descriptor
*depend_tx
,
84 struct dma_async_tx_descriptor
*tx
)
86 struct dma_chan
*chan
;
87 struct dma_device
*device
;
88 struct dma_async_tx_descriptor
*intr_tx
= (void *) ~0;
90 /* first check to see if we can still append to depend_tx */
91 spin_lock_bh(&depend_tx
->lock
);
92 if (depend_tx
->parent
&& depend_tx
->chan
== tx
->chan
) {
93 tx
->parent
= depend_tx
;
97 spin_unlock_bh(&depend_tx
->lock
);
102 chan
= depend_tx
->chan
;
103 device
= chan
->device
;
105 /* see if we can schedule an interrupt
106 * otherwise poll for completion
108 if (dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
109 intr_tx
= device
->device_prep_dma_interrupt(chan
, 0);
114 intr_tx
->callback
= NULL
;
115 intr_tx
->callback_param
= NULL
;
116 tx
->parent
= intr_tx
;
117 /* safe to set ->next outside the lock since we know we are
122 /* check if we need to append */
123 spin_lock_bh(&depend_tx
->lock
);
124 if (depend_tx
->parent
) {
125 intr_tx
->parent
= depend_tx
;
126 depend_tx
->next
= intr_tx
;
127 async_tx_ack(intr_tx
);
130 spin_unlock_bh(&depend_tx
->lock
);
133 intr_tx
->parent
= NULL
;
134 intr_tx
->tx_submit(intr_tx
);
135 async_tx_ack(intr_tx
);
138 if (dma_wait_for_async_tx(depend_tx
) == DMA_ERROR
)
139 panic("%s: DMA_ERROR waiting for depend_tx\n",
147 * submit_disposition - while holding depend_tx->lock we must avoid submitting
148 * new operations to prevent a circular locking dependency with
149 * drivers that already hold a channel lock when calling
150 * async_tx_run_dependencies.
151 * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
152 * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
153 * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
155 enum submit_disposition
{
157 ASYNC_TX_CHANNEL_SWITCH
,
158 ASYNC_TX_DIRECT_SUBMIT
,
162 async_tx_submit(struct dma_chan
*chan
, struct dma_async_tx_descriptor
*tx
,
163 enum async_tx_flags flags
, struct dma_async_tx_descriptor
*depend_tx
,
164 dma_async_tx_callback cb_fn
, void *cb_param
)
166 tx
->callback
= cb_fn
;
167 tx
->callback_param
= cb_param
;
170 enum submit_disposition s
;
172 /* sanity check the dependency chain:
173 * 1/ if ack is already set then we cannot be sure
174 * we are referring to the correct operation
175 * 2/ dependencies are 1:1 i.e. two transactions can
176 * not depend on the same parent
178 BUG_ON(async_tx_test_ack(depend_tx
) || depend_tx
->next
||
181 /* the lock prevents async_tx_run_dependencies from missing
182 * the setting of ->next when ->parent != NULL
184 spin_lock_bh(&depend_tx
->lock
);
185 if (depend_tx
->parent
) {
186 /* we have a parent so we can not submit directly
187 * if we are staying on the same channel: append
188 * else: channel switch
190 if (depend_tx
->chan
== chan
) {
191 tx
->parent
= depend_tx
;
192 depend_tx
->next
= tx
;
193 s
= ASYNC_TX_SUBMITTED
;
195 s
= ASYNC_TX_CHANNEL_SWITCH
;
197 /* we do not have a parent so we may be able to submit
198 * directly if we are staying on the same channel
200 if (depend_tx
->chan
== chan
)
201 s
= ASYNC_TX_DIRECT_SUBMIT
;
203 s
= ASYNC_TX_CHANNEL_SWITCH
;
205 spin_unlock_bh(&depend_tx
->lock
);
208 case ASYNC_TX_SUBMITTED
:
210 case ASYNC_TX_CHANNEL_SWITCH
:
211 async_tx_channel_switch(depend_tx
, tx
);
213 case ASYNC_TX_DIRECT_SUBMIT
:
223 if (flags
& ASYNC_TX_ACK
)
226 if (depend_tx
&& (flags
& ASYNC_TX_DEP_ACK
))
227 async_tx_ack(depend_tx
);
229 EXPORT_SYMBOL_GPL(async_tx_submit
);
232 * async_trigger_callback - schedules the callback function to be run after
233 * any dependent operations have been completed.
234 * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK
235 * @depend_tx: 'callback' requires the completion of this transaction
236 * @cb_fn: function to call after depend_tx completes
237 * @cb_param: parameter to pass to the callback routine
239 struct dma_async_tx_descriptor
*
240 async_trigger_callback(enum async_tx_flags flags
,
241 struct dma_async_tx_descriptor
*depend_tx
,
242 dma_async_tx_callback cb_fn
, void *cb_param
)
244 struct dma_chan
*chan
;
245 struct dma_device
*device
;
246 struct dma_async_tx_descriptor
*tx
;
249 chan
= depend_tx
->chan
;
250 device
= chan
->device
;
252 /* see if we can schedule an interrupt
253 * otherwise poll for completion
255 if (device
&& !dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
258 tx
= device
? device
->device_prep_dma_interrupt(chan
, 0) : NULL
;
263 pr_debug("%s: (async)\n", __func__
);
265 async_tx_submit(chan
, tx
, flags
, depend_tx
, cb_fn
, cb_param
);
267 pr_debug("%s: (sync)\n", __func__
);
269 /* wait for any prerequisite operations */
270 async_tx_quiesce(&depend_tx
);
272 async_tx_sync_epilog(cb_fn
, cb_param
);
277 EXPORT_SYMBOL_GPL(async_trigger_callback
);
280 * async_tx_quiesce - ensure tx is complete and freeable upon return
281 * @tx - transaction to quiesce
283 void async_tx_quiesce(struct dma_async_tx_descriptor
**tx
)
286 /* if ack is already set then we cannot be sure
287 * we are referring to the correct operation
289 BUG_ON(async_tx_test_ack(*tx
));
290 if (dma_wait_for_async_tx(*tx
) == DMA_ERROR
)
291 panic("DMA_ERROR waiting for transaction\n");
296 EXPORT_SYMBOL_GPL(async_tx_quiesce
);
298 module_init(async_tx_init
);
299 module_exit(async_tx_exit
);
301 MODULE_AUTHOR("Intel Corporation");
302 MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
303 MODULE_LICENSE("GPL");