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x86: PAT avoid aliasing in /dev/mem read/write
[linux-2.6/mini2440.git] / drivers / char / pcmcia / synclink_cs.c
blob4e84d233e5a295b8cb5c0e43b051e6133197efbe
1 /*
2 * linux/drivers/char/pcmcia/synclink_cs.c
3 *
4 * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
5 *
6 * Device driver for Microgate SyncLink PC Card
7 * multiprotocol serial adapter.
8 *
9 * written by Paul Fulghum for Microgate Corporation
10 * paulkf@microgate.com
11 *
12 * Microgate and SyncLink are trademarks of Microgate Corporation
13 *
14 * This code is released under the GNU General Public License (GPL)
15 *
16 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
26 * OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
30 #if defined(__i386__)
31 # define BREAKPOINT() asm(" int $3");
32 #else
33 # define BREAKPOINT() { }
34 #endif
35
36 #define MAX_DEVICE_COUNT 4
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/signal.h>
41 #include <linux/sched.h>
42 #include <linux/timer.h>
43 #include <linux/time.h>
44 #include <linux/interrupt.h>
45 #include <linux/tty.h>
46 #include <linux/tty_flip.h>
47 #include <linux/serial.h>
48 #include <linux/major.h>
49 #include <linux/string.h>
50 #include <linux/fcntl.h>
51 #include <linux/ptrace.h>
52 #include <linux/ioport.h>
53 #include <linux/mm.h>
54 #include <linux/slab.h>
55 #include <linux/netdevice.h>
56 #include <linux/vmalloc.h>
57 #include <linux/init.h>
58 #include <linux/delay.h>
59 #include <linux/ioctl.h>
60 #include <linux/synclink.h>
61
62 #include <asm/system.h>
63 #include <asm/io.h>
64 #include <asm/irq.h>
65 #include <asm/dma.h>
66 #include <linux/bitops.h>
67 #include <asm/types.h>
68 #include <linux/termios.h>
69 #include <linux/workqueue.h>
70 #include <linux/hdlc.h>
71
72 #include <pcmcia/cs_types.h>
73 #include <pcmcia/cs.h>
74 #include <pcmcia/cistpl.h>
75 #include <pcmcia/cisreg.h>
76 #include <pcmcia/ds.h>
77
78 #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
79 #define SYNCLINK_GENERIC_HDLC 1
80 #else
81 #define SYNCLINK_GENERIC_HDLC 0
82 #endif
83
84 #define GET_USER(error,value,addr) error = get_user(value,addr)
85 #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
86 #define PUT_USER(error,value,addr) error = put_user(value,addr)
87 #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
88
89 #include <asm/uaccess.h>
90
91 static MGSL_PARAMS default_params = {
92 MGSL_MODE_HDLC, /* unsigned long mode */
93 0, /* unsigned char loopback; */
94 HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
95 HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
96 0, /* unsigned long clock_speed; */
97 0xff, /* unsigned char addr_filter; */
98 HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
99 HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
100 HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
101 9600, /* unsigned long data_rate; */
102 8, /* unsigned char data_bits; */
103 1, /* unsigned char stop_bits; */
104 ASYNC_PARITY_NONE /* unsigned char parity; */
105 };
106
107 typedef struct
108 {
109 int count;
110 unsigned char status;
111 char data[1];
112 } RXBUF;
113
114 /* The queue of BH actions to be performed */
115
116 #define BH_RECEIVE 1
117 #define BH_TRANSMIT 2
118 #define BH_STATUS 4
119
120 #define IO_PIN_SHUTDOWN_LIMIT 100
121
122 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
123
124 struct _input_signal_events {
125 int ri_up;
126 int ri_down;
127 int dsr_up;
128 int dsr_down;
129 int dcd_up;
130 int dcd_down;
131 int cts_up;
132 int cts_down;
133 };
134
135
136 /*
137 * Device instance data structure
138 */
139
140 typedef struct _mgslpc_info {
141 void *if_ptr; /* General purpose pointer (used by SPPP) */
142 int magic;
143 int flags;
144 int count; /* count of opens */
145 int line;
146 unsigned short close_delay;
147 unsigned short closing_wait; /* time to wait before closing */
148
149 struct mgsl_icount icount;
150
151 struct tty_struct *tty;
152 int timeout;
153 int x_char; /* xon/xoff character */
154 int blocked_open; /* # of blocked opens */
155 unsigned char read_status_mask;
156 unsigned char ignore_status_mask;
157
158 unsigned char *tx_buf;
159 int tx_put;
160 int tx_get;
161 int tx_count;
162
163 /* circular list of fixed length rx buffers */
164
165 unsigned char *rx_buf; /* memory allocated for all rx buffers */
166 int rx_buf_total_size; /* size of memory allocated for rx buffers */
167 int rx_put; /* index of next empty rx buffer */
168 int rx_get; /* index of next full rx buffer */
169 int rx_buf_size; /* size in bytes of single rx buffer */
170 int rx_buf_count; /* total number of rx buffers */
171 int rx_frame_count; /* number of full rx buffers */
172
173 wait_queue_head_t open_wait;
174 wait_queue_head_t close_wait;
175
176 wait_queue_head_t status_event_wait_q;
177 wait_queue_head_t event_wait_q;
178 struct timer_list tx_timer; /* HDLC transmit timeout timer */
179 struct _mgslpc_info *next_device; /* device list link */
180
181 unsigned short imra_value;
182 unsigned short imrb_value;
183 unsigned char pim_value;
184
185 spinlock_t lock;
186 struct work_struct task; /* task structure for scheduling bh */
187
188 u32 max_frame_size;
189
190 u32 pending_bh;
191
192 int bh_running;
193 int bh_requested;
194
195 int dcd_chkcount; /* check counts to prevent */
196 int cts_chkcount; /* too many IRQs if a signal */
197 int dsr_chkcount; /* is floating */
198 int ri_chkcount;
199
200 int rx_enabled;
201 int rx_overflow;
202
203 int tx_enabled;
204 int tx_active;
205 int tx_aborting;
206 u32 idle_mode;
207
208 int if_mode; /* serial interface selection (RS-232, v.35 etc) */
209
210 char device_name[25]; /* device instance name */
211
212 unsigned int io_base; /* base I/O address of adapter */
213 unsigned int irq_level;
214
215 MGSL_PARAMS params; /* communications parameters */
216
217 unsigned char serial_signals; /* current serial signal states */
218
219 char irq_occurred; /* for diagnostics use */
220 char testing_irq;
221 unsigned int init_error; /* startup error (DIAGS) */
222
223 char flag_buf[MAX_ASYNC_BUFFER_SIZE];
224 BOOLEAN drop_rts_on_tx_done;
225
226 struct _input_signal_events input_signal_events;
227
228 /* PCMCIA support */
229 struct pcmcia_device *p_dev;
230 dev_node_t node;
231 int stop;
232
233 /* SPPP/Cisco HDLC device parts */
234 int netcount;
235 int dosyncppp;
236 spinlock_t netlock;
237
238 #if SYNCLINK_GENERIC_HDLC
239 struct net_device *netdev;
240 #endif
241
242 } MGSLPC_INFO;
243
244 #define MGSLPC_MAGIC 0x5402
245
246 /*
247 * The size of the serial xmit buffer is 1 page, or 4096 bytes
248 */
249 #define TXBUFSIZE 4096
250
251
252 #define CHA 0x00 /* channel A offset */
253 #define CHB 0x40 /* channel B offset */
254
255 /*
256 * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
257 */
258 #undef PVR
259
260 #define RXFIFO 0
261 #define TXFIFO 0
262 #define STAR 0x20
263 #define CMDR 0x20
264 #define RSTA 0x21
265 #define PRE 0x21
266 #define MODE 0x22
267 #define TIMR 0x23
268 #define XAD1 0x24
269 #define XAD2 0x25
270 #define RAH1 0x26
271 #define RAH2 0x27
272 #define DAFO 0x27
273 #define RAL1 0x28
274 #define RFC 0x28
275 #define RHCR 0x29
276 #define RAL2 0x29
277 #define RBCL 0x2a
278 #define XBCL 0x2a
279 #define RBCH 0x2b
280 #define XBCH 0x2b
281 #define CCR0 0x2c
282 #define CCR1 0x2d
283 #define CCR2 0x2e
284 #define CCR3 0x2f
285 #define VSTR 0x34
286 #define BGR 0x34
287 #define RLCR 0x35
288 #define AML 0x36
289 #define AMH 0x37
290 #define GIS 0x38
291 #define IVA 0x38
292 #define IPC 0x39
293 #define ISR 0x3a
294 #define IMR 0x3a
295 #define PVR 0x3c
296 #define PIS 0x3d
297 #define PIM 0x3d
298 #define PCR 0x3e
299 #define CCR4 0x3f
300
301 // IMR/ISR
302
303 #define IRQ_BREAK_ON BIT15 // rx break detected
304 #define IRQ_DATAOVERRUN BIT14 // receive data overflow
305 #define IRQ_ALLSENT BIT13 // all sent
306 #define IRQ_UNDERRUN BIT12 // transmit data underrun
307 #define IRQ_TIMER BIT11 // timer interrupt
308 #define IRQ_CTS BIT10 // CTS status change
309 #define IRQ_TXREPEAT BIT9 // tx message repeat
310 #define IRQ_TXFIFO BIT8 // transmit pool ready
311 #define IRQ_RXEOM BIT7 // receive message end
312 #define IRQ_EXITHUNT BIT6 // receive frame start
313 #define IRQ_RXTIME BIT6 // rx char timeout
314 #define IRQ_DCD BIT2 // carrier detect status change
315 #define IRQ_OVERRUN BIT1 // receive frame overflow
316 #define IRQ_RXFIFO BIT0 // receive pool full
317
318 // STAR
319
320 #define XFW BIT6 // transmit FIFO write enable
321 #define CEC BIT2 // command executing
322 #define CTS BIT1 // CTS state
323
324 #define PVR_DTR BIT0
325 #define PVR_DSR BIT1
326 #define PVR_RI BIT2
327 #define PVR_AUTOCTS BIT3
328 #define PVR_RS232 0x20 /* 0010b */
329 #define PVR_V35 0xe0 /* 1110b */
330 #define PVR_RS422 0x40 /* 0100b */
331
332 /* Register access functions */
333
334 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
335 #define read_reg(info, reg) inb((info)->io_base + (reg))
336
337 #define read_reg16(info, reg) inw((info)->io_base + (reg))
338 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
339
340 #define set_reg_bits(info, reg, mask) \
341 write_reg(info, (reg), \
342 (unsigned char) (read_reg(info, (reg)) | (mask)))
343 #define clear_reg_bits(info, reg, mask) \
344 write_reg(info, (reg), \
345 (unsigned char) (read_reg(info, (reg)) & ~(mask)))
346 /*
347 * interrupt enable/disable routines
348 */
349 static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
350 {
351 if (channel == CHA) {
352 info->imra_value |= mask;
353 write_reg16(info, CHA + IMR, info->imra_value);
354 } else {
355 info->imrb_value |= mask;
356 write_reg16(info, CHB + IMR, info->imrb_value);
357 }
358 }
359 static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
360 {
361 if (channel == CHA) {
362 info->imra_value &= ~mask;
363 write_reg16(info, CHA + IMR, info->imra_value);
364 } else {
365 info->imrb_value &= ~mask;
366 write_reg16(info, CHB + IMR, info->imrb_value);
367 }
368 }
369
370 #define port_irq_disable(info, mask) \
371 { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
372
373 #define port_irq_enable(info, mask) \
374 { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
375
376 static void rx_start(MGSLPC_INFO *info);
377 static void rx_stop(MGSLPC_INFO *info);
378
379 static void tx_start(MGSLPC_INFO *info);
380 static void tx_stop(MGSLPC_INFO *info);
381 static void tx_set_idle(MGSLPC_INFO *info);
382
383 static void get_signals(MGSLPC_INFO *info);
384 static void set_signals(MGSLPC_INFO *info);
385
386 static void reset_device(MGSLPC_INFO *info);
387
388 static void hdlc_mode(MGSLPC_INFO *info);
389 static void async_mode(MGSLPC_INFO *info);
390
391 static void tx_timeout(unsigned long context);
392
393 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
394
395 #if SYNCLINK_GENERIC_HDLC
396 #define dev_to_port(D) (dev_to_hdlc(D)->priv)
397 static void hdlcdev_tx_done(MGSLPC_INFO *info);
398 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
399 static int hdlcdev_init(MGSLPC_INFO *info);
400 static void hdlcdev_exit(MGSLPC_INFO *info);
401 #endif
402
403 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
404
405 static BOOLEAN register_test(MGSLPC_INFO *info);
406 static BOOLEAN irq_test(MGSLPC_INFO *info);
407 static int adapter_test(MGSLPC_INFO *info);
408
409 static int claim_resources(MGSLPC_INFO *info);
410 static void release_resources(MGSLPC_INFO *info);
411 static void mgslpc_add_device(MGSLPC_INFO *info);
412 static void mgslpc_remove_device(MGSLPC_INFO *info);
413
414 static int rx_get_frame(MGSLPC_INFO *info);
415 static void rx_reset_buffers(MGSLPC_INFO *info);
416 static int rx_alloc_buffers(MGSLPC_INFO *info);
417 static void rx_free_buffers(MGSLPC_INFO *info);
418
419 static irqreturn_t mgslpc_isr(int irq, void *dev_id);
420
421 /*
422 * Bottom half interrupt handlers
423 */
424 static void bh_handler(struct work_struct *work);
425 static void bh_transmit(MGSLPC_INFO *info);
426 static void bh_status(MGSLPC_INFO *info);
427
428 /*
429 * ioctl handlers
430 */
431 static int tiocmget(struct tty_struct *tty, struct file *file);
432 static int tiocmset(struct tty_struct *tty, struct file *file,
433 unsigned int set, unsigned int clear);
434 static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
435 static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
436 static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
437 static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
438 static int set_txidle(MGSLPC_INFO *info, int idle_mode);
439 static int set_txenable(MGSLPC_INFO *info, int enable);
440 static int tx_abort(MGSLPC_INFO *info);
441 static int set_rxenable(MGSLPC_INFO *info, int enable);
442 static int wait_events(MGSLPC_INFO *info, int __user *mask);
443
444 static MGSLPC_INFO *mgslpc_device_list = NULL;
445 static int mgslpc_device_count = 0;
446
447 /*
448 * Set this param to non-zero to load eax with the
449 * .text section address and breakpoint on module load.
450 * This is useful for use with gdb and add-symbol-file command.
451 */
452 static int break_on_load=0;
453
454 /*
455 * Driver major number, defaults to zero to get auto
456 * assigned major number. May be forced as module parameter.
457 */
458 static int ttymajor=0;
459
460 static int debug_level = 0;
461 static int maxframe[MAX_DEVICE_COUNT] = {0,};
462 static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
463
464 module_param(break_on_load, bool, 0);
465 module_param(ttymajor, int, 0);
466 module_param(debug_level, int, 0);
467 module_param_array(maxframe, int, NULL, 0);
468 module_param_array(dosyncppp, int, NULL, 0);
469
470 MODULE_LICENSE("GPL");
471
472 static char *driver_name = "SyncLink PC Card driver";
473 static char *driver_version = "$Revision: 4.34 $";
474
475 static struct tty_driver *serial_driver;
476
477 /* number of characters left in xmit buffer before we ask for more */
478 #define WAKEUP_CHARS 256
479
480 static void mgslpc_change_params(MGSLPC_INFO *info);
481 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
482
483 /* PCMCIA prototypes */
484
485 static int mgslpc_config(struct pcmcia_device *link);
486 static void mgslpc_release(u_long arg);
487 static void mgslpc_detach(struct pcmcia_device *p_dev);
488
489 /*
490 * 1st function defined in .text section. Calling this function in
491 * init_module() followed by a breakpoint allows a remote debugger
492 * (gdb) to get the .text address for the add-symbol-file command.
493 * This allows remote debugging of dynamically loadable modules.
494 */
495 static void* mgslpc_get_text_ptr(void)
496 {
497 return mgslpc_get_text_ptr;
498 }
499
500 /**
501 * line discipline callback wrappers
502 *
503 * The wrappers maintain line discipline references
504 * while calling into the line discipline.
505 *
506 * ldisc_flush_buffer - flush line discipline receive buffers
507 * ldisc_receive_buf - pass receive data to line discipline
508 */
509
510 static void ldisc_flush_buffer(struct tty_struct *tty)
511 {
512 struct tty_ldisc *ld = tty_ldisc_ref(tty);
513 if (ld) {
514 if (ld->flush_buffer)
515 ld->flush_buffer(tty);
516 tty_ldisc_deref(ld);
517 }
518 }
519
520 static void ldisc_receive_buf(struct tty_struct *tty,
521 const __u8 *data, char *flags, int count)
522 {
523 struct tty_ldisc *ld;
524 if (!tty)
525 return;
526 ld = tty_ldisc_ref(tty);
527 if (ld) {
528 if (ld->receive_buf)
529 ld->receive_buf(tty, data, flags, count);
530 tty_ldisc_deref(ld);
531 }
532 }
533
534 static int mgslpc_probe(struct pcmcia_device *link)
535 {
536 MGSLPC_INFO *info;
537 int ret;
538
539 if (debug_level >= DEBUG_LEVEL_INFO)
540 printk("mgslpc_attach\n");
541
542 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
543 if (!info) {
544 printk("Error can't allocate device instance data\n");
545 return -ENOMEM;
546 }
547
548 info->magic = MGSLPC_MAGIC;
549 INIT_WORK(&info->task, bh_handler);
550 info->max_frame_size = 4096;
551 info->close_delay = 5*HZ/10;
552 info->closing_wait = 30*HZ;
553 init_waitqueue_head(&info->open_wait);
554 init_waitqueue_head(&info->close_wait);
555 init_waitqueue_head(&info->status_event_wait_q);
556 init_waitqueue_head(&info->event_wait_q);
557 spin_lock_init(&info->lock);
558 spin_lock_init(&info->netlock);
559 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
560 info->idle_mode = HDLC_TXIDLE_FLAGS;
561 info->imra_value = 0xffff;
562 info->imrb_value = 0xffff;
563 info->pim_value = 0xff;
564
565 info->p_dev = link;
566 link->priv = info;
567
568 /* Initialize the struct pcmcia_device structure */
569
570 /* Interrupt setup */
571 link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
572 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
573 link->irq.Handler = NULL;
574
575 link->conf.Attributes = 0;
576 link->conf.IntType = INT_MEMORY_AND_IO;
577
578 ret = mgslpc_config(link);
579 if (ret)
580 return ret;
581
582 mgslpc_add_device(info);
583
584 return 0;
585 }
586
587 /* Card has been inserted.
588 */
589
590 #define CS_CHECK(fn, ret) \
591 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
592
593 static int mgslpc_config(struct pcmcia_device *link)
594 {
595 MGSLPC_INFO *info = link->priv;
596 tuple_t tuple;
597 cisparse_t parse;
598 int last_fn, last_ret;
599 u_char buf[64];
600 cistpl_cftable_entry_t dflt = { 0 };
601 cistpl_cftable_entry_t *cfg;
602
603 if (debug_level >= DEBUG_LEVEL_INFO)
604 printk("mgslpc_config(0x%p)\n", link);
605
606 tuple.Attributes = 0;
607 tuple.TupleData = buf;
608 tuple.TupleDataMax = sizeof(buf);
609 tuple.TupleOffset = 0;
610
611 /* get CIS configuration entry */
612
613 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
614 CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
615
616 cfg = &(parse.cftable_entry);
617 CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
618 CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
619
620 if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
621 if (cfg->index == 0)
622 goto cs_failed;
623
624 link->conf.ConfigIndex = cfg->index;
625 link->conf.Attributes |= CONF_ENABLE_IRQ;
626
627 /* IO window settings */
628 link->io.NumPorts1 = 0;
629 if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
630 cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
631 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
632 if (!(io->flags & CISTPL_IO_8BIT))
633 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
634 if (!(io->flags & CISTPL_IO_16BIT))
635 link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
636 link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
637 link->io.BasePort1 = io->win[0].base;
638 link->io.NumPorts1 = io->win[0].len;
639 CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
640 }
641
642 link->conf.Attributes = CONF_ENABLE_IRQ;
643 link->conf.IntType = INT_MEMORY_AND_IO;
644 link->conf.ConfigIndex = 8;
645 link->conf.Present = PRESENT_OPTION;
646
647 link->irq.Attributes |= IRQ_HANDLE_PRESENT;
648 link->irq.Handler = mgslpc_isr;
649 link->irq.Instance = info;
650 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
651
652 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
653
654 info->io_base = link->io.BasePort1;
655 info->irq_level = link->irq.AssignedIRQ;
656
657 /* add to linked list of devices */
658 sprintf(info->node.dev_name, "mgslpc0");
659 info->node.major = info->node.minor = 0;
660 link->dev_node = &info->node;
661
662 printk(KERN_INFO "%s: index 0x%02x:",
663 info->node.dev_name, link->conf.ConfigIndex);
664 if (link->conf.Attributes & CONF_ENABLE_IRQ)
665 printk(", irq %d", link->irq.AssignedIRQ);
666 if (link->io.NumPorts1)
667 printk(", io 0x%04x-0x%04x", link->io.BasePort1,
668 link->io.BasePort1+link->io.NumPorts1-1);
669 printk("\n");
670 return 0;
671
672 cs_failed:
673 cs_error(link, last_fn, last_ret);
674 mgslpc_release((u_long)link);
675 return -ENODEV;
676 }
677
678 /* Card has been removed.
679 * Unregister device and release PCMCIA configuration.
680 * If device is open, postpone until it is closed.
681 */
682 static void mgslpc_release(u_long arg)
683 {
684 struct pcmcia_device *link = (struct pcmcia_device *)arg;
685
686 if (debug_level >= DEBUG_LEVEL_INFO)
687 printk("mgslpc_release(0x%p)\n", link);
688
689 pcmcia_disable_device(link);
690 }
691
692 static void mgslpc_detach(struct pcmcia_device *link)
693 {
694 if (debug_level >= DEBUG_LEVEL_INFO)
695 printk("mgslpc_detach(0x%p)\n", link);
696
697 ((MGSLPC_INFO *)link->priv)->stop = 1;
698 mgslpc_release((u_long)link);
699
700 mgslpc_remove_device((MGSLPC_INFO *)link->priv);
701 }
702
703 static int mgslpc_suspend(struct pcmcia_device *link)
704 {
705 MGSLPC_INFO *info = link->priv;
706
707 info->stop = 1;
708
709 return 0;
710 }
711
712 static int mgslpc_resume(struct pcmcia_device *link)
713 {
714 MGSLPC_INFO *info = link->priv;
715
716 info->stop = 0;
717
718 return 0;
719 }
720
721
722 static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
723 char *name, const char *routine)
724 {
725 #ifdef MGSLPC_PARANOIA_CHECK
726 static const char *badmagic =
727 "Warning: bad magic number for mgsl struct (%s) in %s\n";
728 static const char *badinfo =
729 "Warning: null mgslpc_info for (%s) in %s\n";
730
731 if (!info) {
732 printk(badinfo, name, routine);
733 return 1;
734 }
735 if (info->magic != MGSLPC_MAGIC) {
736 printk(badmagic, name, routine);
737 return 1;
738 }
739 #else
740 if (!info)
741 return 1;
742 #endif
743 return 0;
744 }
745
746
747 #define CMD_RXFIFO BIT7 // release current rx FIFO
748 #define CMD_RXRESET BIT6 // receiver reset
749 #define CMD_RXFIFO_READ BIT5
750 #define CMD_START_TIMER BIT4
751 #define CMD_TXFIFO BIT3 // release current tx FIFO
752 #define CMD_TXEOM BIT1 // transmit end message
753 #define CMD_TXRESET BIT0 // transmit reset
754
755 static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
756 {
757 int i = 0;
758 /* wait for command completion */
759 while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
760 udelay(1);
761 if (i++ == 1000)
762 return FALSE;
763 }
764 return TRUE;
765 }
766
767 static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
768 {
769 wait_command_complete(info, channel);
770 write_reg(info, (unsigned char) (channel + CMDR), cmd);
771 }
772
773 static void tx_pause(struct tty_struct *tty)
774 {
775 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
776 unsigned long flags;
777
778 if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
779 return;
780 if (debug_level >= DEBUG_LEVEL_INFO)
781 printk("tx_pause(%s)\n",info->device_name);
782
783 spin_lock_irqsave(&info->lock,flags);
784 if (info->tx_enabled)
785 tx_stop(info);
786 spin_unlock_irqrestore(&info->lock,flags);
787 }
788
789 static void tx_release(struct tty_struct *tty)
790 {
791 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
792 unsigned long flags;
793
794 if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
795 return;
796 if (debug_level >= DEBUG_LEVEL_INFO)
797 printk("tx_release(%s)\n",info->device_name);
798
799 spin_lock_irqsave(&info->lock,flags);
800 if (!info->tx_enabled)
801 tx_start(info);
802 spin_unlock_irqrestore(&info->lock,flags);
803 }
804
805 /* Return next bottom half action to perform.
806 * or 0 if nothing to do.
807 */
808 static int bh_action(MGSLPC_INFO *info)
809 {
810 unsigned long flags;
811 int rc = 0;
812
813 spin_lock_irqsave(&info->lock,flags);
814
815 if (info->pending_bh & BH_RECEIVE) {
816 info->pending_bh &= ~BH_RECEIVE;
817 rc = BH_RECEIVE;
818 } else if (info->pending_bh & BH_TRANSMIT) {
819 info->pending_bh &= ~BH_TRANSMIT;
820 rc = BH_TRANSMIT;
821 } else if (info->pending_bh & BH_STATUS) {
822 info->pending_bh &= ~BH_STATUS;
823 rc = BH_STATUS;
824 }
825
826 if (!rc) {
827 /* Mark BH routine as complete */
828 info->bh_running = 0;
829 info->bh_requested = 0;
830 }
831
832 spin_unlock_irqrestore(&info->lock,flags);
833
834 return rc;
835 }
836
837 static void bh_handler(struct work_struct *work)
838 {
839 MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
840 int action;
841
842 if (!info)
843 return;
844
845 if (debug_level >= DEBUG_LEVEL_BH)
846 printk( "%s(%d):bh_handler(%s) entry\n",
847 __FILE__,__LINE__,info->device_name);
848
849 info->bh_running = 1;
850
851 while((action = bh_action(info)) != 0) {
852
853 /* Process work item */
854 if ( debug_level >= DEBUG_LEVEL_BH )
855 printk( "%s(%d):bh_handler() work item action=%d\n",
856 __FILE__,__LINE__,action);
857
858 switch (action) {
859
860 case BH_RECEIVE:
861 while(rx_get_frame(info));
862 break;
863 case BH_TRANSMIT:
864 bh_transmit(info);
865 break;
866 case BH_STATUS:
867 bh_status(info);
868 break;
869 default:
870 /* unknown work item ID */
871 printk("Unknown work item ID=%08X!\n", action);
872 break;
873 }
874 }
875
876 if (debug_level >= DEBUG_LEVEL_BH)
877 printk( "%s(%d):bh_handler(%s) exit\n",
878 __FILE__,__LINE__,info->device_name);
879 }
880
881 static void bh_transmit(MGSLPC_INFO *info)
882 {
883 struct tty_struct *tty = info->tty;
884 if (debug_level >= DEBUG_LEVEL_BH)
885 printk("bh_transmit() entry on %s\n", info->device_name);
886
887 if (tty)
888 tty_wakeup(tty);
889 }
890
891 static void bh_status(MGSLPC_INFO *info)
892 {
893 info->ri_chkcount = 0;
894 info->dsr_chkcount = 0;
895 info->dcd_chkcount = 0;
896 info->cts_chkcount = 0;
897 }
898
899 /* eom: non-zero = end of frame */
900 static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
901 {
902 unsigned char data[2];
903 unsigned char fifo_count, read_count, i;
904 RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
905
906 if (debug_level >= DEBUG_LEVEL_ISR)
907 printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
908
909 if (!info->rx_enabled)
910 return;
911
912 if (info->rx_frame_count >= info->rx_buf_count) {
913 /* no more free buffers */
914 issue_command(info, CHA, CMD_RXRESET);
915 info->pending_bh |= BH_RECEIVE;
916 info->rx_overflow = 1;
917 info->icount.buf_overrun++;
918 return;
919 }
920
921 if (eom) {
922 /* end of frame, get FIFO count from RBCL register */
923 if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
924 fifo_count = 32;
925 } else
926 fifo_count = 32;
927
928 do {
929 if (fifo_count == 1) {
930 read_count = 1;
931 data[0] = read_reg(info, CHA + RXFIFO);
932 } else {
933 read_count = 2;
934 *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
935 }
936 fifo_count -= read_count;
937 if (!fifo_count && eom)
938 buf->status = data[--read_count];
939
940 for (i = 0; i < read_count; i++) {
941 if (buf->count >= info->max_frame_size) {
942 /* frame too large, reset receiver and reset current buffer */
943 issue_command(info, CHA, CMD_RXRESET);
944 buf->count = 0;
945 return;
946 }
947 *(buf->data + buf->count) = data[i];
948 buf->count++;
949 }
950 } while (fifo_count);
951
952 if (eom) {
953 info->pending_bh |= BH_RECEIVE;
954 info->rx_frame_count++;
955 info->rx_put++;
956 if (info->rx_put >= info->rx_buf_count)
957 info->rx_put = 0;
958 }
959 issue_command(info, CHA, CMD_RXFIFO);
960 }
961
962 static void rx_ready_async(MGSLPC_INFO *info, int tcd)
963 {
964 unsigned char data, status, flag;
965 int fifo_count;
966 int work = 0;
967 struct tty_struct *tty = info->tty;
968 struct mgsl_icount *icount = &info->icount;
969
970 if (tcd) {
971 /* early termination, get FIFO count from RBCL register */
972 fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
973
974 /* Zero fifo count could mean 0 or 32 bytes available.
975 * If BIT5 of STAR is set then at least 1 byte is available.
976 */
977 if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
978 fifo_count = 32;
979 } else
980 fifo_count = 32;
981
982 tty_buffer_request_room(tty, fifo_count);
983 /* Flush received async data to receive data buffer. */
984 while (fifo_count) {
985 data = read_reg(info, CHA + RXFIFO);
986 status = read_reg(info, CHA + RXFIFO);
987 fifo_count -= 2;
988
989 icount->rx++;
990 flag = TTY_NORMAL;
991
992 // if no frameing/crc error then save data
993 // BIT7:parity error
994 // BIT6:framing error
995
996 if (status & (BIT7 + BIT6)) {
997 if (status & BIT7)
998 icount->parity++;
999 else
1000 icount->frame++;
1001
1002 /* discard char if tty control flags say so */
1003 if (status & info->ignore_status_mask)
1004 continue;
1005
1006 status &= info->read_status_mask;
1007
1008 if (status & BIT7)
1009 flag = TTY_PARITY;
1010 else if (status & BIT6)
1011 flag = TTY_FRAME;
1012 }
1013 work += tty_insert_flip_char(tty, data, flag);
1014 }
1015 issue_command(info, CHA, CMD_RXFIFO);
1016
1017 if (debug_level >= DEBUG_LEVEL_ISR) {
1018 printk("%s(%d):rx_ready_async",
1019 __FILE__,__LINE__);
1020 printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
1021 __FILE__,__LINE__,icount->rx,icount->brk,
1022 icount->parity,icount->frame,icount->overrun);
1023 }
1024
1025 if (work)
1026 tty_flip_buffer_push(tty);
1027 }
1028
1029
1030 static void tx_done(MGSLPC_INFO *info)
1031 {
1032 if (!info->tx_active)
1033 return;
1034
1035 info->tx_active = 0;
1036 info->tx_aborting = 0;
1037
1038 if (info->params.mode == MGSL_MODE_ASYNC)
1039 return;
1040
1041 info->tx_count = info->tx_put = info->tx_get = 0;
1042 del_timer(&info->tx_timer);
1043
1044 if (info->drop_rts_on_tx_done) {
1045 get_signals(info);
1046 if (info->serial_signals & SerialSignal_RTS) {
1047 info->serial_signals &= ~SerialSignal_RTS;
1048 set_signals(info);
1049 }
1050 info->drop_rts_on_tx_done = 0;
1051 }
1052
1053 #if SYNCLINK_GENERIC_HDLC
1054 if (info->netcount)
1055 hdlcdev_tx_done(info);
1056 else
1057 #endif
1058 {
1059 if (info->tty->stopped || info->tty->hw_stopped) {
1060 tx_stop(info);
1061 return;
1062 }
1063 info->pending_bh |= BH_TRANSMIT;
1064 }
1065 }
1066
1067 static void tx_ready(MGSLPC_INFO *info)
1068 {
1069 unsigned char fifo_count = 32;
1070 int c;
1071
1072 if (debug_level >= DEBUG_LEVEL_ISR)
1073 printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
1074
1075 if (info->params.mode == MGSL_MODE_HDLC) {
1076 if (!info->tx_active)
1077 return;
1078 } else {
1079 if (info->tty->stopped || info->tty->hw_stopped) {
1080 tx_stop(info);
1081 return;
1082 }
1083 if (!info->tx_count)
1084 info->tx_active = 0;
1085 }
1086
1087 if (!info->tx_count)
1088 return;
1089
1090 while (info->tx_count && fifo_count) {
1091 c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
1092
1093 if (c == 1) {
1094 write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
1095 } else {
1096 write_reg16(info, CHA + TXFIFO,
1097 *((unsigned short*)(info->tx_buf + info->tx_get)));
1098 }
1099 info->tx_count -= c;
1100 info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
1101 fifo_count -= c;
1102 }
1103
1104 if (info->params.mode == MGSL_MODE_ASYNC) {
1105 if (info->tx_count < WAKEUP_CHARS)
1106 info->pending_bh |= BH_TRANSMIT;
1107 issue_command(info, CHA, CMD_TXFIFO);
1108 } else {
1109 if (info->tx_count)
1110 issue_command(info, CHA, CMD_TXFIFO);
1111 else
1112 issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
1113 }
1114 }
1115
1116 static void cts_change(MGSLPC_INFO *info)
1117 {
1118 get_signals(info);
1119 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1120 irq_disable(info, CHB, IRQ_CTS);
1121 info->icount.cts++;
1122 if (info->serial_signals & SerialSignal_CTS)
1123 info->input_signal_events.cts_up++;
1124 else
1125 info->input_signal_events.cts_down++;
1126 wake_up_interruptible(&info->status_event_wait_q);
1127 wake_up_interruptible(&info->event_wait_q);
1128
1129 if (info->flags & ASYNC_CTS_FLOW) {
1130 if (info->tty->hw_stopped) {
1131 if (info->serial_signals & SerialSignal_CTS) {
1132 if (debug_level >= DEBUG_LEVEL_ISR)
1133 printk("CTS tx start...");
1134 if (info->tty)
1135 info->tty->hw_stopped = 0;
1136 tx_start(info);
1137 info->pending_bh |= BH_TRANSMIT;
1138 return;
1139 }
1140 } else {
1141 if (!(info->serial_signals & SerialSignal_CTS)) {
1142 if (debug_level >= DEBUG_LEVEL_ISR)
1143 printk("CTS tx stop...");
1144 if (info->tty)
1145 info->tty->hw_stopped = 1;
1146 tx_stop(info);
1147 }
1148 }
1149 }
1150 info->pending_bh |= BH_STATUS;
1151 }
1152
1153 static void dcd_change(MGSLPC_INFO *info)
1154 {
1155 get_signals(info);
1156 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1157 irq_disable(info, CHB, IRQ_DCD);
1158 info->icount.dcd++;
1159 if (info->serial_signals & SerialSignal_DCD) {
1160 info->input_signal_events.dcd_up++;
1161 }
1162 else
1163 info->input_signal_events.dcd_down++;
1164 #if SYNCLINK_GENERIC_HDLC
1165 if (info->netcount) {
1166 if (info->serial_signals & SerialSignal_DCD)
1167 netif_carrier_on(info->netdev);
1168 else
1169 netif_carrier_off(info->netdev);
1170 }
1171 #endif
1172 wake_up_interruptible(&info->status_event_wait_q);
1173 wake_up_interruptible(&info->event_wait_q);
1174
1175 if (info->flags & ASYNC_CHECK_CD) {
1176 if (debug_level >= DEBUG_LEVEL_ISR)
1177 printk("%s CD now %s...", info->device_name,
1178 (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
1179 if (info->serial_signals & SerialSignal_DCD)
1180 wake_up_interruptible(&info->open_wait);
1181 else {
1182 if (debug_level >= DEBUG_LEVEL_ISR)
1183 printk("doing serial hangup...");
1184 if (info->tty)
1185 tty_hangup(info->tty);
1186 }
1187 }
1188 info->pending_bh |= BH_STATUS;
1189 }
1190
1191 static void dsr_change(MGSLPC_INFO *info)
1192 {
1193 get_signals(info);
1194 if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1195 port_irq_disable(info, PVR_DSR);
1196 info->icount.dsr++;
1197 if (info->serial_signals & SerialSignal_DSR)
1198 info->input_signal_events.dsr_up++;
1199 else
1200 info->input_signal_events.dsr_down++;
1201 wake_up_interruptible(&info->status_event_wait_q);
1202 wake_up_interruptible(&info->event_wait_q);
1203 info->pending_bh |= BH_STATUS;
1204 }
1205
1206 static void ri_change(MGSLPC_INFO *info)
1207 {
1208 get_signals(info);
1209 if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
1210 port_irq_disable(info, PVR_RI);
1211 info->icount.rng++;
1212 if (info->serial_signals & SerialSignal_RI)
1213 info->input_signal_events.ri_up++;
1214 else
1215 info->input_signal_events.ri_down++;
1216 wake_up_interruptible(&info->status_event_wait_q);
1217 wake_up_interruptible(&info->event_wait_q);
1218 info->pending_bh |= BH_STATUS;
1219 }
1220
1221 /* Interrupt service routine entry point.
1222 *
1223 * Arguments:
1224 *
1225 * irq interrupt number that caused interrupt
1226 * dev_id device ID supplied during interrupt registration
1227 */
1228 static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
1229 {
1230 MGSLPC_INFO *info = dev_id;
1231 unsigned short isr;
1232 unsigned char gis, pis;
1233 int count=0;
1234
1235 if (debug_level >= DEBUG_LEVEL_ISR)
1236 printk("mgslpc_isr(%d) entry.\n", info->irq_level);
1237
1238 if (!(info->p_dev->_locked))
1239 return IRQ_HANDLED;
1240
1241 spin_lock(&info->lock);
1242
1243 while ((gis = read_reg(info, CHA + GIS))) {
1244 if (debug_level >= DEBUG_LEVEL_ISR)
1245 printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
1246
1247 if ((gis & 0x70) || count > 1000) {
1248 printk("synclink_cs:hardware failed or ejected\n");
1249 break;
1250 }
1251 count++;
1252
1253 if (gis & (BIT1 + BIT0)) {
1254 isr = read_reg16(info, CHB + ISR);
1255 if (isr & IRQ_DCD)
1256 dcd_change(info);
1257 if (isr & IRQ_CTS)
1258 cts_change(info);
1259 }
1260 if (gis & (BIT3 + BIT2))
1261 {
1262 isr = read_reg16(info, CHA + ISR);
1263 if (isr & IRQ_TIMER) {
1264 info->irq_occurred = 1;
1265 irq_disable(info, CHA, IRQ_TIMER);
1266 }
1267
1268 /* receive IRQs */
1269 if (isr & IRQ_EXITHUNT) {
1270 info->icount.exithunt++;
1271 wake_up_interruptible(&info->event_wait_q);
1272 }
1273 if (isr & IRQ_BREAK_ON) {
1274 info->icount.brk++;
1275 if (info->flags & ASYNC_SAK)
1276 do_SAK(info->tty);
1277 }
1278 if (isr & IRQ_RXTIME) {
1279 issue_command(info, CHA, CMD_RXFIFO_READ);
1280 }
1281 if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
1282 if (info->params.mode == MGSL_MODE_HDLC)
1283 rx_ready_hdlc(info, isr & IRQ_RXEOM);
1284 else
1285 rx_ready_async(info, isr & IRQ_RXEOM);
1286 }
1287
1288 /* transmit IRQs */
1289 if (isr & IRQ_UNDERRUN) {
1290 if (info->tx_aborting)
1291 info->icount.txabort++;
1292 else
1293 info->icount.txunder++;
1294 tx_done(info);
1295 }
1296 else if (isr & IRQ_ALLSENT) {
1297 info->icount.txok++;
1298 tx_done(info);
1299 }
1300 else if (isr & IRQ_TXFIFO)
1301 tx_ready(info);
1302 }
1303 if (gis & BIT7) {
1304 pis = read_reg(info, CHA + PIS);
1305 if (pis & BIT1)
1306 dsr_change(info);
1307 if (pis & BIT2)
1308 ri_change(info);
1309 }
1310 }
1311
1312 /* Request bottom half processing if there's something
1313 * for it to do and the bh is not already running
1314 */
1315
1316 if (info->pending_bh && !info->bh_running && !info->bh_requested) {
1317 if ( debug_level >= DEBUG_LEVEL_ISR )
1318 printk("%s(%d):%s queueing bh task.\n",
1319 __FILE__,__LINE__,info->device_name);
1320 schedule_work(&info->task);
1321 info->bh_requested = 1;
1322 }
1323
1324 spin_unlock(&info->lock);
1325
1326 if (debug_level >= DEBUG_LEVEL_ISR)
1327 printk("%s(%d):mgslpc_isr(%d)exit.\n",
1328 __FILE__, __LINE__, info->irq_level);
1329
1330 return IRQ_HANDLED;
1331 }
1332
1333 /* Initialize and start device.
1334 */
1335 static int startup(MGSLPC_INFO * info)
1336 {
1337 int retval = 0;
1338
1339 if (debug_level >= DEBUG_LEVEL_INFO)
1340 printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
1341
1342 if (info->flags & ASYNC_INITIALIZED)
1343 return 0;
1344
1345 if (!info->tx_buf) {
1346 /* allocate a page of memory for a transmit buffer */
1347 info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
1348 if (!info->tx_buf) {
1349 printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
1350 __FILE__,__LINE__,info->device_name);
1351 return -ENOMEM;
1352 }
1353 }
1354
1355 info->pending_bh = 0;
1356
1357 memset(&info->icount, 0, sizeof(info->icount));
1358
1359 setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
1360
1361 /* Allocate and claim adapter resources */
1362 retval = claim_resources(info);
1363
1364 /* perform existance check and diagnostics */
1365 if ( !retval )
1366 retval = adapter_test(info);
1367
1368 if ( retval ) {
1369 if (capable(CAP_SYS_ADMIN) && info->tty)
1370 set_bit(TTY_IO_ERROR, &info->tty->flags);
1371 release_resources(info);
1372 return retval;
1373 }
1374
1375 /* program hardware for current parameters */
1376 mgslpc_change_params(info);
1377
1378 if (info->tty)
1379 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1380
1381 info->flags |= ASYNC_INITIALIZED;
1382
1383 return 0;
1384 }
1385
1386 /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
1387 */
1388 static void shutdown(MGSLPC_INFO * info)
1389 {
1390 unsigned long flags;
1391
1392 if (!(info->flags & ASYNC_INITIALIZED))
1393 return;
1394
1395 if (debug_level >= DEBUG_LEVEL_INFO)
1396 printk("%s(%d):mgslpc_shutdown(%s)\n",
1397 __FILE__,__LINE__, info->device_name );
1398
1399 /* clear status wait queue because status changes */
1400 /* can't happen after shutting down the hardware */
1401 wake_up_interruptible(&info->status_event_wait_q);
1402 wake_up_interruptible(&info->event_wait_q);
1403
1404 del_timer_sync(&info->tx_timer);
1405
1406 if (info->tx_buf) {
1407 free_page((unsigned long) info->tx_buf);
1408 info->tx_buf = NULL;
1409 }
1410
1411 spin_lock_irqsave(&info->lock,flags);
1412
1413 rx_stop(info);
1414 tx_stop(info);
1415
1416 /* TODO:disable interrupts instead of reset to preserve signal states */
1417 reset_device(info);
1418
1419 if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
1420 info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
1421 set_signals(info);
1422 }
1423
1424 spin_unlock_irqrestore(&info->lock,flags);
1425
1426 release_resources(info);
1427
1428 if (info->tty)
1429 set_bit(TTY_IO_ERROR, &info->tty->flags);
1430
1431 info->flags &= ~ASYNC_INITIALIZED;
1432 }
1433
1434 static void mgslpc_program_hw(MGSLPC_INFO *info)
1435 {
1436 unsigned long flags;
1437
1438 spin_lock_irqsave(&info->lock,flags);
1439
1440 rx_stop(info);
1441 tx_stop(info);
1442 info->tx_count = info->tx_put = info->tx_get = 0;
1443
1444 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
1445 hdlc_mode(info);
1446 else
1447 async_mode(info);
1448
1449 set_signals(info);
1450
1451 info->dcd_chkcount = 0;
1452 info->cts_chkcount = 0;
1453 info->ri_chkcount = 0;
1454 info->dsr_chkcount = 0;
1455
1456 irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
1457 port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
1458 get_signals(info);
1459
1460 if (info->netcount || info->tty->termios->c_cflag & CREAD)
1461 rx_start(info);
1462
1463 spin_unlock_irqrestore(&info->lock,flags);
1464 }
1465
1466 /* Reconfigure adapter based on new parameters
1467 */
1468 static void mgslpc_change_params(MGSLPC_INFO *info)
1469 {
1470 unsigned cflag;
1471 int bits_per_char;
1472
1473 if (!info->tty || !info->tty->termios)
1474 return;
1475
1476 if (debug_level >= DEBUG_LEVEL_INFO)
1477 printk("%s(%d):mgslpc_change_params(%s)\n",
1478 __FILE__,__LINE__, info->device_name );
1479
1480 cflag = info->tty->termios->c_cflag;
1481
1482 /* if B0 rate (hangup) specified then negate DTR and RTS */
1483 /* otherwise assert DTR and RTS */
1484 if (cflag & CBAUD)
1485 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
1486 else
1487 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
1488
1489 /* byte size and parity */
1490
1491 switch (cflag & CSIZE) {
1492 case CS5: info->params.data_bits = 5; break;
1493 case CS6: info->params.data_bits = 6; break;
1494 case CS7: info->params.data_bits = 7; break;
1495 case CS8: info->params.data_bits = 8; break;
1496 default: info->params.data_bits = 7; break;
1497 }
1498
1499 if (cflag & CSTOPB)
1500 info->params.stop_bits = 2;
1501 else
1502 info->params.stop_bits = 1;
1503
1504 info->params.parity = ASYNC_PARITY_NONE;
1505 if (cflag & PARENB) {
1506 if (cflag & PARODD)
1507 info->params.parity = ASYNC_PARITY_ODD;
1508 else
1509 info->params.parity = ASYNC_PARITY_EVEN;
1510 #ifdef CMSPAR
1511 if (cflag & CMSPAR)
1512 info->params.parity = ASYNC_PARITY_SPACE;
1513 #endif
1514 }
1515
1516 /* calculate number of jiffies to transmit a full
1517 * FIFO (32 bytes) at specified data rate
1518 */
1519 bits_per_char = info->params.data_bits +
1520 info->params.stop_bits + 1;
1521
1522 /* if port data rate is set to 460800 or less then
1523 * allow tty settings to override, otherwise keep the
1524 * current data rate.
1525 */
1526 if (info->params.data_rate <= 460800) {
1527 info->params.data_rate = tty_get_baud_rate(info->tty);
1528 }
1529
1530 if ( info->params.data_rate ) {
1531 info->timeout = (32*HZ*bits_per_char) /
1532 info->params.data_rate;
1533 }
1534 info->timeout += HZ/50; /* Add .02 seconds of slop */
1535
1536 if (cflag & CRTSCTS)
1537 info->flags |= ASYNC_CTS_FLOW;
1538 else
1539 info->flags &= ~ASYNC_CTS_FLOW;
1540
1541 if (cflag & CLOCAL)
1542 info->flags &= ~ASYNC_CHECK_CD;
1543 else
1544 info->flags |= ASYNC_CHECK_CD;
1545
1546 /* process tty input control flags */
1547
1548 info->read_status_mask = 0;
1549 if (I_INPCK(info->tty))
1550 info->read_status_mask |= BIT7 | BIT6;
1551 if (I_IGNPAR(info->tty))
1552 info->ignore_status_mask |= BIT7 | BIT6;
1553
1554 mgslpc_program_hw(info);
1555 }
1556
1557 /* Add a character to the transmit buffer
1558 */
1559 static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
1560 {
1561 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1562 unsigned long flags;
1563
1564 if (debug_level >= DEBUG_LEVEL_INFO) {
1565 printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
1566 __FILE__,__LINE__,ch,info->device_name);
1567 }
1568
1569 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
1570 return;
1571
1572 if (!info->tx_buf)
1573 return;
1574
1575 spin_lock_irqsave(&info->lock,flags);
1576
1577 if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
1578 if (info->tx_count < TXBUFSIZE - 1) {
1579 info->tx_buf[info->tx_put++] = ch;
1580 info->tx_put &= TXBUFSIZE-1;
1581 info->tx_count++;
1582 }
1583 }
1584
1585 spin_unlock_irqrestore(&info->lock,flags);
1586 }
1587
1588 /* Enable transmitter so remaining characters in the
1589 * transmit buffer are sent.
1590 */
1591 static void mgslpc_flush_chars(struct tty_struct *tty)
1592 {
1593 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1594 unsigned long flags;
1595
1596 if (debug_level >= DEBUG_LEVEL_INFO)
1597 printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
1598 __FILE__,__LINE__,info->device_name,info->tx_count);
1599
1600 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
1601 return;
1602
1603 if (info->tx_count <= 0 || tty->stopped ||
1604 tty->hw_stopped || !info->tx_buf)
1605 return;
1606
1607 if (debug_level >= DEBUG_LEVEL_INFO)
1608 printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
1609 __FILE__,__LINE__,info->device_name);
1610
1611 spin_lock_irqsave(&info->lock,flags);
1612 if (!info->tx_active)
1613 tx_start(info);
1614 spin_unlock_irqrestore(&info->lock,flags);
1615 }
1616
1617 /* Send a block of data
1618 *
1619 * Arguments:
1620 *
1621 * tty pointer to tty information structure
1622 * buf pointer to buffer containing send data
1623 * count size of send data in bytes
1624 *
1625 * Returns: number of characters written
1626 */
1627 static int mgslpc_write(struct tty_struct * tty,
1628 const unsigned char *buf, int count)
1629 {
1630 int c, ret = 0;
1631 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1632 unsigned long flags;
1633
1634 if (debug_level >= DEBUG_LEVEL_INFO)
1635 printk( "%s(%d):mgslpc_write(%s) count=%d\n",
1636 __FILE__,__LINE__,info->device_name,count);
1637
1638 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
1639 !info->tx_buf)
1640 goto cleanup;
1641
1642 if (info->params.mode == MGSL_MODE_HDLC) {
1643 if (count > TXBUFSIZE) {
1644 ret = -EIO;
1645 goto cleanup;
1646 }
1647 if (info->tx_active)
1648 goto cleanup;
1649 else if (info->tx_count)
1650 goto start;
1651 }
1652
1653 for (;;) {
1654 c = min(count,
1655 min(TXBUFSIZE - info->tx_count - 1,
1656 TXBUFSIZE - info->tx_put));
1657 if (c <= 0)
1658 break;
1659
1660 memcpy(info->tx_buf + info->tx_put, buf, c);
1661
1662 spin_lock_irqsave(&info->lock,flags);
1663 info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
1664 info->tx_count += c;
1665 spin_unlock_irqrestore(&info->lock,flags);
1666
1667 buf += c;
1668 count -= c;
1669 ret += c;
1670 }
1671 start:
1672 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
1673 spin_lock_irqsave(&info->lock,flags);
1674 if (!info->tx_active)
1675 tx_start(info);
1676 spin_unlock_irqrestore(&info->lock,flags);
1677 }
1678 cleanup:
1679 if (debug_level >= DEBUG_LEVEL_INFO)
1680 printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
1681 __FILE__,__LINE__,info->device_name,ret);
1682 return ret;
1683 }
1684
1685 /* Return the count of free bytes in transmit buffer
1686 */
1687 static int mgslpc_write_room(struct tty_struct *tty)
1688 {
1689 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1690 int ret;
1691
1692 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
1693 return 0;
1694
1695 if (info->params.mode == MGSL_MODE_HDLC) {
1696 /* HDLC (frame oriented) mode */
1697 if (info->tx_active)
1698 return 0;
1699 else
1700 return HDLC_MAX_FRAME_SIZE;
1701 } else {
1702 ret = TXBUFSIZE - info->tx_count - 1;
1703 if (ret < 0)
1704 ret = 0;
1705 }
1706
1707 if (debug_level >= DEBUG_LEVEL_INFO)
1708 printk("%s(%d):mgslpc_write_room(%s)=%d\n",
1709 __FILE__,__LINE__, info->device_name, ret);
1710 return ret;
1711 }
1712
1713 /* Return the count of bytes in transmit buffer
1714 */
1715 static int mgslpc_chars_in_buffer(struct tty_struct *tty)
1716 {
1717 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1718 int rc;
1719
1720 if (debug_level >= DEBUG_LEVEL_INFO)
1721 printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
1722 __FILE__,__LINE__, info->device_name );
1723
1724 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
1725 return 0;
1726
1727 if (info->params.mode == MGSL_MODE_HDLC)
1728 rc = info->tx_active ? info->max_frame_size : 0;
1729 else
1730 rc = info->tx_count;
1731
1732 if (debug_level >= DEBUG_LEVEL_INFO)
1733 printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
1734 __FILE__,__LINE__, info->device_name, rc);
1735
1736 return rc;
1737 }
1738
1739 /* Discard all data in the send buffer
1740 */
1741 static void mgslpc_flush_buffer(struct tty_struct *tty)
1742 {
1743 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1744 unsigned long flags;
1745
1746 if (debug_level >= DEBUG_LEVEL_INFO)
1747 printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
1748 __FILE__,__LINE__, info->device_name );
1749
1750 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
1751 return;
1752
1753 spin_lock_irqsave(&info->lock,flags);
1754 info->tx_count = info->tx_put = info->tx_get = 0;
1755 del_timer(&info->tx_timer);
1756 spin_unlock_irqrestore(&info->lock,flags);
1757
1758 wake_up_interruptible(&tty->write_wait);
1759 tty_wakeup(tty);
1760 }
1761
1762 /* Send a high-priority XON/XOFF character
1763 */
1764 static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
1765 {
1766 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1767 unsigned long flags;
1768
1769 if (debug_level >= DEBUG_LEVEL_INFO)
1770 printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
1771 __FILE__,__LINE__, info->device_name, ch );
1772
1773 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
1774 return;
1775
1776 info->x_char = ch;
1777 if (ch) {
1778 spin_lock_irqsave(&info->lock,flags);
1779 if (!info->tx_enabled)
1780 tx_start(info);
1781 spin_unlock_irqrestore(&info->lock,flags);
1782 }
1783 }
1784
1785 /* Signal remote device to throttle send data (our receive data)
1786 */
1787 static void mgslpc_throttle(struct tty_struct * tty)
1788 {
1789 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1790 unsigned long flags;
1791
1792 if (debug_level >= DEBUG_LEVEL_INFO)
1793 printk("%s(%d):mgslpc_throttle(%s) entry\n",
1794 __FILE__,__LINE__, info->device_name );
1795
1796 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
1797 return;
1798
1799 if (I_IXOFF(tty))
1800 mgslpc_send_xchar(tty, STOP_CHAR(tty));
1801
1802 if (tty->termios->c_cflag & CRTSCTS) {
1803 spin_lock_irqsave(&info->lock,flags);
1804 info->serial_signals &= ~SerialSignal_RTS;
1805 set_signals(info);
1806 spin_unlock_irqrestore(&info->lock,flags);
1807 }
1808 }
1809
1810 /* Signal remote device to stop throttling send data (our receive data)
1811 */
1812 static void mgslpc_unthrottle(struct tty_struct * tty)
1813 {
1814 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
1815 unsigned long flags;
1816
1817 if (debug_level >= DEBUG_LEVEL_INFO)
1818 printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
1819 __FILE__,__LINE__, info->device_name );
1820
1821 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
1822 return;
1823
1824 if (I_IXOFF(tty)) {
1825 if (info->x_char)
1826 info->x_char = 0;
1827 else
1828 mgslpc_send_xchar(tty, START_CHAR(tty));
1829 }
1830
1831 if (tty->termios->c_cflag & CRTSCTS) {
1832 spin_lock_irqsave(&info->lock,flags);
1833 info->serial_signals |= SerialSignal_RTS;
1834 set_signals(info);
1835 spin_unlock_irqrestore(&info->lock,flags);
1836 }
1837 }
1838
1839 /* get the current serial statistics
1840 */
1841 static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
1842 {
1843 int err;
1844 if (debug_level >= DEBUG_LEVEL_INFO)
1845 printk("get_params(%s)\n", info->device_name);
1846 if (!user_icount) {
1847 memset(&info->icount, 0, sizeof(info->icount));
1848 } else {
1849 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
1850 if (err)
1851 return -EFAULT;
1852 }
1853 return 0;
1854 }
1855
1856 /* get the current serial parameters
1857 */
1858 static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
1859 {
1860 int err;
1861 if (debug_level >= DEBUG_LEVEL_INFO)
1862 printk("get_params(%s)\n", info->device_name);
1863 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
1864 if (err)
1865 return -EFAULT;
1866 return 0;
1867 }
1868
1869 /* set the serial parameters
1870 *
1871 * Arguments:
1872 *
1873 * info pointer to device instance data
1874 * new_params user buffer containing new serial params
1875 *
1876 * Returns: 0 if success, otherwise error code
1877 */
1878 static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
1879 {
1880 unsigned long flags;
1881 MGSL_PARAMS tmp_params;
1882 int err;
1883
1884 if (debug_level >= DEBUG_LEVEL_INFO)
1885 printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
1886 info->device_name );
1887 COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
1888 if (err) {
1889 if ( debug_level >= DEBUG_LEVEL_INFO )
1890 printk( "%s(%d):set_params(%s) user buffer copy failed\n",
1891 __FILE__,__LINE__,info->device_name);
1892 return -EFAULT;
1893 }
1894
1895 spin_lock_irqsave(&info->lock,flags);
1896 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
1897 spin_unlock_irqrestore(&info->lock,flags);
1898
1899 mgslpc_change_params(info);
1900
1901 return 0;
1902 }
1903
1904 static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
1905 {
1906 int err;
1907 if (debug_level >= DEBUG_LEVEL_INFO)
1908 printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
1909 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
1910 if (err)
1911 return -EFAULT;
1912 return 0;
1913 }
1914
1915 static int set_txidle(MGSLPC_INFO * info, int idle_mode)
1916 {
1917 unsigned long flags;
1918 if (debug_level >= DEBUG_LEVEL_INFO)
1919 printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
1920 spin_lock_irqsave(&info->lock,flags);
1921 info->idle_mode = idle_mode;
1922 tx_set_idle(info);
1923 spin_unlock_irqrestore(&info->lock,flags);
1924 return 0;
1925 }
1926
1927 static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
1928 {
1929 int err;
1930 if (debug_level >= DEBUG_LEVEL_INFO)
1931 printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
1932 COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
1933 if (err)
1934 return -EFAULT;
1935 return 0;
1936 }
1937
1938 static int set_interface(MGSLPC_INFO * info, int if_mode)
1939 {
1940 unsigned long flags;
1941 unsigned char val;
1942 if (debug_level >= DEBUG_LEVEL_INFO)
1943 printk("set_interface(%s,%d)\n", info->device_name, if_mode);
1944 spin_lock_irqsave(&info->lock,flags);
1945 info->if_mode = if_mode;
1946
1947 val = read_reg(info, PVR) & 0x0f;
1948 switch (info->if_mode)
1949 {
1950 case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
1951 case MGSL_INTERFACE_V35: val |= PVR_V35; break;
1952 case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
1953 }
1954 write_reg(info, PVR, val);
1955
1956 spin_unlock_irqrestore(&info->lock,flags);
1957 return 0;
1958 }
1959
1960 static int set_txenable(MGSLPC_INFO * info, int enable)
1961 {
1962 unsigned long flags;
1963
1964 if (debug_level >= DEBUG_LEVEL_INFO)
1965 printk("set_txenable(%s,%d)\n", info->device_name, enable);
1966
1967 spin_lock_irqsave(&info->lock,flags);
1968 if (enable) {
1969 if (!info->tx_enabled)
1970 tx_start(info);
1971 } else {
1972 if (info->tx_enabled)
1973 tx_stop(info);
1974 }
1975 spin_unlock_irqrestore(&info->lock,flags);
1976 return 0;
1977 }
1978
1979 static int tx_abort(MGSLPC_INFO * info)
1980 {
1981 unsigned long flags;
1982
1983 if (debug_level >= DEBUG_LEVEL_INFO)
1984 printk("tx_abort(%s)\n", info->device_name);
1985
1986 spin_lock_irqsave(&info->lock,flags);
1987 if (info->tx_active && info->tx_count &&
1988 info->params.mode == MGSL_MODE_HDLC) {
1989 /* clear data count so FIFO is not filled on next IRQ.
1990 * This results in underrun and abort transmission.
1991 */
1992 info->tx_count = info->tx_put = info->tx_get = 0;
1993 info->tx_aborting = TRUE;
1994 }
1995 spin_unlock_irqrestore(&info->lock,flags);
1996 return 0;
1997 }
1998
1999 static int set_rxenable(MGSLPC_INFO * info, int enable)
2000 {
2001 unsigned long flags;
2002
2003 if (debug_level >= DEBUG_LEVEL_INFO)
2004 printk("set_rxenable(%s,%d)\n", info->device_name, enable);
2005
2006 spin_lock_irqsave(&info->lock,flags);
2007 if (enable) {
2008 if (!info->rx_enabled)
2009 rx_start(info);
2010 } else {
2011 if (info->rx_enabled)
2012 rx_stop(info);
2013 }
2014 spin_unlock_irqrestore(&info->lock,flags);
2015 return 0;
2016 }
2017
2018 /* wait for specified event to occur
2019 *
2020 * Arguments: info pointer to device instance data
2021 * mask pointer to bitmask of events to wait for
2022 * Return Value: 0 if successful and bit mask updated with
2023 * of events triggerred,
2024 * otherwise error code
2025 */
2026 static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
2027 {
2028 unsigned long flags;
2029 int s;
2030 int rc=0;
2031 struct mgsl_icount cprev, cnow;
2032 int events;
2033 int mask;
2034 struct _input_signal_events oldsigs, newsigs;
2035 DECLARE_WAITQUEUE(wait, current);
2036
2037 COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
2038 if (rc)
2039 return -EFAULT;
2040
2041 if (debug_level >= DEBUG_LEVEL_INFO)
2042 printk("wait_events(%s,%d)\n", info->device_name, mask);
2043
2044 spin_lock_irqsave(&info->lock,flags);
2045
2046 /* return immediately if state matches requested events */
2047 get_signals(info);
2048 s = info->serial_signals;
2049 events = mask &
2050 ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
2051 ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
2052 ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
2053 ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
2054 if (events) {
2055 spin_unlock_irqrestore(&info->lock,flags);
2056 goto exit;
2057 }
2058
2059 /* save current irq counts */
2060 cprev = info->icount;
2061 oldsigs = info->input_signal_events;
2062
2063 if ((info->params.mode == MGSL_MODE_HDLC) &&
2064 (mask & MgslEvent_ExitHuntMode))
2065 irq_enable(info, CHA, IRQ_EXITHUNT);
2066
2067 set_current_state(TASK_INTERRUPTIBLE);
2068 add_wait_queue(&info->event_wait_q, &wait);
2069
2070 spin_unlock_irqrestore(&info->lock,flags);
2071
2072
2073 for(;;) {
2074 schedule();
2075 if (signal_pending(current)) {
2076 rc = -ERESTARTSYS;
2077 break;
2078 }
2079
2080 /* get current irq counts */
2081 spin_lock_irqsave(&info->lock,flags);
2082 cnow = info->icount;
2083 newsigs = info->input_signal_events;
2084 set_current_state(TASK_INTERRUPTIBLE);
2085 spin_unlock_irqrestore(&info->lock,flags);
2086
2087 /* if no change, wait aborted for some reason */
2088 if (newsigs.dsr_up == oldsigs.dsr_up &&
2089 newsigs.dsr_down == oldsigs.dsr_down &&
2090 newsigs.dcd_up == oldsigs.dcd_up &&
2091 newsigs.dcd_down == oldsigs.dcd_down &&
2092 newsigs.cts_up == oldsigs.cts_up &&
2093 newsigs.cts_down == oldsigs.cts_down &&
2094 newsigs.ri_up == oldsigs.ri_up &&
2095 newsigs.ri_down == oldsigs.ri_down &&
2096 cnow.exithunt == cprev.exithunt &&
2097 cnow.rxidle == cprev.rxidle) {
2098 rc = -EIO;
2099 break;
2100 }
2101
2102 events = mask &
2103 ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
2104 (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
2105 (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
2106 (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
2107 (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
2108 (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
2109 (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
2110 (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
2111 (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
2112 (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
2113 if (events)
2114 break;
2115
2116 cprev = cnow;
2117 oldsigs = newsigs;
2118 }
2119
2120 remove_wait_queue(&info->event_wait_q, &wait);
2121 set_current_state(TASK_RUNNING);
2122
2123 if (mask & MgslEvent_ExitHuntMode) {
2124 spin_lock_irqsave(&info->lock,flags);
2125 if (!waitqueue_active(&info->event_wait_q))
2126 irq_disable(info, CHA, IRQ_EXITHUNT);
2127 spin_unlock_irqrestore(&info->lock,flags);
2128 }
2129 exit:
2130 if (rc == 0)
2131 PUT_USER(rc, events, mask_ptr);
2132 return rc;
2133 }
2134
2135 static int modem_input_wait(MGSLPC_INFO *info,int arg)
2136 {
2137 unsigned long flags;
2138 int rc;
2139 struct mgsl_icount cprev, cnow;
2140 DECLARE_WAITQUEUE(wait, current);
2141
2142 /* save current irq counts */
2143 spin_lock_irqsave(&info->lock,flags);
2144 cprev = info->icount;
2145 add_wait_queue(&info->status_event_wait_q, &wait);
2146 set_current_state(TASK_INTERRUPTIBLE);
2147 spin_unlock_irqrestore(&info->lock,flags);
2148
2149 for(;;) {
2150 schedule();
2151 if (signal_pending(current)) {
2152 rc = -ERESTARTSYS;
2153 break;
2154 }
2155
2156 /* get new irq counts */
2157 spin_lock_irqsave(&info->lock,flags);
2158 cnow = info->icount;
2159 set_current_state(TASK_INTERRUPTIBLE);
2160 spin_unlock_irqrestore(&info->lock,flags);
2161
2162 /* if no change, wait aborted for some reason */
2163 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
2164 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
2165 rc = -EIO;
2166 break;
2167 }
2168
2169 /* check for change in caller specified modem input */
2170 if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
2171 (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
2172 (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
2173 (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
2174 rc = 0;
2175 break;
2176 }
2177
2178 cprev = cnow;
2179 }
2180 remove_wait_queue(&info->status_event_wait_q, &wait);
2181 set_current_state(TASK_RUNNING);
2182 return rc;
2183 }
2184
2185 /* return the state of the serial control and status signals
2186 */
2187 static int tiocmget(struct tty_struct *tty, struct file *file)
2188 {
2189 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2190 unsigned int result;
2191 unsigned long flags;
2192
2193 spin_lock_irqsave(&info->lock,flags);
2194 get_signals(info);
2195 spin_unlock_irqrestore(&info->lock,flags);
2196
2197 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
2198 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
2199 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
2200 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
2201 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
2202 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
2203
2204 if (debug_level >= DEBUG_LEVEL_INFO)
2205 printk("%s(%d):%s tiocmget() value=%08X\n",
2206 __FILE__,__LINE__, info->device_name, result );
2207 return result;
2208 }
2209
2210 /* set modem control signals (DTR/RTS)
2211 */
2212 static int tiocmset(struct tty_struct *tty, struct file *file,
2213 unsigned int set, unsigned int clear)
2214 {
2215 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2216 unsigned long flags;
2217
2218 if (debug_level >= DEBUG_LEVEL_INFO)
2219 printk("%s(%d):%s tiocmset(%x,%x)\n",
2220 __FILE__,__LINE__,info->device_name, set, clear);
2221
2222 if (set & TIOCM_RTS)
2223 info->serial_signals |= SerialSignal_RTS;
2224 if (set & TIOCM_DTR)
2225 info->serial_signals |= SerialSignal_DTR;
2226 if (clear & TIOCM_RTS)
2227 info->serial_signals &= ~SerialSignal_RTS;
2228 if (clear & TIOCM_DTR)
2229 info->serial_signals &= ~SerialSignal_DTR;
2230
2231 spin_lock_irqsave(&info->lock,flags);
2232 set_signals(info);
2233 spin_unlock_irqrestore(&info->lock,flags);
2234
2235 return 0;
2236 }
2237
2238 /* Set or clear transmit break condition
2239 *
2240 * Arguments: tty pointer to tty instance data
2241 * break_state -1=set break condition, 0=clear
2242 */
2243 static void mgslpc_break(struct tty_struct *tty, int break_state)
2244 {
2245 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2246 unsigned long flags;
2247
2248 if (debug_level >= DEBUG_LEVEL_INFO)
2249 printk("%s(%d):mgslpc_break(%s,%d)\n",
2250 __FILE__,__LINE__, info->device_name, break_state);
2251
2252 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
2253 return;
2254
2255 spin_lock_irqsave(&info->lock,flags);
2256 if (break_state == -1)
2257 set_reg_bits(info, CHA+DAFO, BIT6);
2258 else
2259 clear_reg_bits(info, CHA+DAFO, BIT6);
2260 spin_unlock_irqrestore(&info->lock,flags);
2261 }
2262
2263 /* Service an IOCTL request
2264 *
2265 * Arguments:
2266 *
2267 * tty pointer to tty instance data
2268 * file pointer to associated file object for device
2269 * cmd IOCTL command code
2270 * arg command argument/context
2271 *
2272 * Return Value: 0 if success, otherwise error code
2273 */
2274 static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
2275 unsigned int cmd, unsigned long arg)
2276 {
2277 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2278
2279 if (debug_level >= DEBUG_LEVEL_INFO)
2280 printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
2281 info->device_name, cmd );
2282
2283 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
2284 return -ENODEV;
2285
2286 if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
2287 (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
2288 if (tty->flags & (1 << TTY_IO_ERROR))
2289 return -EIO;
2290 }
2291
2292 return ioctl_common(info, cmd, arg);
2293 }
2294
2295 static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
2296 {
2297 int error;
2298 struct mgsl_icount cnow; /* kernel counter temps */
2299 struct serial_icounter_struct __user *p_cuser; /* user space */
2300 void __user *argp = (void __user *)arg;
2301 unsigned long flags;
2302
2303 switch (cmd) {
2304 case MGSL_IOCGPARAMS:
2305 return get_params(info, argp);
2306 case MGSL_IOCSPARAMS:
2307 return set_params(info, argp);
2308 case MGSL_IOCGTXIDLE:
2309 return get_txidle(info, argp);
2310 case MGSL_IOCSTXIDLE:
2311 return set_txidle(info, (int)arg);
2312 case MGSL_IOCGIF:
2313 return get_interface(info, argp);
2314 case MGSL_IOCSIF:
2315 return set_interface(info,(int)arg);
2316 case MGSL_IOCTXENABLE:
2317 return set_txenable(info,(int)arg);
2318 case MGSL_IOCRXENABLE:
2319 return set_rxenable(info,(int)arg);
2320 case MGSL_IOCTXABORT:
2321 return tx_abort(info);
2322 case MGSL_IOCGSTATS:
2323 return get_stats(info, argp);
2324 case MGSL_IOCWAITEVENT:
2325 return wait_events(info, argp);
2326 case TIOCMIWAIT:
2327 return modem_input_wait(info,(int)arg);
2328 case TIOCGICOUNT:
2329 spin_lock_irqsave(&info->lock,flags);
2330 cnow = info->icount;
2331 spin_unlock_irqrestore(&info->lock,flags);
2332 p_cuser = argp;
2333 PUT_USER(error,cnow.cts, &p_cuser->cts);
2334 if (error) return error;
2335 PUT_USER(error,cnow.dsr, &p_cuser->dsr);
2336 if (error) return error;
2337 PUT_USER(error,cnow.rng, &p_cuser->rng);
2338 if (error) return error;
2339 PUT_USER(error,cnow.dcd, &p_cuser->dcd);
2340 if (error) return error;
2341 PUT_USER(error,cnow.rx, &p_cuser->rx);
2342 if (error) return error;
2343 PUT_USER(error,cnow.tx, &p_cuser->tx);
2344 if (error) return error;
2345 PUT_USER(error,cnow.frame, &p_cuser->frame);
2346 if (error) return error;
2347 PUT_USER(error,cnow.overrun, &p_cuser->overrun);
2348 if (error) return error;
2349 PUT_USER(error,cnow.parity, &p_cuser->parity);
2350 if (error) return error;
2351 PUT_USER(error,cnow.brk, &p_cuser->brk);
2352 if (error) return error;
2353 PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
2354 if (error) return error;
2355 return 0;
2356 default:
2357 return -ENOIOCTLCMD;
2358 }
2359 return 0;
2360 }
2361
2362 /* Set new termios settings
2363 *
2364 * Arguments:
2365 *
2366 * tty pointer to tty structure
2367 * termios pointer to buffer to hold returned old termios
2368 */
2369 static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2370 {
2371 MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
2372 unsigned long flags;
2373
2374 if (debug_level >= DEBUG_LEVEL_INFO)
2375 printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
2376 tty->driver->name );
2377
2378 /* just return if nothing has changed */
2379 if ((tty->termios->c_cflag == old_termios->c_cflag)
2380 && (RELEVANT_IFLAG(tty->termios->c_iflag)
2381 == RELEVANT_IFLAG(old_termios->c_iflag)))
2382 return;
2383
2384 mgslpc_change_params(info);
2385
2386 /* Handle transition to B0 status */
2387 if (old_termios->c_cflag & CBAUD &&
2388 !(tty->termios->c_cflag & CBAUD)) {
2389 info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
2390 spin_lock_irqsave(&info->lock,flags);
2391 set_signals(info);
2392 spin_unlock_irqrestore(&info->lock,flags);
2393 }
2394
2395 /* Handle transition away from B0 status */
2396 if (!(old_termios->c_cflag & CBAUD) &&
2397 tty->termios->c_cflag & CBAUD) {
2398 info->serial_signals |= SerialSignal_DTR;
2399 if (!(tty->termios->c_cflag & CRTSCTS) ||
2400 !test_bit(TTY_THROTTLED, &tty->flags)) {
2401 info->serial_signals |= SerialSignal_RTS;
2402 }
2403 spin_lock_irqsave(&info->lock,flags);
2404 set_signals(info);
2405 spin_unlock_irqrestore(&info->lock,flags);
2406 }
2407
2408 /* Handle turning off CRTSCTS */
2409 if (old_termios->c_cflag & CRTSCTS &&
2410 !(tty->termios->c_cflag & CRTSCTS)) {
2411 tty->hw_stopped = 0;
2412 tx_release(tty);
2413 }
2414 }
2415
2416 static void mgslpc_close(struct tty_struct *tty, struct file * filp)
2417 {
2418 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2419
2420 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
2421 return;
2422
2423 if (debug_level >= DEBUG_LEVEL_INFO)
2424 printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
2425 __FILE__,__LINE__, info->device_name, info->count);
2426
2427 if (!info->count)
2428 return;
2429
2430 if (tty_hung_up_p(filp))
2431 goto cleanup;
2432
2433 if ((tty->count == 1) && (info->count != 1)) {
2434 /*
2435 * tty->count is 1 and the tty structure will be freed.
2436 * info->count should be one in this case.
2437 * if it's not, correct it so that the port is shutdown.
2438 */
2439 printk("mgslpc_close: bad refcount; tty->count is 1, "
2440 "info->count is %d\n", info->count);
2441 info->count = 1;
2442 }
2443
2444 info->count--;
2445
2446 /* if at least one open remaining, leave hardware active */
2447 if (info->count)
2448 goto cleanup;
2449
2450 info->flags |= ASYNC_CLOSING;
2451
2452 /* set tty->closing to notify line discipline to
2453 * only process XON/XOFF characters. Only the N_TTY
2454 * discipline appears to use this (ppp does not).
2455 */
2456 tty->closing = 1;
2457
2458 /* wait for transmit data to clear all layers */
2459
2460 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
2461 if (debug_level >= DEBUG_LEVEL_INFO)
2462 printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
2463 __FILE__,__LINE__, info->device_name );
2464 tty_wait_until_sent(tty, info->closing_wait);
2465 }
2466
2467 if (info->flags & ASYNC_INITIALIZED)
2468 mgslpc_wait_until_sent(tty, info->timeout);
2469
2470 if (tty->driver->flush_buffer)
2471 tty->driver->flush_buffer(tty);
2472
2473 ldisc_flush_buffer(tty);
2474
2475 shutdown(info);
2476
2477 tty->closing = 0;
2478 info->tty = NULL;
2479
2480 if (info->blocked_open) {
2481 if (info->close_delay) {
2482 msleep_interruptible(jiffies_to_msecs(info->close_delay));
2483 }
2484 wake_up_interruptible(&info->open_wait);
2485 }
2486
2487 info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
2488
2489 wake_up_interruptible(&info->close_wait);
2490
2491 cleanup:
2492 if (debug_level >= DEBUG_LEVEL_INFO)
2493 printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
2494 tty->driver->name, info->count);
2495 }
2496
2497 /* Wait until the transmitter is empty.
2498 */
2499 static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
2500 {
2501 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2502 unsigned long orig_jiffies, char_time;
2503
2504 if (!info )
2505 return;
2506
2507 if (debug_level >= DEBUG_LEVEL_INFO)
2508 printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
2509 __FILE__,__LINE__, info->device_name );
2510
2511 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
2512 return;
2513
2514 if (!(info->flags & ASYNC_INITIALIZED))
2515 goto exit;
2516
2517 orig_jiffies = jiffies;
2518
2519 /* Set check interval to 1/5 of estimated time to
2520 * send a character, and make it at least 1. The check
2521 * interval should also be less than the timeout.
2522 * Note: use tight timings here to satisfy the NIST-PCTS.
2523 */
2524
2525 if ( info->params.data_rate ) {
2526 char_time = info->timeout/(32 * 5);
2527 if (!char_time)
2528 char_time++;
2529 } else
2530 char_time = 1;
2531
2532 if (timeout)
2533 char_time = min_t(unsigned long, char_time, timeout);
2534
2535 if (info->params.mode == MGSL_MODE_HDLC) {
2536 while (info->tx_active) {
2537 msleep_interruptible(jiffies_to_msecs(char_time));
2538 if (signal_pending(current))
2539 break;
2540 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2541 break;
2542 }
2543 } else {
2544 while ((info->tx_count || info->tx_active) &&
2545 info->tx_enabled) {
2546 msleep_interruptible(jiffies_to_msecs(char_time));
2547 if (signal_pending(current))
2548 break;
2549 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2550 break;
2551 }
2552 }
2553
2554 exit:
2555 if (debug_level >= DEBUG_LEVEL_INFO)
2556 printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
2557 __FILE__,__LINE__, info->device_name );
2558 }
2559
2560 /* Called by tty_hangup() when a hangup is signaled.
2561 * This is the same as closing all open files for the port.
2562 */
2563 static void mgslpc_hangup(struct tty_struct *tty)
2564 {
2565 MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
2566
2567 if (debug_level >= DEBUG_LEVEL_INFO)
2568 printk("%s(%d):mgslpc_hangup(%s)\n",
2569 __FILE__,__LINE__, info->device_name );
2570
2571 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
2572 return;
2573
2574 mgslpc_flush_buffer(tty);
2575 shutdown(info);
2576
2577 info->count = 0;
2578 info->flags &= ~ASYNC_NORMAL_ACTIVE;
2579 info->tty = NULL;
2580
2581 wake_up_interruptible(&info->open_wait);
2582 }
2583
2584 /* Block the current process until the specified port
2585 * is ready to be opened.
2586 */
2587 static int block_til_ready(struct tty_struct *tty, struct file *filp,
2588 MGSLPC_INFO *info)
2589 {
2590 DECLARE_WAITQUEUE(wait, current);
2591 int retval;
2592 int do_clocal = 0, extra_count = 0;
2593 unsigned long flags;
2594
2595 if (debug_level >= DEBUG_LEVEL_INFO)
2596 printk("%s(%d):block_til_ready on %s\n",
2597 __FILE__,__LINE__, tty->driver->name );
2598
2599 if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
2600 /* nonblock mode is set or port is not enabled */
2601 /* just verify that callout device is not active */
2602 info->flags |= ASYNC_NORMAL_ACTIVE;
2603 return 0;
2604 }
2605
2606 if (tty->termios->c_cflag & CLOCAL)
2607 do_clocal = 1;
2608
2609 /* Wait for carrier detect and the line to become
2610 * free (i.e., not in use by the callout). While we are in
2611 * this loop, info->count is dropped by one, so that
2612 * mgslpc_close() knows when to free things. We restore it upon
2613 * exit, either normal or abnormal.
2614 */
2615
2616 retval = 0;
2617 add_wait_queue(&info->open_wait, &wait);
2618
2619 if (debug_level >= DEBUG_LEVEL_INFO)
2620 printk("%s(%d):block_til_ready before block on %s count=%d\n",
2621 __FILE__,__LINE__, tty->driver->name, info->count );
2622
2623 spin_lock_irqsave(&info->lock, flags);
2624 if (!tty_hung_up_p(filp)) {
2625 extra_count = 1;
2626 info->count--;
2627 }
2628 spin_unlock_irqrestore(&info->lock, flags);
2629 info->blocked_open++;
2630
2631 while (1) {
2632 if ((tty->termios->c_cflag & CBAUD)) {
2633 spin_lock_irqsave(&info->lock,flags);
2634 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
2635 set_signals(info);
2636 spin_unlock_irqrestore(&info->lock,flags);
2637 }
2638
2639 set_current_state(TASK_INTERRUPTIBLE);
2640
2641 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
2642 retval = (info->flags & ASYNC_HUP_NOTIFY) ?
2643 -EAGAIN : -ERESTARTSYS;
2644 break;
2645 }
2646
2647 spin_lock_irqsave(&info->lock,flags);
2648 get_signals(info);
2649 spin_unlock_irqrestore(&info->lock,flags);
2650
2651 if (!(info->flags & ASYNC_CLOSING) &&
2652 (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
2653 break;
2654 }
2655
2656 if (signal_pending(current)) {
2657 retval = -ERESTARTSYS;
2658 break;
2659 }
2660
2661 if (debug_level >= DEBUG_LEVEL_INFO)
2662 printk("%s(%d):block_til_ready blocking on %s count=%d\n",
2663 __FILE__,__LINE__, tty->driver->name, info->count );
2664
2665 schedule();
2666 }
2667
2668 set_current_state(TASK_RUNNING);
2669 remove_wait_queue(&info->open_wait, &wait);
2670
2671 if (extra_count)
2672 info->count++;
2673 info->blocked_open--;
2674
2675 if (debug_level >= DEBUG_LEVEL_INFO)
2676 printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
2677 __FILE__,__LINE__, tty->driver->name, info->count );
2678
2679 if (!retval)
2680 info->flags |= ASYNC_NORMAL_ACTIVE;
2681
2682 return retval;
2683 }
2684
2685 static int mgslpc_open(struct tty_struct *tty, struct file * filp)
2686 {
2687 MGSLPC_INFO *info;
2688 int retval, line;
2689 unsigned long flags;
2690
2691 /* verify range of specified line number */
2692 line = tty->index;
2693 if ((line < 0) || (line >= mgslpc_device_count)) {
2694 printk("%s(%d):mgslpc_open with invalid line #%d.\n",
2695 __FILE__,__LINE__,line);
2696 return -ENODEV;
2697 }
2698
2699 /* find the info structure for the specified line */
2700 info = mgslpc_device_list;
2701 while(info && info->line != line)
2702 info = info->next_device;
2703 if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
2704 return -ENODEV;
2705
2706 tty->driver_data = info;
2707 info->tty = tty;
2708
2709 if (debug_level >= DEBUG_LEVEL_INFO)
2710 printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
2711 __FILE__,__LINE__,tty->driver->name, info->count);
2712
2713 /* If port is closing, signal caller to try again */
2714 if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
2715 if (info->flags & ASYNC_CLOSING)
2716 interruptible_sleep_on(&info->close_wait);
2717 retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
2718 -EAGAIN : -ERESTARTSYS);
2719 goto cleanup;
2720 }
2721
2722 info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2723
2724 spin_lock_irqsave(&info->netlock, flags);
2725 if (info->netcount) {
2726 retval = -EBUSY;
2727 spin_unlock_irqrestore(&info->netlock, flags);
2728 goto cleanup;
2729 }
2730 info->count++;
2731 spin_unlock_irqrestore(&info->netlock, flags);
2732
2733 if (info->count == 1) {
2734 /* 1st open on this device, init hardware */
2735 retval = startup(info);
2736 if (retval < 0)
2737 goto cleanup;
2738 }
2739
2740 retval = block_til_ready(tty, filp, info);
2741 if (retval) {
2742 if (debug_level >= DEBUG_LEVEL_INFO)
2743 printk("%s(%d):block_til_ready(%s) returned %d\n",
2744 __FILE__,__LINE__, info->device_name, retval);
2745 goto cleanup;
2746 }
2747
2748 if (debug_level >= DEBUG_LEVEL_INFO)
2749 printk("%s(%d):mgslpc_open(%s) success\n",
2750 __FILE__,__LINE__, info->device_name);
2751 retval = 0;
2752
2753 cleanup:
2754 if (retval) {
2755 if (tty->count == 1)
2756 info->tty = NULL; /* tty layer will release tty struct */
2757 if(info->count)
2758 info->count--;
2759 }
2760
2761 return retval;
2762 }
2763
2764 /*
2765 * /proc fs routines....
2766 */
2767
2768 static inline int line_info(char *buf, MGSLPC_INFO *info)
2769 {
2770 char stat_buf[30];
2771 int ret;
2772 unsigned long flags;
2773
2774 ret = sprintf(buf, "%s:io:%04X irq:%d",
2775 info->device_name, info->io_base, info->irq_level);
2776
2777 /* output current serial signal states */
2778 spin_lock_irqsave(&info->lock,flags);
2779 get_signals(info);
2780 spin_unlock_irqrestore(&info->lock,flags);
2781
2782 stat_buf[0] = 0;
2783 stat_buf[1] = 0;
2784 if (info->serial_signals & SerialSignal_RTS)
2785 strcat(stat_buf, "|RTS");
2786 if (info->serial_signals & SerialSignal_CTS)
2787 strcat(stat_buf, "|CTS");
2788 if (info->serial_signals & SerialSignal_DTR)
2789 strcat(stat_buf, "|DTR");
2790 if (info->serial_signals & SerialSignal_DSR)
2791 strcat(stat_buf, "|DSR");
2792 if (info->serial_signals & SerialSignal_DCD)
2793 strcat(stat_buf, "|CD");
2794 if (info->serial_signals & SerialSignal_RI)
2795 strcat(stat_buf, "|RI");
2796
2797 if (info->params.mode == MGSL_MODE_HDLC) {
2798 ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
2799 info->icount.txok, info->icount.rxok);
2800 if (info->icount.txunder)
2801 ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
2802 if (info->icount.txabort)
2803 ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
2804 if (info->icount.rxshort)
2805 ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
2806 if (info->icount.rxlong)
2807 ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
2808 if (info->icount.rxover)
2809 ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
2810 if (info->icount.rxcrc)
2811 ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
2812 } else {
2813 ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
2814 info->icount.tx, info->icount.rx);
2815 if (info->icount.frame)
2816 ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
2817 if (info->icount.parity)
2818 ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
2819 if (info->icount.brk)
2820 ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
2821 if (info->icount.overrun)
2822 ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
2823 }
2824
2825 /* Append serial signal status to end */
2826 ret += sprintf(buf+ret, " %s\n", stat_buf+1);
2827
2828 ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
2829 info->tx_active,info->bh_requested,info->bh_running,
2830 info->pending_bh);
2831
2832 return ret;
2833 }
2834
2835 /* Called to print information about devices
2836 */
2837 static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
2838 int *eof, void *data)
2839 {
2840 int len = 0, l;
2841 off_t begin = 0;
2842 MGSLPC_INFO *info;
2843
2844 len += sprintf(page, "synclink driver:%s\n", driver_version);
2845
2846 info = mgslpc_device_list;
2847 while( info ) {
2848 l = line_info(page + len, info);
2849 len += l;
2850 if (len+begin > off+count)
2851 goto done;
2852 if (len+begin < off) {
2853 begin += len;
2854 len = 0;
2855 }
2856 info = info->next_device;
2857 }
2858
2859 *eof = 1;
2860 done:
2861 if (off >= len+begin)
2862 return 0;
2863 *start = page + (off-begin);
2864 return ((count < begin+len-off) ? count : begin+len-off);
2865 }
2866
2867 static int rx_alloc_buffers(MGSLPC_INFO *info)
2868 {
2869 /* each buffer has header and data */
2870 info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
2871
2872 /* calculate total allocation size for 8 buffers */
2873 info->rx_buf_total_size = info->rx_buf_size * 8;
2874
2875 /* limit total allocated memory */
2876 if (info->rx_buf_total_size > 0x10000)
2877 info->rx_buf_total_size = 0x10000;
2878
2879 /* calculate number of buffers */
2880 info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
2881
2882 info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
2883 if (info->rx_buf == NULL)
2884 return -ENOMEM;
2885
2886 rx_reset_buffers(info);
2887 return 0;
2888 }
2889
2890 static void rx_free_buffers(MGSLPC_INFO *info)
2891 {
2892 kfree(info->rx_buf);
2893 info->rx_buf = NULL;
2894 }
2895
2896 static int claim_resources(MGSLPC_INFO *info)
2897 {
2898 if (rx_alloc_buffers(info) < 0 ) {
2899 printk( "Cant allocate rx buffer %s\n", info->device_name);
2900 release_resources(info);
2901 return -ENODEV;
2902 }
2903 return 0;
2904 }
2905
2906 static void release_resources(MGSLPC_INFO *info)
2907 {
2908 if (debug_level >= DEBUG_LEVEL_INFO)
2909 printk("release_resources(%s)\n", info->device_name);
2910 rx_free_buffers(info);
2911 }
2912
2913 /* Add the specified device instance data structure to the
2914 * global linked list of devices and increment the device count.
2915 *
2916 * Arguments: info pointer to device instance data
2917 */
2918 static void mgslpc_add_device(MGSLPC_INFO *info)
2919 {
2920 info->next_device = NULL;
2921 info->line = mgslpc_device_count;
2922 sprintf(info->device_name,"ttySLP%d",info->line);
2923
2924 if (info->line < MAX_DEVICE_COUNT) {
2925 if (maxframe[info->line])
2926 info->max_frame_size = maxframe[info->line];
2927 info->dosyncppp = dosyncppp[info->line];
2928 }
2929
2930 mgslpc_device_count++;
2931
2932 if (!mgslpc_device_list)
2933 mgslpc_device_list = info;
2934 else {
2935 MGSLPC_INFO *current_dev = mgslpc_device_list;
2936 while( current_dev->next_device )
2937 current_dev = current_dev->next_device;
2938 current_dev->next_device = info;
2939 }
2940
2941 if (info->max_frame_size < 4096)
2942 info->max_frame_size = 4096;
2943 else if (info->max_frame_size > 65535)
2944 info->max_frame_size = 65535;
2945
2946 printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
2947 info->device_name, info->io_base, info->irq_level);
2948
2949 #if SYNCLINK_GENERIC_HDLC
2950 hdlcdev_init(info);
2951 #endif
2952 }
2953
2954 static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
2955 {
2956 MGSLPC_INFO *info = mgslpc_device_list;
2957 MGSLPC_INFO *last = NULL;
2958
2959 while(info) {
2960 if (info == remove_info) {
2961 if (last)
2962 last->next_device = info->next_device;
2963 else
2964 mgslpc_device_list = info->next_device;
2965 #if SYNCLINK_GENERIC_HDLC
2966 hdlcdev_exit(info);
2967 #endif
2968 release_resources(info);
2969 kfree(info);
2970 mgslpc_device_count--;
2971 return;
2972 }
2973 last = info;
2974 info = info->next_device;
2975 }
2976 }
2977
2978 static struct pcmcia_device_id mgslpc_ids[] = {
2979 PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
2980 PCMCIA_DEVICE_NULL
2981 };
2982 MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
2983
2984 static struct pcmcia_driver mgslpc_driver = {
2985 .owner = THIS_MODULE,
2986 .drv = {
2987 .name = "synclink_cs",
2988 },
2989 .probe = mgslpc_probe,
2990 .remove = mgslpc_detach,
2991 .id_table = mgslpc_ids,
2992 .suspend = mgslpc_suspend,
2993 .resume = mgslpc_resume,
2994 };
2995
2996 static const struct tty_operations mgslpc_ops = {
2997 .open = mgslpc_open,
2998 .close = mgslpc_close,
2999 .write = mgslpc_write,
3000 .put_char = mgslpc_put_char,
3001 .flush_chars = mgslpc_flush_chars,
3002 .write_room = mgslpc_write_room,
3003 .chars_in_buffer = mgslpc_chars_in_buffer,
3004 .flush_buffer = mgslpc_flush_buffer,
3005 .ioctl = mgslpc_ioctl,
3006 .throttle = mgslpc_throttle,
3007 .unthrottle = mgslpc_unthrottle,
3008 .send_xchar = mgslpc_send_xchar,
3009 .break_ctl = mgslpc_break,
3010 .wait_until_sent = mgslpc_wait_until_sent,
3011 .read_proc = mgslpc_read_proc,
3012 .set_termios = mgslpc_set_termios,
3013 .stop = tx_pause,
3014 .start = tx_release,
3015 .hangup = mgslpc_hangup,
3016 .tiocmget = tiocmget,
3017 .tiocmset = tiocmset,
3018 };
3019
3020 static void synclink_cs_cleanup(void)
3021 {
3022 int rc;
3023
3024 printk("Unloading %s: version %s\n", driver_name, driver_version);
3025
3026 while(mgslpc_device_list)
3027 mgslpc_remove_device(mgslpc_device_list);
3028
3029 if (serial_driver) {
3030 if ((rc = tty_unregister_driver(serial_driver)))
3031 printk("%s(%d) failed to unregister tty driver err=%d\n",
3032 __FILE__,__LINE__,rc);
3033 put_tty_driver(serial_driver);
3034 }
3035
3036 pcmcia_unregister_driver(&mgslpc_driver);
3037 }
3038
3039 static int __init synclink_cs_init(void)
3040 {
3041 int rc;
3042
3043 if (break_on_load) {
3044 mgslpc_get_text_ptr();
3045 BREAKPOINT();
3046 }
3047
3048 printk("%s %s\n", driver_name, driver_version);
3049
3050 if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
3051 return rc;
3052
3053 serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
3054 if (!serial_driver) {
3055 rc = -ENOMEM;
3056 goto error;
3057 }
3058
3059 /* Initialize the tty_driver structure */
3060
3061 serial_driver->owner = THIS_MODULE;
3062 serial_driver->driver_name = "synclink_cs";
3063 serial_driver->name = "ttySLP";
3064 serial_driver->major = ttymajor;
3065 serial_driver->minor_start = 64;
3066 serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
3067 serial_driver->subtype = SERIAL_TYPE_NORMAL;
3068 serial_driver->init_termios = tty_std_termios;
3069 serial_driver->init_termios.c_cflag =
3070 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
3071 serial_driver->flags = TTY_DRIVER_REAL_RAW;
3072 tty_set_operations(serial_driver, &mgslpc_ops);
3073
3074 if ((rc = tty_register_driver(serial_driver)) < 0) {
3075 printk("%s(%d):Couldn't register serial driver\n",
3076 __FILE__,__LINE__);
3077 put_tty_driver(serial_driver);
3078 serial_driver = NULL;
3079 goto error;
3080 }
3081
3082 printk("%s %s, tty major#%d\n",
3083 driver_name, driver_version,
3084 serial_driver->major);
3085
3086 return 0;
3087
3088 error:
3089 synclink_cs_cleanup();
3090 return rc;
3091 }
3092
3093 static void __exit synclink_cs_exit(void)
3094 {
3095 synclink_cs_cleanup();
3096 }
3097
3098 module_init(synclink_cs_init);
3099 module_exit(synclink_cs_exit);
3100
3101 static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
3102 {
3103 unsigned int M, N;
3104 unsigned char val;
3105
3106 /* note:standard BRG mode is broken in V3.2 chip
3107 * so enhanced mode is always used
3108 */
3109
3110 if (rate) {
3111 N = 3686400 / rate;
3112 if (!N)
3113 N = 1;
3114 N >>= 1;
3115 for (M = 1; N > 64 && M < 16; M++)
3116 N >>= 1;
3117 N--;
3118
3119 /* BGR[5..0] = N
3120 * BGR[9..6] = M
3121 * BGR[7..0] contained in BGR register
3122 * BGR[9..8] contained in CCR2[7..6]
3123 * divisor = (N+1)*2^M
3124 *
3125 * Note: M *must* not be zero (causes asymetric duty cycle)
3126 */
3127 write_reg(info, (unsigned char) (channel + BGR),
3128 (unsigned char) ((M << 6) + N));
3129 val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
3130 val |= ((M << 4) & 0xc0);
3131 write_reg(info, (unsigned char) (channel + CCR2), val);
3132 }
3133 }
3134
3135 /* Enabled the AUX clock output at the specified frequency.
3136 */
3137 static void enable_auxclk(MGSLPC_INFO *info)
3138 {
3139 unsigned char val;
3140
3141 /* MODE
3142 *
3143 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3144 * 05 ADM Address Mode, 0 = no addr recognition
3145 * 04 TMD Timer Mode, 0 = external
3146 * 03 RAC Receiver Active, 0 = inactive
3147 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3148 * 01 TRS Timer Resolution, 1=512
3149 * 00 TLP Test Loop, 0 = no loop
3150 *
3151 * 1000 0010
3152 */
3153 val = 0x82;
3154
3155 /* channel B RTS is used to enable AUXCLK driver on SP505 */
3156 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3157 val |= BIT2;
3158 write_reg(info, CHB + MODE, val);
3159
3160 /* CCR0
3161 *
3162 * 07 PU Power Up, 1=active, 0=power down
3163 * 06 MCE Master Clock Enable, 1=enabled
3164 * 05 Reserved, 0
3165 * 04..02 SC[2..0] Encoding
3166 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3167 *
3168 * 11000000
3169 */
3170 write_reg(info, CHB + CCR0, 0xc0);
3171
3172 /* CCR1
3173 *
3174 * 07 SFLG Shared Flag, 0 = disable shared flags
3175 * 06 GALP Go Active On Loop, 0 = not used
3176 * 05 GLP Go On Loop, 0 = not used
3177 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3178 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3179 * 02..00 CM[2..0] Clock Mode
3180 *
3181 * 0001 0111
3182 */
3183 write_reg(info, CHB + CCR1, 0x17);
3184
3185 /* CCR2 (Channel B)
3186 *
3187 * 07..06 BGR[9..8] Baud rate bits 9..8
3188 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3189 * 04 SSEL Clock source select, 1=submode b
3190 * 03 TOE 0=TxCLK is input, 1=TxCLK is output
3191 * 02 RWX Read/Write Exchange 0=disabled
3192 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3193 * 00 DIV, data inversion 0=disabled, 1=enabled
3194 *
3195 * 0011 1000
3196 */
3197 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3198 write_reg(info, CHB + CCR2, 0x38);
3199 else
3200 write_reg(info, CHB + CCR2, 0x30);
3201
3202 /* CCR4
3203 *
3204 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3205 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3206 * 05 TST1 Test Pin, 0=normal operation
3207 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3208 * 03..02 Reserved, must be 0
3209 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3210 *
3211 * 0101 0000
3212 */
3213 write_reg(info, CHB + CCR4, 0x50);
3214
3215 /* if auxclk not enabled, set internal BRG so
3216 * CTS transitions can be detected (requires TxC)
3217 */
3218 if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
3219 mgslpc_set_rate(info, CHB, info->params.clock_speed);
3220 else
3221 mgslpc_set_rate(info, CHB, 921600);
3222 }
3223
3224 static void loopback_enable(MGSLPC_INFO *info)
3225 {
3226 unsigned char val;
3227
3228 /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
3229 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
3230 write_reg(info, CHA + CCR1, val);
3231
3232 /* CCR2:04 SSEL Clock source select, 1=submode b */
3233 val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
3234 write_reg(info, CHA + CCR2, val);
3235
3236 /* set LinkSpeed if available, otherwise default to 2Mbps */
3237 if (info->params.clock_speed)
3238 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3239 else
3240 mgslpc_set_rate(info, CHA, 1843200);
3241
3242 /* MODE:00 TLP Test Loop, 1=loopback enabled */
3243 val = read_reg(info, CHA + MODE) | BIT0;
3244 write_reg(info, CHA + MODE, val);
3245 }
3246
3247 static void hdlc_mode(MGSLPC_INFO *info)
3248 {
3249 unsigned char val;
3250 unsigned char clkmode, clksubmode;
3251
3252 /* disable all interrupts */
3253 irq_disable(info, CHA, 0xffff);
3254 irq_disable(info, CHB, 0xffff);
3255 port_irq_disable(info, 0xff);
3256
3257 /* assume clock mode 0a, rcv=RxC xmt=TxC */
3258 clkmode = clksubmode = 0;
3259 if (info->params.flags & HDLC_FLAG_RXC_DPLL
3260 && info->params.flags & HDLC_FLAG_TXC_DPLL) {
3261 /* clock mode 7a, rcv = DPLL, xmt = DPLL */
3262 clkmode = 7;
3263 } else if (info->params.flags & HDLC_FLAG_RXC_BRG
3264 && info->params.flags & HDLC_FLAG_TXC_BRG) {
3265 /* clock mode 7b, rcv = BRG, xmt = BRG */
3266 clkmode = 7;
3267 clksubmode = 1;
3268 } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
3269 if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3270 /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
3271 clkmode = 6;
3272 clksubmode = 1;
3273 } else {
3274 /* clock mode 6a, rcv = DPLL, xmt = TxC */
3275 clkmode = 6;
3276 }
3277 } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
3278 /* clock mode 0b, rcv = RxC, xmt = BRG */
3279 clksubmode = 1;
3280 }
3281
3282 /* MODE
3283 *
3284 * 07..06 MDS[1..0] 10 = transparent HDLC mode
3285 * 05 ADM Address Mode, 0 = no addr recognition
3286 * 04 TMD Timer Mode, 0 = external
3287 * 03 RAC Receiver Active, 0 = inactive
3288 * 02 RTS 0=RTS active during xmit, 1=RTS always active
3289 * 01 TRS Timer Resolution, 1=512
3290 * 00 TLP Test Loop, 0 = no loop
3291 *
3292 * 1000 0010
3293 */
3294 val = 0x82;
3295 if (info->params.loopback)
3296 val |= BIT0;
3297
3298 /* preserve RTS state */
3299 if (info->serial_signals & SerialSignal_RTS)
3300 val |= BIT2;
3301 write_reg(info, CHA + MODE, val);
3302
3303 /* CCR0
3304 *
3305 * 07 PU Power Up, 1=active, 0=power down
3306 * 06 MCE Master Clock Enable, 1=enabled
3307 * 05 Reserved, 0
3308 * 04..02 SC[2..0] Encoding
3309 * 01..00 SM[1..0] Serial Mode, 00=HDLC
3310 *
3311 * 11000000
3312 */
3313 val = 0xc0;
3314 switch (info->params.encoding)
3315 {
3316 case HDLC_ENCODING_NRZI:
3317 val |= BIT3;
3318 break;
3319 case HDLC_ENCODING_BIPHASE_SPACE:
3320 val |= BIT4;
3321 break; // FM0
3322 case HDLC_ENCODING_BIPHASE_MARK:
3323 val |= BIT4 + BIT2;
3324 break; // FM1
3325 case HDLC_ENCODING_BIPHASE_LEVEL:
3326 val |= BIT4 + BIT3;
3327 break; // Manchester
3328 }
3329 write_reg(info, CHA + CCR0, val);
3330
3331 /* CCR1
3332 *
3333 * 07 SFLG Shared Flag, 0 = disable shared flags
3334 * 06 GALP Go Active On Loop, 0 = not used
3335 * 05 GLP Go On Loop, 0 = not used
3336 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3337 * 03 ITF Interframe Time Fill, 0=mark, 1=flag
3338 * 02..00 CM[2..0] Clock Mode
3339 *
3340 * 0001 0000
3341 */
3342 val = 0x10 + clkmode;
3343 write_reg(info, CHA + CCR1, val);
3344
3345 /* CCR2
3346 *
3347 * 07..06 BGR[9..8] Baud rate bits 9..8
3348 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3349 * 04 SSEL Clock source select, 1=submode b
3350 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3351 * 02 RWX Read/Write Exchange 0=disabled
3352 * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
3353 * 00 DIV, data inversion 0=disabled, 1=enabled
3354 *
3355 * 0000 0000
3356 */
3357 val = 0x00;
3358 if (clkmode == 2 || clkmode == 3 || clkmode == 6
3359 || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
3360 val |= BIT5;
3361 if (clksubmode)
3362 val |= BIT4;
3363 if (info->params.crc_type == HDLC_CRC_32_CCITT)
3364 val |= BIT1;
3365 if (info->params.encoding == HDLC_ENCODING_NRZB)
3366 val |= BIT0;
3367 write_reg(info, CHA + CCR2, val);
3368
3369 /* CCR3
3370 *
3371 * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
3372 * 05 EPT Enable preamble transmission, 1=enabled
3373 * 04 RADD Receive address pushed to FIFO, 0=disabled
3374 * 03 CRL CRC Reset Level, 0=FFFF
3375 * 02 RCRC Rx CRC 0=On 1=Off
3376 * 01 TCRC Tx CRC 0=On 1=Off
3377 * 00 PSD DPLL Phase Shift Disable
3378 *
3379 * 0000 0000
3380 */
3381 val = 0x00;
3382 if (info->params.crc_type == HDLC_CRC_NONE)
3383 val |= BIT2 + BIT1;
3384 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
3385 val |= BIT5;
3386 switch (info->params.preamble_length)
3387 {
3388 case HDLC_PREAMBLE_LENGTH_16BITS:
3389 val |= BIT6;
3390 break;
3391 case HDLC_PREAMBLE_LENGTH_32BITS:
3392 val |= BIT6;
3393 break;
3394 case HDLC_PREAMBLE_LENGTH_64BITS:
3395 val |= BIT7 + BIT6;
3396 break;
3397 }
3398 write_reg(info, CHA + CCR3, val);
3399
3400 /* PRE - Preamble pattern */
3401 val = 0;
3402 switch (info->params.preamble)
3403 {
3404 case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
3405 case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
3406 case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
3407 case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
3408 }
3409 write_reg(info, CHA + PRE, val);
3410
3411 /* CCR4
3412 *
3413 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3414 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3415 * 05 TST1 Test Pin, 0=normal operation
3416 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3417 * 03..02 Reserved, must be 0
3418 * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
3419 *
3420 * 0101 0000
3421 */
3422 val = 0x50;
3423 write_reg(info, CHA + CCR4, val);
3424 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
3425 mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
3426 else
3427 mgslpc_set_rate(info, CHA, info->params.clock_speed);
3428
3429 /* RLCR Receive length check register
3430 *
3431 * 7 1=enable receive length check
3432 * 6..0 Max frame length = (RL + 1) * 32
3433 */
3434 write_reg(info, CHA + RLCR, 0);
3435
3436 /* XBCH Transmit Byte Count High
3437 *
3438 * 07 DMA mode, 0 = interrupt driven
3439 * 06 NRM, 0=ABM (ignored)
3440 * 05 CAS Carrier Auto Start
3441 * 04 XC Transmit Continuously (ignored)
3442 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3443 *
3444 * 0000 0000
3445 */
3446 val = 0x00;
3447 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3448 val |= BIT5;
3449 write_reg(info, CHA + XBCH, val);
3450 enable_auxclk(info);
3451 if (info->params.loopback || info->testing_irq)
3452 loopback_enable(info);
3453 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3454 {
3455 irq_enable(info, CHB, IRQ_CTS);
3456 /* PVR[3] 1=AUTO CTS active */
3457 set_reg_bits(info, CHA + PVR, BIT3);
3458 } else
3459 clear_reg_bits(info, CHA + PVR, BIT3);
3460
3461 irq_enable(info, CHA,
3462 IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
3463 IRQ_UNDERRUN + IRQ_TXFIFO);
3464 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3465 wait_command_complete(info, CHA);
3466 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3467
3468 /* Master clock mode enabled above to allow reset commands
3469 * to complete even if no data clocks are present.
3470 *
3471 * Disable master clock mode for normal communications because
3472 * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
3473 * IRQ when in master clock mode.
3474 *
3475 * Leave master clock mode enabled for IRQ test because the
3476 * timer IRQ used by the test can only happen in master clock mode.
3477 */
3478 if (!info->testing_irq)
3479 clear_reg_bits(info, CHA + CCR0, BIT6);
3480
3481 tx_set_idle(info);
3482
3483 tx_stop(info);
3484 rx_stop(info);
3485 }
3486
3487 static void rx_stop(MGSLPC_INFO *info)
3488 {
3489 if (debug_level >= DEBUG_LEVEL_ISR)
3490 printk("%s(%d):rx_stop(%s)\n",
3491 __FILE__,__LINE__, info->device_name );
3492
3493 /* MODE:03 RAC Receiver Active, 0=inactive */
3494 clear_reg_bits(info, CHA + MODE, BIT3);
3495
3496 info->rx_enabled = 0;
3497 info->rx_overflow = 0;
3498 }
3499
3500 static void rx_start(MGSLPC_INFO *info)
3501 {
3502 if (debug_level >= DEBUG_LEVEL_ISR)
3503 printk("%s(%d):rx_start(%s)\n",
3504 __FILE__,__LINE__, info->device_name );
3505
3506 rx_reset_buffers(info);
3507 info->rx_enabled = 0;
3508 info->rx_overflow = 0;
3509
3510 /* MODE:03 RAC Receiver Active, 1=active */
3511 set_reg_bits(info, CHA + MODE, BIT3);
3512
3513 info->rx_enabled = 1;
3514 }
3515
3516 static void tx_start(MGSLPC_INFO *info)
3517 {
3518 if (debug_level >= DEBUG_LEVEL_ISR)
3519 printk("%s(%d):tx_start(%s)\n",
3520 __FILE__,__LINE__, info->device_name );
3521
3522 if (info->tx_count) {
3523 /* If auto RTS enabled and RTS is inactive, then assert */
3524 /* RTS and set a flag indicating that the driver should */
3525 /* negate RTS when the transmission completes. */
3526 info->drop_rts_on_tx_done = 0;
3527
3528 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3529 get_signals(info);
3530 if (!(info->serial_signals & SerialSignal_RTS)) {
3531 info->serial_signals |= SerialSignal_RTS;
3532 set_signals(info);
3533 info->drop_rts_on_tx_done = 1;
3534 }
3535 }
3536
3537 if (info->params.mode == MGSL_MODE_ASYNC) {
3538 if (!info->tx_active) {
3539 info->tx_active = 1;
3540 tx_ready(info);
3541 }
3542 } else {
3543 info->tx_active = 1;
3544 tx_ready(info);
3545 mod_timer(&info->tx_timer, jiffies +
3546 msecs_to_jiffies(5000));
3547 }
3548 }
3549
3550 if (!info->tx_enabled)
3551 info->tx_enabled = 1;
3552 }
3553
3554 static void tx_stop(MGSLPC_INFO *info)
3555 {
3556 if (debug_level >= DEBUG_LEVEL_ISR)
3557 printk("%s(%d):tx_stop(%s)\n",
3558 __FILE__,__LINE__, info->device_name );
3559
3560 del_timer(&info->tx_timer);
3561
3562 info->tx_enabled = 0;
3563 info->tx_active = 0;
3564 }
3565
3566 /* Reset the adapter to a known state and prepare it for further use.
3567 */
3568 static void reset_device(MGSLPC_INFO *info)
3569 {
3570 /* power up both channels (set BIT7) */
3571 write_reg(info, CHA + CCR0, 0x80);
3572 write_reg(info, CHB + CCR0, 0x80);
3573 write_reg(info, CHA + MODE, 0);
3574 write_reg(info, CHB + MODE, 0);
3575
3576 /* disable all interrupts */
3577 irq_disable(info, CHA, 0xffff);
3578 irq_disable(info, CHB, 0xffff);
3579 port_irq_disable(info, 0xff);
3580
3581 /* PCR Port Configuration Register
3582 *
3583 * 07..04 DEC[3..0] Serial I/F select outputs
3584 * 03 output, 1=AUTO CTS control enabled
3585 * 02 RI Ring Indicator input 0=active
3586 * 01 DSR input 0=active
3587 * 00 DTR output 0=active
3588 *
3589 * 0000 0110
3590 */
3591 write_reg(info, PCR, 0x06);
3592
3593 /* PVR Port Value Register
3594 *
3595 * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
3596 * 03 AUTO CTS output 1=enabled
3597 * 02 RI Ring Indicator input
3598 * 01 DSR input
3599 * 00 DTR output (1=inactive)
3600 *
3601 * 0000 0001
3602 */
3603 // write_reg(info, PVR, PVR_DTR);
3604
3605 /* IPC Interrupt Port Configuration
3606 *
3607 * 07 VIS 1=Masked interrupts visible
3608 * 06..05 Reserved, 0
3609 * 04..03 SLA Slave address, 00 ignored
3610 * 02 CASM Cascading Mode, 1=daisy chain
3611 * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
3612 *
3613 * 0000 0101
3614 */
3615 write_reg(info, IPC, 0x05);
3616 }
3617
3618 static void async_mode(MGSLPC_INFO *info)
3619 {
3620 unsigned char val;
3621
3622 /* disable all interrupts */
3623 irq_disable(info, CHA, 0xffff);
3624 irq_disable(info, CHB, 0xffff);
3625 port_irq_disable(info, 0xff);
3626
3627 /* MODE
3628 *
3629 * 07 Reserved, 0
3630 * 06 FRTS RTS State, 0=active
3631 * 05 FCTS Flow Control on CTS
3632 * 04 FLON Flow Control Enable
3633 * 03 RAC Receiver Active, 0 = inactive
3634 * 02 RTS 0=Auto RTS, 1=manual RTS
3635 * 01 TRS Timer Resolution, 1=512
3636 * 00 TLP Test Loop, 0 = no loop
3637 *
3638 * 0000 0110
3639 */
3640 val = 0x06;
3641 if (info->params.loopback)
3642 val |= BIT0;
3643
3644 /* preserve RTS state */
3645 if (!(info->serial_signals & SerialSignal_RTS))
3646 val |= BIT6;
3647 write_reg(info, CHA + MODE, val);
3648
3649 /* CCR0
3650 *
3651 * 07 PU Power Up, 1=active, 0=power down
3652 * 06 MCE Master Clock Enable, 1=enabled
3653 * 05 Reserved, 0
3654 * 04..02 SC[2..0] Encoding, 000=NRZ
3655 * 01..00 SM[1..0] Serial Mode, 11=Async
3656 *
3657 * 1000 0011
3658 */
3659 write_reg(info, CHA + CCR0, 0x83);
3660
3661 /* CCR1
3662 *
3663 * 07..05 Reserved, 0
3664 * 04 ODS Output Driver Select, 1=TxD is push-pull output
3665 * 03 BCR Bit Clock Rate, 1=16x
3666 * 02..00 CM[2..0] Clock Mode, 111=BRG
3667 *
3668 * 0001 1111
3669 */
3670 write_reg(info, CHA + CCR1, 0x1f);
3671
3672 /* CCR2 (channel A)
3673 *
3674 * 07..06 BGR[9..8] Baud rate bits 9..8
3675 * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
3676 * 04 SSEL Clock source select, 1=submode b
3677 * 03 TOE 0=TxCLK is input, 0=TxCLK is input
3678 * 02 RWX Read/Write Exchange 0=disabled
3679 * 01 Reserved, 0
3680 * 00 DIV, data inversion 0=disabled, 1=enabled
3681 *
3682 * 0001 0000
3683 */
3684 write_reg(info, CHA + CCR2, 0x10);
3685
3686 /* CCR3
3687 *
3688 * 07..01 Reserved, 0
3689 * 00 PSD DPLL Phase Shift Disable
3690 *
3691 * 0000 0000
3692 */
3693 write_reg(info, CHA + CCR3, 0);
3694
3695 /* CCR4
3696 *
3697 * 07 MCK4 Master Clock Divide by 4, 1=enabled
3698 * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
3699 * 05 TST1 Test Pin, 0=normal operation
3700 * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
3701 * 03..00 Reserved, must be 0
3702 *
3703 * 0101 0000
3704 */
3705 write_reg(info, CHA + CCR4, 0x50);
3706 mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
3707
3708 /* DAFO Data Format
3709 *
3710 * 07 Reserved, 0
3711 * 06 XBRK transmit break, 0=normal operation
3712 * 05 Stop bits (0=1, 1=2)
3713 * 04..03 PAR[1..0] Parity (01=odd, 10=even)
3714 * 02 PAREN Parity Enable
3715 * 01..00 CHL[1..0] Character Length (00=8, 01=7)
3716 *
3717 */
3718 val = 0x00;
3719 if (info->params.data_bits != 8)
3720 val |= BIT0; /* 7 bits */
3721 if (info->params.stop_bits != 1)
3722 val |= BIT5;
3723 if (info->params.parity != ASYNC_PARITY_NONE)
3724 {
3725 val |= BIT2; /* Parity enable */
3726 if (info->params.parity == ASYNC_PARITY_ODD)
3727 val |= BIT3;
3728 else
3729 val |= BIT4;
3730 }
3731 write_reg(info, CHA + DAFO, val);
3732
3733 /* RFC Rx FIFO Control
3734 *
3735 * 07 Reserved, 0
3736 * 06 DPS, 1=parity bit not stored in data byte
3737 * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
3738 * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
3739 * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
3740 * 01 Reserved, 0
3741 * 00 TCDE Terminate Char Detect Enable, 0=disabled
3742 *
3743 * 0101 1100
3744 */
3745 write_reg(info, CHA + RFC, 0x5c);
3746
3747 /* RLCR Receive length check register
3748 *
3749 * Max frame length = (RL + 1) * 32
3750 */
3751 write_reg(info, CHA + RLCR, 0);
3752
3753 /* XBCH Transmit Byte Count High
3754 *
3755 * 07 DMA mode, 0 = interrupt driven
3756 * 06 NRM, 0=ABM (ignored)
3757 * 05 CAS Carrier Auto Start
3758 * 04 XC Transmit Continuously (ignored)
3759 * 03..00 XBC[10..8] Transmit byte count bits 10..8
3760 *
3761 * 0000 0000
3762 */
3763 val = 0x00;
3764 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
3765 val |= BIT5;
3766 write_reg(info, CHA + XBCH, val);
3767 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
3768 irq_enable(info, CHA, IRQ_CTS);
3769
3770 /* MODE:03 RAC Receiver Active, 1=active */
3771 set_reg_bits(info, CHA + MODE, BIT3);
3772 enable_auxclk(info);
3773 if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
3774 irq_enable(info, CHB, IRQ_CTS);
3775 /* PVR[3] 1=AUTO CTS active */
3776 set_reg_bits(info, CHA + PVR, BIT3);
3777 } else
3778 clear_reg_bits(info, CHA + PVR, BIT3);
3779 irq_enable(info, CHA,
3780 IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
3781 IRQ_ALLSENT + IRQ_TXFIFO);
3782 issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
3783 wait_command_complete(info, CHA);
3784 read_reg16(info, CHA + ISR); /* clear pending IRQs */
3785 }
3786
3787 /* Set the HDLC idle mode for the transmitter.
3788 */
3789 static void tx_set_idle(MGSLPC_INFO *info)
3790 {
3791 /* Note: ESCC2 only supports flags and one idle modes */
3792 if (info->idle_mode == HDLC_TXIDLE_FLAGS)
3793 set_reg_bits(info, CHA + CCR1, BIT3);
3794 else
3795 clear_reg_bits(info, CHA + CCR1, BIT3);
3796 }
3797
3798 /* get state of the V24 status (input) signals.
3799 */
3800 static void get_signals(MGSLPC_INFO *info)
3801 {
3802 unsigned char status = 0;
3803
3804 /* preserve DTR and RTS */
3805 info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
3806
3807 if (read_reg(info, CHB + VSTR) & BIT7)
3808 info->serial_signals |= SerialSignal_DCD;
3809 if (read_reg(info, CHB + STAR) & BIT1)
3810 info->serial_signals |= SerialSignal_CTS;
3811
3812 status = read_reg(info, CHA + PVR);
3813 if (!(status & PVR_RI))
3814 info->serial_signals |= SerialSignal_RI;
3815 if (!(status & PVR_DSR))
3816 info->serial_signals |= SerialSignal_DSR;
3817 }
3818
3819 /* Set the state of DTR and RTS based on contents of
3820 * serial_signals member of device extension.
3821 */
3822 static void set_signals(MGSLPC_INFO *info)
3823 {
3824 unsigned char val;
3825
3826 val = read_reg(info, CHA + MODE);
3827 if (info->params.mode == MGSL_MODE_ASYNC) {
3828 if (info->serial_signals & SerialSignal_RTS)
3829 val &= ~BIT6;
3830 else
3831 val |= BIT6;
3832 } else {
3833 if (info->serial_signals & SerialSignal_RTS)
3834 val |= BIT2;
3835 else
3836 val &= ~BIT2;
3837 }
3838 write_reg(info, CHA + MODE, val);
3839
3840 if (info->serial_signals & SerialSignal_DTR)
3841 clear_reg_bits(info, CHA + PVR, PVR_DTR);
3842 else
3843 set_reg_bits(info, CHA + PVR, PVR_DTR);
3844 }
3845
3846 static void rx_reset_buffers(MGSLPC_INFO *info)
3847 {
3848 RXBUF *buf;
3849 int i;
3850
3851 info->rx_put = 0;
3852 info->rx_get = 0;
3853 info->rx_frame_count = 0;
3854 for (i=0 ; i < info->rx_buf_count ; i++) {
3855 buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
3856 buf->status = buf->count = 0;
3857 }
3858 }
3859
3860 /* Attempt to return a received HDLC frame
3861 * Only frames received without errors are returned.
3862 *
3863 * Returns 1 if frame returned, otherwise 0
3864 */
3865 static int rx_get_frame(MGSLPC_INFO *info)
3866 {
3867 unsigned short status;
3868 RXBUF *buf;
3869 unsigned int framesize = 0;
3870 unsigned long flags;
3871 struct tty_struct *tty = info->tty;
3872 int return_frame = 0;
3873
3874 if (info->rx_frame_count == 0)
3875 return 0;
3876
3877 buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
3878
3879 status = buf->status;
3880
3881 /* 07 VFR 1=valid frame
3882 * 06 RDO 1=data overrun
3883 * 05 CRC 1=OK, 0=error
3884 * 04 RAB 1=frame aborted
3885 */
3886 if ((status & 0xf0) != 0xA0) {
3887 if (!(status & BIT7) || (status & BIT4))
3888 info->icount.rxabort++;
3889 else if (status & BIT6)
3890 info->icount.rxover++;
3891 else if (!(status & BIT5)) {
3892 info->icount.rxcrc++;
3893 if (info->params.crc_type & HDLC_CRC_RETURN_EX)
3894 return_frame = 1;
3895 }
3896 framesize = 0;
3897 #if SYNCLINK_GENERIC_HDLC
3898 {
3899 struct net_device_stats *stats = hdlc_stats(info->netdev);
3900 stats->rx_errors++;
3901 stats->rx_frame_errors++;
3902 }
3903 #endif
3904 } else
3905 return_frame = 1;
3906
3907 if (return_frame)
3908 framesize = buf->count;
3909
3910 if (debug_level >= DEBUG_LEVEL_BH)
3911 printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
3912 __FILE__,__LINE__,info->device_name,status,framesize);
3913
3914 if (debug_level >= DEBUG_LEVEL_DATA)
3915 trace_block(info, buf->data, framesize, 0);
3916
3917 if (framesize) {
3918 if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
3919 framesize+1 > info->max_frame_size) ||
3920 framesize > info->max_frame_size)
3921 info->icount.rxlong++;
3922 else {
3923 if (status & BIT5)
3924 info->icount.rxok++;
3925
3926 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
3927 *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
3928 ++framesize;
3929 }
3930
3931 #if SYNCLINK_GENERIC_HDLC
3932 if (info->netcount)
3933 hdlcdev_rx(info, buf->data, framesize);
3934 else
3935 #endif
3936 ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
3937 }
3938 }
3939
3940 spin_lock_irqsave(&info->lock,flags);
3941 buf->status = buf->count = 0;
3942 info->rx_frame_count--;
3943 info->rx_get++;
3944 if (info->rx_get >= info->rx_buf_count)
3945 info->rx_get = 0;
3946 spin_unlock_irqrestore(&info->lock,flags);
3947
3948 return 1;
3949 }
3950
3951 static BOOLEAN register_test(MGSLPC_INFO *info)
3952 {
3953 static unsigned char patterns[] =
3954 { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
3955 static unsigned int count = ARRAY_SIZE(patterns);
3956 unsigned int i;
3957 BOOLEAN rc = TRUE;
3958 unsigned long flags;
3959
3960 spin_lock_irqsave(&info->lock,flags);
3961 reset_device(info);
3962
3963 for (i = 0; i < count; i++) {
3964 write_reg(info, XAD1, patterns[i]);
3965 write_reg(info, XAD2, patterns[(i + 1) % count]);
3966 if ((read_reg(info, XAD1) != patterns[i]) ||
3967 (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
3968 rc = FALSE;
3969 break;
3970 }
3971 }
3972
3973 spin_unlock_irqrestore(&info->lock,flags);
3974 return rc;
3975 }
3976
3977 static BOOLEAN irq_test(MGSLPC_INFO *info)
3978 {
3979 unsigned long end_time;
3980 unsigned long flags;
3981
3982 spin_lock_irqsave(&info->lock,flags);
3983 reset_device(info);
3984
3985 info->testing_irq = TRUE;
3986 hdlc_mode(info);
3987
3988 info->irq_occurred = FALSE;
3989
3990 /* init hdlc mode */
3991
3992 irq_enable(info, CHA, IRQ_TIMER);
3993 write_reg(info, CHA + TIMR, 0); /* 512 cycles */
3994 issue_command(info, CHA, CMD_START_TIMER);
3995
3996 spin_unlock_irqrestore(&info->lock,flags);
3997
3998 end_time=100;
3999 while(end_time-- && !info->irq_occurred) {
4000 msleep_interruptible(10);
4001 }
4002
4003 info->testing_irq = FALSE;
4004
4005 spin_lock_irqsave(&info->lock,flags);
4006 reset_device(info);
4007 spin_unlock_irqrestore(&info->lock,flags);
4008
4009 return info->irq_occurred ? TRUE : FALSE;
4010 }
4011
4012 static int adapter_test(MGSLPC_INFO *info)
4013 {
4014 if (!register_test(info)) {
4015 info->init_error = DiagStatus_AddressFailure;
4016 printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
4017 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
4018 return -ENODEV;
4019 }
4020
4021 if (!irq_test(info)) {
4022 info->init_error = DiagStatus_IrqFailure;
4023 printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
4024 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
4025 return -ENODEV;
4026 }
4027
4028 if (debug_level >= DEBUG_LEVEL_INFO)
4029 printk("%s(%d):device %s passed diagnostics\n",
4030 __FILE__,__LINE__,info->device_name);
4031 return 0;
4032 }
4033
4034 static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
4035 {
4036 int i;
4037 int linecount;
4038 if (xmit)
4039 printk("%s tx data:\n",info->device_name);
4040 else
4041 printk("%s rx data:\n",info->device_name);
4042
4043 while(count) {
4044 if (count > 16)
4045 linecount = 16;
4046 else
4047 linecount = count;
4048
4049 for(i=0;i<linecount;i++)
4050 printk("%02X ",(unsigned char)data[i]);
4051 for(;i<17;i++)
4052 printk(" ");
4053 for(i=0;i<linecount;i++) {
4054 if (data[i]>=040 && data[i]<=0176)
4055 printk("%c",data[i]);
4056 else
4057 printk(".");
4058 }
4059 printk("\n");
4060
4061 data += linecount;
4062 count -= linecount;
4063 }
4064 }
4065
4066 /* HDLC frame time out
4067 * update stats and do tx completion processing
4068 */
4069 static void tx_timeout(unsigned long context)
4070 {
4071 MGSLPC_INFO *info = (MGSLPC_INFO*)context;
4072 unsigned long flags;
4073
4074 if ( debug_level >= DEBUG_LEVEL_INFO )
4075 printk( "%s(%d):tx_timeout(%s)\n",
4076 __FILE__,__LINE__,info->device_name);
4077 if(info->tx_active &&
4078 info->params.mode == MGSL_MODE_HDLC) {
4079 info->icount.txtimeout++;
4080 }
4081 spin_lock_irqsave(&info->lock,flags);
4082 info->tx_active = 0;
4083 info->tx_count = info->tx_put = info->tx_get = 0;
4084
4085 spin_unlock_irqrestore(&info->lock,flags);
4086
4087 #if SYNCLINK_GENERIC_HDLC
4088 if (info->netcount)
4089 hdlcdev_tx_done(info);
4090 else
4091 #endif
4092 bh_transmit(info);
4093 }
4094
4095 #if SYNCLINK_GENERIC_HDLC
4096
4097 /**
4098 * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
4099 * set encoding and frame check sequence (FCS) options
4100 *
4101 * dev pointer to network device structure
4102 * encoding serial encoding setting
4103 * parity FCS setting
4104 *
4105 * returns 0 if success, otherwise error code
4106 */
4107 static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
4108 unsigned short parity)
4109 {
4110 MGSLPC_INFO *info = dev_to_port(dev);
4111 unsigned char new_encoding;
4112 unsigned short new_crctype;
4113
4114 /* return error if TTY interface open */
4115 if (info->count)
4116 return -EBUSY;
4117
4118 switch (encoding)
4119 {
4120 case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
4121 case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
4122 case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
4123 case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
4124 case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
4125 default: return -EINVAL;
4126 }
4127
4128 switch (parity)
4129 {
4130 case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
4131 case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
4132 case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
4133 default: return -EINVAL;
4134 }
4135
4136 info->params.encoding = new_encoding;
4137 info->params.crc_type = new_crctype;
4138
4139 /* if network interface up, reprogram hardware */
4140 if (info->netcount)
4141 mgslpc_program_hw(info);
4142
4143 return 0;
4144 }
4145
4146 /**
4147 * called by generic HDLC layer to send frame
4148 *
4149 * skb socket buffer containing HDLC frame
4150 * dev pointer to network device structure
4151 *
4152 * returns 0 if success, otherwise error code
4153 */
4154 static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
4155 {
4156 MGSLPC_INFO *info = dev_to_port(dev);
4157 struct net_device_stats *stats = hdlc_stats(dev);
4158 unsigned long flags;
4159
4160 if (debug_level >= DEBUG_LEVEL_INFO)
4161 printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
4162
4163 /* stop sending until this frame completes */
4164 netif_stop_queue(dev);
4165
4166 /* copy data to device buffers */
4167 skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
4168 info->tx_get = 0;
4169 info->tx_put = info->tx_count = skb->len;
4170
4171 /* update network statistics */
4172 stats->tx_packets++;
4173 stats->tx_bytes += skb->len;
4174
4175 /* done with socket buffer, so free it */
4176 dev_kfree_skb(skb);
4177
4178 /* save start time for transmit timeout detection */
4179 dev->trans_start = jiffies;
4180
4181 /* start hardware transmitter if necessary */
4182 spin_lock_irqsave(&info->lock,flags);
4183 if (!info->tx_active)
4184 tx_start(info);
4185 spin_unlock_irqrestore(&info->lock,flags);
4186
4187 return 0;
4188 }
4189
4190 /**
4191 * called by network layer when interface enabled
4192 * claim resources and initialize hardware
4193 *
4194 * dev pointer to network device structure
4195 *
4196 * returns 0 if success, otherwise error code
4197 */
4198 static int hdlcdev_open(struct net_device *dev)
4199 {
4200 MGSLPC_INFO *info = dev_to_port(dev);
4201 int rc;
4202 unsigned long flags;
4203
4204 if (debug_level >= DEBUG_LEVEL_INFO)
4205 printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
4206
4207 /* generic HDLC layer open processing */
4208 if ((rc = hdlc_open(dev)))
4209 return rc;
4210
4211 /* arbitrate between network and tty opens */
4212 spin_lock_irqsave(&info->netlock, flags);
4213 if (info->count != 0 || info->netcount != 0) {
4214 printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
4215 spin_unlock_irqrestore(&info->netlock, flags);
4216 return -EBUSY;
4217 }
4218 info->netcount=1;
4219 spin_unlock_irqrestore(&info->netlock, flags);
4220
4221 /* claim resources and init adapter */
4222 if ((rc = startup(info)) != 0) {
4223 spin_lock_irqsave(&info->netlock, flags);
4224 info->netcount=0;
4225 spin_unlock_irqrestore(&info->netlock, flags);
4226 return rc;
4227 }
4228
4229 /* assert DTR and RTS, apply hardware settings */
4230 info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
4231 mgslpc_program_hw(info);
4232
4233 /* enable network layer transmit */
4234 dev->trans_start = jiffies;
4235 netif_start_queue(dev);
4236
4237 /* inform generic HDLC layer of current DCD status */
4238 spin_lock_irqsave(&info->lock, flags);
4239 get_signals(info);
4240 spin_unlock_irqrestore(&info->lock, flags);
4241 if (info->serial_signals & SerialSignal_DCD)
4242 netif_carrier_on(dev);
4243 else
4244 netif_carrier_off(dev);
4245 return 0;
4246 }
4247
4248 /**
4249 * called by network layer when interface is disabled
4250 * shutdown hardware and release resources
4251 *
4252 * dev pointer to network device structure
4253 *
4254 * returns 0 if success, otherwise error code
4255 */
4256 static int hdlcdev_close(struct net_device *dev)
4257 {
4258 MGSLPC_INFO *info = dev_to_port(dev);
4259 unsigned long flags;
4260
4261 if (debug_level >= DEBUG_LEVEL_INFO)
4262 printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
4263
4264 netif_stop_queue(dev);
4265
4266 /* shutdown adapter and release resources */
4267 shutdown(info);
4268
4269 hdlc_close(dev);
4270
4271 spin_lock_irqsave(&info->netlock, flags);
4272 info->netcount=0;
4273 spin_unlock_irqrestore(&info->netlock, flags);
4274
4275 return 0;
4276 }
4277
4278 /**
4279 * called by network layer to process IOCTL call to network device
4280 *
4281 * dev pointer to network device structure
4282 * ifr pointer to network interface request structure
4283 * cmd IOCTL command code
4284 *
4285 * returns 0 if success, otherwise error code
4286 */
4287 static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
4288 {
4289 const size_t size = sizeof(sync_serial_settings);
4290 sync_serial_settings new_line;
4291 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
4292 MGSLPC_INFO *info = dev_to_port(dev);
4293 unsigned int flags;
4294
4295 if (debug_level >= DEBUG_LEVEL_INFO)
4296 printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
4297
4298 /* return error if TTY interface open */
4299 if (info->count)
4300 return -EBUSY;
4301
4302 if (cmd != SIOCWANDEV)
4303 return hdlc_ioctl(dev, ifr, cmd);
4304
4305 switch(ifr->ifr_settings.type) {
4306 case IF_GET_IFACE: /* return current sync_serial_settings */
4307
4308 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
4309 if (ifr->ifr_settings.size < size) {
4310 ifr->ifr_settings.size = size; /* data size wanted */
4311 return -ENOBUFS;
4312 }
4313
4314 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4315 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4316 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4317 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4318
4319 switch (flags){
4320 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
4321 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
4322 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
4323 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
4324 default: new_line.clock_type = CLOCK_DEFAULT;
4325 }
4326
4327 new_line.clock_rate = info->params.clock_speed;
4328 new_line.loopback = info->params.loopback ? 1:0;
4329
4330 if (copy_to_user(line, &new_line, size))
4331 return -EFAULT;
4332 return 0;
4333
4334 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
4335
4336 if(!capable(CAP_NET_ADMIN))
4337 return -EPERM;
4338 if (copy_from_user(&new_line, line, size))
4339 return -EFAULT;
4340
4341 switch (new_line.clock_type)
4342 {
4343 case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
4344 case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
4345 case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
4346 case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
4347 case CLOCK_DEFAULT: flags = info->params.flags &
4348 (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4349 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4350 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4351 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
4352 default: return -EINVAL;
4353 }
4354
4355 if (new_line.loopback != 0 && new_line.loopback != 1)
4356 return -EINVAL;
4357
4358 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
4359 HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
4360 HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
4361 HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
4362 info->params.flags |= flags;
4363
4364 info->params.loopback = new_line.loopback;
4365
4366 if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
4367 info->params.clock_speed = new_line.clock_rate;
4368 else
4369 info->params.clock_speed = 0;
4370
4371 /* if network interface up, reprogram hardware */
4372 if (info->netcount)
4373 mgslpc_program_hw(info);
4374 return 0;
4375
4376 default:
4377 return hdlc_ioctl(dev, ifr, cmd);
4378 }
4379 }
4380
4381 /**
4382 * called by network layer when transmit timeout is detected
4383 *
4384 * dev pointer to network device structure
4385 */
4386 static void hdlcdev_tx_timeout(struct net_device *dev)
4387 {
4388 MGSLPC_INFO *info = dev_to_port(dev);
4389 struct net_device_stats *stats = hdlc_stats(dev);
4390 unsigned long flags;
4391
4392 if (debug_level >= DEBUG_LEVEL_INFO)
4393 printk("hdlcdev_tx_timeout(%s)\n",dev->name);
4394
4395 stats->tx_errors++;
4396 stats->tx_aborted_errors++;
4397
4398 spin_lock_irqsave(&info->lock,flags);
4399 tx_stop(info);
4400 spin_unlock_irqrestore(&info->lock,flags);
4401
4402 netif_wake_queue(dev);
4403 }
4404
4405 /**
4406 * called by device driver when transmit completes
4407 * reenable network layer transmit if stopped
4408 *
4409 * info pointer to device instance information
4410 */
4411 static void hdlcdev_tx_done(MGSLPC_INFO *info)
4412 {
4413 if (netif_queue_stopped(info->netdev))
4414 netif_wake_queue(info->netdev);
4415 }
4416
4417 /**
4418 * called by device driver when frame received
4419 * pass frame to network layer
4420 *
4421 * info pointer to device instance information
4422 * buf pointer to buffer contianing frame data
4423 * size count of data bytes in buf
4424 */
4425 static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
4426 {
4427 struct sk_buff *skb = dev_alloc_skb(size);
4428 struct net_device *dev = info->netdev;
4429 struct net_device_stats *stats = hdlc_stats(dev);
4430
4431 if (debug_level >= DEBUG_LEVEL_INFO)
4432 printk("hdlcdev_rx(%s)\n",dev->name);
4433
4434 if (skb == NULL) {
4435 printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
4436 stats->rx_dropped++;
4437 return;
4438 }
4439
4440 memcpy(skb_put(skb, size),buf,size);
4441
4442 skb->protocol = hdlc_type_trans(skb, info->netdev);
4443
4444 stats->rx_packets++;
4445 stats->rx_bytes += size;
4446
4447 netif_rx(skb);
4448
4449 info->netdev->last_rx = jiffies;
4450 }
4451
4452 /**
4453 * called by device driver when adding device instance
4454 * do generic HDLC initialization
4455 *
4456 * info pointer to device instance information
4457 *
4458 * returns 0 if success, otherwise error code
4459 */
4460 static int hdlcdev_init(MGSLPC_INFO *info)
4461 {
4462 int rc;
4463 struct net_device *dev;
4464 hdlc_device *hdlc;
4465
4466 /* allocate and initialize network and HDLC layer objects */
4467
4468 if (!(dev = alloc_hdlcdev(info))) {
4469 printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
4470 return -ENOMEM;
4471 }
4472
4473 /* for network layer reporting purposes only */
4474 dev->base_addr = info->io_base;
4475 dev->irq = info->irq_level;
4476
4477 /* network layer callbacks and settings */
4478 dev->do_ioctl = hdlcdev_ioctl;
4479 dev->open = hdlcdev_open;
4480 dev->stop = hdlcdev_close;
4481 dev->tx_timeout = hdlcdev_tx_timeout;
4482 dev->watchdog_timeo = 10*HZ;
4483 dev->tx_queue_len = 50;
4484
4485 /* generic HDLC layer callbacks and settings */
4486 hdlc = dev_to_hdlc(dev);
4487 hdlc->attach = hdlcdev_attach;
4488 hdlc->xmit = hdlcdev_xmit;
4489
4490 /* register objects with HDLC layer */
4491 if ((rc = register_hdlc_device(dev))) {
4492 printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
4493 free_netdev(dev);
4494 return rc;
4495 }
4496
4497 info->netdev = dev;
4498 return 0;
4499 }
4500
4501 /**
4502 * called by device driver when removing device instance
4503 * do generic HDLC cleanup
4504 *
4505 * info pointer to device instance information
4506 */
4507 static void hdlcdev_exit(MGSLPC_INFO *info)
4508 {
4509 unregister_hdlc_device(info->netdev);
4510 free_netdev(info->netdev);
4511 info->netdev = NULL;
4512 }
4513
4514 #endif /* CONFIG_HDLC */
4515
Support for the Chinese Samsung S3C2440 based development boards