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[PATCH] Notifier chain update: API changes
[linux-2.6/mini2440.git] / arch / ppc / platforms / prep_setup.c
blobd95c05d9824dba434bfee31d8958e7d09707f904
1 /*
2 * Copyright (C) 1995 Linus Torvalds
3 * Adapted from 'alpha' version by Gary Thomas
4 * Modified by Cort Dougan (cort@cs.nmt.edu)
5 *
6 * Support for PReP (Motorola MTX/MVME)
7 * by Troy Benjegerdes (hozer@drgw.net)
8 */
9
10 /*
11 * bootup setup stuff..
12 */
13
14 #include <linux/config.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/a.out.h>
27 #include <linux/tty.h>
28 #include <linux/major.h>
29 #include <linux/interrupt.h>
30 #include <linux/reboot.h>
31 #include <linux/init.h>
32 #include <linux/initrd.h>
33 #include <linux/ioport.h>
34 #include <linux/console.h>
35 #include <linux/timex.h>
36 #include <linux/pci.h>
37 #include <linux/ide.h>
38 #include <linux/seq_file.h>
39 #include <linux/root_dev.h>
40
41 #include <asm/sections.h>
42 #include <asm/mmu.h>
43 #include <asm/processor.h>
44 #include <asm/residual.h>
45 #include <asm/io.h>
46 #include <asm/pgtable.h>
47 #include <asm/cache.h>
48 #include <asm/dma.h>
49 #include <asm/machdep.h>
50 #include <asm/mc146818rtc.h>
51 #include <asm/mk48t59.h>
52 #include <asm/prep_nvram.h>
53 #include <asm/raven.h>
54 #include <asm/vga.h>
55 #include <asm/time.h>
56 #include <asm/mpc10x.h>
57 #include <asm/i8259.h>
58 #include <asm/open_pic.h>
59 #include <asm/pci-bridge.h>
60 #include <asm/todc.h>
61
62 /* prep registers for L2 */
63 #define CACHECRBA 0x80000823 /* Cache configuration register address */
64 #define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
65 #define L2CACHE_512KB 0x00 /* 512KB */
66 #define L2CACHE_256KB 0x01 /* 256KB */
67 #define L2CACHE_1MB 0x02 /* 1MB */
68 #define L2CACHE_NONE 0x03 /* NONE */
69 #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
70
71 TODC_ALLOC();
72
73 unsigned char ucBoardRev;
74 unsigned char ucBoardRevMaj, ucBoardRevMin;
75
76 extern unsigned char prep_nvram_read_val(int addr);
77 extern void prep_nvram_write_val(int addr,
78 unsigned char val);
79 extern unsigned char rs_nvram_read_val(int addr);
80 extern void rs_nvram_write_val(int addr,
81 unsigned char val);
82 extern void ibm_prep_init(void);
83
84 extern void prep_find_bridges(void);
85
86 int _prep_type;
87
88 extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
89 extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
90 extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
91 extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
92 extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
93
94
95 #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
96 #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
97
98 #ifdef CONFIG_SOUND_CS4232
99 long ppc_cs4232_dma, ppc_cs4232_dma2;
100 #endif
101
102 extern PTE *Hash, *Hash_end;
103 extern unsigned long Hash_size, Hash_mask;
104 extern int probingmem;
105 extern unsigned long loops_per_jiffy;
106
107 #ifdef CONFIG_SOUND_CS4232
108 EXPORT_SYMBOL(ppc_cs4232_dma);
109 EXPORT_SYMBOL(ppc_cs4232_dma2);
110 #endif
111
112 /* useful ISA ports */
113 #define PREP_SYSCTL 0x81c
114 /* present in the IBM reference design; possibly identical in Mot boxes: */
115 #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
116 #define PREP_IBM_SIMM_PRESENCE 0x804
117 #define PREP_IBM_EQUIPMENT 0x80c
118 #define PREP_IBM_L2INFO 0x80d
119 #define PREP_IBM_PM1 0x82a /* power management register 1 */
120 #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
121 #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
122
123 /* Equipment Present Register masks: */
124 #define PREP_IBM_EQUIPMENT_RESERVED 0x80
125 #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
126 #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
127 #define PREP_IBM_EQUIPMENT_L2_256 0x04
128 #define PREP_IBM_EQUIPMENT_CPU 0x02
129 #define PREP_IBM_EQUIPMENT_L2 0x01
130
131 /* planar ID values: */
132 /* Sandalfoot/Sandalbow (6015/7020) */
133 #define PREP_IBM_SANDALFOOT 0xfc
134 /* Woodfield, Thinkpad 850/860 (6042/7249) */
135 #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
136 /* PowerSeries 830/850 (6050/6070) */
137 #define PREP_IBM_CAROLINA_IDE_0 0xf0
138 #define PREP_IBM_CAROLINA_IDE_1 0xf1
139 #define PREP_IBM_CAROLINA_IDE_2 0xf2
140 #define PREP_IBM_CAROLINA_IDE_3 0xf3
141 /* 7248-43P */
142 #define PREP_IBM_CAROLINA_SCSI_0 0xf4
143 #define PREP_IBM_CAROLINA_SCSI_1 0xf5
144 #define PREP_IBM_CAROLINA_SCSI_2 0xf6
145 #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
146 /* Tiger1 (7043-140) */
147 #define PREP_IBM_TIGER1_133 0xd1
148 #define PREP_IBM_TIGER1_166 0xd2
149 #define PREP_IBM_TIGER1_180 0xd3
150 #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
151 #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
152
153 /* setup_ibm_pci:
154 * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
155 * return 8259 edge/level masks.
156 */
157 void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
158
159 extern char *Motherboard_map_name; /* for use in *_cpuinfo */
160
161 /*
162 * As found in the PReP reference implementation.
163 * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
164 */
165 static void __init
166 prep_gen_enable_l2(void)
167 {
168 outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
169 }
170
171 /* Used by Carolina and Tiger1 */
172 static void __init
173 prep_carolina_enable_l2(void)
174 {
175 outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
176 }
177
178 /* cpuinfo code common to all IBM PReP */
179 static void
180 prep_ibm_cpuinfo(struct seq_file *m)
181 {
182 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
183
184 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
185
186 seq_printf(m, "upgrade cpu\t: ");
187 if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
188 seq_printf(m, "not ");
189 }
190 seq_printf(m, "present\n");
191
192 /* print info about the SCSI fuse */
193 seq_printf(m, "scsi fuse\t: ");
194 if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
195 seq_printf(m, "ok");
196 else
197 seq_printf(m, "bad");
198 seq_printf(m, "\n");
199
200 /* print info about SIMMs */
201 if (have_residual_data) {
202 int i;
203 seq_printf(m, "simms\t\t: ");
204 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
205 if (res->Memories[i].SIMMSize != 0)
206 seq_printf(m, "%d:%ldMiB ", i,
207 (res->Memories[i].SIMMSize > 1024) ?
208 res->Memories[i].SIMMSize>>20 :
209 res->Memories[i].SIMMSize);
210 }
211 seq_printf(m, "\n");
212 }
213 }
214
215 static int
216 prep_gen_cpuinfo(struct seq_file *m)
217 {
218 prep_ibm_cpuinfo(m);
219 return 0;
220 }
221
222 static int
223 prep_sandalfoot_cpuinfo(struct seq_file *m)
224 {
225 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
226
227 prep_ibm_cpuinfo(m);
228
229 /* report amount and type of L2 cache present */
230 seq_printf(m, "L2 cache\t: ");
231 if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
232 seq_printf(m, "not present");
233 } else {
234 if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
235 seq_printf(m, "256KiB");
236 else
237 seq_printf(m, "unknown size");
238
239 if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
240 seq_printf(m, ", copy-back");
241 else
242 seq_printf(m, ", write-through");
243 }
244 seq_printf(m, "\n");
245
246 return 0;
247 }
248
249 static int
250 prep_thinkpad_cpuinfo(struct seq_file *m)
251 {
252 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
253 char *cpubus_speed, *pci_speed;
254
255 prep_ibm_cpuinfo(m);
256
257 /* report amount and type of L2 cache present */
258 seq_printf(m, "l2 cache\t: ");
259 if ((equip_reg & 0x1) == 0) {
260 switch ((equip_reg & 0xc) >> 2) {
261 case 0x0:
262 seq_printf(m, "128KiB look-aside 2-way write-through\n");
263 break;
264 case 0x1:
265 seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
266 break;
267 case 0x2:
268 seq_printf(m, "256KiB look-aside 2-way write-through\n");
269 break;
270 case 0x3:
271 seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
272 break;
273 }
274 } else {
275 seq_printf(m, "not present\n");
276 }
277
278 /* report bus speeds because we can */
279 if ((equip_reg & 0x80) == 0) {
280 switch ((equip_reg & 0x30) >> 4) {
281 case 0x1:
282 cpubus_speed = "50";
283 pci_speed = "25";
284 break;
285 case 0x3:
286 cpubus_speed = "66";
287 pci_speed = "33";
288 break;
289 default:
290 cpubus_speed = "unknown";
291 pci_speed = "unknown";
292 break;
293 }
294 } else {
295 switch ((equip_reg & 0x30) >> 4) {
296 case 0x1:
297 cpubus_speed = "25";
298 pci_speed = "25";
299 break;
300 case 0x2:
301 cpubus_speed = "60";
302 pci_speed = "30";
303 break;
304 case 0x3:
305 cpubus_speed = "33";
306 pci_speed = "33";
307 break;
308 default:
309 cpubus_speed = "unknown";
310 pci_speed = "unknown";
311 break;
312 }
313 }
314 seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
315 seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
316
317 return 0;
318 }
319
320 static int
321 prep_carolina_cpuinfo(struct seq_file *m)
322 {
323 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
324
325 prep_ibm_cpuinfo(m);
326
327 /* report amount and type of L2 cache present */
328 seq_printf(m, "l2 cache\t: ");
329 if ((equip_reg & 0x1) == 0) {
330 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
331
332 /* L2 size */
333 if ((l2_reg & 0x60) == 0)
334 seq_printf(m, "256KiB");
335 else if ((l2_reg & 0x60) == 0x20)
336 seq_printf(m, "512KiB");
337 else
338 seq_printf(m, "unknown size");
339
340 /* L2 type */
341 if ((l2_reg & 0x3) == 0)
342 seq_printf(m, ", async");
343 else if ((l2_reg & 0x3) == 1)
344 seq_printf(m, ", sync");
345 else
346 seq_printf(m, ", unknown type");
347
348 seq_printf(m, "\n");
349 } else {
350 seq_printf(m, "not present\n");
351 }
352
353 return 0;
354 }
355
356 static int
357 prep_tiger1_cpuinfo(struct seq_file *m)
358 {
359 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
360
361 prep_ibm_cpuinfo(m);
362
363 /* report amount and type of L2 cache present */
364 seq_printf(m, "l2 cache\t: ");
365 if ((l2_reg & 0xf) == 0xf) {
366 seq_printf(m, "not present\n");
367 } else {
368 if (l2_reg & 0x8)
369 seq_printf(m, "async, ");
370 else
371 seq_printf(m, "sync burst, ");
372
373 if (l2_reg & 0x4)
374 seq_printf(m, "parity, ");
375 else
376 seq_printf(m, "no parity, ");
377
378 switch (l2_reg & 0x3) {
379 case 0x0:
380 seq_printf(m, "256KiB\n");
381 break;
382 case 0x1:
383 seq_printf(m, "512KiB\n");
384 break;
385 case 0x2:
386 seq_printf(m, "1MiB\n");
387 break;
388 default:
389 seq_printf(m, "unknown size\n");
390 break;
391 }
392 }
393
394 return 0;
395 }
396
397
398 /* Used by all Motorola PReP */
399 static int
400 prep_mot_cpuinfo(struct seq_file *m)
401 {
402 unsigned int cachew = *((unsigned char *)CACHECRBA);
403
404 seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
405
406 /* report amount and type of L2 cache present */
407 seq_printf(m, "l2 cache\t: ");
408 switch (cachew & L2CACHE_MASK) {
409 case L2CACHE_512KB:
410 seq_printf(m, "512KiB");
411 break;
412 case L2CACHE_256KB:
413 seq_printf(m, "256KiB");
414 break;
415 case L2CACHE_1MB:
416 seq_printf(m, "1MiB");
417 break;
418 case L2CACHE_NONE:
419 seq_printf(m, "none\n");
420 goto no_l2;
421 break;
422 default:
423 seq_printf(m, "%x\n", cachew);
424 }
425
426 seq_printf(m, ", parity %s",
427 (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
428
429 seq_printf(m, " SRAM:");
430
431 switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
432 case 1: seq_printf(m, "synchronous, parity, flow-through\n");
433 break;
434 case 2: seq_printf(m, "asynchronous, no parity\n");
435 break;
436 case 3: seq_printf(m, "asynchronous, parity\n");
437 break;
438 default:seq_printf(m, "synchronous, pipelined, no parity\n");
439 break;
440 }
441
442 no_l2:
443 /* print info about SIMMs */
444 if (have_residual_data) {
445 int i;
446 seq_printf(m, "simms\t\t: ");
447 for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
448 if (res->Memories[i].SIMMSize != 0)
449 seq_printf(m, "%d:%ldM ", i,
450 (res->Memories[i].SIMMSize > 1024) ?
451 res->Memories[i].SIMMSize>>20 :
452 res->Memories[i].SIMMSize);
453 }
454 seq_printf(m, "\n");
455 }
456
457 return 0;
458 }
459
460 static void
461 prep_restart(char *cmd)
462 {
463 #define PREP_SP92 0x92 /* Special Port 92 */
464 local_irq_disable(); /* no interrupts */
465
466 /* set exception prefix high - to the prom */
467 _nmask_and_or_msr(0, MSR_IP);
468
469 /* make sure bit 0 (reset) is a 0 */
470 outb( inb(PREP_SP92) & ~1L , PREP_SP92);
471 /* signal a reset to system control port A - soft reset */
472 outb( inb(PREP_SP92) | 1 , PREP_SP92);
473
474 while ( 1 ) ;
475 /* not reached */
476 #undef PREP_SP92
477 }
478
479 static void
480 prep_halt(void)
481 {
482 local_irq_disable(); /* no interrupts */
483
484 /* set exception prefix high - to the prom */
485 _nmask_and_or_msr(0, MSR_IP);
486
487 while ( 1 ) ;
488 /* not reached */
489 }
490
491 /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
492 * known about it, so we can't power down.
493 */
494 static void
495 prep_carrera_poweroff(void)
496 {
497 prep_halt();
498 }
499
500 /*
501 * On most IBM PReP's, power management is handled by a Signetics 87c750
502 * behind the Utah component on the ISA bus. To access the 750 you must write
503 * a series of nibbles to port 0x82a (decoded by the Utah). This is described
504 * somewhat in the IBM Carolina Technical Specification.
505 * -Hollis
506 */
507 static void
508 utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
509 {
510 /*
511 * byte1: 0 0 0 1 0 d a5 a4
512 * byte2: 0 0 0 1 a3 a2 a1 a0
513 *
514 * d = the bit's value, enabled or disabled
515 * (a5 a4 a3) = the byte number, minus 20
516 * (a2 a1 a0) = the bit number
517 *
518 * example: set the 5th bit of byte 21 (21.5)
519 * a5 a4 a3 = 001 (byte 1)
520 * a2 a1 a0 = 101 (bit 5)
521 *
522 * byte1 = 0001 0100 (0x14)
523 * byte2 = 0001 1101 (0x1d)
524 */
525 unsigned char byte1=0x10, byte2=0x10;
526
527 /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
528 bytenum -= 20;
529
530 byte1 |= (!!value) << 2; /* set d */
531 byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
532
533 byte2 |= (bytenum & 0x1) << 3; /* set a3 */
534 byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
535
536 outb(byte1, PREP_IBM_PM1); /* first nibble */
537 mb();
538 udelay(100); /* important: let controller recover */
539
540 outb(byte2, PREP_IBM_PM1); /* second nibble */
541 mb();
542 udelay(100); /* important: let controller recover */
543 }
544
545 static void
546 prep_sig750_poweroff(void)
547 {
548 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
549
550 local_irq_disable();
551 /* set exception prefix high - to the prom */
552 _nmask_and_or_msr(0, MSR_IP);
553
554 utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
555
556 while (1) ;
557 /* not reached */
558 }
559
560 static int
561 prep_show_percpuinfo(struct seq_file *m, int i)
562 {
563 /* PREP's without residual data will give incorrect values here */
564 seq_printf(m, "clock\t\t: ");
565 if (have_residual_data)
566 seq_printf(m, "%ldMHz\n",
567 (res->VitalProductData.ProcessorHz > 1024) ?
568 res->VitalProductData.ProcessorHz / 1000000 :
569 res->VitalProductData.ProcessorHz);
570 else
571 seq_printf(m, "???\n");
572
573 return 0;
574 }
575
576 #ifdef CONFIG_SOUND_CS4232
577 static long __init masktoint(unsigned int i)
578 {
579 int t = -1;
580 while (i >> ++t)
581 ;
582 return (t-1);
583 }
584
585 /*
586 * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
587 * to distinguish sound dma-channels from others. This is because
588 * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
589 * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
590 */
591
592 static void __init prep_init_sound(void)
593 {
594 PPC_DEVICE *audiodevice = NULL;
595
596 /*
597 * Get the needed resource informations from residual data.
598 *
599 */
600 if (have_residual_data)
601 audiodevice = residual_find_device(~0, NULL,
602 MultimediaController, AudioController, -1, 0);
603
604 if (audiodevice != NULL) {
605 PnP_TAG_PACKET *pkt;
606
607 pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
608 S5_Packet, 0);
609 if (pkt != NULL)
610 ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
611 pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
612 S5_Packet, 1);
613 if (pkt != NULL)
614 ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
615 }
616
617 /*
618 * These are the PReP specs' defaults for the cs4231. We use these
619 * as fallback incase we don't have residual data.
620 * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
621 * will use the other values.
622 */
623 if (audiodevice == NULL) {
624 switch (_prep_type) {
625 case _PREP_IBM:
626 ppc_cs4232_dma = 1;
627 ppc_cs4232_dma2 = -1;
628 break;
629 default:
630 ppc_cs4232_dma = 6;
631 ppc_cs4232_dma2 = 7;
632 }
633 }
634
635 /*
636 * Find a way to push these informations to the cs4232 driver
637 * Give it out with printk, when not in cmd_line?
638 * Append it to cmd_line and saved_command_line?
639 * Format is cs4232=io,irq,dma,dma2
640 */
641 }
642 #endif /* CONFIG_SOUND_CS4232 */
643
644 /*
645 * Fill out screen_info according to the residual data. This allows us to use
646 * at least vesafb.
647 */
648 static void __init
649 prep_init_vesa(void)
650 {
651 #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
652 defined(CONFIG_FB_VESA))
653 PPC_DEVICE *vgadev = NULL;
654
655 if (have_residual_data)
656 vgadev = residual_find_device(~0, NULL, DisplayController,
657 SVGAController, -1, 0);
658
659 if (vgadev != NULL) {
660 PnP_TAG_PACKET *pkt;
661
662 pkt = PnP_find_large_vendor_packet(
663 (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
664 0x04, 0); /* 0x04 = Display Tag */
665 if (pkt != NULL) {
666 unsigned char *ptr = (unsigned char *)pkt;
667
668 if (ptr[4]) {
669 /* graphics mode */
670 screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
671
672 screen_info.lfb_depth = ptr[4] * 8;
673
674 screen_info.lfb_width = swab16(*(short *)(ptr+6));
675 screen_info.lfb_height = swab16(*(short *)(ptr+8));
676 screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
677
678 screen_info.lfb_base = swab32(*(long *)(ptr+12));
679 screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
680 }
681 }
682 }
683 #endif
684 }
685
686 /*
687 * Set DBAT 2 to access 0x80000000 so early progress messages will work
688 */
689 static __inline__ void
690 prep_set_bat(void)
691 {
692 /* wait for all outstanding memory access to complete */
693 mb();
694
695 /* setup DBATs */
696 mtspr(SPRN_DBAT2U, 0x80001ffe);
697 mtspr(SPRN_DBAT2L, 0x8000002a);
698
699 /* wait for updates */
700 mb();
701 }
702
703 /*
704 * IBM 3-digit status LED
705 */
706 static unsigned int ibm_statusled_base;
707
708 static void
709 ibm_statusled_progress(char *s, unsigned short hex);
710
711 static int
712 ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
713 void * dummy3)
714 {
715 ibm_statusled_progress(NULL, 0x505); /* SOS */
716 return NOTIFY_DONE;
717 }
718
719 static struct notifier_block ibm_statusled_block = {
720 ibm_statusled_panic,
721 NULL,
722 INT_MAX /* try to do it first */
723 };
724
725 static void
726 ibm_statusled_progress(char *s, unsigned short hex)
727 {
728 static int notifier_installed;
729 /*
730 * Progress uses 4 digits and we have only 3. So, we map 0xffff to
731 * 0xfff for display switch off. Out of range values are mapped to
732 * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
733 * Install the panic notifier when the display is first switched off.
734 */
735 if (hex == 0xffff) {
736 hex = 0xfff;
737 if (!notifier_installed) {
738 ++notifier_installed;
739 atomic_notifier_chain_register(&panic_notifier_list,
740 &ibm_statusled_block);
741 }
742 }
743 else
744 if (hex > 0xfff)
745 hex = 0xeff;
746
747 mb();
748 outw(hex, ibm_statusled_base);
749 }
750
751 static void __init
752 ibm_statusled_init(void)
753 {
754 /*
755 * The IBM 3-digit LED display is specified in the residual data
756 * as an operator panel device, type "System Status LED". Find
757 * that device and determine its address. We validate all the
758 * other parameters on the off-chance another, similar device
759 * exists.
760 */
761 if (have_residual_data) {
762 PPC_DEVICE *led;
763 PnP_TAG_PACKET *pkt;
764
765 led = residual_find_device(~0, NULL, SystemPeripheral,
766 OperatorPanel, SystemStatusLED, 0);
767 if (!led)
768 return;
769
770 pkt = PnP_find_packet((unsigned char *)
771 &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
772 if (!pkt)
773 return;
774
775 if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
776 return;
777 if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
778 *(unsigned short *)pkt->S8_Pack.RangeMax)
779 return;
780 if (pkt->S8_Pack.IOAlign != 2)
781 return;
782 if (pkt->S8_Pack.IONum != 2)
783 return;
784
785 ibm_statusled_base = ld_le16((unsigned short *)
786 (pkt->S8_Pack.RangeMin));
787 ppc_md.progress = ibm_statusled_progress;
788 }
789 }
790
791 static void __init
792 prep_setup_arch(void)
793 {
794 unsigned char reg;
795 int is_ide=0;
796
797 /* init to some ~sane value until calibrate_delay() runs */
798 loops_per_jiffy = 50000000;
799
800 /* Lookup PCI host bridges */
801 prep_find_bridges();
802
803 /* Set up floppy in PS/2 mode */
804 outb(0x09, SIO_CONFIG_RA);
805 reg = inb(SIO_CONFIG_RD);
806 reg = (reg & 0x3F) | 0x40;
807 outb(reg, SIO_CONFIG_RD);
808 outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
809
810 switch ( _prep_type )
811 {
812 case _PREP_IBM:
813 reg = inb(PREP_IBM_PLANAR);
814 printk(KERN_INFO "IBM planar ID: %02x", reg);
815 switch (reg) {
816 case PREP_IBM_SANDALFOOT:
817 prep_gen_enable_l2();
818 setup_ibm_pci = prep_sandalfoot_setup_pci;
819 ppc_md.power_off = prep_sig750_poweroff;
820 ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
821 break;
822 case PREP_IBM_THINKPAD:
823 prep_gen_enable_l2();
824 setup_ibm_pci = prep_thinkpad_setup_pci;
825 ppc_md.power_off = prep_carrera_poweroff;
826 ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
827 break;
828 default:
829 if (have_residual_data) {
830 prep_gen_enable_l2();
831 setup_ibm_pci = prep_residual_setup_pci;
832 ppc_md.power_off = prep_halt;
833 ppc_md.show_cpuinfo = prep_gen_cpuinfo;
834 break;
835 }
836 else
837 printk(" - unknown! Assuming Carolina");
838 /* fall through */
839 case PREP_IBM_CAROLINA_IDE_0:
840 case PREP_IBM_CAROLINA_IDE_1:
841 case PREP_IBM_CAROLINA_IDE_2:
842 case PREP_IBM_CAROLINA_IDE_3:
843 is_ide = 1;
844 case PREP_IBM_CAROLINA_SCSI_0:
845 case PREP_IBM_CAROLINA_SCSI_1:
846 case PREP_IBM_CAROLINA_SCSI_2:
847 case PREP_IBM_CAROLINA_SCSI_3:
848 prep_carolina_enable_l2();
849 setup_ibm_pci = prep_carolina_setup_pci;
850 ppc_md.power_off = prep_sig750_poweroff;
851 ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
852 break;
853 case PREP_IBM_TIGER1_133:
854 case PREP_IBM_TIGER1_166:
855 case PREP_IBM_TIGER1_180:
856 case PREP_IBM_TIGER1_xxx:
857 case PREP_IBM_TIGER1_333:
858 prep_carolina_enable_l2();
859 setup_ibm_pci = prep_tiger1_setup_pci;
860 ppc_md.power_off = prep_sig750_poweroff;
861 ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
862 break;
863 }
864 printk("\n");
865
866 /* default root device */
867 if (is_ide)
868 ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
869 else
870 ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
871
872 break;
873 case _PREP_Motorola:
874 prep_gen_enable_l2();
875 ppc_md.power_off = prep_halt;
876 ppc_md.show_cpuinfo = prep_mot_cpuinfo;
877
878 #ifdef CONFIG_BLK_DEV_INITRD
879 if (initrd_start)
880 ROOT_DEV = Root_RAM0;
881 else
882 #endif
883 #ifdef CONFIG_ROOT_NFS
884 ROOT_DEV = Root_NFS;
885 #else
886 ROOT_DEV = Root_SDA2;
887 #endif
888 break;
889 }
890
891 /* Read in NVRAM data */
892 init_prep_nvram();
893
894 /* if no bootargs, look in NVRAM */
895 if ( cmd_line[0] == '\0' ) {
896 char *bootargs;
897 bootargs = prep_nvram_get_var("bootargs");
898 if (bootargs != NULL) {
899 strcpy(cmd_line, bootargs);
900 /* again.. */
901 strcpy(saved_command_line, cmd_line);
902 }
903 }
904
905 #ifdef CONFIG_SOUND_CS4232
906 prep_init_sound();
907 #endif /* CONFIG_SOUND_CS4232 */
908
909 prep_init_vesa();
910
911 switch (_prep_type) {
912 case _PREP_Motorola:
913 raven_init();
914 break;
915 case _PREP_IBM:
916 ibm_prep_init();
917 break;
918 }
919
920 #ifdef CONFIG_VGA_CONSOLE
921 /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
922 vgacon_remap_base = 0xf0000000;
923 conswitchp = &vga_con;
924 #endif
925 }
926
927 /*
928 * First, see if we can get this information from the residual data.
929 * This is important on some IBM PReP systems. If we cannot, we let the
930 * TODC code handle doing this.
931 */
932 static void __init
933 prep_calibrate_decr(void)
934 {
935 if (have_residual_data) {
936 unsigned long freq, divisor = 4;
937
938 if ( res->VitalProductData.ProcessorBusHz ) {
939 freq = res->VitalProductData.ProcessorBusHz;
940 printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
941 (freq/divisor)/1000000,
942 (freq/divisor)%1000000);
943 tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
944 tb_ticks_per_jiffy = freq / HZ / divisor;
945 }
946 }
947 else
948 todc_calibrate_decr();
949 }
950
951 static void __init
952 prep_init_IRQ(void)
953 {
954 unsigned int pci_viddid, pci_did;
955
956 if (OpenPIC_Addr != NULL) {
957 openpic_init(NUM_8259_INTERRUPTS);
958 /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
959 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
960 i8259_irq);
961 }
962
963 if (have_residual_data) {
964 i8259_init(residual_isapic_addr(), 0);
965 return;
966 }
967
968 /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
969 * controller, we poll (as they have a different int-ack address). */
970 early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
971 pci_did = (pci_viddid & 0xffff0000) >> 16;
972 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
973 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
974 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
975 i8259_init(0, 0);
976 else
977 /* PCI interrupt ack address given in section 6.1.8 of the
978 * PReP specification. */
979 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
980 }
981
982 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
983 /*
984 * IDE stuff.
985 */
986 static int
987 prep_ide_default_irq(unsigned long base)
988 {
989 switch (base) {
990 case 0x1f0: return 13;
991 case 0x170: return 13;
992 case 0x1e8: return 11;
993 case 0x168: return 10;
994 case 0xfff0: return 14; /* MCP(N)750 ide0 */
995 case 0xffe0: return 15; /* MCP(N)750 ide1 */
996 default: return 0;
997 }
998 }
999
1000 static unsigned long
1001 prep_ide_default_io_base(int index)
1002 {
1003 switch (index) {
1004 case 0: return 0x1f0;
1005 case 1: return 0x170;
1006 case 2: return 0x1e8;
1007 case 3: return 0x168;
1008 default:
1009 return 0;
1010 }
1011 }
1012 #endif
1013
1014 #ifdef CONFIG_SMP
1015 /* PReP (MTX) support */
1016 static int __init
1017 smp_prep_probe(void)
1018 {
1019 extern int mot_multi;
1020
1021 if (mot_multi) {
1022 openpic_request_IPIs();
1023 smp_hw_index[1] = 1;
1024 return 2;
1025 }
1026
1027 return 1;
1028 }
1029
1030 static void __init
1031 smp_prep_kick_cpu(int nr)
1032 {
1033 *(unsigned long *)KERNELBASE = nr;
1034 asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
1035 printk("CPU1 released, waiting\n");
1036 }
1037
1038 static void __init
1039 smp_prep_setup_cpu(int cpu_nr)
1040 {
1041 if (OpenPIC_Addr)
1042 do_openpic_setup_cpu();
1043 }
1044
1045 static struct smp_ops_t prep_smp_ops = {
1046 smp_openpic_message_pass,
1047 smp_prep_probe,
1048 smp_prep_kick_cpu,
1049 smp_prep_setup_cpu,
1050 .give_timebase = smp_generic_give_timebase,
1051 .take_timebase = smp_generic_take_timebase,
1052 };
1053 #endif /* CONFIG_SMP */
1054
1055 /*
1056 * Setup the bat mappings we're going to load that cover
1057 * the io areas. RAM was mapped by mapin_ram().
1058 * -- Cort
1059 */
1060 static void __init
1061 prep_map_io(void)
1062 {
1063 io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
1064 io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
1065 }
1066
1067 static int __init
1068 prep_request_io(void)
1069 {
1070 if (_machine == _MACH_prep) {
1071 #ifdef CONFIG_NVRAM
1072 request_region(PREP_NVRAM_AS0, 0x8, "nvram");
1073 #endif
1074 request_region(0x00,0x20,"dma1");
1075 request_region(0x40,0x20,"timer");
1076 request_region(0x80,0x10,"dma page reg");
1077 request_region(0xc0,0x20,"dma2");
1078 }
1079
1080 return 0;
1081 }
1082
1083 device_initcall(prep_request_io);
1084
1085 void __init
1086 prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1087 unsigned long r6, unsigned long r7)
1088 {
1089 #ifdef CONFIG_PREP_RESIDUAL
1090 /* make a copy of residual data */
1091 if ( r3 ) {
1092 memcpy((void *)res,(void *)(r3+KERNELBASE),
1093 sizeof(RESIDUAL));
1094 }
1095 #endif
1096
1097 isa_io_base = PREP_ISA_IO_BASE;
1098 isa_mem_base = PREP_ISA_MEM_BASE;
1099 pci_dram_offset = PREP_PCI_DRAM_OFFSET;
1100 ISA_DMA_THRESHOLD = 0x00ffffff;
1101 DMA_MODE_READ = 0x44;
1102 DMA_MODE_WRITE = 0x48;
1103 ppc_do_canonicalize_irqs = 1;
1104
1105 /* figure out what kind of prep workstation we are */
1106 if (have_residual_data) {
1107 if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
1108 _prep_type = _PREP_IBM;
1109 else
1110 _prep_type = _PREP_Motorola;
1111 }
1112 else {
1113 /* assume motorola if no residual (netboot?) */
1114 _prep_type = _PREP_Motorola;
1115 }
1116
1117 #ifdef CONFIG_PREP_RESIDUAL
1118 /* Switch off all residual data processing if the user requests it */
1119 if (strstr(cmd_line, "noresidual") != NULL)
1120 res = NULL;
1121 #endif
1122
1123 /* Initialise progress early to get maximum benefit */
1124 prep_set_bat();
1125 ibm_statusled_init();
1126
1127 ppc_md.setup_arch = prep_setup_arch;
1128 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1129 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1130 ppc_md.init_IRQ = prep_init_IRQ;
1131 /* this gets changed later on if we have an OpenPIC -- Cort */
1132 ppc_md.get_irq = i8259_irq;
1133
1134 ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
1135
1136 ppc_md.restart = prep_restart;
1137 ppc_md.power_off = NULL; /* set in prep_setup_arch() */
1138 ppc_md.halt = prep_halt;
1139
1140 ppc_md.nvram_read_val = prep_nvram_read_val;
1141 ppc_md.nvram_write_val = prep_nvram_write_val;
1142
1143 ppc_md.time_init = todc_time_init;
1144 if (_prep_type == _PREP_IBM) {
1145 ppc_md.rtc_read_val = todc_mc146818_read_val;
1146 ppc_md.rtc_write_val = todc_mc146818_write_val;
1147 TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
1148 8);
1149 } else {
1150 TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
1151 PREP_NVRAM_DATA, 8);
1152 }
1153
1154 ppc_md.calibrate_decr = prep_calibrate_decr;
1155 ppc_md.set_rtc_time = todc_set_rtc_time;
1156 ppc_md.get_rtc_time = todc_get_rtc_time;
1157
1158 ppc_md.setup_io_mappings = prep_map_io;
1159
1160 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
1161 ppc_ide_md.default_irq = prep_ide_default_irq;
1162 ppc_ide_md.default_io_base = prep_ide_default_io_base;
1163 #endif
1164
1165 #ifdef CONFIG_SMP
1166 smp_ops = &prep_smp_ops;
1167 #endif /* CONFIG_SMP */
1168 }
Support for the Chinese Samsung S3C2440 based development boards