x86, apic: refactor ->cpu_mask_to_apicid*()
[linux-2.6/mini2440.git] / arch / x86 / include / asm / mach-default / mach_apic.h
blob8972f843414547d087817f6b2c799c5b4e2d5a97
1 #ifndef _ASM_X86_MACH_DEFAULT_MACH_APIC_H
2 #define _ASM_X86_MACH_DEFAULT_MACH_APIC_H
4 #ifdef CONFIG_X86_LOCAL_APIC
6 #include <mach_apicdef.h>
7 #include <asm/smp.h>
9 #define APIC_DFR_VALUE (APIC_DFR_FLAT)
11 static inline const struct cpumask *default_target_cpus(void)
13 #ifdef CONFIG_SMP
14 return cpu_online_mask;
15 #else
16 return cpumask_of(0);
17 #endif
20 #ifdef CONFIG_X86_64
21 #include <asm/genapic.h>
22 #define read_apic_id() (apic->get_apic_id(apic_read(APIC_ID)))
23 #define send_IPI_self (apic->send_IPI_self)
24 #define wakeup_secondary_cpu (apic->wakeup_cpu)
25 extern void default_setup_apic_routing(void);
26 #else
27 #define wakeup_secondary_cpu wakeup_secondary_cpu_via_init
29 * Set up the logical destination ID.
31 * Intel recommends to set DFR, LDR and TPR before enabling
32 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
33 * document number 292116). So here it goes...
35 static inline void default_init_apic_ldr(void)
37 unsigned long val;
39 apic_write(APIC_DFR, APIC_DFR_VALUE);
40 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
41 val |= SET_APIC_LOGICAL_ID(1UL << smp_processor_id());
42 apic_write(APIC_LDR, val);
45 static inline int default_apic_id_registered(void)
47 return physid_isset(read_apic_id(), phys_cpu_present_map);
50 static inline unsigned int
51 default_cpu_mask_to_apicid(const struct cpumask *cpumask)
53 return cpumask_bits(cpumask)[0];
56 static inline unsigned int
57 default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
58 const struct cpumask *andmask)
60 unsigned long mask1 = cpumask_bits(cpumask)[0];
61 unsigned long mask2 = cpumask_bits(andmask)[0];
62 unsigned long mask3 = cpumask_bits(cpu_online_mask)[0];
64 return (unsigned int)(mask1 & mask2 & mask3);
67 static inline int default_phys_pkg_id(int cpuid_apic, int index_msb)
69 return cpuid_apic >> index_msb;
72 static inline void default_setup_apic_routing(void)
74 #ifdef CONFIG_X86_IO_APIC
75 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
76 "Flat", nr_ioapics);
77 #endif
80 static inline int default_apicid_to_node(int logical_apicid)
82 #ifdef CONFIG_SMP
83 return apicid_2_node[hard_smp_processor_id()];
84 #else
85 return 0;
86 #endif
89 #endif
91 static inline unsigned long default_check_apicid_used(physid_mask_t bitmap, int apicid)
93 return physid_isset(apicid, bitmap);
96 static inline unsigned long default_check_apicid_present(int bit)
98 return physid_isset(bit, phys_cpu_present_map);
101 static inline physid_mask_t default_ioapic_phys_id_map(physid_mask_t phys_map)
103 return phys_map;
106 /* Mapping from cpu number to logical apicid */
107 static inline int default_cpu_to_logical_apicid(int cpu)
109 return 1 << cpu;
112 static inline int __default_cpu_present_to_apicid(int mps_cpu)
114 if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu))
115 return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu);
116 else
117 return BAD_APICID;
120 static inline int
121 __default_check_phys_apicid_present(int boot_cpu_physical_apicid)
123 return physid_isset(boot_cpu_physical_apicid, phys_cpu_present_map);
126 #ifdef CONFIG_X86_32
127 static inline int default_cpu_present_to_apicid(int mps_cpu)
129 return __default_cpu_present_to_apicid(mps_cpu);
132 static inline int
133 default_check_phys_apicid_present(int boot_cpu_physical_apicid)
135 return __default_check_phys_apicid_present(boot_cpu_physical_apicid);
137 #else
138 extern int default_cpu_present_to_apicid(int mps_cpu);
139 extern int default_check_phys_apicid_present(int boot_cpu_physical_apicid);
140 #endif
142 static inline physid_mask_t default_apicid_to_cpu_present(int phys_apicid)
144 return physid_mask_of_physid(phys_apicid);
147 #endif /* CONFIG_X86_LOCAL_APIC */
148 #endif /* _ASM_X86_MACH_DEFAULT_MACH_APIC_H */