2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Written by Jacob Shin - AMD, Inc.
9 * Support : jacob.shin@amd.com
12 * - added support for AMD Family 0x10 processors
14 * All MC4_MISCi registers are shared between multi-cores
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
30 #include <asm/percpu.h>
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_CNTP_HI 0x40000000
41 #define MASK_LOCKED_HI 0x20000000
42 #define MASK_LVTOFF_HI 0x00F00000
43 #define MASK_COUNT_EN_HI 0x00080000
44 #define MASK_INT_TYPE_HI 0x00060000
45 #define MASK_OVERFLOW_HI 0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO 0xFF000000
48 #define MCG_XBLK_ADDR 0xC0000400
50 struct threshold_block
{
58 struct list_head miscj
;
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults
= {
63 .interrupt_enable
= 0,
64 .threshold_limit
= THRESHOLD_MAX
,
67 struct threshold_bank
{
69 struct threshold_block
*blocks
;
72 static DEFINE_PER_CPU(struct threshold_bank
*, threshold_banks
[NR_BANKS
]);
75 static unsigned char shared_bank
[NR_BANKS
] = {
80 static DEFINE_PER_CPU(unsigned char, bank_map
); /* see which banks are on */
86 struct thresh_restart
{
87 struct threshold_block
*b
;
92 /* must be called with correct cpu affinity */
93 static long threshold_restart_bank(void *_tr
)
95 struct thresh_restart
*tr
= _tr
;
96 u32 mci_misc_hi
, mci_misc_lo
;
98 rdmsr(tr
->b
->address
, mci_misc_lo
, mci_misc_hi
);
100 if (tr
->b
->threshold_limit
< (mci_misc_hi
& THRESHOLD_MAX
))
101 tr
->reset
= 1; /* limit cannot be lower than err count */
103 if (tr
->reset
) { /* reset err count and overflow bit */
105 (mci_misc_hi
& ~(MASK_ERR_COUNT_HI
| MASK_OVERFLOW_HI
)) |
106 (THRESHOLD_MAX
- tr
->b
->threshold_limit
);
107 } else if (tr
->old_limit
) { /* change limit w/o reset */
108 int new_count
= (mci_misc_hi
& THRESHOLD_MAX
) +
109 (tr
->old_limit
- tr
->b
->threshold_limit
);
110 mci_misc_hi
= (mci_misc_hi
& ~MASK_ERR_COUNT_HI
) |
111 (new_count
& THRESHOLD_MAX
);
114 tr
->b
->interrupt_enable
?
115 (mci_misc_hi
= (mci_misc_hi
& ~MASK_INT_TYPE_HI
) | INT_TYPE_APIC
) :
116 (mci_misc_hi
&= ~MASK_INT_TYPE_HI
);
118 mci_misc_hi
|= MASK_COUNT_EN_HI
;
119 wrmsr(tr
->b
->address
, mci_misc_lo
, mci_misc_hi
);
123 /* cpu init entry point, called from mce.c with preempt off */
124 void mce_amd_feature_init(struct cpuinfo_x86
*c
)
126 unsigned int bank
, block
;
127 unsigned int cpu
= smp_processor_id();
129 u32 low
= 0, high
= 0, address
= 0;
130 struct thresh_restart tr
;
132 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
133 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
135 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
136 else if (block
== 1) {
137 address
= (low
& MASK_BLKPTR_LO
) >> 21;
140 address
+= MCG_XBLK_ADDR
;
145 if (rdmsr_safe(address
, &low
, &high
))
148 if (!(high
& MASK_VALID_HI
)) {
155 if (!(high
& MASK_CNTP_HI
) ||
156 (high
& MASK_LOCKED_HI
))
160 per_cpu(bank_map
, cpu
) |= (1 << bank
);
162 if (shared_bank
[bank
] && c
->cpu_core_id
)
165 lvt_off
= setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR
,
166 APIC_EILVT_MSG_FIX
, 0);
168 high
&= ~MASK_LVTOFF_HI
;
169 high
|= lvt_off
<< 20;
170 wrmsr(address
, low
, high
);
172 threshold_defaults
.address
= address
;
173 tr
.b
= &threshold_defaults
;
176 threshold_restart_bank(&tr
);
182 * APIC Interrupt Handler
186 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
187 * the interrupt goes off when error_count reaches threshold_limit.
188 * the handler will simply log mcelog w/ software defined bank number.
190 asmlinkage
void mce_threshold_interrupt(void)
192 unsigned int bank
, block
;
194 u32 low
= 0, high
= 0, address
= 0;
202 /* assume first bank caused it */
203 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
204 if (!(per_cpu(bank_map
, m
.cpu
) & (1 << bank
)))
206 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
208 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
209 else if (block
== 1) {
210 address
= (low
& MASK_BLKPTR_LO
) >> 21;
213 address
+= MCG_XBLK_ADDR
;
218 if (rdmsr_safe(address
, &low
, &high
))
221 if (!(high
& MASK_VALID_HI
)) {
228 if (!(high
& MASK_CNTP_HI
) ||
229 (high
& MASK_LOCKED_HI
))
232 /* Log the machine check that caused the threshold
234 machine_check_poll(MCP_TIMESTAMP
);
236 if (high
& MASK_OVERFLOW_HI
) {
237 rdmsrl(address
, m
.misc
);
238 rdmsrl(MSR_IA32_MC0_STATUS
+ bank
* 4,
240 m
.bank
= K8_MCE_THRESHOLD_BASE
249 inc_irq_stat(irq_threshold_count
);
257 struct threshold_attr
{
258 struct attribute attr
;
259 ssize_t(*show
) (struct threshold_block
*, char *);
260 ssize_t(*store
) (struct threshold_block
*, const char *, size_t count
);
263 #define SHOW_FIELDS(name) \
264 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
266 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
268 SHOW_FIELDS(interrupt_enable
)
269 SHOW_FIELDS(threshold_limit
)
271 static ssize_t
store_interrupt_enable(struct threshold_block
*b
,
272 const char *buf
, size_t count
)
275 struct thresh_restart tr
;
276 unsigned long new = simple_strtoul(buf
, &end
, 0);
279 b
->interrupt_enable
= !!new;
284 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
289 static ssize_t
store_threshold_limit(struct threshold_block
*b
,
290 const char *buf
, size_t count
)
293 struct thresh_restart tr
;
294 unsigned long new = simple_strtoul(buf
, &end
, 0);
297 if (new > THRESHOLD_MAX
)
301 tr
.old_limit
= b
->threshold_limit
;
302 b
->threshold_limit
= new;
306 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
311 static long local_error_count(void *_b
)
313 struct threshold_block
*b
= _b
;
316 rdmsr(b
->address
, low
, high
);
317 return (high
& 0xFFF) - (THRESHOLD_MAX
- b
->threshold_limit
);
320 static ssize_t
show_error_count(struct threshold_block
*b
, char *buf
)
322 return sprintf(buf
, "%lx\n", work_on_cpu(b
->cpu
, local_error_count
, b
));
325 static ssize_t
store_error_count(struct threshold_block
*b
,
326 const char *buf
, size_t count
)
328 struct thresh_restart tr
= { .b
= b
, .reset
= 1, .old_limit
= 0 };
330 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
334 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
335 .attr = {.name = __stringify(_name), .mode = _mode }, \
340 #define RW_ATTR(name) \
341 static struct threshold_attr name = \
342 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
344 RW_ATTR(interrupt_enable
);
345 RW_ATTR(threshold_limit
);
346 RW_ATTR(error_count
);
348 static struct attribute
*default_attrs
[] = {
349 &interrupt_enable
.attr
,
350 &threshold_limit
.attr
,
355 #define to_block(k) container_of(k, struct threshold_block, kobj)
356 #define to_attr(a) container_of(a, struct threshold_attr, attr)
358 static ssize_t
show(struct kobject
*kobj
, struct attribute
*attr
, char *buf
)
360 struct threshold_block
*b
= to_block(kobj
);
361 struct threshold_attr
*a
= to_attr(attr
);
363 ret
= a
->show
? a
->show(b
, buf
) : -EIO
;
367 static ssize_t
store(struct kobject
*kobj
, struct attribute
*attr
,
368 const char *buf
, size_t count
)
370 struct threshold_block
*b
= to_block(kobj
);
371 struct threshold_attr
*a
= to_attr(attr
);
373 ret
= a
->store
? a
->store(b
, buf
, count
) : -EIO
;
377 static struct sysfs_ops threshold_ops
= {
382 static struct kobj_type threshold_ktype
= {
383 .sysfs_ops
= &threshold_ops
,
384 .default_attrs
= default_attrs
,
387 static __cpuinit
int allocate_threshold_blocks(unsigned int cpu
,
394 struct threshold_block
*b
= NULL
;
396 if ((bank
>= NR_BANKS
) || (block
>= NR_BLOCKS
))
399 if (rdmsr_safe(address
, &low
, &high
))
402 if (!(high
& MASK_VALID_HI
)) {
409 if (!(high
& MASK_CNTP_HI
) ||
410 (high
& MASK_LOCKED_HI
))
413 b
= kzalloc(sizeof(struct threshold_block
), GFP_KERNEL
);
420 b
->address
= address
;
421 b
->interrupt_enable
= 0;
422 b
->threshold_limit
= THRESHOLD_MAX
;
424 INIT_LIST_HEAD(&b
->miscj
);
426 if (per_cpu(threshold_banks
, cpu
)[bank
]->blocks
)
428 &per_cpu(threshold_banks
, cpu
)[bank
]->blocks
->miscj
);
430 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= b
;
432 err
= kobject_init_and_add(&b
->kobj
, &threshold_ktype
,
433 per_cpu(threshold_banks
, cpu
)[bank
]->kobj
,
439 address
= (low
& MASK_BLKPTR_LO
) >> 21;
442 address
+= MCG_XBLK_ADDR
;
446 err
= allocate_threshold_blocks(cpu
, bank
, ++block
, address
);
451 kobject_uevent(&b
->kobj
, KOBJ_ADD
);
457 kobject_put(&b
->kobj
);
463 static __cpuinit
long local_allocate_threshold_blocks(void *_bank
)
465 unsigned int *bank
= _bank
;
467 return allocate_threshold_blocks(smp_processor_id(), *bank
, 0,
468 MSR_IA32_MC0_MISC
+ *bank
* 4);
471 /* symlinks sibling shared banks to first core. first core owns dir/files. */
472 static __cpuinit
int threshold_create_bank(unsigned int cpu
, unsigned int bank
)
475 struct threshold_bank
*b
= NULL
;
478 sprintf(name
, "threshold_bank%i", bank
);
481 if (cpu_data(cpu
).cpu_core_id
&& shared_bank
[bank
]) { /* symlink */
482 i
= first_cpu(per_cpu(cpu_core_map
, cpu
));
484 /* first core not up yet */
485 if (cpu_data(i
).cpu_core_id
)
489 if (per_cpu(threshold_banks
, cpu
)[bank
])
492 b
= per_cpu(threshold_banks
, i
)[bank
];
497 err
= sysfs_create_link(&per_cpu(device_mce
, cpu
).kobj
,
502 b
->cpus
= per_cpu(cpu_core_map
, cpu
);
503 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
508 b
= kzalloc(sizeof(struct threshold_bank
), GFP_KERNEL
);
514 b
->kobj
= kobject_create_and_add(name
, &per_cpu(device_mce
, cpu
).kobj
);
519 b
->cpus
= CPU_MASK_ALL
;
521 b
->cpus
= per_cpu(cpu_core_map
, cpu
);
524 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
526 err
= work_on_cpu(cpu
, local_allocate_threshold_blocks
, &bank
);
530 for_each_cpu_mask_nr(i
, b
->cpus
) {
534 err
= sysfs_create_link(&per_cpu(device_mce
, i
).kobj
,
539 per_cpu(threshold_banks
, i
)[bank
] = b
;
545 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
551 /* create dir/files for all valid threshold banks */
552 static __cpuinit
int threshold_create_device(unsigned int cpu
)
557 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
558 if (!(per_cpu(bank_map
, cpu
) & (1 << bank
)))
560 err
= threshold_create_bank(cpu
, bank
);
569 * let's be hotplug friendly.
570 * in case of multiple core processors, the first core always takes ownership
571 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
574 static void deallocate_threshold_block(unsigned int cpu
,
577 struct threshold_block
*pos
= NULL
;
578 struct threshold_block
*tmp
= NULL
;
579 struct threshold_bank
*head
= per_cpu(threshold_banks
, cpu
)[bank
];
584 list_for_each_entry_safe(pos
, tmp
, &head
->blocks
->miscj
, miscj
) {
585 kobject_put(&pos
->kobj
);
586 list_del(&pos
->miscj
);
590 kfree(per_cpu(threshold_banks
, cpu
)[bank
]->blocks
);
591 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= NULL
;
594 static void threshold_remove_bank(unsigned int cpu
, int bank
)
597 struct threshold_bank
*b
;
600 b
= per_cpu(threshold_banks
, cpu
)[bank
];
608 sprintf(name
, "threshold_bank%i", bank
);
611 /* sibling symlink */
612 if (shared_bank
[bank
] && b
->blocks
->cpu
!= cpu
) {
613 sysfs_remove_link(&per_cpu(device_mce
, cpu
).kobj
, name
);
614 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
619 /* remove all sibling symlinks before unregistering */
620 for_each_cpu_mask_nr(i
, b
->cpus
) {
624 sysfs_remove_link(&per_cpu(device_mce
, i
).kobj
, name
);
625 per_cpu(threshold_banks
, i
)[bank
] = NULL
;
628 deallocate_threshold_block(cpu
, bank
);
631 kobject_del(b
->kobj
);
632 kobject_put(b
->kobj
);
634 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
637 static void threshold_remove_device(unsigned int cpu
)
641 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
642 if (!(per_cpu(bank_map
, cpu
) & (1 << bank
)))
644 threshold_remove_bank(cpu
, bank
);
648 /* get notified when a cpu comes on/off */
649 static void __cpuinit
amd_64_threshold_cpu_callback(unsigned long action
,
657 case CPU_ONLINE_FROZEN
:
658 threshold_create_device(cpu
);
661 case CPU_DEAD_FROZEN
:
662 threshold_remove_device(cpu
);
669 static __init
int threshold_init_device(void)
673 /* to hit CPUs online before the notifier is up */
674 for_each_online_cpu(lcpu
) {
675 int err
= threshold_create_device(lcpu
);
679 threshold_cpu_callback
= amd_64_threshold_cpu_callback
;
683 device_initcall(threshold_init_device
);