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netns xfrm: KM reporting in netns
[linux-2.6/mini2440.git] / drivers / video / matrox / matroxfb_base.c
blob8e7a275df50c79a13c328785a2909d66aae7a0bb
1 /*
2 *
3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
4 *
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
6 *
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
8 *
9 * Version: 1.65 2002/08/14
10 *
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
12 *
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
15 *
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
18 *
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
21 *
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
25 *
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
28 *
29 * "Scott Wood" <sawst46+@pitt.edu>
30 * Fixes
31 *
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
33 * Betatesting
34 *
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
38 *
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
41 *
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
44 *
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
47 *
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
50 * PPC betatesting
51 *
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
53 * Alpha betatesting
54 *
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
57 * G100 testing
58 *
59 * "H. Peter Arvin" <hpa@transmeta.com>
60 * Ideas
61 *
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
64 *
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
66 * G400 support
67 *
68 * "Samuel Hocevar" <sam@via.ecp.fr>
69 * Fixes
70 *
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
73 *
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
76 *
77 * "Uns Lider" <unslider@miranda.org>
78 * G100 PLNWT fixes
79 *
80 * "Denis Zaitsev" <zzz@cd-club.ru>
81 * Fixes
82 *
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
85 *
86 * "Diego Biurrun" <diego@biurrun.de>
87 * DFP testing
88 *
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
91 *
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
94 *
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writing this driver)
97 *
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
99 *
100 */
101
102 #include <linux/version.h>
103
104 #define __OLD_VIDIOC_
105
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <linux/uaccess.h>
117
118 #ifdef CONFIG_PPC_PMAC
119 #include <asm/machdep.h>
120 unsigned char nvram_read_byte(int);
121 static int default_vmode = VMODE_NVRAM;
122 static int default_cmode = CMODE_NVRAM;
123 #endif
124
125 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
126
127 /* --------------------------------------------------------------------- */
128
129 /*
130 * card parameters
131 */
132
133 /* --------------------------------------------------------------------- */
134
135 static struct fb_var_screeninfo vesafb_defined = {
136 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
137 0,0, /* virtual -> visible no offset */
138 8, /* depth -> load bits_per_pixel */
139 0, /* greyscale ? */
140 {0,0,0}, /* R */
141 {0,0,0}, /* G */
142 {0,0,0}, /* B */
143 {0,0,0}, /* transparency */
144 0, /* standard pixel format */
145 FB_ACTIVATE_NOW,
146 -1,-1,
147 FB_ACCELF_TEXT, /* accel flags */
148 39721L,48L,16L,33L,10L,
149 96L,2L,~0, /* No sync info */
150 FB_VMODE_NONINTERLACED,
151 0, {0,0,0,0,0}
152 };
153
154
155
156 /* --------------------------------------------------------------------- */
157 static void update_crtc2(WPMINFO unsigned int pos) {
158 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
159
160 /* Make sure that displays are compatible */
161 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
162 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
163 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
164 ) {
165 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
166 case 16:
167 case 32:
168 pos = pos * 8;
169 if (info->interlaced) {
170 mga_outl(0x3C2C, pos);
171 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
172 } else {
173 mga_outl(0x3C28, pos);
174 }
175 break;
176 }
177 }
178 }
179
180 static void matroxfb_crtc1_panpos(WPMINFO2) {
181 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
182 unsigned long flags;
183 int panpos;
184
185 matroxfb_DAC_lock_irqsave(flags);
186 panpos = ACCESS_FBINFO(crtc1.panpos);
187 if (panpos >= 0) {
188 unsigned int extvga_reg;
189
190 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
191 extvga_reg = mga_inb(M_EXTVGA_INDEX);
192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
193 if (extvga_reg != 0x00) {
194 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 }
196 }
197 matroxfb_DAC_unlock_irqrestore(flags);
198 }
199 }
200
201 static irqreturn_t matrox_irq(int irq, void *dev_id)
202 {
203 u_int32_t status;
204 int handled = 0;
205
206 MINFO_FROM(dev_id);
207
208 status = mga_inl(M_STATUS);
209
210 if (status & 0x20) {
211 mga_outl(M_ICLEAR, 0x20);
212 ACCESS_FBINFO(crtc1.vsync.cnt)++;
213 matroxfb_crtc1_panpos(PMINFO2);
214 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
215 handled = 1;
216 }
217 if (status & 0x200) {
218 mga_outl(M_ICLEAR, 0x200);
219 ACCESS_FBINFO(crtc2.vsync.cnt)++;
220 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
221 handled = 1;
222 }
223 return IRQ_RETVAL(handled);
224 }
225
226 int matroxfb_enable_irq(WPMINFO int reenable) {
227 u_int32_t bm;
228
229 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
230 bm = 0x220;
231 else
232 bm = 0x020;
233
234 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
235 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
236 IRQF_SHARED, "matroxfb", MINFO)) {
237 clear_bit(0, &ACCESS_FBINFO(irq_flags));
238 return -EINVAL;
239 }
240 /* Clear any pending field interrupts */
241 mga_outl(M_ICLEAR, bm);
242 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
243 } else if (reenable) {
244 u_int32_t ien;
245
246 ien = mga_inl(M_IEN);
247 if ((ien & bm) != bm) {
248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
249 mga_outl(M_IEN, ien | bm);
250 }
251 }
252 return 0;
253 }
254
255 static void matroxfb_disable_irq(WPMINFO2) {
256 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
257 /* Flush pending pan-at-vbl request... */
258 matroxfb_crtc1_panpos(PMINFO2);
259 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 else
262 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
263 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
264 }
265 }
266
267 int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
268 struct matrox_vsync *vs;
269 unsigned int cnt;
270 int ret;
271
272 switch (crtc) {
273 case 0:
274 vs = &ACCESS_FBINFO(crtc1.vsync);
275 break;
276 case 1:
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 return -ENODEV;
279 }
280 vs = &ACCESS_FBINFO(crtc2.vsync);
281 break;
282 default:
283 return -ENODEV;
284 }
285 ret = matroxfb_enable_irq(PMINFO 0);
286 if (ret) {
287 return ret;
288 }
289
290 cnt = vs->cnt;
291 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
292 if (ret < 0) {
293 return ret;
294 }
295 if (ret == 0) {
296 matroxfb_enable_irq(PMINFO 1);
297 return -ETIMEDOUT;
298 }
299 return 0;
300 }
301
302 /* --------------------------------------------------------------------- */
303
304 static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
305 unsigned int pos;
306 unsigned short p0, p1, p2;
307 #ifdef CONFIG_FB_MATROX_32MB
308 unsigned int p3;
309 #endif
310 int vbl;
311 unsigned long flags;
312
313 CRITFLAGS
314
315 DBG(__func__)
316
317 if (ACCESS_FBINFO(dead))
318 return;
319
320 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
321 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
322 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
323 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
324 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
325 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
326 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
327 #ifdef CONFIG_FB_MATROX_32MB
328 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
329 #endif
330
331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
333
334 CRITBEGIN
335
336 matroxfb_DAC_lock_irqsave(flags);
337 mga_setr(M_CRTC_INDEX, 0x0D, p0);
338 mga_setr(M_CRTC_INDEX, 0x0C, p1);
339 #ifdef CONFIG_FB_MATROX_32MB
340 if (ACCESS_FBINFO(devflags.support32MB))
341 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
342 #endif
343 if (vbl) {
344 ACCESS_FBINFO(crtc1.panpos) = p2;
345 } else {
346 /* Abort any pending change */
347 ACCESS_FBINFO(crtc1.panpos) = -1;
348 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
349 }
350 matroxfb_DAC_unlock_irqrestore(flags);
351
352 update_crtc2(PMINFO pos);
353
354 CRITEND
355 }
356
357 static void matroxfb_remove(WPMINFO int dummy) {
358 /* Currently we are holding big kernel lock on all dead & usecount updates.
359 * Destroy everything after all users release it. Especially do not unregister
360 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
361 * for device unplugged when in use.
362 * In future we should point mmio.vbase & video.vbase somewhere where we can
363 * write data without causing too much damage...
364 */
365
366 ACCESS_FBINFO(dead) = 1;
367 if (ACCESS_FBINFO(usecount)) {
368 /* destroy it later */
369 return;
370 }
371 matroxfb_unregister_device(MINFO);
372 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
373 matroxfb_g450_shutdown(PMINFO2);
374 #ifdef CONFIG_MTRR
375 if (ACCESS_FBINFO(mtrr.vram_valid))
376 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
377 #endif
378 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
379 mga_iounmap(ACCESS_FBINFO(video.vbase));
380 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
381 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
382 #ifdef CONFIG_FB_MATROX_MULTIHEAD
383 kfree(minfo);
384 #endif
385 }
386
387 /*
388 * Open/Release the frame buffer device
389 */
390
391 static int matroxfb_open(struct fb_info *info, int user)
392 {
393 MINFO_FROM_INFO(info);
394
395 DBG_LOOP(__func__)
396
397 if (ACCESS_FBINFO(dead)) {
398 return -ENXIO;
399 }
400 ACCESS_FBINFO(usecount)++;
401 if (user) {
402 ACCESS_FBINFO(userusecount)++;
403 }
404 return(0);
405 }
406
407 static int matroxfb_release(struct fb_info *info, int user)
408 {
409 MINFO_FROM_INFO(info);
410
411 DBG_LOOP(__func__)
412
413 if (user) {
414 if (0 == --ACCESS_FBINFO(userusecount)) {
415 matroxfb_disable_irq(PMINFO2);
416 }
417 }
418 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
419 matroxfb_remove(PMINFO 0);
420 }
421 return(0);
422 }
423
424 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
425 struct fb_info* info) {
426 MINFO_FROM_INFO(info);
427
428 DBG(__func__)
429
430 matrox_pan_var(PMINFO var);
431 return 0;
432 }
433
434 static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
435 int bppshft2;
436
437 DBG(__func__)
438
439 bppshft2 = bpp;
440 if (!bppshft2) {
441 return 8;
442 }
443 if (isInterleave(MINFO))
444 bppshft2 >>= 1;
445 if (ACCESS_FBINFO(devflags.video64bits))
446 bppshft2 >>= 1;
447 return bppshft2;
448 }
449
450 static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
451 int over;
452 int rounding;
453
454 DBG(__func__)
455
456 switch (bpp) {
457 case 0: return xres;
458 case 4: rounding = 128;
459 break;
460 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
461 break;
462 case 16: rounding = 32;
463 break;
464 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
465 break;
466 default: rounding = 16;
467 /* on G400, 16 really does not work */
468 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
469 rounding = 32;
470 break;
471 }
472 if (isInterleave(MINFO)) {
473 rounding *= 2;
474 }
475 over = xres % rounding;
476 if (over)
477 xres += rounding-over;
478 return xres;
479 }
480
481 static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
482 const int* width;
483 int xres_new;
484
485 DBG(__func__)
486
487 if (!bpp) return xres;
488
489 width = ACCESS_FBINFO(capable.vxres);
490
491 if (ACCESS_FBINFO(devflags.precise_width)) {
492 while (*width) {
493 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
494 break;
495 }
496 width++;
497 }
498 xres_new = *width;
499 } else {
500 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
501 }
502 return xres_new;
503 }
504
505 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
506
507 DBG(__func__)
508
509 switch (var->bits_per_pixel) {
510 case 4:
511 return 16; /* pseudocolor... 16 entries HW palette */
512 case 8:
513 return 256; /* pseudocolor... 256 entries HW palette */
514 case 16:
515 return 16; /* directcolor... 16 entries SW palette */
516 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
517 case 24:
518 return 16; /* directcolor... 16 entries SW palette */
519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
520 case 32:
521 return 16; /* directcolor... 16 entries SW palette */
522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 }
524 return 16; /* return something reasonable... or panic()? */
525 }
526
527 static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
528 struct RGBT {
529 unsigned char bpp;
530 struct {
531 unsigned char offset,
532 length;
533 } red,
534 green,
535 blue,
536 transp;
537 signed char visual;
538 };
539 static const struct RGBT table[]= {
540 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
541 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
542 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
543 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
544 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
545 };
546 struct RGBT const *rgbt;
547 unsigned int bpp = var->bits_per_pixel;
548 unsigned int vramlen;
549 unsigned int memlen;
550
551 DBG(__func__)
552
553 switch (bpp) {
554 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
555 break;
556 case 8: break;
557 case 16: break;
558 case 24: break;
559 case 32: break;
560 default: return -EINVAL;
561 }
562 *ydstorg = 0;
563 vramlen = ACCESS_FBINFO(video.len_usable);
564 if (var->yres_virtual < var->yres)
565 var->yres_virtual = var->yres;
566 if (var->xres_virtual < var->xres)
567 var->xres_virtual = var->xres;
568
569 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
570 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
571 if (memlen > vramlen) {
572 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
573 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
574 }
575 /* There is hardware bug that no line can cross 4MB boundary */
576 /* give up for CFB24, it is impossible to easy workaround it */
577 /* for other try to do something */
578 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
579 if (bpp == 24) {
580 /* sorry */
581 } else {
582 unsigned int linelen;
583 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
584 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
585 unsigned int max_yres;
586
587 while (m1) {
588 int t;
589
590 while (m2 >= m1) m2 -= m1;
591 t = m1;
592 m1 = m2;
593 m2 = t;
594 }
595 m2 = linelen * PAGE_SIZE / m2;
596 *ydstorg = m2 = 0x400000 % m2;
597 max_yres = (vramlen - m2) / linelen;
598 if (var->yres_virtual > max_yres)
599 var->yres_virtual = max_yres;
600 }
601 }
602 /* YDSTLEN contains only signed 16bit value */
603 if (var->yres_virtual > 32767)
604 var->yres_virtual = 32767;
605 /* we must round yres/xres down, we already rounded y/xres_virtual up
606 if it was possible. We should return -EINVAL, but I disagree */
607 if (var->yres_virtual < var->yres)
608 var->yres = var->yres_virtual;
609 if (var->xres_virtual < var->xres)
610 var->xres = var->xres_virtual;
611 if (var->xoffset + var->xres > var->xres_virtual)
612 var->xoffset = var->xres_virtual - var->xres;
613 if (var->yoffset + var->yres > var->yres_virtual)
614 var->yoffset = var->yres_virtual - var->yres;
615
616 if (bpp == 16 && var->green.length == 5) {
617 bpp--; /* an artifical value - 15 */
618 }
619
620 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
621 #define SETCLR(clr)\
622 var->clr.offset = rgbt->clr.offset;\
623 var->clr.length = rgbt->clr.length
624 SETCLR(red);
625 SETCLR(green);
626 SETCLR(blue);
627 SETCLR(transp);
628 #undef SETCLR
629 *visual = rgbt->visual;
630
631 if (bpp > 8)
632 dprintk("matroxfb: truecolor: "
633 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
634 var->transp.length, var->red.length, var->green.length, var->blue.length,
635 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
636
637 *video_cmap_len = matroxfb_get_cmap_len(var);
638 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
639 var->xres_virtual, var->yres_virtual);
640 return 0;
641 }
642
643 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
644 unsigned blue, unsigned transp,
645 struct fb_info *fb_info)
646 {
647 #ifdef CONFIG_FB_MATROX_MULTIHEAD
648 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
649 #endif
650
651 DBG(__func__)
652
653 /*
654 * Set a single color register. The values supplied are
655 * already rounded down to the hardware's capabilities
656 * (according to the entries in the `var' structure). Return
657 * != 0 for invalid regno.
658 */
659
660 if (regno >= ACCESS_FBINFO(curr.cmap_len))
661 return 1;
662
663 if (ACCESS_FBINFO(fbcon).var.grayscale) {
664 /* gray = 0.30*R + 0.59*G + 0.11*B */
665 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
666 }
667
668 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
669 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
670 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
671 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
672
673 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
674 case 4:
675 case 8:
676 mga_outb(M_DAC_REG, regno);
677 mga_outb(M_DAC_VAL, red);
678 mga_outb(M_DAC_VAL, green);
679 mga_outb(M_DAC_VAL, blue);
680 break;
681 case 16:
682 if (regno >= 16)
683 break;
684 {
685 u_int16_t col =
686 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
687 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
688 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
689 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
690 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
691 }
692 break;
693 case 24:
694 case 32:
695 if (regno >= 16)
696 break;
697 ACCESS_FBINFO(cmap[regno]) =
698 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
699 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
700 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
701 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
702 break;
703 }
704 return 0;
705 }
706
707 static void matroxfb_init_fix(WPMINFO2)
708 {
709 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
710 DBG(__func__)
711
712 strcpy(fix->id,"MATROX");
713
714 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
715 fix->ypanstep = 1;
716 fix->ywrapstep = 0;
717 fix->mmio_start = ACCESS_FBINFO(mmio.base);
718 fix->mmio_len = ACCESS_FBINFO(mmio.len);
719 fix->accel = ACCESS_FBINFO(devflags.accelerator);
720 }
721
722 static void matroxfb_update_fix(WPMINFO2)
723 {
724 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
725 DBG(__func__)
726
727 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
728 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
729 }
730
731 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
732 {
733 int err;
734 int visual;
735 int cmap_len;
736 unsigned int ydstorg;
737 MINFO_FROM_INFO(info);
738
739 if (ACCESS_FBINFO(dead)) {
740 return -ENXIO;
741 }
742 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
743 return err;
744 return 0;
745 }
746
747 static int matroxfb_set_par(struct fb_info *info)
748 {
749 int err;
750 int visual;
751 int cmap_len;
752 unsigned int ydstorg;
753 struct fb_var_screeninfo *var;
754 MINFO_FROM_INFO(info);
755
756 DBG(__func__)
757
758 if (ACCESS_FBINFO(dead)) {
759 return -ENXIO;
760 }
761
762 var = &info->var;
763 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
764 return err;
765 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
766 matroxfb_update_fix(PMINFO2);
767 ACCESS_FBINFO(fbcon).fix.visual = visual;
768 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
769 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
770 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
771 {
772 unsigned int pos;
773
774 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
775 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
776 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
777 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
778 if (var->bits_per_pixel == 4)
779 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
780 else
781 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
782 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
783 { struct my_timming mt;
784 struct matrox_hw_state* hw;
785 int out;
786
787 matroxfb_var2my(var, &mt);
788 mt.crtc = MATROXFB_SRC_CRTC1;
789 /* CRTC1 delays */
790 switch (var->bits_per_pixel) {
791 case 0: mt.delay = 31 + 0; break;
792 case 16: mt.delay = 21 + 8; break;
793 case 24: mt.delay = 17 + 8; break;
794 case 32: mt.delay = 16 + 8; break;
795 default: mt.delay = 31 + 8; break;
796 }
797
798 hw = &ACCESS_FBINFO(hw);
799
800 down_read(&ACCESS_FBINFO(altout).lock);
801 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
802 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
803 ACCESS_FBINFO(outputs[out]).output->compute) {
804 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
805 }
806 }
807 up_read(&ACCESS_FBINFO(altout).lock);
808 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
809 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
810 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
811 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
812 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
813
814 hw->CRTC[0x0D] = pos & 0xFF;
815 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
816 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
817 hw->CRTCEXT[8] = pos >> 21;
818 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
819 update_crtc2(PMINFO pos);
820 down_read(&ACCESS_FBINFO(altout).lock);
821 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
822 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
823 ACCESS_FBINFO(outputs[out]).output->program) {
824 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
825 }
826 }
827 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
828 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
829 ACCESS_FBINFO(outputs[out]).output->start) {
830 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
831 }
832 }
833 up_read(&ACCESS_FBINFO(altout).lock);
834 matrox_cfbX_init(PMINFO2);
835 }
836 }
837 ACCESS_FBINFO(initialized) = 1;
838 return 0;
839 }
840
841 static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
842 {
843 unsigned int sts1;
844
845 matroxfb_enable_irq(PMINFO 0);
846 memset(vblank, 0, sizeof(*vblank));
847 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
848 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
849 sts1 = mga_inb(M_INSTS1);
850 vblank->vcount = mga_inl(M_VCOUNT);
851 /* BTW, on my PIII/450 with G400, reading M_INSTS1
852 byte makes this call about 12% slower (1.70 vs. 2.05 us
853 per ioctl()) */
854 if (sts1 & 1)
855 vblank->flags |= FB_VBLANK_HBLANKING;
856 if (sts1 & 8)
857 vblank->flags |= FB_VBLANK_VSYNCING;
858 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
859 vblank->flags |= FB_VBLANK_VBLANKING;
860 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
861 vblank->flags |= FB_VBLANK_HAVE_COUNT;
862 /* Only one writer, aligned int value...
863 it should work without lock and without atomic_t */
864 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
865 }
866 return 0;
867 }
868
869 static struct matrox_altout panellink_output = {
870 .name = "Panellink output",
871 };
872
873 static int matroxfb_ioctl(struct fb_info *info,
874 unsigned int cmd, unsigned long arg)
875 {
876 void __user *argp = (void __user *)arg;
877 MINFO_FROM_INFO(info);
878
879 DBG(__func__)
880
881 if (ACCESS_FBINFO(dead)) {
882 return -ENXIO;
883 }
884
885 switch (cmd) {
886 case FBIOGET_VBLANK:
887 {
888 struct fb_vblank vblank;
889 int err;
890
891 err = matroxfb_get_vblank(PMINFO &vblank);
892 if (err)
893 return err;
894 if (copy_to_user(argp, &vblank, sizeof(vblank)))
895 return -EFAULT;
896 return 0;
897 }
898 case FBIO_WAITFORVSYNC:
899 {
900 u_int32_t crt;
901
902 if (get_user(crt, (u_int32_t __user *)arg))
903 return -EFAULT;
904
905 return matroxfb_wait_for_sync(PMINFO crt);
906 }
907 case MATROXFB_SET_OUTPUT_MODE:
908 {
909 struct matroxioc_output_mode mom;
910 struct matrox_altout *oproc;
911 int val;
912
913 if (copy_from_user(&mom, argp, sizeof(mom)))
914 return -EFAULT;
915 if (mom.output >= MATROXFB_MAX_OUTPUTS)
916 return -ENXIO;
917 down_read(&ACCESS_FBINFO(altout.lock));
918 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
919 if (!oproc) {
920 val = -ENXIO;
921 } else if (!oproc->verifymode) {
922 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
923 val = 0;
924 } else {
925 val = -EINVAL;
926 }
927 } else {
928 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
929 }
930 if (!val) {
931 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
932 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
933 val = 1;
934 }
935 }
936 up_read(&ACCESS_FBINFO(altout.lock));
937 if (val != 1)
938 return val;
939 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
940 case MATROXFB_SRC_CRTC1:
941 matroxfb_set_par(info);
942 break;
943 case MATROXFB_SRC_CRTC2:
944 {
945 struct matroxfb_dh_fb_info* crtc2;
946
947 down_read(&ACCESS_FBINFO(crtc2.lock));
948 crtc2 = ACCESS_FBINFO(crtc2.info);
949 if (crtc2)
950 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
951 up_read(&ACCESS_FBINFO(crtc2.lock));
952 }
953 break;
954 }
955 return 0;
956 }
957 case MATROXFB_GET_OUTPUT_MODE:
958 {
959 struct matroxioc_output_mode mom;
960 struct matrox_altout *oproc;
961 int val;
962
963 if (copy_from_user(&mom, argp, sizeof(mom)))
964 return -EFAULT;
965 if (mom.output >= MATROXFB_MAX_OUTPUTS)
966 return -ENXIO;
967 down_read(&ACCESS_FBINFO(altout.lock));
968 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
969 if (!oproc) {
970 val = -ENXIO;
971 } else {
972 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
973 val = 0;
974 }
975 up_read(&ACCESS_FBINFO(altout.lock));
976 if (val)
977 return val;
978 if (copy_to_user(argp, &mom, sizeof(mom)))
979 return -EFAULT;
980 return 0;
981 }
982 case MATROXFB_SET_OUTPUT_CONNECTION:
983 {
984 u_int32_t tmp;
985 int i;
986 int changes;
987
988 if (copy_from_user(&tmp, argp, sizeof(tmp)))
989 return -EFAULT;
990 for (i = 0; i < 32; i++) {
991 if (tmp & (1 << i)) {
992 if (i >= MATROXFB_MAX_OUTPUTS)
993 return -ENXIO;
994 if (!ACCESS_FBINFO(outputs[i]).output)
995 return -ENXIO;
996 switch (ACCESS_FBINFO(outputs[i]).src) {
997 case MATROXFB_SRC_NONE:
998 case MATROXFB_SRC_CRTC1:
999 break;
1000 default:
1001 return -EBUSY;
1002 }
1003 }
1004 }
1005 if (ACCESS_FBINFO(devflags.panellink)) {
1006 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1007 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1008 return -EINVAL;
1009 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1010 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1011 return -EBUSY;
1012 }
1013 }
1014 }
1015 }
1016 changes = 0;
1017 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1018 if (tmp & (1 << i)) {
1019 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1020 changes = 1;
1021 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1022 }
1023 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1024 changes = 1;
1025 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1026 }
1027 }
1028 if (!changes)
1029 return 0;
1030 matroxfb_set_par(info);
1031 return 0;
1032 }
1033 case MATROXFB_GET_OUTPUT_CONNECTION:
1034 {
1035 u_int32_t conn = 0;
1036 int i;
1037
1038 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1039 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1040 conn |= 1 << i;
1041 }
1042 }
1043 if (put_user(conn, (u_int32_t __user *)arg))
1044 return -EFAULT;
1045 return 0;
1046 }
1047 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1048 {
1049 u_int32_t conn = 0;
1050 int i;
1051
1052 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1053 if (ACCESS_FBINFO(outputs[i]).output) {
1054 switch (ACCESS_FBINFO(outputs[i]).src) {
1055 case MATROXFB_SRC_NONE:
1056 case MATROXFB_SRC_CRTC1:
1057 conn |= 1 << i;
1058 break;
1059 }
1060 }
1061 }
1062 if (ACCESS_FBINFO(devflags.panellink)) {
1063 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1064 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1065 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1066 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1067 }
1068 if (put_user(conn, (u_int32_t __user *)arg))
1069 return -EFAULT;
1070 return 0;
1071 }
1072 case MATROXFB_GET_ALL_OUTPUTS:
1073 {
1074 u_int32_t conn = 0;
1075 int i;
1076
1077 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1078 if (ACCESS_FBINFO(outputs[i]).output) {
1079 conn |= 1 << i;
1080 }
1081 }
1082 if (put_user(conn, (u_int32_t __user *)arg))
1083 return -EFAULT;
1084 return 0;
1085 }
1086 case VIDIOC_QUERYCAP:
1087 {
1088 struct v4l2_capability r;
1089
1090 memset(&r, 0, sizeof(r));
1091 strcpy(r.driver, "matroxfb");
1092 strcpy(r.card, "Matrox");
1093 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1094 r.version = KERNEL_VERSION(1,0,0);
1095 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1096 if (copy_to_user(argp, &r, sizeof(r)))
1097 return -EFAULT;
1098 return 0;
1099
1100 }
1101 case VIDIOC_QUERYCTRL:
1102 {
1103 struct v4l2_queryctrl qctrl;
1104 int err;
1105
1106 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1107 return -EFAULT;
1108
1109 down_read(&ACCESS_FBINFO(altout).lock);
1110 if (!ACCESS_FBINFO(outputs[1]).output) {
1111 err = -ENXIO;
1112 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1113 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1114 } else {
1115 err = -EINVAL;
1116 }
1117 up_read(&ACCESS_FBINFO(altout).lock);
1118 if (err >= 0 &&
1119 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1120 return -EFAULT;
1121 return err;
1122 }
1123 case VIDIOC_G_CTRL:
1124 {
1125 struct v4l2_control ctrl;
1126 int err;
1127
1128 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1129 return -EFAULT;
1130
1131 down_read(&ACCESS_FBINFO(altout).lock);
1132 if (!ACCESS_FBINFO(outputs[1]).output) {
1133 err = -ENXIO;
1134 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1135 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1136 } else {
1137 err = -EINVAL;
1138 }
1139 up_read(&ACCESS_FBINFO(altout).lock);
1140 if (err >= 0 &&
1141 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1142 return -EFAULT;
1143 return err;
1144 }
1145 case VIDIOC_S_CTRL_OLD:
1146 case VIDIOC_S_CTRL:
1147 {
1148 struct v4l2_control ctrl;
1149 int err;
1150
1151 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1152 return -EFAULT;
1153
1154 down_read(&ACCESS_FBINFO(altout).lock);
1155 if (!ACCESS_FBINFO(outputs[1]).output) {
1156 err = -ENXIO;
1157 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1158 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1159 } else {
1160 err = -EINVAL;
1161 }
1162 up_read(&ACCESS_FBINFO(altout).lock);
1163 return err;
1164 }
1165 }
1166 return -ENOTTY;
1167 }
1168
1169 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1170
1171 static int matroxfb_blank(int blank, struct fb_info *info)
1172 {
1173 int seq;
1174 int crtc;
1175 CRITFLAGS
1176 MINFO_FROM_INFO(info);
1177
1178 DBG(__func__)
1179
1180 if (ACCESS_FBINFO(dead))
1181 return 1;
1182
1183 switch (blank) {
1184 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1185 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1186 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1187 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1188 default: seq = 0x00; crtc = 0x00; break;
1189 }
1190
1191 CRITBEGIN
1192
1193 mga_outb(M_SEQ_INDEX, 1);
1194 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1195 mga_outb(M_EXTVGA_INDEX, 1);
1196 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1197
1198 CRITEND
1199 return 0;
1200 }
1201
1202 static struct fb_ops matroxfb_ops = {
1203 .owner = THIS_MODULE,
1204 .fb_open = matroxfb_open,
1205 .fb_release = matroxfb_release,
1206 .fb_check_var = matroxfb_check_var,
1207 .fb_set_par = matroxfb_set_par,
1208 .fb_setcolreg = matroxfb_setcolreg,
1209 .fb_pan_display =matroxfb_pan_display,
1210 .fb_blank = matroxfb_blank,
1211 .fb_ioctl = matroxfb_ioctl,
1212 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1213 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1214 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1215 /* .fb_cursor = <set by matrox_cfbX_init>, */
1216 };
1217
1218 #define RSDepth(X) (((X) >> 8) & 0x0F)
1219 #define RS8bpp 0x1
1220 #define RS15bpp 0x2
1221 #define RS16bpp 0x3
1222 #define RS32bpp 0x4
1223 #define RS4bpp 0x5
1224 #define RS24bpp 0x6
1225 #define RSText 0x7
1226 #define RSText8 0x8
1227 /* 9-F */
1228 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1229 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1230 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1231 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1232 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1233 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1234 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1235 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1236 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1237 };
1238
1239 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1240 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1241 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1242 static int inv24; /* "matrox:inv24" */
1243 static int cross4MB = -1; /* "matrox:cross4MB" */
1244 static int disabled; /* "matrox:disabled" */
1245 static int noaccel; /* "matrox:noaccel" */
1246 static int nopan; /* "matrox:nopan" */
1247 static int no_pci_retry; /* "matrox:nopciretry" */
1248 static int novga; /* "matrox:novga" */
1249 static int nobios; /* "matrox:nobios" */
1250 static int noinit = 1; /* "matrox:init" */
1251 static int inverse; /* "matrox:inverse" */
1252 static int sgram; /* "matrox:sgram" */
1253 #ifdef CONFIG_MTRR
1254 static int mtrr = 1; /* "matrox:nomtrr" */
1255 #endif
1256 static int grayscale; /* "matrox:grayscale" */
1257 static int dev = -1; /* "matrox:dev:xxxxx" */
1258 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1259 static int depth = -1; /* "matrox:depth:xxxxx" */
1260 static unsigned int xres; /* "matrox:xres:xxxxx" */
1261 static unsigned int yres; /* "matrox:yres:xxxxx" */
1262 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1263 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1264 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1265 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1266 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1267 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1268 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1269 static int sync = -1; /* "matrox:sync:xxxxx" */
1270 static unsigned int fv; /* "matrox:fv:xxxxx" */
1271 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1272 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1273 static int dfp; /* "matrox:dfp */
1274 static int dfp_type = -1; /* "matrox:dfp:xxx */
1275 static int memtype = -1; /* "matrox:memtype:xxx" */
1276 static char outputs[8]; /* "matrox:outputs:xxx" */
1277
1278 #ifndef MODULE
1279 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1280 #endif
1281
1282 static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1283 vaddr_t vm;
1284 unsigned int offs;
1285 unsigned int offs2;
1286 unsigned char orig;
1287 unsigned char bytes[32];
1288 unsigned char* tmp;
1289
1290 DBG(__func__)
1291
1292 vm = ACCESS_FBINFO(video.vbase);
1293 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1294 /* at least 2MB */
1295 if (maxSize < 0x0200000) return 0;
1296 if (maxSize > 0x2000000) maxSize = 0x2000000;
1297
1298 mga_outb(M_EXTVGA_INDEX, 0x03);
1299 orig = mga_inb(M_EXTVGA_DATA);
1300 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1301
1302 tmp = bytes;
1303 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1304 *tmp++ = mga_readb(vm, offs);
1305 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1306 mga_writeb(vm, offs, 0x02);
1307 mga_outb(M_CACHEFLUSH, 0x00);
1308 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1309 if (mga_readb(vm, offs) != 0x02)
1310 break;
1311 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1312 if (mga_readb(vm, offs))
1313 break;
1314 }
1315 tmp = bytes;
1316 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1317 mga_writeb(vm, offs2, *tmp++);
1318
1319 mga_outb(M_EXTVGA_INDEX, 0x03);
1320 mga_outb(M_EXTVGA_DATA, orig);
1321
1322 *realSize = offs - 0x100000;
1323 #ifdef CONFIG_FB_MATROX_MILLENIUM
1324 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1325 #endif
1326 return 1;
1327 }
1328
1329 struct video_board {
1330 int maxvram;
1331 int maxdisplayable;
1332 int accelID;
1333 struct matrox_switch* lowlevel;
1334 };
1335 #ifdef CONFIG_FB_MATROX_MILLENIUM
1336 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1337 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1338 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1339 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1340 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1341 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1342 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1343 #ifdef CONFIG_FB_MATROX_G
1344 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1345 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1346 #ifdef CONFIG_FB_MATROX_32MB
1347 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1348 whole 32MB */
1349 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1350 #else
1351 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1352 #endif
1353 #endif
1354
1355 #define DEVF_VIDEO64BIT 0x0001
1356 #define DEVF_SWAPS 0x0002
1357 #define DEVF_SRCORG 0x0004
1358 #define DEVF_DUALHEAD 0x0008
1359 #define DEVF_CROSS4MB 0x0010
1360 #define DEVF_TEXT4B 0x0020
1361 /* #define DEVF_recycled 0x0040 */
1362 /* #define DEVF_recycled 0x0080 */
1363 #define DEVF_SUPPORT32MB 0x0100
1364 #define DEVF_ANY_VXRES 0x0200
1365 #define DEVF_TEXT16B 0x0400
1366 #define DEVF_CRTC2 0x0800
1367 #define DEVF_MAVEN_CAPABLE 0x1000
1368 #define DEVF_PANELLINK_CAPABLE 0x2000
1369 #define DEVF_G450DAC 0x4000
1370
1371 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1372 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1373 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1374 #define DEVF_G200 (DEVF_G2CORE)
1375 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1376 /* if you'll find how to drive DFP... */
1377 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1378 #define DEVF_G550 (DEVF_G450)
1379
1380 static struct board {
1381 unsigned short vendor, device, rev, svid, sid;
1382 unsigned int flags;
1383 unsigned int maxclk;
1384 enum mga_chip chip;
1385 struct video_board* base;
1386 const char* name;
1387 } dev_list[] = {
1388 #ifdef CONFIG_FB_MATROX_MILLENIUM
1389 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1390 0, 0,
1391 DEVF_TEXT4B,
1392 230000,
1393 MGA_2064,
1394 &vbMillennium,
1395 "Millennium (PCI)"},
1396 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1397 0, 0,
1398 DEVF_SWAPS,
1399 220000,
1400 MGA_2164,
1401 &vbMillennium2,
1402 "Millennium II (PCI)"},
1403 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1404 0, 0,
1405 DEVF_SWAPS,
1406 250000,
1407 MGA_2164,
1408 &vbMillennium2A,
1409 "Millennium II (AGP)"},
1410 #endif
1411 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1412 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1413 0, 0,
1414 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1415 180000,
1416 MGA_1064,
1417 &vbMystique,
1418 "Mystique (PCI)"},
1419 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1420 0, 0,
1421 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1422 220000,
1423 MGA_1164,
1424 &vbMystique,
1425 "Mystique 220 (PCI)"},
1426 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1427 0, 0,
1428 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1429 180000,
1430 MGA_1064,
1431 &vbMystique,
1432 "Mystique (AGP)"},
1433 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1434 0, 0,
1435 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1436 220000,
1437 MGA_1164,
1438 &vbMystique,
1439 "Mystique 220 (AGP)"},
1440 #endif
1441 #ifdef CONFIG_FB_MATROX_G
1442 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1443 0, 0,
1444 DEVF_G100,
1445 230000,
1446 MGA_G100,
1447 &vbG100,
1448 "MGA-G100 (PCI)"},
1449 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1450 0, 0,
1451 DEVF_G100,
1452 230000,
1453 MGA_G100,
1454 &vbG100,
1455 "MGA-G100 (AGP)"},
1456 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI, 0xFF,
1457 0, 0,
1458 DEVF_G200,
1459 230000,
1460 MGA_G200,
1461 &vbG200,
1462 "MGA-G200eV (PCI)"},
1463 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1464 0, 0,
1465 DEVF_G200,
1466 250000,
1467 MGA_G200,
1468 &vbG200,
1469 "MGA-G200 (PCI)"},
1470 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1471 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1472 DEVF_G200,
1473 220000,
1474 MGA_G200,
1475 &vbG200,
1476 "MGA-G200 (AGP)"},
1477 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1478 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1479 DEVF_G200,
1480 230000,
1481 MGA_G200,
1482 &vbG200,
1483 "Mystique G200 (AGP)"},
1484 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1485 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1486 DEVF_G200,
1487 250000,
1488 MGA_G200,
1489 &vbG200,
1490 "Millennium G200 (AGP)"},
1491 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1492 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1493 DEVF_G200,
1494 230000,
1495 MGA_G200,
1496 &vbG200,
1497 "Marvel G200 (AGP)"},
1498 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1499 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1500 DEVF_G200,
1501 230000,
1502 MGA_G200,
1503 &vbG200,
1504 "MGA-G200 (AGP)"},
1505 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1506 0, 0,
1507 DEVF_G200,
1508 230000,
1509 MGA_G200,
1510 &vbG200,
1511 "G200 (AGP)"},
1512 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1513 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1514 DEVF_G400,
1515 360000,
1516 MGA_G400,
1517 &vbG400,
1518 "Millennium G400 MAX (AGP)"},
1519 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1520 0, 0,
1521 DEVF_G400,
1522 300000,
1523 MGA_G400,
1524 &vbG400,
1525 "G400 (AGP)"},
1526 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1527 0, 0,
1528 DEVF_G450,
1529 360000,
1530 MGA_G450,
1531 &vbG400,
1532 "G450"},
1533 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1534 0, 0,
1535 DEVF_G550,
1536 360000,
1537 MGA_G550,
1538 &vbG400,
1539 "G550"},
1540 #endif
1541 {0, 0, 0xFF,
1542 0, 0,
1543 0,
1544 0,
1545 0,
1546 NULL,
1547 NULL}};
1548
1549 #ifndef MODULE
1550 static struct fb_videomode defaultmode = {
1551 /* 640x480 @ 60Hz, 31.5 kHz */
1552 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1553 0, FB_VMODE_NONINTERLACED
1554 };
1555 #endif /* !MODULE */
1556
1557 static int hotplug = 0;
1558
1559 static void setDefaultOutputs(WPMINFO2) {
1560 unsigned int i;
1561 const char* ptr;
1562
1563 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1564 if (ACCESS_FBINFO(devflags.g450dac)) {
1565 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1566 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1567 } else if (dfp) {
1568 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1569 }
1570 ptr = outputs;
1571 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1572 char c = *ptr++;
1573
1574 if (c == 0) {
1575 break;
1576 }
1577 if (c == '0') {
1578 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1579 } else if (c == '1') {
1580 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1581 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1582 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1583 } else {
1584 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1585 break;
1586 }
1587 }
1588 /* Nullify this option for subsequent adapters */
1589 outputs[0] = 0;
1590 }
1591
1592 static int initMatrox2(WPMINFO struct board* b){
1593 unsigned long ctrlptr_phys = 0;
1594 unsigned long video_base_phys = 0;
1595 unsigned int memsize;
1596 int err;
1597
1598 static struct pci_device_id intel_82437[] = {
1599 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1600 { },
1601 };
1602
1603 DBG(__func__)
1604
1605 /* set default values... */
1606 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1607
1608 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1609 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1610 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1611
1612 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1613 ACCESS_FBINFO(capable.plnwt) = 1;
1614 ACCESS_FBINFO(chip) = b->chip;
1615 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1616 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1617 if (b->flags & DEVF_TEXT4B) {
1618 ACCESS_FBINFO(devflags.vgastep) = 4;
1619 ACCESS_FBINFO(devflags.textmode) = 4;
1620 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1621 } else if (b->flags & DEVF_TEXT16B) {
1622 ACCESS_FBINFO(devflags.vgastep) = 16;
1623 ACCESS_FBINFO(devflags.textmode) = 1;
1624 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1625 } else {
1626 ACCESS_FBINFO(devflags.vgastep) = 8;
1627 ACCESS_FBINFO(devflags.textmode) = 1;
1628 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1629 }
1630 #ifdef CONFIG_FB_MATROX_32MB
1631 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1632 #endif
1633 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1634 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1635 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1636 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1637 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1638 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1639 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1640 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1641 setDefaultOutputs(PMINFO2);
1642 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1643 ACCESS_FBINFO(outputs[2]).data = MINFO;
1644 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1645 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1646 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1647 ACCESS_FBINFO(devflags.panellink) = 1;
1648 }
1649
1650 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1651 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1652 if (b->flags & DEVF_SWAPS) {
1653 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1654 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1655 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1656 } else {
1657 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1658 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1659 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1660 }
1661 err = -EINVAL;
1662 if (!ctrlptr_phys) {
1663 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1664 goto fail;
1665 }
1666 if (!video_base_phys) {
1667 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1668 goto fail;
1669 }
1670 memsize = b->base->maxvram;
1671 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1672 goto fail;
1673 }
1674 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1675 goto failCtrlMR;
1676 }
1677 ACCESS_FBINFO(video.len_maximum) = memsize;
1678 /* convert mem (autodetect k, M) */
1679 if (mem < 1024) mem *= 1024;
1680 if (mem < 0x00100000) mem *= 1024;
1681
1682 if (mem && (mem < memsize))
1683 memsize = mem;
1684 err = -ENOMEM;
1685 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1686 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1687 goto failVideoMR;
1688 }
1689 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1690 ACCESS_FBINFO(mmio.len) = 16384;
1691 ACCESS_FBINFO(video.base) = video_base_phys;
1692 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1693 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1694 video_base_phys, memsize);
1695 goto failCtrlIO;
1696 }
1697 {
1698 u_int32_t cmd;
1699 u_int32_t mga_option;
1700
1701 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1702 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1703 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1704 mga_option |= MX_OPTION_BSWAP;
1705 /* disable palette snooping */
1706 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1707 if (pci_dev_present(intel_82437)) {
1708 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1709 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1710 }
1711 mga_option |= 0x20000000;
1712 ACCESS_FBINFO(devflags.nopciretry) = 1;
1713 }
1714 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1715 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1716 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1717
1718 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1719 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1720 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1721 }
1722
1723 err = -ENXIO;
1724 matroxfb_read_pins(PMINFO2);
1725 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1726 goto failVideoIO;
1727 }
1728
1729 err = -ENOMEM;
1730 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1731 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1732 goto failVideoIO;
1733 }
1734 ACCESS_FBINFO(devflags.ydstorg) = 0;
1735
1736 ACCESS_FBINFO(video.base) = video_base_phys;
1737 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1738 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1739 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1740 #ifdef CONFIG_MTRR
1741 if (mtrr) {
1742 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1743 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1744 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1745 }
1746 #endif /* CONFIG_MTRR */
1747
1748 if (!ACCESS_FBINFO(devflags.novga))
1749 request_region(0x3C0, 32, "matrox");
1750 matroxfb_g450_connect(PMINFO2);
1751 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1752
1753 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1754 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1755 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1756 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1757 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1758
1759 /* static settings */
1760 vesafb_defined.red = colors[depth-1].red;
1761 vesafb_defined.green = colors[depth-1].green;
1762 vesafb_defined.blue = colors[depth-1].blue;
1763 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1764 vesafb_defined.grayscale = grayscale;
1765 vesafb_defined.vmode = 0;
1766 if (noaccel)
1767 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1768
1769 ACCESS_FBINFO(fbops) = matroxfb_ops;
1770 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1771 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1772 /* after __init time we are like module... no logo */
1773 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1774 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1775 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1776 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1777 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1778 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1779 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1780 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1781 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1782
1783 #ifndef MODULE
1784 /* mode database is marked __init!!! */
1785 if (!hotplug) {
1786 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1787 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1788 }
1789 #endif /* !MODULE */
1790
1791 /* mode modifiers */
1792 if (hslen)
1793 vesafb_defined.hsync_len = hslen;
1794 if (vslen)
1795 vesafb_defined.vsync_len = vslen;
1796 if (left != ~0)
1797 vesafb_defined.left_margin = left;
1798 if (right != ~0)
1799 vesafb_defined.right_margin = right;
1800 if (upper != ~0)
1801 vesafb_defined.upper_margin = upper;
1802 if (lower != ~0)
1803 vesafb_defined.lower_margin = lower;
1804 if (xres)
1805 vesafb_defined.xres = xres;
1806 if (yres)
1807 vesafb_defined.yres = yres;
1808 if (sync != -1)
1809 vesafb_defined.sync = sync;
1810 else if (vesafb_defined.sync == ~0) {
1811 vesafb_defined.sync = 0;
1812 if (yres < 400)
1813 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1814 else if (yres < 480)
1815 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1816 }
1817
1818 /* fv, fh, maxclk limits was specified */
1819 {
1820 unsigned int tmp;
1821
1822 if (fv) {
1823 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1824 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1825 if ((tmp < fh) || (fh == 0)) fh = tmp;
1826 }
1827 if (fh) {
1828 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1829 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1830 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1831 }
1832 tmp = (maxclk + 499) / 500;
1833 if (tmp) {
1834 tmp = (2000000000 + tmp) / tmp;
1835 if (tmp > pixclock) pixclock = tmp;
1836 }
1837 }
1838 if (pixclock) {
1839 if (pixclock < 2000) /* > 500MHz */
1840 pixclock = 4000; /* 250MHz */
1841 if (pixclock > 1000000)
1842 pixclock = 1000000; /* 1MHz */
1843 vesafb_defined.pixclock = pixclock;
1844 }
1845
1846 /* FIXME: Where to move this?! */
1847 #if defined(CONFIG_PPC_PMAC)
1848 #ifndef MODULE
1849 if (machine_is(powermac)) {
1850 struct fb_var_screeninfo var;
1851 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1852 default_vmode = VMODE_640_480_60;
1853 #ifdef CONFIG_NVRAM
1854 if (default_cmode == CMODE_NVRAM)
1855 default_cmode = nvram_read_byte(NV_CMODE);
1856 #endif
1857 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1858 default_cmode = CMODE_8;
1859 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1860 var.accel_flags = vesafb_defined.accel_flags;
1861 var.xoffset = var.yoffset = 0;
1862 /* Note: mac_vmode_to_var() does not set all parameters */
1863 vesafb_defined = var;
1864 }
1865 }
1866 #endif /* !MODULE */
1867 #endif /* CONFIG_PPC_PMAC */
1868 vesafb_defined.xres_virtual = vesafb_defined.xres;
1869 if (nopan) {
1870 vesafb_defined.yres_virtual = vesafb_defined.yres;
1871 } else {
1872 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1873 to yres_virtual * xres_virtual < 2^32 */
1874 }
1875 matroxfb_init_fix(PMINFO2);
1876 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase));
1877 matroxfb_update_fix(PMINFO2);
1878 /* Normalize values (namely yres_virtual) */
1879 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1880 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1881 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1882 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1883 * anyway. But we at least tried... */
1884 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1885 err = -EINVAL;
1886
1887 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1888 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1889 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1890 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1891 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1892
1893 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1894 * and we do not want currcon == 0 for subsequent framebuffers */
1895
1896 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
1897 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1898 goto failVideoIO;
1899 }
1900 printk("fb%d: %s frame buffer device\n",
1901 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1902
1903 /* there is no console on this fb... but we have to initialize hardware
1904 * until someone tells me what is proper thing to do */
1905 if (!ACCESS_FBINFO(initialized)) {
1906 printk(KERN_INFO "fb%d: initializing hardware\n",
1907 ACCESS_FBINFO(fbcon.node));
1908 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1909 * already before, so register_framebuffer works correctly. */
1910 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1911 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1912 }
1913
1914 return 0;
1915 failVideoIO:;
1916 matroxfb_g450_shutdown(PMINFO2);
1917 mga_iounmap(ACCESS_FBINFO(video.vbase));
1918 failCtrlIO:;
1919 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1920 failVideoMR:;
1921 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1922 failCtrlMR:;
1923 release_mem_region(ctrlptr_phys, 16384);
1924 fail:;
1925 return err;
1926 }
1927
1928 static LIST_HEAD(matroxfb_list);
1929 static LIST_HEAD(matroxfb_driver_list);
1930
1931 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1932 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1933 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1934 struct matrox_fb_info* minfo;
1935
1936 list_add(&drv->node, &matroxfb_driver_list);
1937 for (minfo = matroxfb_l(matroxfb_list.next);
1938 minfo != matroxfb_l(&matroxfb_list);
1939 minfo = matroxfb_l(minfo->next_fb.next)) {
1940 void* p;
1941
1942 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1943 continue;
1944 p = drv->probe(minfo);
1945 if (p) {
1946 minfo->drivers_data[minfo->drivers_count] = p;
1947 minfo->drivers[minfo->drivers_count++] = drv;
1948 }
1949 }
1950 return 0;
1951 }
1952
1953 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1954 struct matrox_fb_info* minfo;
1955
1956 list_del(&drv->node);
1957 for (minfo = matroxfb_l(matroxfb_list.next);
1958 minfo != matroxfb_l(&matroxfb_list);
1959 minfo = matroxfb_l(minfo->next_fb.next)) {
1960 int i;
1961
1962 for (i = 0; i < minfo->drivers_count; ) {
1963 if (minfo->drivers[i] == drv) {
1964 if (drv && drv->remove)
1965 drv->remove(minfo, minfo->drivers_data[i]);
1966 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1967 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1968 } else
1969 i++;
1970 }
1971 }
1972 }
1973
1974 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1975 struct matroxfb_driver* drv;
1976 int i = 0;
1977 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1978 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1979 drv != matroxfb_driver_l(&matroxfb_driver_list);
1980 drv = matroxfb_driver_l(drv->node.next)) {
1981 if (drv && drv->probe) {
1982 void *p = drv->probe(minfo);
1983 if (p) {
1984 minfo->drivers_data[i] = p;
1985 minfo->drivers[i++] = drv;
1986 if (i == MATROXFB_MAX_FB_DRIVERS)
1987 break;
1988 }
1989 }
1990 }
1991 minfo->drivers_count = i;
1992 }
1993
1994 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1995 int i;
1996
1997 list_del(&ACCESS_FBINFO(next_fb));
1998 for (i = 0; i < minfo->drivers_count; i++) {
1999 struct matroxfb_driver* drv = minfo->drivers[i];
2000
2001 if (drv && drv->remove)
2002 drv->remove(minfo, minfo->drivers_data[i]);
2003 }
2004 }
2005
2006 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
2007 struct board* b;
2008 u_int16_t svid;
2009 u_int16_t sid;
2010 struct matrox_fb_info* minfo;
2011 int err;
2012 u_int32_t cmd;
2013 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2014 static int registered = 0;
2015 #endif
2016 DBG(__func__)
2017
2018 svid = pdev->subsystem_vendor;
2019 sid = pdev->subsystem_device;
2020 for (b = dev_list; b->vendor; b++) {
2021 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue;
2022 if (b->svid)
2023 if ((b->svid != svid) || (b->sid != sid)) continue;
2024 break;
2025 }
2026 /* not match... */
2027 if (!b->vendor)
2028 return -ENODEV;
2029 if (dev > 0) {
2030 /* not requested one... */
2031 dev--;
2032 return -ENODEV;
2033 }
2034 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2035 if (pci_enable_device(pdev)) {
2036 return -1;
2037 }
2038
2039 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2040 minfo = kmalloc(sizeof(*minfo), GFP_KERNEL);
2041 if (!minfo)
2042 return -1;
2043 #else
2044 if (registered) /* singlehead driver... */
2045 return -1;
2046 minfo = &matroxfb_global_mxinfo;
2047 #endif
2048 memset(MINFO, 0, sizeof(*MINFO));
2049
2050 ACCESS_FBINFO(pcidev) = pdev;
2051 ACCESS_FBINFO(dead) = 0;
2052 ACCESS_FBINFO(usecount) = 0;
2053 ACCESS_FBINFO(userusecount) = 0;
2054
2055 pci_set_drvdata(pdev, MINFO);
2056 /* DEVFLAGS */
2057 ACCESS_FBINFO(devflags.memtype) = memtype;
2058 if (memtype != -1)
2059 noinit = 0;
2060 if (cmd & PCI_COMMAND_MEMORY) {
2061 ACCESS_FBINFO(devflags.novga) = novga;
2062 ACCESS_FBINFO(devflags.nobios) = nobios;
2063 ACCESS_FBINFO(devflags.noinit) = noinit;
2064 /* subsequent heads always needs initialization and must not enable BIOS */
2065 novga = 1;
2066 nobios = 1;
2067 noinit = 0;
2068 } else {
2069 ACCESS_FBINFO(devflags.novga) = 1;
2070 ACCESS_FBINFO(devflags.nobios) = 1;
2071 ACCESS_FBINFO(devflags.noinit) = 0;
2072 }
2073
2074 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2075 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2076 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2077 ACCESS_FBINFO(devflags.sgram) = sgram;
2078 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2079
2080 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2081 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2082 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2083 init_rwsem(&ACCESS_FBINFO(altout.lock));
2084 ACCESS_FBINFO(irq_flags) = 0;
2085 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2086 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2087 ACCESS_FBINFO(crtc1.panpos) = -1;
2088
2089 err = initMatrox2(PMINFO b);
2090 if (!err) {
2091 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2092 registered = 1;
2093 #endif
2094 matroxfb_register_device(MINFO);
2095 return 0;
2096 }
2097 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2098 kfree(minfo);
2099 #endif
2100 return -1;
2101 }
2102
2103 static void pci_remove_matrox(struct pci_dev* pdev) {
2104 struct matrox_fb_info* minfo;
2105
2106 minfo = pci_get_drvdata(pdev);
2107 matroxfb_remove(PMINFO 1);
2108 }
2109
2110 static struct pci_device_id matroxfb_devices[] = {
2111 #ifdef CONFIG_FB_MATROX_MILLENIUM
2112 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2114 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2115 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2116 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2117 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2118 #endif
2119 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2120 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2122 #endif
2123 #ifdef CONFIG_FB_MATROX_G
2124 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2126 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2127 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2128 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200EV_PCI,
2129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2130 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2131 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2132 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2134 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2136 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2137 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2138 #endif
2139 {0, 0,
2140 0, 0, 0, 0, 0}
2141 };
2142
2143 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2144
2145
2146 static struct pci_driver matroxfb_driver = {
2147 .name = "matroxfb",
2148 .id_table = matroxfb_devices,
2149 .probe = matroxfb_probe,
2150 .remove = pci_remove_matrox,
2151 };
2152
2153 /* **************************** init-time only **************************** */
2154
2155 #define RSResolution(X) ((X) & 0x0F)
2156 #define RS640x400 1
2157 #define RS640x480 2
2158 #define RS800x600 3
2159 #define RS1024x768 4
2160 #define RS1280x1024 5
2161 #define RS1600x1200 6
2162 #define RS768x576 7
2163 #define RS960x720 8
2164 #define RS1152x864 9
2165 #define RS1408x1056 10
2166 #define RS640x350 11
2167 #define RS1056x344 12 /* 132 x 43 text */
2168 #define RS1056x400 13 /* 132 x 50 text */
2169 #define RS1056x480 14 /* 132 x 60 text */
2170 #define RSNoxNo 15
2171 /* 10-FF */
2172 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2173 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2174 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2175 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2176 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2177 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2178 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2179 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2180 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2181 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2182 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2183 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2184 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2185 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2186 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2187 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2188 };
2189
2190 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2191 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2192 /* default must be first */
2193 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2194 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2195 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2196 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2197 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2198 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2199 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2200 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2201 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2202 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2203 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2204 { 0x110, RSCreate(RS640x480, RS15bpp) },
2205 { 0x181, RSCreate(RS768x576, RS15bpp) },
2206 { 0x113, RSCreate(RS800x600, RS15bpp) },
2207 { 0x189, RSCreate(RS960x720, RS15bpp) },
2208 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2209 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2210 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2211 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2212 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2213 { 0x111, RSCreate(RS640x480, RS16bpp) },
2214 { 0x182, RSCreate(RS768x576, RS16bpp) },
2215 { 0x114, RSCreate(RS800x600, RS16bpp) },
2216 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2217 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2218 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2219 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2220 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2221 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2222 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2223 { 0x184, RSCreate(RS768x576, RS24bpp) },
2224 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2225 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2226 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2227 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2228 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2229 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2230 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2231 { 0x112, RSCreate(RS640x480, RS32bpp) },
2232 { 0x183, RSCreate(RS768x576, RS32bpp) },
2233 { 0x115, RSCreate(RS800x600, RS32bpp) },
2234 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2235 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2236 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2237 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2238 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2239 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2240 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2241 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2242 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2243 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2244 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2245 { 0, 0 }};
2246
2247 static void __init matroxfb_init_params(void) {
2248 /* fh from kHz to Hz */
2249 if (fh < 1000)
2250 fh *= 1000; /* 1kHz minimum */
2251 /* maxclk */
2252 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2253 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2254 /* fix VESA number */
2255 if (vesa != ~0)
2256 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2257
2258 /* static settings */
2259 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2260 if (RSptr->vesa == vesa) break;
2261 }
2262 if (!RSptr->vesa) {
2263 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2264 RSptr = vesamap;
2265 }
2266 {
2267 int res = RSResolution(RSptr->info)-1;
2268 if (left == ~0)
2269 left = timmings[res].left;
2270 if (!xres)
2271 xres = timmings[res].xres;
2272 if (right == ~0)
2273 right = timmings[res].right;
2274 if (!hslen)
2275 hslen = timmings[res].hslen;
2276 if (upper == ~0)
2277 upper = timmings[res].upper;
2278 if (!yres)
2279 yres = timmings[res].yres;
2280 if (lower == ~0)
2281 lower = timmings[res].lower;
2282 if (!vslen)
2283 vslen = timmings[res].vslen;
2284 if (!(fv||fh||maxclk||pixclock))
2285 fv = timmings[res].vfreq;
2286 if (depth == -1)
2287 depth = RSDepth(RSptr->info);
2288 }
2289 }
2290
2291 static int __init matrox_init(void) {
2292 int err;
2293
2294 matroxfb_init_params();
2295 err = pci_register_driver(&matroxfb_driver);
2296 dev = -1; /* accept all new devices... */
2297 return err;
2298 }
2299
2300 /* **************************** exit-time only **************************** */
2301
2302 static void __exit matrox_done(void) {
2303 pci_unregister_driver(&matroxfb_driver);
2304 }
2305
2306 #ifndef MODULE
2307
2308 /* ************************* init in-kernel code ************************** */
2309
2310 static int __init matroxfb_setup(char *options) {
2311 char *this_opt;
2312
2313 DBG(__func__)
2314
2315 if (!options || !*options)
2316 return 0;
2317
2318 while ((this_opt = strsep(&options, ",")) != NULL) {
2319 if (!*this_opt) continue;
2320
2321 dprintk("matroxfb_setup: option %s\n", this_opt);
2322
2323 if (!strncmp(this_opt, "dev:", 4))
2324 dev = simple_strtoul(this_opt+4, NULL, 0);
2325 else if (!strncmp(this_opt, "depth:", 6)) {
2326 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2327 case 0: depth = RSText; break;
2328 case 4: depth = RS4bpp; break;
2329 case 8: depth = RS8bpp; break;
2330 case 15:depth = RS15bpp; break;
2331 case 16:depth = RS16bpp; break;
2332 case 24:depth = RS24bpp; break;
2333 case 32:depth = RS32bpp; break;
2334 default:
2335 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2336 }
2337 } else if (!strncmp(this_opt, "xres:", 5))
2338 xres = simple_strtoul(this_opt+5, NULL, 0);
2339 else if (!strncmp(this_opt, "yres:", 5))
2340 yres = simple_strtoul(this_opt+5, NULL, 0);
2341 else if (!strncmp(this_opt, "vslen:", 6))
2342 vslen = simple_strtoul(this_opt+6, NULL, 0);
2343 else if (!strncmp(this_opt, "hslen:", 6))
2344 hslen = simple_strtoul(this_opt+6, NULL, 0);
2345 else if (!strncmp(this_opt, "left:", 5))
2346 left = simple_strtoul(this_opt+5, NULL, 0);
2347 else if (!strncmp(this_opt, "right:", 6))
2348 right = simple_strtoul(this_opt+6, NULL, 0);
2349 else if (!strncmp(this_opt, "upper:", 6))
2350 upper = simple_strtoul(this_opt+6, NULL, 0);
2351 else if (!strncmp(this_opt, "lower:", 6))
2352 lower = simple_strtoul(this_opt+6, NULL, 0);
2353 else if (!strncmp(this_opt, "pixclock:", 9))
2354 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2355 else if (!strncmp(this_opt, "sync:", 5))
2356 sync = simple_strtoul(this_opt+5, NULL, 0);
2357 else if (!strncmp(this_opt, "vesa:", 5))
2358 vesa = simple_strtoul(this_opt+5, NULL, 0);
2359 else if (!strncmp(this_opt, "maxclk:", 7))
2360 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2361 else if (!strncmp(this_opt, "fh:", 3))
2362 fh = simple_strtoul(this_opt+3, NULL, 0);
2363 else if (!strncmp(this_opt, "fv:", 3))
2364 fv = simple_strtoul(this_opt+3, NULL, 0);
2365 else if (!strncmp(this_opt, "mem:", 4))
2366 mem = simple_strtoul(this_opt+4, NULL, 0);
2367 else if (!strncmp(this_opt, "mode:", 5))
2368 strlcpy(videomode, this_opt+5, sizeof(videomode));
2369 else if (!strncmp(this_opt, "outputs:", 8))
2370 strlcpy(outputs, this_opt+8, sizeof(outputs));
2371 else if (!strncmp(this_opt, "dfp:", 4)) {
2372 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2373 dfp = 1;
2374 }
2375 #ifdef CONFIG_PPC_PMAC
2376 else if (!strncmp(this_opt, "vmode:", 6)) {
2377 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2378 if (vmode > 0 && vmode <= VMODE_MAX)
2379 default_vmode = vmode;
2380 } else if (!strncmp(this_opt, "cmode:", 6)) {
2381 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2382 switch (cmode) {
2383 case 0:
2384 case 8:
2385 default_cmode = CMODE_8;
2386 break;
2387 case 15:
2388 case 16:
2389 default_cmode = CMODE_16;
2390 break;
2391 case 24:
2392 case 32:
2393 default_cmode = CMODE_32;
2394 break;
2395 }
2396 }
2397 #endif
2398 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2399 disabled = 1;
2400 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2401 disabled = 0;
2402 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2403 sgram = 1;
2404 else if (!strcmp(this_opt, "sdram"))
2405 sgram = 0;
2406 else if (!strncmp(this_opt, "memtype:", 8))
2407 memtype = simple_strtoul(this_opt+8, NULL, 0);
2408 else {
2409 int value = 1;
2410
2411 if (!strncmp(this_opt, "no", 2)) {
2412 value = 0;
2413 this_opt += 2;
2414 }
2415 if (! strcmp(this_opt, "inverse"))
2416 inverse = value;
2417 else if (!strcmp(this_opt, "accel"))
2418 noaccel = !value;
2419 else if (!strcmp(this_opt, "pan"))
2420 nopan = !value;
2421 else if (!strcmp(this_opt, "pciretry"))
2422 no_pci_retry = !value;
2423 else if (!strcmp(this_opt, "vga"))
2424 novga = !value;
2425 else if (!strcmp(this_opt, "bios"))
2426 nobios = !value;
2427 else if (!strcmp(this_opt, "init"))
2428 noinit = !value;
2429 #ifdef CONFIG_MTRR
2430 else if (!strcmp(this_opt, "mtrr"))
2431 mtrr = value;
2432 #endif
2433 else if (!strcmp(this_opt, "inv24"))
2434 inv24 = value;
2435 else if (!strcmp(this_opt, "cross4MB"))
2436 cross4MB = value;
2437 else if (!strcmp(this_opt, "grayscale"))
2438 grayscale = value;
2439 else if (!strcmp(this_opt, "dfp"))
2440 dfp = value;
2441 else {
2442 strlcpy(videomode, this_opt, sizeof(videomode));
2443 }
2444 }
2445 }
2446 return 0;
2447 }
2448
2449 static int __initdata initialized = 0;
2450
2451 static int __init matroxfb_init(void)
2452 {
2453 char *option = NULL;
2454 int err = 0;
2455
2456 DBG(__func__)
2457
2458 if (fb_get_options("matroxfb", &option))
2459 return -ENODEV;
2460 matroxfb_setup(option);
2461
2462 if (disabled)
2463 return -ENXIO;
2464 if (!initialized) {
2465 initialized = 1;
2466 err = matrox_init();
2467 }
2468 hotplug = 1;
2469 /* never return failure, user can hotplug matrox later... */
2470 return err;
2471 }
2472
2473 module_init(matroxfb_init);
2474
2475 #else
2476
2477 /* *************************** init module code **************************** */
2478
2479 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2480 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2481 MODULE_LICENSE("GPL");
2482
2483 module_param(mem, int, 0);
2484 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2485 module_param(disabled, int, 0);
2486 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2487 module_param(noaccel, int, 0);
2488 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2489 module_param(nopan, int, 0);
2490 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2491 module_param(no_pci_retry, int, 0);
2492 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2493 module_param(novga, int, 0);
2494 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2495 module_param(nobios, int, 0);
2496 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2497 module_param(noinit, int, 0);
2498 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2499 module_param(memtype, int, 0);
2500 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2501 #ifdef CONFIG_MTRR
2502 module_param(mtrr, int, 0);
2503 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2504 #endif
2505 module_param(sgram, int, 0);
2506 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2507 module_param(inv24, int, 0);
2508 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2509 module_param(inverse, int, 0);
2510 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2511 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2512 module_param(dev, int, 0);
2513 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2514 #else
2515 module_param(dev, int, 0);
2516 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2517 #endif
2518 module_param(vesa, int, 0);
2519 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2520 module_param(xres, int, 0);
2521 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2522 module_param(yres, int, 0);
2523 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2524 module_param(upper, int, 0);
2525 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2526 module_param(lower, int, 0);
2527 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2528 module_param(vslen, int, 0);
2529 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2530 module_param(left, int, 0);
2531 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2532 module_param(right, int, 0);
2533 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2534 module_param(hslen, int, 0);
2535 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2536 module_param(pixclock, int, 0);
2537 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2538 module_param(sync, int, 0);
2539 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2540 module_param(depth, int, 0);
2541 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2542 module_param(maxclk, int, 0);
2543 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2544 module_param(fh, int, 0);
2545 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2546 module_param(fv, int, 0);
2547 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2548 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"");
2549 module_param(grayscale, int, 0);
2550 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2551 module_param(cross4MB, int, 0);
2552 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2553 module_param(dfp, int, 0);
2554 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2555 module_param(dfp_type, int, 0);
2556 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2557 module_param_string(outputs, outputs, sizeof(outputs), 0);
2558 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2559 #ifdef CONFIG_PPC_PMAC
2560 module_param_named(vmode, default_vmode, int, 0);
2561 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2562 module_param_named(cmode, default_cmode, int, 0);
2563 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2564 #endif
2565
2566 int __init init_module(void){
2567
2568 DBG(__func__)
2569
2570 if (disabled)
2571 return -ENXIO;
2572
2573 if (depth == 0)
2574 depth = RSText;
2575 else if (depth == 4)
2576 depth = RS4bpp;
2577 else if (depth == 8)
2578 depth = RS8bpp;
2579 else if (depth == 15)
2580 depth = RS15bpp;
2581 else if (depth == 16)
2582 depth = RS16bpp;
2583 else if (depth == 24)
2584 depth = RS24bpp;
2585 else if (depth == 32)
2586 depth = RS32bpp;
2587 else if (depth != -1) {
2588 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2589 depth = -1;
2590 }
2591 matrox_init();
2592 /* never return failure; user can hotplug matrox later... */
2593 return 0;
2594 }
2595 #endif /* MODULE */
2596
2597 module_exit(matrox_done);
2598 EXPORT_SYMBOL(matroxfb_register_driver);
2599 EXPORT_SYMBOL(matroxfb_unregister_driver);
2600 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2601 EXPORT_SYMBOL(matroxfb_enable_irq);
2602
2603 /*
2604 * Overrides for Emacs so that we follow Linus's tabbing style.
2605 * ---------------------------------------------------------------------------
2606 * Local variables:
2607 * c-basic-offset: 8
2608 * End:
2609 */
2610
Support for the Chinese Samsung S3C2440 based development boards