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[PATCH] radix-tree documentation cleanups
[linux-2.6/mini2440.git] / drivers / ide / pci / via82cxxx.c
blobc85b87cb59d11763100d0f74630a2f30b7bc6dc3
1 /*
2 *
3 * Version 3.38
4 *
5 * VIA IDE driver for Linux. Supported southbridges:
6 *
7 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
8 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
9 * vt8235, vt8237
10 *
11 * Copyright (c) 2000-2002 Vojtech Pavlik
12 *
13 * Based on the work of:
14 * Michel Aubry
15 * Jeff Garzik
16 * Andre Hedrick
17 *
18 * Documentation:
19 * Obsolete device documentation publically available from via.com.tw
20 * Current device documentation available under NDA only
21 */
22
23 /*
24 * This program is free software; you can redistribute it and/or modify it
25 * under the terms of the GNU General Public License version 2 as published by
26 * the Free Software Foundation.
27 */
28
29 #include <linux/config.h>
30 #include <linux/module.h>
31 #include <linux/kernel.h>
32 #include <linux/ioport.h>
33 #include <linux/blkdev.h>
34 #include <linux/pci.h>
35 #include <linux/init.h>
36 #include <linux/ide.h>
37 #include <asm/io.h>
38
39 #ifdef CONFIG_PPC_MULTIPLATFORM
40 #include <asm/processor.h>
41 #endif
42
43 #include "ide-timing.h"
44
45 #define DISPLAY_VIA_TIMINGS
46
47 #define VIA_IDE_ENABLE 0x40
48 #define VIA_IDE_CONFIG 0x41
49 #define VIA_FIFO_CONFIG 0x43
50 #define VIA_MISC_1 0x44
51 #define VIA_MISC_2 0x45
52 #define VIA_MISC_3 0x46
53 #define VIA_DRIVE_TIMING 0x48
54 #define VIA_8BIT_TIMING 0x4e
55 #define VIA_ADDRESS_SETUP 0x4c
56 #define VIA_UDMA_TIMING 0x50
57
58 #define VIA_UDMA 0x007
59 #define VIA_UDMA_NONE 0x000
60 #define VIA_UDMA_33 0x001
61 #define VIA_UDMA_66 0x002
62 #define VIA_UDMA_100 0x003
63 #define VIA_UDMA_133 0x004
64 #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
65 #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
66 #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
67 #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
68 #define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
69 #define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
70
71 /*
72 * VIA SouthBridge chips.
73 */
74
75 static struct via_isa_bridge {
76 char *name;
77 u16 id;
78 u8 rev_min;
79 u8 rev_max;
80 u16 flags;
81 } via_isa_bridges[] = {
82 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
83 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
84 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
85 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
86 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
87 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
88 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
89 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
90 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
91 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
92 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
93 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
94 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
95 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
96 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
97 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
98 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
99 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
100 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
101 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
102 { NULL }
103 };
104
105 static unsigned int via_clock;
106 static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
107
108 struct via82cxxx_dev
109 {
110 struct via_isa_bridge *via_config;
111 unsigned int via_80w;
112 };
113
114 /**
115 * via_set_speed - write timing registers
116 * @dev: PCI device
117 * @dn: device
118 * @timing: IDE timing data to use
119 *
120 * via_set_speed writes timing values to the chipset registers
121 */
122
123 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
124 {
125 struct pci_dev *dev = hwif->pci_dev;
126 struct via82cxxx_dev *vdev = ide_get_hwifdata(hwif);
127 u8 t;
128
129 if (~vdev->via_config->flags & VIA_BAD_AST) {
130 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
131 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
132 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
133 }
134
135 pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
136 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
137
138 pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
139 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
140
141 switch (vdev->via_config->flags & VIA_UDMA) {
142 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
143 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
144 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
145 case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
146 default: return;
147 }
148
149 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
150 }
151
152 /**
153 * via_set_drive - configure transfer mode
154 * @drive: Drive to set up
155 * @speed: desired speed
156 *
157 * via_set_drive() computes timing values configures the drive and
158 * the chipset to a desired transfer mode. It also can be called
159 * by upper layers.
160 */
161
162 static int via_set_drive(ide_drive_t *drive, u8 speed)
163 {
164 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
165 struct via82cxxx_dev *vdev = ide_get_hwifdata(drive->hwif);
166 struct ide_timing t, p;
167 unsigned int T, UT;
168
169 if (speed != XFER_PIO_SLOW)
170 ide_config_drive_speed(drive, speed);
171
172 T = 1000000000 / via_clock;
173
174 switch (vdev->via_config->flags & VIA_UDMA) {
175 case VIA_UDMA_33: UT = T; break;
176 case VIA_UDMA_66: UT = T/2; break;
177 case VIA_UDMA_100: UT = T/3; break;
178 case VIA_UDMA_133: UT = T/4; break;
179 default: UT = T;
180 }
181
182 ide_timing_compute(drive, speed, &t, T, UT);
183
184 if (peer->present) {
185 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
186 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
187 }
188
189 via_set_speed(HWIF(drive), drive->dn, &t);
190
191 if (!drive->init_speed)
192 drive->init_speed = speed;
193 drive->current_speed = speed;
194
195 return 0;
196 }
197
198 /**
199 * via82cxxx_tune_drive - PIO setup
200 * @drive: drive to set up
201 * @pio: mode to use (255 for 'best possible')
202 *
203 * A callback from the upper layers for PIO-only tuning.
204 */
205
206 static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
207 {
208 if (pio == 255) {
209 via_set_drive(drive,
210 ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
211 return;
212 }
213
214 via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
215 }
216
217 /**
218 * via82cxxx_ide_dma_check - set up for DMA if possible
219 * @drive: IDE drive to set up
220 *
221 * Set up the drive for the highest supported speed considering the
222 * driver, controller and cable
223 */
224
225 static int via82cxxx_ide_dma_check (ide_drive_t *drive)
226 {
227 ide_hwif_t *hwif = HWIF(drive);
228 struct via82cxxx_dev *vdev = ide_get_hwifdata(hwif);
229 u16 w80 = hwif->udma_four;
230
231 u16 speed = ide_find_best_mode(drive,
232 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
233 (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
234 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
235 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
236 (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
237
238 via_set_drive(drive, speed);
239
240 if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
241 return hwif->ide_dma_on(drive);
242 return hwif->ide_dma_off_quietly(drive);
243 }
244
245 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
246 {
247 struct via_isa_bridge *via_config;
248 u8 t;
249
250 for (via_config = via_isa_bridges; via_config->id; via_config++)
251 if ((*isa = pci_find_device(PCI_VENDOR_ID_VIA +
252 !!(via_config->flags & VIA_BAD_ID),
253 via_config->id, NULL))) {
254
255 pci_read_config_byte(*isa, PCI_REVISION_ID, &t);
256 if (t >= via_config->rev_min &&
257 t <= via_config->rev_max)
258 break;
259 }
260
261 return via_config;
262 }
263
264 /**
265 * init_chipset_via82cxxx - initialization handler
266 * @dev: PCI device
267 * @name: Name of interface
268 *
269 * The initialization callback. Here we determine the IDE chip type
270 * and initialize its drive independent registers.
271 */
272
273 static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
274 {
275 struct pci_dev *isa = NULL;
276 struct via_isa_bridge *via_config;
277 u8 t, v;
278 unsigned int u;
279
280 /*
281 * Find the ISA bridge to see how good the IDE is.
282 */
283 via_config = via_config_find(&isa);
284 if (!via_config->id) {
285 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
286 return -ENODEV;
287 }
288
289 /*
290 * Setup or disable Clk66 if appropriate
291 */
292
293 if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) {
294 /* Enable Clk66 */
295 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
296 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
297 } else if (via_config->flags & VIA_BAD_CLK66) {
298 /* Would cause trouble on 596a and 686 */
299 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
300 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
301 }
302
303 /*
304 * Check whether interfaces are enabled.
305 */
306
307 pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
308
309 /*
310 * Set up FIFO sizes and thresholds.
311 */
312
313 pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
314
315 /* Disable PREQ# till DDACK# */
316 if (via_config->flags & VIA_BAD_PREQ) {
317 /* Would crash on 586b rev 41 */
318 t &= 0x7f;
319 }
320
321 /* Fix FIFO split between channels */
322 if (via_config->flags & VIA_SET_FIFO) {
323 t &= (t & 0x9f);
324 switch (v & 3) {
325 case 2: t |= 0x00; break; /* 16 on primary */
326 case 1: t |= 0x60; break; /* 16 on secondary */
327 case 3: t |= 0x20; break; /* 8 pri 8 sec */
328 }
329 }
330
331 pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
332
333 /*
334 * Determine system bus clock.
335 */
336
337 via_clock = system_bus_clock() * 1000;
338
339 switch (via_clock) {
340 case 33000: via_clock = 33333; break;
341 case 37000: via_clock = 37500; break;
342 case 41000: via_clock = 41666; break;
343 }
344
345 if (via_clock < 20000 || via_clock > 50000) {
346 printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
347 "impossible (%d), using 33 MHz instead.\n", via_clock);
348 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
349 "to assume 80-wire cable.\n");
350 via_clock = 33333;
351 }
352
353 /*
354 * Print the boot message.
355 */
356
357 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
358 printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
359 "controller on pci%s\n",
360 via_config->name, t,
361 via_dma[via_config->flags & VIA_UDMA],
362 pci_name(dev));
363
364 return 0;
365 }
366
367 /*
368 * Check and handle 80-wire cable presence
369 */
370 static void __devinit via_cable_detect(struct pci_dev *dev, struct via82cxxx_dev *vdev)
371 {
372 unsigned int u;
373 int i;
374 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
375
376 switch (vdev->via_config->flags & VIA_UDMA) {
377
378 case VIA_UDMA_66:
379 for (i = 24; i >= 0; i -= 8)
380 if (((u >> (i & 16)) & 8) &&
381 ((u >> i) & 0x20) &&
382 (((u >> i) & 7) < 2)) {
383 /*
384 * 2x PCI clock and
385 * UDMA w/ < 3T/cycle
386 */
387 vdev->via_80w |= (1 << (1 - (i >> 4)));
388 }
389 break;
390
391 case VIA_UDMA_100:
392 for (i = 24; i >= 0; i -= 8)
393 if (((u >> i) & 0x10) ||
394 (((u >> i) & 0x20) &&
395 (((u >> i) & 7) < 4))) {
396 /* BIOS 80-wire bit or
397 * UDMA w/ < 60ns/cycle
398 */
399 vdev->via_80w |= (1 << (1 - (i >> 4)));
400 }
401 break;
402
403 case VIA_UDMA_133:
404 for (i = 24; i >= 0; i -= 8)
405 if (((u >> i) & 0x10) ||
406 (((u >> i) & 0x20) &&
407 (((u >> i) & 7) < 6))) {
408 /* BIOS 80-wire bit or
409 * UDMA w/ < 60ns/cycle
410 */
411 vdev->via_80w |= (1 << (1 - (i >> 4)));
412 }
413 break;
414
415 }
416 }
417
418 static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
419 {
420 struct via82cxxx_dev *vdev = kmalloc(sizeof(struct via82cxxx_dev),
421 GFP_KERNEL);
422 struct pci_dev *isa = NULL;
423 int i;
424
425 if (vdev == NULL) {
426 printk(KERN_ERR "VP_IDE: out of memory :(\n");
427 return;
428 }
429
430 memset(vdev, 0, sizeof(struct via82cxxx_dev));
431 ide_set_hwifdata(hwif, vdev);
432
433 vdev->via_config = via_config_find(&isa);
434 via_cable_detect(hwif->pci_dev, vdev);
435
436 hwif->autodma = 0;
437
438 hwif->tuneproc = &via82cxxx_tune_drive;
439 hwif->speedproc = &via_set_drive;
440
441
442 #if defined(CONFIG_PPC_CHRP) && defined(CONFIG_PPC32)
443 if(_machine == _MACH_chrp && _chrp_type == _CHRP_Pegasos) {
444 hwif->irq = hwif->channel ? 15 : 14;
445 }
446 #endif
447
448 for (i = 0; i < 2; i++) {
449 hwif->drives[i].io_32bit = 1;
450 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
451 hwif->drives[i].autotune = 1;
452 hwif->drives[i].dn = hwif->channel * 2 + i;
453 }
454
455 if (!hwif->dma_base)
456 return;
457
458 hwif->atapi_dma = 1;
459 hwif->ultra_mask = 0x7f;
460 hwif->mwdma_mask = 0x07;
461 hwif->swdma_mask = 0x07;
462
463 if (!hwif->udma_four)
464 hwif->udma_four = (vdev->via_80w >> hwif->channel) & 1;
465 hwif->ide_dma_check = &via82cxxx_ide_dma_check;
466 if (!noautodma)
467 hwif->autodma = 1;
468 hwif->drives[0].autodma = hwif->autodma;
469 hwif->drives[1].autodma = hwif->autodma;
470 }
471
472 static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
473 { /* 0 */
474 .name = "VP_IDE",
475 .init_chipset = init_chipset_via82cxxx,
476 .init_hwif = init_hwif_via82cxxx,
477 .channels = 2,
478 .autodma = NOAUTODMA,
479 .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
480 .bootable = ON_BOARD
481 },{ /* 1 */
482 .name = "VP_IDE",
483 .init_chipset = init_chipset_via82cxxx,
484 .init_hwif = init_hwif_via82cxxx,
485 .channels = 2,
486 .autodma = AUTODMA,
487 .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
488 .bootable = ON_BOARD,
489 }
490 };
491
492 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
493 {
494 return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]);
495 }
496
497 static struct pci_device_id via_pci_tbl[] = {
498 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
499 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
500 { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
501 { 0, },
502 };
503 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
504
505 static struct pci_driver driver = {
506 .name = "VIA_IDE",
507 .id_table = via_pci_tbl,
508 .probe = via_init_one,
509 };
510
511 static int via_ide_init(void)
512 {
513 return ide_pci_register_driver(&driver);
514 }
515
516 module_init(via_ide_init);
517
518 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
519 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
520 MODULE_LICENSE("GPL");
Support for the Chinese Samsung S3C2440 based development boards