2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <linux/dmi.h>
15 #include <linux/smp.h>
16 #include <asm/io_apic.h>
17 #include <linux/irq.h>
18 #include <linux/acpi.h>
22 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23 #define PIRQ_VERSION 0x0100
25 static int broken_hp_bios_irq9
;
26 static int acer_tm360_irqrouting
;
28 static struct irq_routing_table
*pirq_table
;
30 static int pirq_enable_irq(struct pci_dev
*dev
);
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 unsigned int pcibios_irq_mask
= 0xfff8;
39 static int pirq_penalty
[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
47 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
48 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
52 struct irq_router_handler
{
54 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
57 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = NULL
;
58 void (*pcibios_disable_irq
)(struct pci_dev
*dev
) = NULL
;
61 * Check passed address for the PCI IRQ Routing Table signature
62 * and perform checksum verification.
65 static inline struct irq_routing_table
*pirq_check_routing_table(u8
*addr
)
67 struct irq_routing_table
*rt
;
71 rt
= (struct irq_routing_table
*) addr
;
72 if (rt
->signature
!= PIRQ_SIGNATURE
||
73 rt
->version
!= PIRQ_VERSION
||
75 rt
->size
< sizeof(struct irq_routing_table
))
78 for (i
= 0; i
< rt
->size
; i
++)
81 DBG(KERN_DEBUG
"PCI: Interrupt Routing Table found at 0x%p\n",
91 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
94 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
97 struct irq_routing_table
*rt
;
99 if (pirq_table_addr
) {
100 rt
= pirq_check_routing_table((u8
*) __va(pirq_table_addr
));
103 printk(KERN_WARNING
"PCI: PIRQ table NOT found at pirqaddr\n");
105 for (addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000); addr
+= 16) {
106 rt
= pirq_check_routing_table(addr
);
114 * If we have a IRQ routing table, use it to search for peer host
115 * bridges. It's a gross hack, but since there are no other known
116 * ways how to get a list of buses, we have to go this way.
119 static void __init
pirq_peer_trick(void)
121 struct irq_routing_table
*rt
= pirq_table
;
126 memset(busmap
, 0, sizeof(busmap
));
127 for (i
= 0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
); i
++) {
132 DBG(KERN_DEBUG
"%02x:%02x slot=%02x", e
->bus
, e
->devfn
/8, e
->slot
);
133 for (j
= 0; j
< 4; j
++)
134 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
, e
->irq
[j
].bitmap
);
140 for (i
= 1; i
< 256; i
++) {
142 if (!busmap
[i
] || pci_find_bus(0, i
))
144 node
= get_mp_bus_to_node(i
);
145 if (pci_scan_bus_on_node(i
, &pci_root_ops
, node
))
146 printk(KERN_INFO
"PCI: Discovered primary peer "
147 "bus %02x [IRQ]\n", i
);
149 pcibios_last_bus
= -1;
153 * Code for querying and setting of IRQ routes on various interrupt routers.
156 void eisa_set_level_irq(unsigned int irq
)
158 unsigned char mask
= 1 << (irq
& 7);
159 unsigned int port
= 0x4d0 + (irq
>> 3);
161 static u16 eisa_irq_mask
;
163 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
166 eisa_irq_mask
|= (1 << irq
);
167 printk(KERN_DEBUG
"PCI: setting IRQ %u as level-triggered\n", irq
);
170 DBG(KERN_DEBUG
" -> edge");
171 outb(val
| mask
, port
);
176 * Common IRQ routing practice: nibbles in config space,
177 * offset by some magic constant.
179 static unsigned int read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
182 unsigned reg
= offset
+ (nr
>> 1);
184 pci_read_config_byte(router
, reg
, &x
);
185 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
188 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
,
189 unsigned nr
, unsigned int val
)
192 unsigned reg
= offset
+ (nr
>> 1);
194 pci_read_config_byte(router
, reg
, &x
);
195 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
196 pci_write_config_byte(router
, reg
, x
);
200 * ALI pirq entries are damn ugly, and completely undocumented.
201 * This has been figured out from pirq tables, and it's not a pretty
204 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
206 static const unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
208 WARN_ON_ONCE(pirq
> 16);
209 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
212 static int pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
214 static const unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
215 unsigned int val
= irqmap
[irq
];
217 WARN_ON_ONCE(pirq
> 16);
219 write_config_nybble(router
, 0x48, pirq
-1, val
);
226 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
227 * just a pointer to the config space.
229 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
233 pci_read_config_byte(router
, pirq
, &x
);
234 return (x
< 16) ? x
: 0;
237 static int pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
239 pci_write_config_byte(router
, pirq
, irq
);
244 * The VIA pirq rules are nibble-based, like ALI,
245 * but without the ugly irq number munging.
246 * However, PIRQD is in the upper instead of lower 4 bits.
248 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
250 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
253 static int pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
255 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
260 * The VIA pirq rules are nibble-based, like ALI,
261 * but without the ugly irq number munging.
262 * However, for 82C586, nibble map is different .
264 static int pirq_via586_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
266 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
268 WARN_ON_ONCE(pirq
> 5);
269 return read_config_nybble(router
, 0x55, pirqmap
[pirq
-1]);
272 static int pirq_via586_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
274 static const unsigned int pirqmap
[5] = { 3, 2, 5, 1, 1 };
276 WARN_ON_ONCE(pirq
> 5);
277 write_config_nybble(router
, 0x55, pirqmap
[pirq
-1], irq
);
282 * ITE 8330G pirq rules are nibble-based
283 * FIXME: pirqmap may be { 1, 0, 3, 2 },
284 * 2+3 are both mapped to irq 9 on my system
286 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
288 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
290 WARN_ON_ONCE(pirq
> 4);
291 return read_config_nybble(router
, 0x43, pirqmap
[pirq
-1]);
294 static int pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
296 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
298 WARN_ON_ONCE(pirq
> 4);
299 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
304 * OPTI: high four bits are nibble pointer..
305 * I wonder what the low bits do?
307 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
309 return read_config_nybble(router
, 0xb8, pirq
>> 4);
312 static int pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
314 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
319 * Cyrix: nibble offset 0x5C
320 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
321 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
323 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
325 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
328 static int pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
330 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
335 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
336 * We have to deal with the following issues here:
337 * - vendors have different ideas about the meaning of link values
338 * - some onboard devices (integrated in the chipset) have special
339 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
340 * - different revision of the router have a different layout for
341 * the routing registers, particularly for the onchip devices
343 * For all routing registers the common thing is we have one byte
344 * per routeable link which is defined as:
345 * bit 7 IRQ mapping enabled (0) or disabled (1)
346 * bits [6:4] reserved (sometimes used for onchip devices)
347 * bits [3:0] IRQ to map to
348 * allowed: 3-7, 9-12, 14-15
349 * reserved: 0, 1, 2, 8, 13
351 * The config-space registers located at 0x41/0x42/0x43/0x44 are
352 * always used to route the normal PCI INT A/B/C/D respectively.
353 * Apparently there are systems implementing PCI routing table using
354 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
355 * We try our best to handle both link mappings.
357 * Currently (2003-05-21) it appears most SiS chipsets follow the
358 * definition of routing registers from the SiS-5595 southbridge.
359 * According to the SiS 5595 datasheets the revision id's of the
360 * router (ISA-bridge) should be 0x01 or 0xb0.
362 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
363 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
364 * They seem to work with the current routing code. However there is
365 * some concern because of the two USB-OHCI HCs (original SiS 5595
366 * had only one). YMMV.
368 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
371 * bits [6:5] must be written 01
372 * bit 4 channel-select primary (0), secondary (1)
375 * bit 6 OHCI function disabled (0), enabled (1)
377 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
379 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
381 * We support USBIRQ (in addition to INTA-INTD) and keep the
382 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
384 * Currently the only reported exception is the new SiS 65x chipset
385 * which includes the SiS 69x southbridge. Here we have the 85C503
386 * router revision 0x04 and there are changes in the register layout
387 * mostly related to the different USB HCs with USB 2.0 support.
389 * Onchip routing for router rev-id 0x04 (try-and-error observation)
391 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
392 * bit 6-4 are probably unused, not like 5595
395 #define PIRQ_SIS_IRQ_MASK 0x0f
396 #define PIRQ_SIS_IRQ_DISABLE 0x80
397 #define PIRQ_SIS_USB_ENABLE 0x40
399 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
405 if (reg
>= 0x01 && reg
<= 0x04)
407 pci_read_config_byte(router
, reg
, &x
);
408 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
411 static int pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
417 if (reg
>= 0x01 && reg
<= 0x04)
419 pci_read_config_byte(router
, reg
, &x
);
420 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
421 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
422 pci_write_config_byte(router
, reg
, x
);
428 * VLSI: nibble offset 0x74 - educated guess due to routing table and
429 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
430 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
431 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
432 * for the busbridge to the docking station.
435 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
437 WARN_ON_ONCE(pirq
>= 9);
439 dev_info(&dev
->dev
, "VLSI router PIRQ escape (%d)\n", pirq
);
442 return read_config_nybble(router
, 0x74, pirq
-1);
445 static int pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
447 WARN_ON_ONCE(pirq
>= 9);
449 dev_info(&dev
->dev
, "VLSI router PIRQ escape (%d)\n", pirq
);
452 write_config_nybble(router
, 0x74, pirq
-1, irq
);
457 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
458 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
459 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
460 * register is a straight binary coding of desired PIC IRQ (low nibble).
462 * The 'link' value in the PIRQ table is already in the correct format
463 * for the Index register. There are some special index values:
464 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
465 * and 0x03 for SMBus.
467 static int pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
470 return inb(0xc01) & 0xf;
473 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
,
481 /* Support for AMD756 PCI IRQ Routing
482 * Jhon H. Caicedo <jhcaiced@osso.org.co>
483 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
484 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
485 * The AMD756 pirq rules are nibble-based
486 * offset 0x56 0-3 PIRQA 4-7 PIRQB
487 * offset 0x57 0-3 PIRQC 4-7 PIRQD
489 static int pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
494 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
496 "AMD756: dev [%04x:%04x], router PIRQ %d get IRQ %d\n",
497 dev
->vendor
, dev
->device
, pirq
, irq
);
501 static int pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
504 "AMD756: dev [%04x:%04x], router PIRQ %d set IRQ %d\n",
505 dev
->vendor
, dev
->device
, pirq
, irq
);
507 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
514 static int pirq_pico_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
516 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
517 return ((pirq
- 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
520 static int pirq_pico_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
,
524 outb(0x10 + ((pirq
- 1) >> 1), 0x24);
526 x
= ((pirq
- 1) & 1) ? ((x
& 0x0f) | (irq
<< 4)) : ((x
& 0xf0) | (irq
));
531 #ifdef CONFIG_PCI_BIOS
533 static int pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
535 struct pci_dev
*bridge
;
536 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
537 return pcibios_set_irq_routing(bridge
, pin
, irq
);
542 static __init
int intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
544 static struct pci_device_id __initdata pirq_440gx
[] = {
545 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_0
) },
546 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_2
) },
550 /* 440GX has a proprietary PIRQ router -- don't use it */
551 if (pci_dev_present(pirq_440gx
))
555 case PCI_DEVICE_ID_INTEL_82371FB_0
:
556 case PCI_DEVICE_ID_INTEL_82371SB_0
:
557 case PCI_DEVICE_ID_INTEL_82371AB_0
:
558 case PCI_DEVICE_ID_INTEL_82371MX
:
559 case PCI_DEVICE_ID_INTEL_82443MX_0
:
560 case PCI_DEVICE_ID_INTEL_82801AA_0
:
561 case PCI_DEVICE_ID_INTEL_82801AB_0
:
562 case PCI_DEVICE_ID_INTEL_82801BA_0
:
563 case PCI_DEVICE_ID_INTEL_82801BA_10
:
564 case PCI_DEVICE_ID_INTEL_82801CA_0
:
565 case PCI_DEVICE_ID_INTEL_82801CA_12
:
566 case PCI_DEVICE_ID_INTEL_82801DB_0
:
567 case PCI_DEVICE_ID_INTEL_82801E_0
:
568 case PCI_DEVICE_ID_INTEL_82801EB_0
:
569 case PCI_DEVICE_ID_INTEL_ESB_1
:
570 case PCI_DEVICE_ID_INTEL_ICH6_0
:
571 case PCI_DEVICE_ID_INTEL_ICH6_1
:
572 case PCI_DEVICE_ID_INTEL_ICH7_0
:
573 case PCI_DEVICE_ID_INTEL_ICH7_1
:
574 case PCI_DEVICE_ID_INTEL_ICH7_30
:
575 case PCI_DEVICE_ID_INTEL_ICH7_31
:
576 case PCI_DEVICE_ID_INTEL_ESB2_0
:
577 case PCI_DEVICE_ID_INTEL_ICH8_0
:
578 case PCI_DEVICE_ID_INTEL_ICH8_1
:
579 case PCI_DEVICE_ID_INTEL_ICH8_2
:
580 case PCI_DEVICE_ID_INTEL_ICH8_3
:
581 case PCI_DEVICE_ID_INTEL_ICH8_4
:
582 case PCI_DEVICE_ID_INTEL_ICH9_0
:
583 case PCI_DEVICE_ID_INTEL_ICH9_1
:
584 case PCI_DEVICE_ID_INTEL_ICH9_2
:
585 case PCI_DEVICE_ID_INTEL_ICH9_3
:
586 case PCI_DEVICE_ID_INTEL_ICH9_4
:
587 case PCI_DEVICE_ID_INTEL_ICH9_5
:
588 case PCI_DEVICE_ID_INTEL_TOLAPAI_0
:
589 case PCI_DEVICE_ID_INTEL_ICH10_0
:
590 case PCI_DEVICE_ID_INTEL_ICH10_1
:
591 case PCI_DEVICE_ID_INTEL_ICH10_2
:
592 case PCI_DEVICE_ID_INTEL_ICH10_3
:
593 case PCI_DEVICE_ID_INTEL_PCH_0
:
594 case PCI_DEVICE_ID_INTEL_PCH_1
:
595 r
->name
= "PIIX/ICH";
596 r
->get
= pirq_piix_get
;
597 r
->set
= pirq_piix_set
;
603 static __init
int via_router_probe(struct irq_router
*r
,
604 struct pci_dev
*router
, u16 device
)
606 /* FIXME: We should move some of the quirk fixup stuff here */
609 * workarounds for some buggy BIOSes
611 if (device
== PCI_DEVICE_ID_VIA_82C586_0
) {
612 switch (router
->device
) {
613 case PCI_DEVICE_ID_VIA_82C686
:
615 * Asus k7m bios wrongly reports 82C686A
618 device
= PCI_DEVICE_ID_VIA_82C686
;
620 case PCI_DEVICE_ID_VIA_8235
:
622 * Asus a7v-x bios wrongly reports 8235
625 device
= PCI_DEVICE_ID_VIA_8235
;
627 case PCI_DEVICE_ID_VIA_8237
:
629 * Asus a7v600 bios wrongly reports 8237
632 device
= PCI_DEVICE_ID_VIA_8237
;
638 case PCI_DEVICE_ID_VIA_82C586_0
:
640 r
->get
= pirq_via586_get
;
641 r
->set
= pirq_via586_set
;
643 case PCI_DEVICE_ID_VIA_82C596
:
644 case PCI_DEVICE_ID_VIA_82C686
:
645 case PCI_DEVICE_ID_VIA_8231
:
646 case PCI_DEVICE_ID_VIA_8233A
:
647 case PCI_DEVICE_ID_VIA_8235
:
648 case PCI_DEVICE_ID_VIA_8237
:
649 /* FIXME: add new ones for 8233/5 */
651 r
->get
= pirq_via_get
;
652 r
->set
= pirq_via_set
;
658 static __init
int vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
661 case PCI_DEVICE_ID_VLSI_82C534
:
662 r
->name
= "VLSI 82C534";
663 r
->get
= pirq_vlsi_get
;
664 r
->set
= pirq_vlsi_set
;
671 static __init
int serverworks_router_probe(struct irq_router
*r
,
672 struct pci_dev
*router
, u16 device
)
675 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
676 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
677 r
->name
= "ServerWorks";
678 r
->get
= pirq_serverworks_get
;
679 r
->set
= pirq_serverworks_set
;
685 static __init
int sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
687 if (device
!= PCI_DEVICE_ID_SI_503
)
691 r
->get
= pirq_sis_get
;
692 r
->set
= pirq_sis_set
;
696 static __init
int cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
699 case PCI_DEVICE_ID_CYRIX_5520
:
701 r
->get
= pirq_cyrix_get
;
702 r
->set
= pirq_cyrix_set
;
708 static __init
int opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
711 case PCI_DEVICE_ID_OPTI_82C700
:
713 r
->get
= pirq_opti_get
;
714 r
->set
= pirq_opti_set
;
720 static __init
int ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
723 case PCI_DEVICE_ID_ITE_IT8330G_0
:
725 r
->get
= pirq_ite_get
;
726 r
->set
= pirq_ite_set
;
732 static __init
int ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
735 case PCI_DEVICE_ID_AL_M1533
:
736 case PCI_DEVICE_ID_AL_M1563
:
738 r
->get
= pirq_ali_get
;
739 r
->set
= pirq_ali_set
;
745 static __init
int amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
748 case PCI_DEVICE_ID_AMD_VIPER_740B
:
751 case PCI_DEVICE_ID_AMD_VIPER_7413
:
754 case PCI_DEVICE_ID_AMD_VIPER_7443
:
760 r
->get
= pirq_amd756_get
;
761 r
->set
= pirq_amd756_set
;
765 static __init
int pico_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
768 case PCI_DEVICE_ID_PICOPOWER_PT86C523
:
769 r
->name
= "PicoPower PT86C523";
770 r
->get
= pirq_pico_get
;
771 r
->set
= pirq_pico_set
;
774 case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP
:
775 r
->name
= "PicoPower PT86C523 rev. BB+";
776 r
->get
= pirq_pico_get
;
777 r
->set
= pirq_pico_set
;
783 static __initdata
struct irq_router_handler pirq_routers
[] = {
784 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
785 { PCI_VENDOR_ID_AL
, ali_router_probe
},
786 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
787 { PCI_VENDOR_ID_VIA
, via_router_probe
},
788 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
789 { PCI_VENDOR_ID_SI
, sis_router_probe
},
790 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
791 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
792 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
793 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
794 { PCI_VENDOR_ID_PICOPOWER
, pico_router_probe
},
795 /* Someone with docs needs to add the ATI Radeon IGP */
798 static struct irq_router pirq_router
;
799 static struct pci_dev
*pirq_router_dev
;
803 * FIXME: should we have an option to say "generic for
807 static void __init
pirq_find_router(struct irq_router
*r
)
809 struct irq_routing_table
*rt
= pirq_table
;
810 struct irq_router_handler
*h
;
812 #ifdef CONFIG_PCI_BIOS
813 if (!rt
->signature
) {
814 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
815 r
->set
= pirq_bios_set
;
821 /* Default unless a driver reloads it */
826 DBG(KERN_DEBUG
"PCI: Attempting to find IRQ router for [%04x:%04x]\n",
827 rt
->rtr_vendor
, rt
->rtr_device
);
829 pirq_router_dev
= pci_get_bus_and_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
830 if (!pirq_router_dev
) {
831 DBG(KERN_DEBUG
"PCI: Interrupt router not found at "
832 "%02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
836 for (h
= pirq_routers
; h
->vendor
; h
++) {
837 /* First look for a router match */
838 if (rt
->rtr_vendor
== h
->vendor
&&
839 h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
841 /* Fall back to a device match */
842 if (pirq_router_dev
->vendor
== h
->vendor
&&
843 h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
846 dev_info(&pirq_router_dev
->dev
, "%s IRQ router [%04x:%04x]\n",
848 pirq_router_dev
->vendor
, pirq_router_dev
->device
);
850 /* The device remains referenced for the kernel lifetime */
853 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
855 struct irq_routing_table
*rt
= pirq_table
;
856 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) /
857 sizeof(struct irq_info
);
858 struct irq_info
*info
;
860 for (info
= rt
->slots
; entries
--; info
++)
861 if (info
->bus
== dev
->bus
->number
&&
862 PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
867 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
870 struct irq_info
*info
;
874 struct irq_router
*r
= &pirq_router
;
875 struct pci_dev
*dev2
= NULL
;
879 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
881 dev_dbg(&dev
->dev
, "no interrupt pin\n");
886 /* Find IRQ routing entry */
891 info
= pirq_get_info(dev
);
893 dev_dbg(&dev
->dev
, "PCI INT %c not found in routing table\n",
897 pirq
= info
->irq
[pin
].link
;
898 mask
= info
->irq
[pin
].bitmap
;
900 dev_dbg(&dev
->dev
, "PCI INT %c not routed\n", 'A' + pin
);
903 dev_dbg(&dev
->dev
, "PCI INT %c -> PIRQ %02x, mask %04x, excl %04x",
904 'A' + pin
, pirq
, mask
, pirq_table
->exclusive_irqs
);
905 mask
&= pcibios_irq_mask
;
907 /* Work around broken HP Pavilion Notebooks which assign USB to
908 IRQ 9 even though it is actually wired to IRQ 11 */
910 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
912 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
913 r
->set(pirq_router_dev
, dev
, pirq
, 11);
916 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
917 if (acer_tm360_irqrouting
&& dev
->irq
== 11 &&
918 dev
->vendor
== PCI_VENDOR_ID_O2
) {
921 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
922 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
926 * Find the best IRQ to assign: use the one
927 * reported by the device if possible.
930 if (newirq
&& !((1 << newirq
) & mask
)) {
931 if (pci_probe
& PCI_USE_PIRQ_MASK
)
934 dev_warn(&dev
->dev
, "IRQ %d doesn't match PIRQ mask "
935 "%#x; try pci=usepirqmask\n", newirq
, mask
);
937 if (!newirq
&& assign
) {
938 for (i
= 0; i
< 16; i
++) {
939 if (!(mask
& (1 << i
)))
941 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] &&
942 can_request_irq(i
, IRQF_SHARED
))
946 dev_dbg(&dev
->dev
, "PCI INT %c -> newirq %d", 'A' + pin
, newirq
);
948 /* Check if it is hardcoded */
949 if ((pirq
& 0xf0) == 0xf0) {
952 } else if (r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
953 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
))) {
955 eisa_set_level_irq(irq
);
956 } else if (newirq
&& r
->set
&&
957 (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
958 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
959 eisa_set_level_irq(newirq
);
966 if (newirq
&& mask
== (1 << newirq
)) {
970 dev_dbg(&dev
->dev
, "can't route interrupt\n");
974 dev_info(&dev
->dev
, "%s PCI INT %c -> IRQ %d\n", msg
, 'A' + pin
, irq
);
976 /* Update IRQ for all devices with the same pirq value */
977 while ((dev2
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev2
)) != NULL
) {
978 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
982 info
= pirq_get_info(dev2
);
985 if (info
->irq
[pin
].link
== pirq
) {
987 * We refuse to override the dev->irq
988 * information. Give a warning!
990 if (dev2
->irq
&& dev2
->irq
!= irq
&& \
991 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
992 ((1 << dev2
->irq
) & mask
))) {
993 #ifndef CONFIG_PCI_MSI
994 dev_info(&dev2
->dev
, "IRQ routing conflict: "
995 "have IRQ %d, want IRQ %d\n",
1001 pirq_penalty
[irq
]++;
1003 dev_info(&dev
->dev
, "sharing IRQ %d with %s\n",
1004 irq
, pci_name(dev2
));
1010 static void __init
pcibios_fixup_irqs(void)
1012 struct pci_dev
*dev
= NULL
;
1015 DBG(KERN_DEBUG
"PCI: IRQ fixup\n");
1016 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1018 * If the BIOS has set an out of range IRQ number, just
1019 * ignore it. Also keep track of which IRQ's are
1022 if (dev
->irq
>= 16) {
1023 dev_dbg(&dev
->dev
, "ignoring bogus IRQ %d\n", dev
->irq
);
1027 * If the IRQ is already assigned to a PCI device,
1028 * ignore its ISA use penalty
1030 if (pirq_penalty
[dev
->irq
] >= 100 &&
1031 pirq_penalty
[dev
->irq
] < 100000)
1032 pirq_penalty
[dev
->irq
] = 0;
1033 pirq_penalty
[dev
->irq
]++;
1037 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
1038 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1039 #ifdef CONFIG_X86_IO_APIC
1041 * Recalculate IRQ numbers if we use the I/O APIC.
1043 if (io_apic_assign_pci_irqs
) {
1050 * interrupt pins are numbered starting from 1
1053 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
,
1054 PCI_SLOT(dev
->devfn
), pin
);
1056 * Busses behind bridges are typically not listed in the
1057 * MP-table. In this case we have to look up the IRQ
1058 * based on the parent bus, parent slot, and pin number.
1059 * The SMP code detects such bridged busses itself so we
1060 * should get into this branch reliably.
1062 if (irq
< 0 && dev
->bus
->parent
) {
1063 /* go back to the bridge */
1064 struct pci_dev
*bridge
= dev
->bus
->self
;
1067 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1068 bus
= bridge
->bus
->number
;
1069 irq
= IO_APIC_get_PCI_irq_vector(bus
,
1070 PCI_SLOT(bridge
->devfn
), pin
);
1073 "using bridge %s INT %c to "
1080 "PCI->APIC IRQ transform: INT %c "
1088 * Still no IRQ? Try to lookup one...
1090 if (pin
&& !dev
->irq
)
1091 pcibios_lookup_irq(dev
, 0);
1096 * Work around broken HP Pavilion Notebooks which assign USB to
1097 * IRQ 9 even though it is actually wired to IRQ 11
1099 static int __init
fix_broken_hp_bios_irq9(const struct dmi_system_id
*d
)
1101 if (!broken_hp_bios_irq9
) {
1102 broken_hp_bios_irq9
= 1;
1103 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1110 * Work around broken Acer TravelMate 360 Notebooks which assign
1111 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1113 static int __init
fix_acer_tm360_irqrouting(const struct dmi_system_id
*d
)
1115 if (!acer_tm360_irqrouting
) {
1116 acer_tm360_irqrouting
= 1;
1117 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n",
1123 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
1125 .callback
= fix_broken_hp_bios_irq9
,
1126 .ident
= "HP Pavilion N5400 Series Laptop",
1128 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
1129 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
1130 DMI_MATCH(DMI_PRODUCT_VERSION
,
1131 "HP Pavilion Notebook Model GE"),
1132 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
1136 .callback
= fix_acer_tm360_irqrouting
,
1137 .ident
= "Acer TravelMate 36x Laptop",
1139 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
1140 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
1146 int __init
pcibios_irq_init(void)
1148 DBG(KERN_DEBUG
"PCI: IRQ init\n");
1150 if (pcibios_enable_irq
|| raw_pci_ops
== NULL
)
1153 dmi_check_system(pciirq_dmi_table
);
1155 pirq_table
= pirq_find_routing_table();
1157 #ifdef CONFIG_PCI_BIOS
1158 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
1159 pirq_table
= pcibios_get_irq_routing_table();
1163 pirq_find_router(&pirq_router
);
1164 if (pirq_table
->exclusive_irqs
) {
1166 for (i
= 0; i
< 16; i
++)
1167 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
1168 pirq_penalty
[i
] += 100;
1171 * If we're using the I/O APIC, avoid using the PCI IRQ
1174 if (io_apic_assign_pci_irqs
)
1178 pcibios_enable_irq
= pirq_enable_irq
;
1180 pcibios_fixup_irqs();
1184 static void pirq_penalize_isa_irq(int irq
, int active
)
1187 * If any ISAPnP device reports an IRQ in its list of possible
1188 * IRQ's, we try to avoid assigning it to PCI devices.
1192 pirq_penalty
[irq
] += 1000;
1194 pirq_penalty
[irq
] += 100;
1198 void pcibios_penalize_isa_irq(int irq
, int active
)
1202 acpi_penalize_isa_irq(irq
, active
);
1205 pirq_penalize_isa_irq(irq
, active
);
1208 static int pirq_enable_irq(struct pci_dev
*dev
)
1211 struct pci_dev
*temp_dev
;
1213 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1214 if (pin
&& !pcibios_lookup_irq(dev
, 1) && !dev
->irq
) {
1217 pin
--; /* interrupt pins are numbered starting from 1 */
1219 if (io_apic_assign_pci_irqs
) {
1222 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
1224 * Busses behind bridges are typically not listed in the MP-table.
1225 * In this case we have to look up the IRQ based on the parent bus,
1226 * parent slot, and pin number. The SMP code detects such bridged
1227 * busses itself so we should get into this branch reliably.
1230 while (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1231 struct pci_dev
*bridge
= dev
->bus
->self
;
1233 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1234 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1235 PCI_SLOT(bridge
->devfn
), pin
);
1237 dev_warn(&dev
->dev
, "using bridge %s "
1238 "INT %c to get IRQ %d\n",
1239 pci_name(bridge
), 'A' + pin
,
1245 dev_info(&dev
->dev
, "PCI->APIC IRQ transform: "
1246 "INT %c -> IRQ %d\n", 'A' + pin
, irq
);
1250 msg
= "; probably buggy MP table";
1251 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1254 msg
= "; please try using pci=biosirq";
1257 * With IDE legacy devices the IRQ lookup failure is not
1260 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&&
1261 !(dev
->class & 0x5))
1264 dev_warn(&dev
->dev
, "can't find IRQ for PCI INT %c%s\n",