1 /* drivers/video/s1d13xxxfb.c
3 * (c) 2004 Simtec Electronics
4 * (c) 2005 Thibaut VARENE <varenet@parisc-linux.org>
6 * Driver for Epson S1D13xxx series framebuffer chips
9 * linux/drivers/video/skeletonfb.c
10 * linux/drivers/video/epson1355fb.c
11 * linux/drivers/video/epson/s1d13xxxfb.c (2.4 driver by Epson)
13 * Note, currently only tested on S1D13806 with 16bit CRT.
14 * As such, this driver might still contain some hardcoded bits relating to
16 * Making it work on other S1D13XXX chips should merely be a matter of adding
17 * a few switch()s, some missing glue here and there maybe, and split header
20 * TODO: - handle dual screen display (CRT and LCD at the same time).
21 * - check_var(), mode change, etc.
23 * - Accelerated interfaces.
24 * - Probably not SMP safe :)
26 * This file is subject to the terms and conditions of the GNU General Public
27 * License. See the file COPYING in the main directory of this archive for
31 #include <linux/module.h>
32 #include <linux/platform_device.h>
33 #include <linux/delay.h>
35 #include <linux/types.h>
36 #include <linux/errno.h>
38 #include <linux/mman.h>
43 #include <video/s1d13xxxfb.h>
45 #define PFX "s1d13xxxfb: "
48 #define dbg(fmt, args...) do { printk(KERN_INFO fmt, ## args); } while(0)
50 #define dbg(fmt, args...) do { } while (0)
53 static const int __devinitconst s1d13xxxfb_revisions
[] = {
54 S1D13506_CHIP_REV
, /* Rev.4 on HP Jornada 7xx S1D13506 */
55 S1D13806_CHIP_REV
, /* Rev.7 on .. */
59 * Here we define the default struct fb_fix_screeninfo
61 static struct fb_fix_screeninfo __devinitdata s1d13xxxfb_fix
= {
63 .type
= FB_TYPE_PACKED_PIXELS
,
64 .visual
= FB_VISUAL_PSEUDOCOLOR
,
68 .accel
= FB_ACCEL_NONE
,
72 s1d13xxxfb_readreg(struct s1d13xxxfb_par
*par
, u16 regno
)
74 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
75 regno
=((regno
& 1) ? (regno
& ~1L) : (regno
+ 1));
77 return readb(par
->regs
+ regno
);
81 s1d13xxxfb_writereg(struct s1d13xxxfb_par
*par
, u16 regno
, u8 value
)
83 #if defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT) || defined(CONFIG_PLAT_MAPPI3)
84 regno
=((regno
& 1) ? (regno
& ~1L) : (regno
+ 1));
86 writeb(value
, par
->regs
+ regno
);
90 s1d13xxxfb_runinit(struct s1d13xxxfb_par
*par
,
91 const struct s1d13xxxfb_regval
*initregs
,
92 const unsigned int size
)
96 for (i
= 0; i
< size
; i
++) {
97 if ((initregs
[i
].addr
== S1DREG_DELAYOFF
) ||
98 (initregs
[i
].addr
== S1DREG_DELAYON
))
99 mdelay((int)initregs
[i
].value
);
101 s1d13xxxfb_writereg(par
, initregs
[i
].addr
, initregs
[i
].value
);
105 /* make sure the hardware can cope with us */
110 lcd_enable(struct s1d13xxxfb_par
*par
, int enable
)
112 u8 mode
= s1d13xxxfb_readreg(par
, S1DREG_COM_DISP_MODE
);
119 s1d13xxxfb_writereg(par
, S1DREG_COM_DISP_MODE
, mode
);
123 crt_enable(struct s1d13xxxfb_par
*par
, int enable
)
125 u8 mode
= s1d13xxxfb_readreg(par
, S1DREG_COM_DISP_MODE
);
132 s1d13xxxfb_writereg(par
, S1DREG_COM_DISP_MODE
, mode
);
135 /* framebuffer control routines */
138 s1d13xxxfb_setup_pseudocolour(struct fb_info
*info
)
140 info
->fix
.visual
= FB_VISUAL_PSEUDOCOLOR
;
142 info
->var
.red
.length
= 4;
143 info
->var
.green
.length
= 4;
144 info
->var
.blue
.length
= 4;
148 s1d13xxxfb_setup_truecolour(struct fb_info
*info
)
150 info
->fix
.visual
= FB_VISUAL_TRUECOLOR
;
151 info
->var
.bits_per_pixel
= 16;
153 info
->var
.red
.length
= 5;
154 info
->var
.red
.offset
= 11;
156 info
->var
.green
.length
= 6;
157 info
->var
.green
.offset
= 5;
159 info
->var
.blue
.length
= 5;
160 info
->var
.blue
.offset
= 0;
164 * s1d13xxxfb_set_par - Alters the hardware state.
165 * @info: frame buffer structure
167 * Using the fb_var_screeninfo in fb_info we set the depth of the
168 * framebuffer. This function alters the par AND the
169 * fb_fix_screeninfo stored in fb_info. It doesn't not alter var in
170 * fb_info since we are using that data. This means we depend on the
171 * data in var inside fb_info to be supported by the hardware.
172 * xxxfb_check_var is always called before xxxfb_set_par to ensure this.
174 * XXX TODO: write proper s1d13xxxfb_check_var(), without which that
175 * function is quite useless.
178 s1d13xxxfb_set_par(struct fb_info
*info
)
180 struct s1d13xxxfb_par
*s1dfb
= info
->par
;
183 dbg("s1d13xxxfb_set_par: bpp=%d\n", info
->var
.bits_per_pixel
);
185 if ((s1dfb
->display
& 0x01)) /* LCD */
186 val
= s1d13xxxfb_readreg(s1dfb
, S1DREG_LCD_DISP_MODE
); /* read colour control */
188 val
= s1d13xxxfb_readreg(s1dfb
, S1DREG_CRT_DISP_MODE
); /* read colour control */
192 switch (info
->var
.bits_per_pixel
) {
194 dbg("pseudo colour 4\n");
195 s1d13xxxfb_setup_pseudocolour(info
);
199 dbg("pseudo colour 8\n");
200 s1d13xxxfb_setup_pseudocolour(info
);
204 dbg("true colour\n");
205 s1d13xxxfb_setup_truecolour(info
);
210 dbg("bpp not supported!\n");
214 dbg("writing %02x to display mode register\n", val
);
216 if ((s1dfb
->display
& 0x01)) /* LCD */
217 s1d13xxxfb_writereg(s1dfb
, S1DREG_LCD_DISP_MODE
, val
);
219 s1d13xxxfb_writereg(s1dfb
, S1DREG_CRT_DISP_MODE
, val
);
221 info
->fix
.line_length
= info
->var
.xres
* info
->var
.bits_per_pixel
;
222 info
->fix
.line_length
/= 8;
224 dbg("setting line_length to %d\n", info
->fix
.line_length
);
232 * s1d13xxxfb_setcolreg - sets a color register.
233 * @regno: Which register in the CLUT we are programming
234 * @red: The red value which can be up to 16 bits wide
235 * @green: The green value which can be up to 16 bits wide
236 * @blue: The blue value which can be up to 16 bits wide.
237 * @transp: If supported the alpha value which can be up to 16 bits wide.
238 * @info: frame buffer info structure
240 * Returns negative errno on error, or zero on success.
243 s1d13xxxfb_setcolreg(u_int regno
, u_int red
, u_int green
, u_int blue
,
244 u_int transp
, struct fb_info
*info
)
246 struct s1d13xxxfb_par
*s1dfb
= info
->par
;
247 unsigned int pseudo_val
;
249 if (regno
>= S1D_PALETTE_SIZE
)
252 dbg("s1d13xxxfb_setcolreg: %d: rgb=%d,%d,%d, tr=%d\n",
253 regno
, red
, green
, blue
, transp
);
255 if (info
->var
.grayscale
)
256 red
= green
= blue
= (19595*red
+ 38470*green
+ 7471*blue
) >> 16;
258 switch (info
->fix
.visual
) {
259 case FB_VISUAL_TRUECOLOR
:
263 /* deal with creating pseudo-palette entries */
265 pseudo_val
= (red
>> 11) << info
->var
.red
.offset
;
266 pseudo_val
|= (green
>> 10) << info
->var
.green
.offset
;
267 pseudo_val
|= (blue
>> 11) << info
->var
.blue
.offset
;
269 dbg("s1d13xxxfb_setcolreg: pseudo %d, val %08x\n",
272 #if defined(CONFIG_PLAT_MAPPI)
273 ((u32
*)info
->pseudo_palette
)[regno
] = cpu_to_le16(pseudo_val
);
275 ((u32
*)info
->pseudo_palette
)[regno
] = pseudo_val
;
279 case FB_VISUAL_PSEUDOCOLOR
:
280 s1d13xxxfb_writereg(s1dfb
, S1DREG_LKUP_ADDR
, regno
);
281 s1d13xxxfb_writereg(s1dfb
, S1DREG_LKUP_DATA
, red
);
282 s1d13xxxfb_writereg(s1dfb
, S1DREG_LKUP_DATA
, green
);
283 s1d13xxxfb_writereg(s1dfb
, S1DREG_LKUP_DATA
, blue
);
290 dbg("s1d13xxxfb_setcolreg: done\n");
296 * s1d13xxxfb_blank - blanks the display.
297 * @blank_mode: the blank mode we want.
298 * @info: frame buffer structure that represents a single frame buffer
300 * Blank the screen if blank_mode != 0, else unblank. Return 0 if
301 * blanking succeeded, != 0 if un-/blanking failed due to e.g. a
302 * video mode which doesn't support it. Implements VESA suspend
303 * and powerdown modes on hardware that supports disabling hsync/vsync:
304 * blank_mode == 2: suspend vsync
305 * blank_mode == 3: suspend hsync
306 * blank_mode == 4: powerdown
308 * Returns negative errno on error, or zero on success.
311 s1d13xxxfb_blank(int blank_mode
, struct fb_info
*info
)
313 struct s1d13xxxfb_par
*par
= info
->par
;
315 dbg("s1d13xxxfb_blank: blank=%d, info=%p\n", blank_mode
, info
);
317 switch (blank_mode
) {
318 case FB_BLANK_UNBLANK
:
319 case FB_BLANK_NORMAL
:
320 if ((par
->display
& 0x01) != 0)
322 if ((par
->display
& 0x02) != 0)
325 case FB_BLANK_VSYNC_SUSPEND
:
326 case FB_BLANK_HSYNC_SUSPEND
:
328 case FB_BLANK_POWERDOWN
:
336 /* let fbcon do a soft blank for us */
337 return ((blank_mode
== FB_BLANK_NORMAL
) ? 1 : 0);
341 * s1d13xxxfb_pan_display - Pans the display.
342 * @var: frame buffer variable screen structure
343 * @info: frame buffer structure that represents a single frame buffer
345 * Pan (or wrap, depending on the `vmode' field) the display using the
346 * `yoffset' field of the `var' structure (`xoffset' not yet supported).
347 * If the values don't fit, return -EINVAL.
349 * Returns negative errno on error, or zero on success.
352 s1d13xxxfb_pan_display(struct fb_var_screeninfo
*var
, struct fb_info
*info
)
354 struct s1d13xxxfb_par
*par
= info
->par
;
357 if (var
->xoffset
!= 0) /* not yet ... */
360 if (var
->yoffset
+ info
->var
.yres
> info
->var
.yres_virtual
)
363 start
= (info
->fix
.line_length
>> 1) * var
->yoffset
;
365 if ((par
->display
& 0x01)) {
367 s1d13xxxfb_writereg(par
, S1DREG_LCD_DISP_START0
, (start
& 0xff));
368 s1d13xxxfb_writereg(par
, S1DREG_LCD_DISP_START1
, ((start
>> 8) & 0xff));
369 s1d13xxxfb_writereg(par
, S1DREG_LCD_DISP_START2
, ((start
>> 16) & 0x0f));
372 s1d13xxxfb_writereg(par
, S1DREG_CRT_DISP_START0
, (start
& 0xff));
373 s1d13xxxfb_writereg(par
, S1DREG_CRT_DISP_START1
, ((start
>> 8) & 0xff));
374 s1d13xxxfb_writereg(par
, S1DREG_CRT_DISP_START2
, ((start
>> 16) & 0x0f));
381 /* framebuffer information structures */
383 static struct fb_ops s1d13xxxfb_fbops
= {
384 .owner
= THIS_MODULE
,
385 .fb_set_par
= s1d13xxxfb_set_par
,
386 .fb_setcolreg
= s1d13xxxfb_setcolreg
,
387 .fb_blank
= s1d13xxxfb_blank
,
389 .fb_pan_display
= s1d13xxxfb_pan_display
,
391 /* to be replaced by any acceleration we can */
392 .fb_fillrect
= cfb_fillrect
,
393 .fb_copyarea
= cfb_copyarea
,
394 .fb_imageblit
= cfb_imageblit
,
397 static int s1d13xxxfb_width_tab
[2][4] __devinitdata
= {
403 * s1d13xxxfb_fetch_hw_state - Configure the framebuffer according to
405 * @info: frame buffer structure
407 * We setup the framebuffer structures according to the current
408 * hardware setup. On some machines, the BIOS will have filled
409 * the chip registers with such info, on others, these values will
410 * have been written in some init procedure. In any case, the
411 * software values needs to match the hardware ones. This is what
412 * this function ensures.
414 * Note: some of the hardcoded values here might need some love to
415 * work on various chips, and might need to no longer be hardcoded.
417 static void __devinit
418 s1d13xxxfb_fetch_hw_state(struct fb_info
*info
)
420 struct fb_var_screeninfo
*var
= &info
->var
;
421 struct fb_fix_screeninfo
*fix
= &info
->fix
;
422 struct s1d13xxxfb_par
*par
= info
->par
;
426 u32 xres_virtual
, yres_virtual
;
428 int is_color
, is_dual
, is_tft
;
429 int lcd_enabled
, crt_enabled
;
431 fix
->type
= FB_TYPE_PACKED_PIXELS
;
434 par
->display
= s1d13xxxfb_readreg(par
, S1DREG_COM_DISP_MODE
);
435 crt_enabled
= (par
->display
& 0x02) != 0;
436 lcd_enabled
= (par
->display
& 0x01) != 0;
438 if (lcd_enabled
&& crt_enabled
)
439 printk(KERN_WARNING PFX
"Warning: LCD and CRT detected, using LCD\n");
442 display
= s1d13xxxfb_readreg(par
, S1DREG_LCD_DISP_MODE
);
444 display
= s1d13xxxfb_readreg(par
, S1DREG_CRT_DISP_MODE
);
446 bpp
= display
& 0x07;
451 var
->bits_per_pixel
= 8;
452 var
->red
.offset
= var
->green
.offset
= var
->blue
.offset
= 0;
453 var
->red
.length
= var
->green
.length
= var
->blue
.length
= 8;
456 s1d13xxxfb_setup_truecolour(info
);
459 dbg("bpp: %i\n", bpp
);
461 fb_alloc_cmap(&info
->cmap
, 256, 0);
464 panel
= s1d13xxxfb_readreg(par
, S1DREG_PANEL_TYPE
);
465 is_color
= (panel
& 0x04) != 0;
466 is_dual
= (panel
& 0x02) != 0;
467 is_tft
= (panel
& 0x01) != 0;
468 lcd_bpp
= s1d13xxxfb_width_tab
[is_tft
][(panel
>> 4) & 3];
471 xres
= (s1d13xxxfb_readreg(par
, S1DREG_LCD_DISP_HWIDTH
) + 1) * 8;
472 yres
= (s1d13xxxfb_readreg(par
, S1DREG_LCD_DISP_VHEIGHT0
) +
473 ((s1d13xxxfb_readreg(par
, S1DREG_LCD_DISP_VHEIGHT1
) & 0x03) << 8) + 1);
475 offset
= (s1d13xxxfb_readreg(par
, S1DREG_LCD_MEM_OFF0
) +
476 ((s1d13xxxfb_readreg(par
, S1DREG_LCD_MEM_OFF1
) & 0x7) << 8));
478 xres
= (s1d13xxxfb_readreg(par
, S1DREG_CRT_DISP_HWIDTH
) + 1) * 8;
479 yres
= (s1d13xxxfb_readreg(par
, S1DREG_CRT_DISP_VHEIGHT0
) +
480 ((s1d13xxxfb_readreg(par
, S1DREG_CRT_DISP_VHEIGHT1
) & 0x03) << 8) + 1);
482 offset
= (s1d13xxxfb_readreg(par
, S1DREG_CRT_MEM_OFF0
) +
483 ((s1d13xxxfb_readreg(par
, S1DREG_CRT_MEM_OFF1
) & 0x7) << 8));
485 xres_virtual
= offset
* 16 / var
->bits_per_pixel
;
486 yres_virtual
= fix
->smem_len
/ (offset
* 2);
490 var
->xres_virtual
= xres_virtual
;
491 var
->yres_virtual
= yres_virtual
;
492 var
->xoffset
= var
->yoffset
= 0;
494 fix
->line_length
= offset
* 2;
496 var
->grayscale
= !is_color
;
498 var
->activate
= FB_ACTIVATE_NOW
;
500 dbg(PFX
"bpp=%d, lcd_bpp=%d, "
501 "crt_enabled=%d, lcd_enabled=%d\n",
502 var
->bits_per_pixel
, lcd_bpp
, crt_enabled
, lcd_enabled
);
503 dbg(PFX
"xres=%d, yres=%d, vxres=%d, vyres=%d "
504 "is_color=%d, is_dual=%d, is_tft=%d\n",
505 xres
, yres
, xres_virtual
, yres_virtual
, is_color
, is_dual
, is_tft
);
510 s1d13xxxfb_remove(struct platform_device
*pdev
)
512 struct fb_info
*info
= platform_get_drvdata(pdev
);
513 struct s1d13xxxfb_par
*par
= NULL
;
517 if (par
&& par
->regs
) {
518 /* disable output & enable powersave */
519 s1d13xxxfb_writereg(par
, S1DREG_COM_DISP_MODE
, 0x00);
520 s1d13xxxfb_writereg(par
, S1DREG_PS_CNF
, 0x11);
524 fb_dealloc_cmap(&info
->cmap
);
526 if (info
->screen_base
)
527 iounmap(info
->screen_base
);
529 framebuffer_release(info
);
532 release_mem_region(pdev
->resource
[0].start
,
533 pdev
->resource
[0].end
- pdev
->resource
[0].start
+1);
534 release_mem_region(pdev
->resource
[1].start
,
535 pdev
->resource
[1].end
- pdev
->resource
[1].start
+1);
540 s1d13xxxfb_probe(struct platform_device
*pdev
)
542 struct s1d13xxxfb_par
*default_par
;
543 struct fb_info
*info
;
544 struct s1d13xxxfb_pdata
*pdata
= NULL
;
549 dbg("probe called: device is %p\n", pdev
);
551 printk(KERN_INFO
"Epson S1D13XXX FB Driver\n");
553 /* enable platform-dependent hardware glue, if any */
554 if (pdev
->dev
.platform_data
)
555 pdata
= pdev
->dev
.platform_data
;
557 if (pdata
&& pdata
->platform_init_video
)
558 pdata
->platform_init_video();
561 if (pdev
->num_resources
!= 2) {
562 dev_err(&pdev
->dev
, "invalid num_resources: %i\n",
563 pdev
->num_resources
);
568 /* resource[0] is VRAM, resource[1] is registers */
569 if (pdev
->resource
[0].flags
!= IORESOURCE_MEM
570 || pdev
->resource
[1].flags
!= IORESOURCE_MEM
) {
571 dev_err(&pdev
->dev
, "invalid resource type\n");
576 if (!request_mem_region(pdev
->resource
[0].start
,
577 pdev
->resource
[0].end
- pdev
->resource
[0].start
+1, "s1d13xxxfb mem")) {
578 dev_dbg(&pdev
->dev
, "request_mem_region failed\n");
583 if (!request_mem_region(pdev
->resource
[1].start
,
584 pdev
->resource
[1].end
- pdev
->resource
[1].start
+1, "s1d13xxxfb regs")) {
585 dev_dbg(&pdev
->dev
, "request_mem_region failed\n");
590 info
= framebuffer_alloc(sizeof(struct s1d13xxxfb_par
) + sizeof(u32
) * 256, &pdev
->dev
);
596 platform_set_drvdata(pdev
, info
);
597 default_par
= info
->par
;
598 default_par
->regs
= ioremap_nocache(pdev
->resource
[1].start
,
599 pdev
->resource
[1].end
- pdev
->resource
[1].start
+1);
600 if (!default_par
->regs
) {
601 printk(KERN_ERR PFX
"unable to map registers\n");
605 info
->pseudo_palette
= default_par
->pseudo_palette
;
607 info
->screen_base
= ioremap_nocache(pdev
->resource
[0].start
,
608 pdev
->resource
[0].end
- pdev
->resource
[0].start
+1);
610 if (!info
->screen_base
) {
611 printk(KERN_ERR PFX
"unable to map framebuffer\n");
616 revision
= s1d13xxxfb_readreg(default_par
, S1DREG_REV_CODE
) >> 2;
620 for (i
= 0; i
< ARRAY_SIZE(s1d13xxxfb_revisions
); i
++) {
621 if (revision
== s1d13xxxfb_revisions
[i
])
626 printk(KERN_INFO PFX
"chip revision %i\n", revision
);
628 printk(KERN_INFO PFX
"unknown chip revision %i\n", revision
);
632 info
->fix
= s1d13xxxfb_fix
;
633 info
->fix
.mmio_start
= pdev
->resource
[1].start
;
634 info
->fix
.mmio_len
= pdev
->resource
[1].end
- pdev
->resource
[1].start
+1;
635 info
->fix
.smem_start
= pdev
->resource
[0].start
;
636 info
->fix
.smem_len
= pdev
->resource
[0].end
- pdev
->resource
[0].start
+1;
638 printk(KERN_INFO PFX
"regs mapped at 0x%p, fb %d KiB mapped at 0x%p\n",
639 default_par
->regs
, info
->fix
.smem_len
/ 1024, info
->screen_base
);
641 info
->par
= default_par
;
642 info
->fbops
= &s1d13xxxfb_fbops
;
643 info
->flags
= FBINFO_DEFAULT
| FBINFO_HWACCEL_YPAN
;
645 /* perform "manual" chip initialization, if needed */
646 if (pdata
&& pdata
->initregs
)
647 s1d13xxxfb_runinit(info
->par
, pdata
->initregs
, pdata
->initregssize
);
649 s1d13xxxfb_fetch_hw_state(info
);
651 if (register_framebuffer(info
) < 0) {
656 printk(KERN_INFO
"fb%d: %s frame buffer device\n",
657 info
->node
, info
->fix
.id
);
662 s1d13xxxfb_remove(pdev
);
668 static int s1d13xxxfb_suspend(struct platform_device
*dev
, pm_message_t state
)
670 struct fb_info
*info
= platform_get_drvdata(dev
);
671 struct s1d13xxxfb_par
*s1dfb
= info
->par
;
672 struct s1d13xxxfb_pdata
*pdata
= NULL
;
674 /* disable display */
675 lcd_enable(s1dfb
, 0);
676 crt_enable(s1dfb
, 0);
678 if (dev
->dev
.platform_data
)
679 pdata
= dev
->dev
.platform_data
;
682 if (!s1dfb
->disp_save
)
683 s1dfb
->disp_save
= kmalloc(info
->fix
.smem_len
, GFP_KERNEL
);
685 if (!s1dfb
->disp_save
) {
686 printk(KERN_ERR PFX
"no memory to save screen");
690 memcpy_fromio(s1dfb
->disp_save
, info
->screen_base
, info
->fix
.smem_len
);
692 s1dfb
->disp_save
= NULL
;
695 if (!s1dfb
->regs_save
)
696 s1dfb
->regs_save
= kmalloc(info
->fix
.mmio_len
, GFP_KERNEL
);
698 if (!s1dfb
->regs_save
) {
699 printk(KERN_ERR PFX
"no memory to save registers");
703 /* backup all registers */
704 memcpy_fromio(s1dfb
->regs_save
, s1dfb
->regs
, info
->fix
.mmio_len
);
706 /* now activate power save mode */
707 s1d13xxxfb_writereg(s1dfb
, S1DREG_PS_CNF
, 0x11);
709 if (pdata
&& pdata
->platform_suspend_video
)
710 return pdata
->platform_suspend_video();
715 static int s1d13xxxfb_resume(struct platform_device
*dev
)
717 struct fb_info
*info
= platform_get_drvdata(dev
);
718 struct s1d13xxxfb_par
*s1dfb
= info
->par
;
719 struct s1d13xxxfb_pdata
*pdata
= NULL
;
721 /* awaken the chip */
722 s1d13xxxfb_writereg(s1dfb
, S1DREG_PS_CNF
, 0x10);
724 /* do not let go until SDRAM "wakes up" */
725 while ((s1d13xxxfb_readreg(s1dfb
, S1DREG_PS_STATUS
) & 0x01))
728 if (dev
->dev
.platform_data
)
729 pdata
= dev
->dev
.platform_data
;
731 if (s1dfb
->regs_save
) {
732 /* will write RO regs, *should* get away with it :) */
733 memcpy_toio(s1dfb
->regs
, s1dfb
->regs_save
, info
->fix
.mmio_len
);
734 kfree(s1dfb
->regs_save
);
737 if (s1dfb
->disp_save
) {
738 memcpy_toio(info
->screen_base
, s1dfb
->disp_save
,
740 kfree(s1dfb
->disp_save
); /* XXX kmalloc()'d when? */
743 if ((s1dfb
->display
& 0x01) != 0)
744 lcd_enable(s1dfb
, 1);
745 if ((s1dfb
->display
& 0x02) != 0)
746 crt_enable(s1dfb
, 1);
748 if (pdata
&& pdata
->platform_resume_video
)
749 return pdata
->platform_resume_video();
753 #endif /* CONFIG_PM */
755 static struct platform_driver s1d13xxxfb_driver
= {
756 .probe
= s1d13xxxfb_probe
,
757 .remove
= s1d13xxxfb_remove
,
759 .suspend
= s1d13xxxfb_suspend
,
760 .resume
= s1d13xxxfb_resume
,
763 .name
= S1D_DEVICENAME
,
769 s1d13xxxfb_init(void)
773 if (fb_get_options("s1d13xxxfb", NULL
))
777 return platform_driver_register(&s1d13xxxfb_driver
);
782 s1d13xxxfb_exit(void)
784 platform_driver_unregister(&s1d13xxxfb_driver
);
787 module_init(s1d13xxxfb_init
);
788 module_exit(s1d13xxxfb_exit
);
791 MODULE_LICENSE("GPL");
792 MODULE_DESCRIPTION("Framebuffer driver for S1D13xxx devices");
793 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>, Thibaut VARENE <varenet@parisc-linux.org>");