drivers/watchdog/iTCO_vendor_support.c

   1 /*
   2  *      intel TCO vendor specific watchdog driver support
   3  *
   4  *      (c) Copyright 2006-2008 Wim Van Sebroeck <wim@iguana.be>.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
  12  *      provide warranty for any of this software. This material is
  13  *      provided "AS-IS" and at no charge.
  14  */
  15
  16 /*
  17  *      Includes, defines, variables, module parameters, ...
  18  */
  19
  20 /* Module and version information */
  21 #define DRV_NAME        "iTCO_vendor_support"
  22 #define DRV_VERSION     "1.02"
  23 #define PFX             DRV_NAME ": "
  24
  25 /* Includes */
  26 #include <linux/module.h>               /* For module specific items */
  27 #include <linux/moduleparam.h>          /* For new moduleparam's */
  28 #include <linux/types.h>                /* For standard types (like size_t) */
  29 #include <linux/errno.h>                /* For the -ENODEV/... values */
  30 #include <linux/kernel.h>               /* For printk/panic/... */
  31 #include <linux/init.h>                 /* For __init/__exit/... */
  32 #include <linux/ioport.h>               /* For io-port access */
  33 #include <linux/io.h>                   /* For inb/outb/... */
  34
  35 #include "iTCO_vendor.h"
  36
  37 /* iTCO defines */
  38 #define SMI_EN          acpibase + 0x30 /* SMI Control and Enable Register */
  39 #define TCOBASE         acpibase + 0x60 /* TCO base address */
  40 #define TCO1_STS        TCOBASE + 0x04  /* TCO1 Status Register */
  41
  42 /* List of vendor support modes */
  43 /* SuperMicro Pentium 3 Era 370SSE+-OEM1/P3TSSE */
  44 #define SUPERMICRO_OLD_BOARD    1
  45 /* SuperMicro Pentium 4 / Xeon 4 / EMT64T Era Systems */
  46 #define SUPERMICRO_NEW_BOARD    2
  47
  48 static int vendorsupport;
  49 module_param(vendorsupport, int, 0);
  50 MODULE_PARM_DESC(vendorsupport, "iTCO vendor specific support mode, default=0 (none), 1=SuperMicro Pent3, 2=SuperMicro Pent4+");
  51
  52 /*
  53  *      Vendor Specific Support
  54  */
  55
  56 /*
  57  *      Vendor Support: 1
  58  *      Board: Super Micro Computer Inc. 370SSE+-OEM1/P3TSSE
  59  *      iTCO chipset: ICH2
  60  *
  61  *      Code contributed by: R. Seretny <lkpatches@paypc.com>
  62  *      Documentation obtained by R. Seretny from SuperMicro Technical Support
  63  *
  64  *      To enable Watchdog function:
  65  *          BIOS setup -> Power -> TCO Logic SMI Enable -> Within5Minutes
  66  *          This setting enables SMI to clear the watchdog expired flag.
  67  *          If BIOS or CPU fail which may cause SMI hang, then system will
  68  *          reboot. When application starts to use watchdog function,
  69  *          application has to take over the control from SMI.
  70  *
  71  *          For P3TSSE, J36 jumper needs to be removed to enable the Watchdog
  72  *          function.
  73  *
  74  *          Note: The system will reboot when Expire Flag is set TWICE.
  75  *          So, if the watchdog timer is 20 seconds, then the maximum hang
  76  *          time is about 40 seconds, and the minimum hang time is about
  77  *          20.6 seconds.
  78  */
  79
  80 static void supermicro_old_pre_keepalive(unsigned long acpibase)
  81 {
  82         /* Reload TCO Timer (done in iTCO_wdt_keepalive) + */
  83         /* Clear "Expire Flag" (Bit 3 of TC01_STS register) */
  84         outb(0x08, TCO1_STS);
  85 }
  86
  87 /*
  88  *      Vendor Support: 2
  89  *      Board: Super Micro Computer Inc. P4SBx, P4DPx
  90  *      iTCO chipset: ICH4
  91  *
  92  *      Code contributed by: R. Seretny <lkpatches@paypc.com>
  93  *      Documentation obtained by R. Seretny from SuperMicro Technical Support
  94  *
  95  *      To enable Watchdog function:
  96  *       1. BIOS
  97  *        For P4SBx:
  98  *        BIOS setup -> Advanced -> Integrated Peripherals -> Watch Dog Feature
  99  *        For P4DPx:
 100  *        BIOS setup -> Advanced -> I/O Device Configuration -> Watch Dog
 101  *       This setting enables or disables Watchdog function. When enabled, the
 102  *       default watchdog timer is set to be 5 minutes (about 4m35s). It is
 103  *       enough to load and run the OS. The application (service or driver) has
 104  *       to take over the control once OS is running up and before watchdog
 105  *       expires.
 106  *
 107  *       2. JUMPER
 108  *        For P4SBx: JP39
 109  *        For P4DPx: JP37
 110  *        This jumper is used for safety.  Closed is enabled. This jumper
 111  *        prevents user enables watchdog in BIOS by accident.
 112  *
 113  *       To enable Watch Dog function, both BIOS and JUMPER must be enabled.
 114  *
 115  *      The documentation lists motherboards P4SBx and P4DPx series as of
 116  *      20-March-2002. However, this code works flawlessly with much newer
 117  *      motherboards, such as my X6DHR-8G2 (SuperServer 6014H-82).
 118  *
 119  *      The original iTCO driver as written does not actually reset the
 120  *      watchdog timer on these machines, as a result they reboot after five
 121  *      minutes.
 122  *
 123  *      NOTE: You may leave the Watchdog function disabled in the SuperMicro
 124  *      BIOS to avoid a "boot-race"... This driver will enable watchdog
 125  *      functionality even if it's disabled in the BIOS once the /dev/watchdog
 126  *      file is opened.
 127  */
 128
 129 /* I/O Port's */
 130 #define SM_REGINDEX     0x2e    /* SuperMicro ICH4+ Register Index */
 131 #define SM_DATAIO       0x2f    /* SuperMicro ICH4+ Register Data I/O */
 132
 133 /* Control Register's */
 134 #define SM_CTLPAGESW    0x07    /* SuperMicro ICH4+ Control Page Switch */
 135 #define SM_CTLPAGE      0x08    /* SuperMicro ICH4+ Control Page Num */
 136
 137 #define SM_WATCHENABLE  0x30    /* Watchdog enable: Bit 0: 0=off, 1=on */
 138
 139 #define SM_WATCHPAGE    0x87    /* Watchdog unlock control page */
 140
 141 #define SM_ENDWATCH     0xAA    /* Watchdog lock control page */
 142
 143 #define SM_COUNTMODE    0xf5    /* Watchdog count mode select */
 144                                 /* (Bit 3: 0 = seconds, 1 = minutes */
 145
 146 #define SM_WATCHTIMER   0xf6    /* 8-bits, Watchdog timer counter (RW) */
 147
 148 #define SM_RESETCONTROL 0xf7    /* Watchdog reset control */
 149                                 /* Bit 6: timer is reset by kbd interrupt */
 150                                 /* Bit 7: timer is reset by mouse interrupt */
 151
 152 static void supermicro_new_unlock_watchdog(void)
 153 {
 154         /* Write 0x87 to port 0x2e twice */
 155         outb(SM_WATCHPAGE, SM_REGINDEX);
 156         outb(SM_WATCHPAGE, SM_REGINDEX);
 157         /* Switch to watchdog control page */
 158         outb(SM_CTLPAGESW, SM_REGINDEX);
 159         outb(SM_CTLPAGE, SM_DATAIO);
 160 }
 161
 162 static void supermicro_new_lock_watchdog(void)
 163 {
 164         outb(SM_ENDWATCH, SM_REGINDEX);
 165 }
 166
 167 static void supermicro_new_pre_start(unsigned int heartbeat)
 168 {
 169         unsigned int val;
 170
 171         supermicro_new_unlock_watchdog();
 172
 173         /* Watchdog timer setting needs to be in seconds*/
 174         outb(SM_COUNTMODE, SM_REGINDEX);
 175         val = inb(SM_DATAIO);
 176         val &= 0xF7;
 177         outb(val, SM_DATAIO);
 178
 179         /* Write heartbeat interval to WDOG */
 180         outb(SM_WATCHTIMER, SM_REGINDEX);
 181         outb((heartbeat & 255), SM_DATAIO);
 182
 183         /* Make sure keyboard/mouse interrupts don't interfere */
 184         outb(SM_RESETCONTROL, SM_REGINDEX);
 185         val = inb(SM_DATAIO);
 186         val &= 0x3f;
 187         outb(val, SM_DATAIO);
 188
 189         /* enable watchdog by setting bit 0 of Watchdog Enable to 1 */
 190         outb(SM_WATCHENABLE, SM_REGINDEX);
 191         val = inb(SM_DATAIO);
 192         val |= 0x01;
 193         outb(val, SM_DATAIO);
 194
 195         supermicro_new_lock_watchdog();
 196 }
 197
 198 static void supermicro_new_pre_stop(void)
 199 {
 200         unsigned int val;
 201
 202         supermicro_new_unlock_watchdog();
 203
 204         /* disable watchdog by setting bit 0 of Watchdog Enable to 0 */
 205         outb(SM_WATCHENABLE, SM_REGINDEX);
 206         val = inb(SM_DATAIO);
 207         val &= 0xFE;
 208         outb(val, SM_DATAIO);
 209
 210         supermicro_new_lock_watchdog();
 211 }
 212
 213 static void supermicro_new_pre_set_heartbeat(unsigned int heartbeat)
 214 {
 215         supermicro_new_unlock_watchdog();
 216
 217         /* reset watchdog timeout to heartveat value */
 218         outb(SM_WATCHTIMER, SM_REGINDEX);
 219         outb((heartbeat & 255), SM_DATAIO);
 220
 221         supermicro_new_lock_watchdog();
 222 }
 223
 224 /*
 225  *      Generic Support Functions
 226  */
 227
 228 void iTCO_vendor_pre_start(unsigned long acpibase,
 229                            unsigned int heartbeat)
 230 {
 231         if (vendorsupport == SUPERMICRO_NEW_BOARD)
 232                 supermicro_new_pre_start(heartbeat);
 233 }
 234 EXPORT_SYMBOL(iTCO_vendor_pre_start);
 235
 236 void iTCO_vendor_pre_stop(unsigned long acpibase)
 237 {
 238         if (vendorsupport == SUPERMICRO_NEW_BOARD)
 239                 supermicro_new_pre_stop();
 240 }
 241 EXPORT_SYMBOL(iTCO_vendor_pre_stop);
 242
 243 void iTCO_vendor_pre_keepalive(unsigned long acpibase, unsigned int heartbeat)
 244 {
 245         if (vendorsupport == SUPERMICRO_OLD_BOARD)
 246                 supermicro_old_pre_keepalive(acpibase);
 247         else if (vendorsupport == SUPERMICRO_NEW_BOARD)
 248                 supermicro_new_pre_set_heartbeat(heartbeat);
 249 }
 250 EXPORT_SYMBOL(iTCO_vendor_pre_keepalive);
 251
 252 void iTCO_vendor_pre_set_heartbeat(unsigned int heartbeat)
 253 {
 254         if (vendorsupport == SUPERMICRO_NEW_BOARD)
 255                 supermicro_new_pre_set_heartbeat(heartbeat);
 256 }
 257 EXPORT_SYMBOL(iTCO_vendor_pre_set_heartbeat);
 258
 259 int iTCO_vendor_check_noreboot_on(void)
 260 {
 261         switch (vendorsupport) {
 262         case SUPERMICRO_OLD_BOARD:
 263                 return 0;
 264         default:
 265                 return 1;
 266         }
 267 }
 268 EXPORT_SYMBOL(iTCO_vendor_check_noreboot_on);
 269
 270 static int __init iTCO_vendor_init_module(void)
 271 {
 272         printk(KERN_INFO PFX "vendor-support=%d\n", vendorsupport);
 273         return 0;
 274 }
 275
 276 static void __exit iTCO_vendor_exit_module(void)
 277 {
 278         printk(KERN_INFO PFX "Module Unloaded\n");
 279 }
 280
 281 module_init(iTCO_vendor_init_module);
 282 module_exit(iTCO_vendor_exit_module);
 283
 284 MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>, R. Seretny <lkpatches@paypc.com>");
 285 MODULE_DESCRIPTION("Intel TCO Vendor Specific WatchDog Timer Driver Support");
 286 MODULE_VERSION(DRV_VERSION);
 287 MODULE_LICENSE("GPL");
 288