?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[CPUFREQ] Re-enable cpufreq suspend and resume code
[linux-2.6/mini2440.git] / drivers / net / smc911x.c
blobbc4976ac871281f716800249710448e9f81b628c
1 /*
2 * smc911x.c
3 * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4 *
5 * Copyright (C) 2005 Sensoria Corp
6 * Derived from the unified SMC91x driver by Nicolas Pitre
7 * and the smsc911x.c reference driver by SMSC
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Arguments:
24 * watchdog = TX watchdog timeout
25 * tx_fifo_kb = Size of TX FIFO in KB
26 *
27 * History:
28 * 04/16/05 Dustin McIntire Initial version
29 */
30 static const char version[] =
31 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
32
33 /* Debugging options */
34 #define ENABLE_SMC_DEBUG_RX 0
35 #define ENABLE_SMC_DEBUG_TX 0
36 #define ENABLE_SMC_DEBUG_DMA 0
37 #define ENABLE_SMC_DEBUG_PKTS 0
38 #define ENABLE_SMC_DEBUG_MISC 0
39 #define ENABLE_SMC_DEBUG_FUNC 0
40
41 #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
42 #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
43 #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
44 #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
45 #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
46 #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
47
48 #ifndef SMC_DEBUG
49 #define SMC_DEBUG ( SMC_DEBUG_RX | \
50 SMC_DEBUG_TX | \
51 SMC_DEBUG_DMA | \
52 SMC_DEBUG_PKTS | \
53 SMC_DEBUG_MISC | \
54 SMC_DEBUG_FUNC \
55 )
56 #endif
57
58 #include <linux/init.h>
59 #include <linux/module.h>
60 #include <linux/kernel.h>
61 #include <linux/sched.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/errno.h>
66 #include <linux/ioport.h>
67 #include <linux/crc32.h>
68 #include <linux/device.h>
69 #include <linux/platform_device.h>
70 #include <linux/spinlock.h>
71 #include <linux/ethtool.h>
72 #include <linux/mii.h>
73 #include <linux/workqueue.h>
74
75 #include <linux/netdevice.h>
76 #include <linux/etherdevice.h>
77 #include <linux/skbuff.h>
78
79 #include <asm/io.h>
80
81 #include "smc911x.h"
82
83 /*
84 * Transmit timeout, default 5 seconds.
85 */
86 static int watchdog = 5000;
87 module_param(watchdog, int, 0400);
88 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
89
90 static int tx_fifo_kb=8;
91 module_param(tx_fifo_kb, int, 0400);
92 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
93
94 MODULE_LICENSE("GPL");
95 MODULE_ALIAS("platform:smc911x");
96
97 /*
98 * The internal workings of the driver. If you are changing anything
99 * here with the SMC stuff, you should have the datasheet and know
100 * what you are doing.
101 */
102 #define CARDNAME "smc911x"
103
104 /*
105 * Use power-down feature of the chip
106 */
107 #define POWER_DOWN 1
108
109 #if SMC_DEBUG > 0
110 #define DBG(n, args...) \
111 do { \
112 if (SMC_DEBUG & (n)) \
113 printk(args); \
114 } while (0)
115
116 #define PRINTK(args...) printk(args)
117 #else
118 #define DBG(n, args...) do { } while (0)
119 #define PRINTK(args...) printk(KERN_DEBUG args)
120 #endif
121
122 #if SMC_DEBUG_PKTS > 0
123 static void PRINT_PKT(u_char *buf, int length)
124 {
125 int i;
126 int remainder;
127 int lines;
128
129 lines = length / 16;
130 remainder = length % 16;
131
132 for (i = 0; i < lines ; i ++) {
133 int cur;
134 for (cur = 0; cur < 8; cur++) {
135 u_char a, b;
136 a = *buf++;
137 b = *buf++;
138 printk("%02x%02x ", a, b);
139 }
140 printk("\n");
141 }
142 for (i = 0; i < remainder/2 ; i++) {
143 u_char a, b;
144 a = *buf++;
145 b = *buf++;
146 printk("%02x%02x ", a, b);
147 }
148 printk("\n");
149 }
150 #else
151 #define PRINT_PKT(x...) do { } while (0)
152 #endif
153
154
155 /* this enables an interrupt in the interrupt mask register */
156 #define SMC_ENABLE_INT(lp, x) do { \
157 unsigned int __mask; \
158 __mask = SMC_GET_INT_EN((lp)); \
159 __mask |= (x); \
160 SMC_SET_INT_EN((lp), __mask); \
161 } while (0)
162
163 /* this disables an interrupt from the interrupt mask register */
164 #define SMC_DISABLE_INT(lp, x) do { \
165 unsigned int __mask; \
166 __mask = SMC_GET_INT_EN((lp)); \
167 __mask &= ~(x); \
168 SMC_SET_INT_EN((lp), __mask); \
169 } while (0)
170
171 /*
172 * this does a soft reset on the device
173 */
174 static void smc911x_reset(struct net_device *dev)
175 {
176 struct smc911x_local *lp = netdev_priv(dev);
177 unsigned int reg, timeout=0, resets=1, irq_cfg;
178 unsigned long flags;
179
180 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
181
182 /* Take out of PM setting first */
183 if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
184 /* Write to the bytetest will take out of powerdown */
185 SMC_SET_BYTE_TEST(lp, 0);
186 timeout=10;
187 do {
188 udelay(10);
189 reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
190 } while (--timeout && !reg);
191 if (timeout == 0) {
192 PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
193 return;
194 }
195 }
196
197 /* Disable all interrupts */
198 spin_lock_irqsave(&lp->lock, flags);
199 SMC_SET_INT_EN(lp, 0);
200 spin_unlock_irqrestore(&lp->lock, flags);
201
202 while (resets--) {
203 SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
204 timeout=10;
205 do {
206 udelay(10);
207 reg = SMC_GET_HW_CFG(lp);
208 /* If chip indicates reset timeout then try again */
209 if (reg & HW_CFG_SRST_TO_) {
210 PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
211 resets++;
212 break;
213 }
214 } while (--timeout && (reg & HW_CFG_SRST_));
215 }
216 if (timeout == 0) {
217 PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
218 return;
219 }
220
221 /* make sure EEPROM has finished loading before setting GPIO_CFG */
222 timeout=1000;
223 while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
224 udelay(10);
225
226 if (timeout == 0){
227 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
228 return;
229 }
230
231 /* Initialize interrupts */
232 SMC_SET_INT_EN(lp, 0);
233 SMC_ACK_INT(lp, -1);
234
235 /* Reset the FIFO level and flow control settings */
236 SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
237 //TODO: Figure out what appropriate pause time is
238 SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
239 SMC_SET_AFC_CFG(lp, lp->afc_cfg);
240
241
242 /* Set to LED outputs */
243 SMC_SET_GPIO_CFG(lp, 0x70070000);
244
245 /*
246 * Deassert IRQ for 1*10us for edge type interrupts
247 * and drive IRQ pin push-pull
248 */
249 irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
250 #ifdef SMC_DYNAMIC_BUS_CONFIG
251 if (lp->cfg.irq_polarity)
252 irq_cfg |= INT_CFG_IRQ_POL_;
253 #endif
254 SMC_SET_IRQ_CFG(lp, irq_cfg);
255
256 /* clear anything saved */
257 if (lp->pending_tx_skb != NULL) {
258 dev_kfree_skb (lp->pending_tx_skb);
259 lp->pending_tx_skb = NULL;
260 dev->stats.tx_errors++;
261 dev->stats.tx_aborted_errors++;
262 }
263 }
264
265 /*
266 * Enable Interrupts, Receive, and Transmit
267 */
268 static void smc911x_enable(struct net_device *dev)
269 {
270 struct smc911x_local *lp = netdev_priv(dev);
271 unsigned mask, cfg, cr;
272 unsigned long flags;
273
274 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
275
276 spin_lock_irqsave(&lp->lock, flags);
277
278 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
279
280 /* Enable TX */
281 cfg = SMC_GET_HW_CFG(lp);
282 cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
283 cfg |= HW_CFG_SF_;
284 SMC_SET_HW_CFG(lp, cfg);
285 SMC_SET_FIFO_TDA(lp, 0xFF);
286 /* Update TX stats on every 64 packets received or every 1 sec */
287 SMC_SET_FIFO_TSL(lp, 64);
288 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
289
290 SMC_GET_MAC_CR(lp, cr);
291 cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
292 SMC_SET_MAC_CR(lp, cr);
293 SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
294
295 /* Add 2 byte padding to start of packets */
296 SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
297
298 /* Turn on receiver and enable RX */
299 if (cr & MAC_CR_RXEN_)
300 DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
301
302 SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
303
304 /* Interrupt on every received packet */
305 SMC_SET_FIFO_RSA(lp, 0x01);
306 SMC_SET_FIFO_RSL(lp, 0x00);
307
308 /* now, enable interrupts */
309 mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
310 INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
311 INT_EN_PHY_INT_EN_;
312 if (IS_REV_A(lp->revision))
313 mask|=INT_EN_RDFL_EN_;
314 else {
315 mask|=INT_EN_RDFO_EN_;
316 }
317 SMC_ENABLE_INT(lp, mask);
318
319 spin_unlock_irqrestore(&lp->lock, flags);
320 }
321
322 /*
323 * this puts the device in an inactive state
324 */
325 static void smc911x_shutdown(struct net_device *dev)
326 {
327 struct smc911x_local *lp = netdev_priv(dev);
328 unsigned cr;
329 unsigned long flags;
330
331 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
332
333 /* Disable IRQ's */
334 SMC_SET_INT_EN(lp, 0);
335
336 /* Turn of Rx and TX */
337 spin_lock_irqsave(&lp->lock, flags);
338 SMC_GET_MAC_CR(lp, cr);
339 cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
340 SMC_SET_MAC_CR(lp, cr);
341 SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
342 spin_unlock_irqrestore(&lp->lock, flags);
343 }
344
345 static inline void smc911x_drop_pkt(struct net_device *dev)
346 {
347 struct smc911x_local *lp = netdev_priv(dev);
348 unsigned int fifo_count, timeout, reg;
349
350 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
351 fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
352 if (fifo_count <= 4) {
353 /* Manually dump the packet data */
354 while (fifo_count--)
355 SMC_GET_RX_FIFO(lp);
356 } else {
357 /* Fast forward through the bad packet */
358 SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
359 timeout=50;
360 do {
361 udelay(10);
362 reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
363 } while (--timeout && reg);
364 if (timeout == 0) {
365 PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
366 }
367 }
368 }
369
370 /*
371 * This is the procedure to handle the receipt of a packet.
372 * It should be called after checking for packet presence in
373 * the RX status FIFO. It must be called with the spin lock
374 * already held.
375 */
376 static inline void smc911x_rcv(struct net_device *dev)
377 {
378 struct smc911x_local *lp = netdev_priv(dev);
379 unsigned int pkt_len, status;
380 struct sk_buff *skb;
381 unsigned char *data;
382
383 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
384 dev->name, __func__);
385 status = SMC_GET_RX_STS_FIFO(lp);
386 DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
387 dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
388 pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
389 if (status & RX_STS_ES_) {
390 /* Deal with a bad packet */
391 dev->stats.rx_errors++;
392 if (status & RX_STS_CRC_ERR_)
393 dev->stats.rx_crc_errors++;
394 else {
395 if (status & RX_STS_LEN_ERR_)
396 dev->stats.rx_length_errors++;
397 if (status & RX_STS_MCAST_)
398 dev->stats.multicast++;
399 }
400 /* Remove the bad packet data from the RX FIFO */
401 smc911x_drop_pkt(dev);
402 } else {
403 /* Receive a valid packet */
404 /* Alloc a buffer with extra room for DMA alignment */
405 skb=dev_alloc_skb(pkt_len+32);
406 if (unlikely(skb == NULL)) {
407 PRINTK( "%s: Low memory, rcvd packet dropped.\n",
408 dev->name);
409 dev->stats.rx_dropped++;
410 smc911x_drop_pkt(dev);
411 return;
412 }
413 /* Align IP header to 32 bits
414 * Note that the device is configured to add a 2
415 * byte padding to the packet start, so we really
416 * want to write to the orignal data pointer */
417 data = skb->data;
418 skb_reserve(skb, 2);
419 skb_put(skb,pkt_len-4);
420 #ifdef SMC_USE_DMA
421 {
422 unsigned int fifo;
423 /* Lower the FIFO threshold if possible */
424 fifo = SMC_GET_FIFO_INT(lp);
425 if (fifo & 0xFF) fifo--;
426 DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
427 dev->name, fifo & 0xff);
428 SMC_SET_FIFO_INT(lp, fifo);
429 /* Setup RX DMA */
430 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
431 lp->rxdma_active = 1;
432 lp->current_rx_skb = skb;
433 SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
434 /* Packet processing deferred to DMA RX interrupt */
435 }
436 #else
437 SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
438 SMC_PULL_DATA(lp, data, pkt_len+2+3);
439
440 DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
441 PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
442 skb->protocol = eth_type_trans(skb, dev);
443 netif_rx(skb);
444 dev->stats.rx_packets++;
445 dev->stats.rx_bytes += pkt_len-4;
446 #endif
447 }
448 }
449
450 /*
451 * This is called to actually send a packet to the chip.
452 */
453 static void smc911x_hardware_send_pkt(struct net_device *dev)
454 {
455 struct smc911x_local *lp = netdev_priv(dev);
456 struct sk_buff *skb;
457 unsigned int cmdA, cmdB, len;
458 unsigned char *buf;
459
460 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
461 BUG_ON(lp->pending_tx_skb == NULL);
462
463 skb = lp->pending_tx_skb;
464 lp->pending_tx_skb = NULL;
465
466 /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
467 /* cmdB {31:16] pkt tag [10:0] length */
468 #ifdef SMC_USE_DMA
469 /* 16 byte buffer alignment mode */
470 buf = (char*)((u32)(skb->data) & ~0xF);
471 len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
472 cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
473 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
474 skb->len;
475 #else
476 buf = (char*)((u32)skb->data & ~0x3);
477 len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
478 cmdA = (((u32)skb->data & 0x3) << 16) |
479 TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
480 skb->len;
481 #endif
482 /* tag is packet length so we can use this in stats update later */
483 cmdB = (skb->len << 16) | (skb->len & 0x7FF);
484
485 DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
486 dev->name, len, len, buf, cmdA, cmdB);
487 SMC_SET_TX_FIFO(lp, cmdA);
488 SMC_SET_TX_FIFO(lp, cmdB);
489
490 DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
491 PRINT_PKT(buf, len <= 64 ? len : 64);
492
493 /* Send pkt via PIO or DMA */
494 #ifdef SMC_USE_DMA
495 lp->current_tx_skb = skb;
496 SMC_PUSH_DATA(lp, buf, len);
497 /* DMA complete IRQ will free buffer and set jiffies */
498 #else
499 SMC_PUSH_DATA(lp, buf, len);
500 dev->trans_start = jiffies;
501 dev_kfree_skb_irq(skb);
502 #endif
503 if (!lp->tx_throttle) {
504 netif_wake_queue(dev);
505 }
506 SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
507 }
508
509 /*
510 * Since I am not sure if I will have enough room in the chip's ram
511 * to store the packet, I call this routine which either sends it
512 * now, or set the card to generates an interrupt when ready
513 * for the packet.
514 */
515 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
516 {
517 struct smc911x_local *lp = netdev_priv(dev);
518 unsigned int free;
519 unsigned long flags;
520
521 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
522 dev->name, __func__);
523
524 spin_lock_irqsave(&lp->lock, flags);
525
526 BUG_ON(lp->pending_tx_skb != NULL);
527
528 free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
529 DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
530
531 /* Turn off the flow when running out of space in FIFO */
532 if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
533 DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
534 dev->name, free);
535 /* Reenable when at least 1 packet of size MTU present */
536 SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
537 lp->tx_throttle = 1;
538 netif_stop_queue(dev);
539 }
540
541 /* Drop packets when we run out of space in TX FIFO
542 * Account for overhead required for:
543 *
544 * Tx command words 8 bytes
545 * Start offset 15 bytes
546 * End padding 15 bytes
547 */
548 if (unlikely(free < (skb->len + 8 + 15 + 15))) {
549 printk("%s: No Tx free space %d < %d\n",
550 dev->name, free, skb->len);
551 lp->pending_tx_skb = NULL;
552 dev->stats.tx_errors++;
553 dev->stats.tx_dropped++;
554 spin_unlock_irqrestore(&lp->lock, flags);
555 dev_kfree_skb(skb);
556 return 0;
557 }
558
559 #ifdef SMC_USE_DMA
560 {
561 /* If the DMA is already running then defer this packet Tx until
562 * the DMA IRQ starts it
563 */
564 if (lp->txdma_active) {
565 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
566 lp->pending_tx_skb = skb;
567 netif_stop_queue(dev);
568 spin_unlock_irqrestore(&lp->lock, flags);
569 return 0;
570 } else {
571 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
572 lp->txdma_active = 1;
573 }
574 }
575 #endif
576 lp->pending_tx_skb = skb;
577 smc911x_hardware_send_pkt(dev);
578 spin_unlock_irqrestore(&lp->lock, flags);
579
580 return 0;
581 }
582
583 /*
584 * This handles a TX status interrupt, which is only called when:
585 * - a TX error occurred, or
586 * - TX of a packet completed.
587 */
588 static void smc911x_tx(struct net_device *dev)
589 {
590 struct smc911x_local *lp = netdev_priv(dev);
591 unsigned int tx_status;
592
593 DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
594 dev->name, __func__);
595
596 /* Collect the TX status */
597 while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
598 DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
599 dev->name,
600 (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
601 tx_status = SMC_GET_TX_STS_FIFO(lp);
602 dev->stats.tx_packets++;
603 dev->stats.tx_bytes+=tx_status>>16;
604 DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
605 dev->name, (tx_status & 0xffff0000) >> 16,
606 tx_status & 0x0000ffff);
607 /* count Tx errors, but ignore lost carrier errors when in
608 * full-duplex mode */
609 if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
610 !(tx_status & 0x00000306))) {
611 dev->stats.tx_errors++;
612 }
613 if (tx_status & TX_STS_MANY_COLL_) {
614 dev->stats.collisions+=16;
615 dev->stats.tx_aborted_errors++;
616 } else {
617 dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
618 }
619 /* carrier error only has meaning for half-duplex communication */
620 if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
621 !lp->ctl_rfduplx) {
622 dev->stats.tx_carrier_errors++;
623 }
624 if (tx_status & TX_STS_LATE_COLL_) {
625 dev->stats.collisions++;
626 dev->stats.tx_aborted_errors++;
627 }
628 }
629 }
630
631
632 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
633 /*
634 * Reads a register from the MII Management serial interface
635 */
636
637 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
638 {
639 struct smc911x_local *lp = netdev_priv(dev);
640 unsigned int phydata;
641
642 SMC_GET_MII(lp, phyreg, phyaddr, phydata);
643
644 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
645 __func__, phyaddr, phyreg, phydata);
646 return phydata;
647 }
648
649
650 /*
651 * Writes a register to the MII Management serial interface
652 */
653 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
654 int phydata)
655 {
656 struct smc911x_local *lp = netdev_priv(dev);
657
658 DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
659 __func__, phyaddr, phyreg, phydata);
660
661 SMC_SET_MII(lp, phyreg, phyaddr, phydata);
662 }
663
664 /*
665 * Finds and reports the PHY address (115 and 117 have external
666 * PHY interface 118 has internal only
667 */
668 static void smc911x_phy_detect(struct net_device *dev)
669 {
670 struct smc911x_local *lp = netdev_priv(dev);
671 int phyaddr;
672 unsigned int cfg, id1, id2;
673
674 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
675
676 lp->phy_type = 0;
677
678 /*
679 * Scan all 32 PHY addresses if necessary, starting at
680 * PHY#1 to PHY#31, and then PHY#0 last.
681 */
682 switch(lp->version) {
683 case CHIP_9115:
684 case CHIP_9117:
685 case CHIP_9215:
686 case CHIP_9217:
687 cfg = SMC_GET_HW_CFG(lp);
688 if (cfg & HW_CFG_EXT_PHY_DET_) {
689 cfg &= ~HW_CFG_PHY_CLK_SEL_;
690 cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
691 SMC_SET_HW_CFG(lp, cfg);
692 udelay(10); /* Wait for clocks to stop */
693
694 cfg |= HW_CFG_EXT_PHY_EN_;
695 SMC_SET_HW_CFG(lp, cfg);
696 udelay(10); /* Wait for clocks to stop */
697
698 cfg &= ~HW_CFG_PHY_CLK_SEL_;
699 cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
700 SMC_SET_HW_CFG(lp, cfg);
701 udelay(10); /* Wait for clocks to stop */
702
703 cfg |= HW_CFG_SMI_SEL_;
704 SMC_SET_HW_CFG(lp, cfg);
705
706 for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
707
708 /* Read the PHY identifiers */
709 SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
710 SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
711
712 /* Make sure it is a valid identifier */
713 if (id1 != 0x0000 && id1 != 0xffff &&
714 id1 != 0x8000 && id2 != 0x0000 &&
715 id2 != 0xffff && id2 != 0x8000) {
716 /* Save the PHY's address */
717 lp->mii.phy_id = phyaddr & 31;
718 lp->phy_type = id1 << 16 | id2;
719 break;
720 }
721 }
722 if (phyaddr < 32)
723 /* Found an external PHY */
724 break;
725 }
726 default:
727 /* Internal media only */
728 SMC_GET_PHY_ID1(lp, 1, id1);
729 SMC_GET_PHY_ID2(lp, 1, id2);
730 /* Save the PHY's address */
731 lp->mii.phy_id = 1;
732 lp->phy_type = id1 << 16 | id2;
733 }
734
735 DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
736 dev->name, id1, id2, lp->mii.phy_id);
737 }
738
739 /*
740 * Sets the PHY to a configuration as determined by the user.
741 * Called with spin_lock held.
742 */
743 static int smc911x_phy_fixed(struct net_device *dev)
744 {
745 struct smc911x_local *lp = netdev_priv(dev);
746 int phyaddr = lp->mii.phy_id;
747 int bmcr;
748
749 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
750
751 /* Enter Link Disable state */
752 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
753 bmcr |= BMCR_PDOWN;
754 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
755
756 /*
757 * Set our fixed capabilities
758 * Disable auto-negotiation
759 */
760 bmcr &= ~BMCR_ANENABLE;
761 if (lp->ctl_rfduplx)
762 bmcr |= BMCR_FULLDPLX;
763
764 if (lp->ctl_rspeed == 100)
765 bmcr |= BMCR_SPEED100;
766
767 /* Write our capabilities to the phy control register */
768 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
769
770 /* Re-Configure the Receive/Phy Control register */
771 bmcr &= ~BMCR_PDOWN;
772 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
773
774 return 1;
775 }
776
777 /*
778 * smc911x_phy_reset - reset the phy
779 * @dev: net device
780 * @phy: phy address
781 *
782 * Issue a software reset for the specified PHY and
783 * wait up to 100ms for the reset to complete. We should
784 * not access the PHY for 50ms after issuing the reset.
785 *
786 * The time to wait appears to be dependent on the PHY.
787 *
788 */
789 static int smc911x_phy_reset(struct net_device *dev, int phy)
790 {
791 struct smc911x_local *lp = netdev_priv(dev);
792 int timeout;
793 unsigned long flags;
794 unsigned int reg;
795
796 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
797
798 spin_lock_irqsave(&lp->lock, flags);
799 reg = SMC_GET_PMT_CTRL(lp);
800 reg &= ~0xfffff030;
801 reg |= PMT_CTRL_PHY_RST_;
802 SMC_SET_PMT_CTRL(lp, reg);
803 spin_unlock_irqrestore(&lp->lock, flags);
804 for (timeout = 2; timeout; timeout--) {
805 msleep(50);
806 spin_lock_irqsave(&lp->lock, flags);
807 reg = SMC_GET_PMT_CTRL(lp);
808 spin_unlock_irqrestore(&lp->lock, flags);
809 if (!(reg & PMT_CTRL_PHY_RST_)) {
810 /* extra delay required because the phy may
811 * not be completed with its reset
812 * when PHY_BCR_RESET_ is cleared. 256us
813 * should suffice, but use 500us to be safe
814 */
815 udelay(500);
816 break;
817 }
818 }
819
820 return reg & PMT_CTRL_PHY_RST_;
821 }
822
823 /*
824 * smc911x_phy_powerdown - powerdown phy
825 * @dev: net device
826 * @phy: phy address
827 *
828 * Power down the specified PHY
829 */
830 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
831 {
832 struct smc911x_local *lp = netdev_priv(dev);
833 unsigned int bmcr;
834
835 /* Enter Link Disable state */
836 SMC_GET_PHY_BMCR(lp, phy, bmcr);
837 bmcr |= BMCR_PDOWN;
838 SMC_SET_PHY_BMCR(lp, phy, bmcr);
839 }
840
841 /*
842 * smc911x_phy_check_media - check the media status and adjust BMCR
843 * @dev: net device
844 * @init: set true for initialisation
845 *
846 * Select duplex mode depending on negotiation state. This
847 * also updates our carrier state.
848 */
849 static void smc911x_phy_check_media(struct net_device *dev, int init)
850 {
851 struct smc911x_local *lp = netdev_priv(dev);
852 int phyaddr = lp->mii.phy_id;
853 unsigned int bmcr, cr;
854
855 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
856
857 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
858 /* duplex state has changed */
859 SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
860 SMC_GET_MAC_CR(lp, cr);
861 if (lp->mii.full_duplex) {
862 DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
863 bmcr |= BMCR_FULLDPLX;
864 cr |= MAC_CR_RCVOWN_;
865 } else {
866 DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
867 bmcr &= ~BMCR_FULLDPLX;
868 cr &= ~MAC_CR_RCVOWN_;
869 }
870 SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
871 SMC_SET_MAC_CR(lp, cr);
872 }
873 }
874
875 /*
876 * Configures the specified PHY through the MII management interface
877 * using Autonegotiation.
878 * Calls smc911x_phy_fixed() if the user has requested a certain config.
879 * If RPC ANEG bit is set, the media selection is dependent purely on
880 * the selection by the MII (either in the MII BMCR reg or the result
881 * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
882 * is controlled by the RPC SPEED and RPC DPLX bits.
883 */
884 static void smc911x_phy_configure(struct work_struct *work)
885 {
886 struct smc911x_local *lp = container_of(work, struct smc911x_local,
887 phy_configure);
888 struct net_device *dev = lp->netdev;
889 int phyaddr = lp->mii.phy_id;
890 int my_phy_caps; /* My PHY capabilities */
891 int my_ad_caps; /* My Advertised capabilities */
892 int status;
893 unsigned long flags;
894
895 DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
896
897 /*
898 * We should not be called if phy_type is zero.
899 */
900 if (lp->phy_type == 0)
901 return;
902
903 if (smc911x_phy_reset(dev, phyaddr)) {
904 printk("%s: PHY reset timed out\n", dev->name);
905 return;
906 }
907 spin_lock_irqsave(&lp->lock, flags);
908
909 /*
910 * Enable PHY Interrupts (for register 18)
911 * Interrupts listed here are enabled
912 */
913 SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
914 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
915 PHY_INT_MASK_LINK_DOWN_);
916
917 /* If the user requested no auto neg, then go set his request */
918 if (lp->mii.force_media) {
919 smc911x_phy_fixed(dev);
920 goto smc911x_phy_configure_exit;
921 }
922
923 /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
924 SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
925 if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
926 printk(KERN_INFO "Auto negotiation NOT supported\n");
927 smc911x_phy_fixed(dev);
928 goto smc911x_phy_configure_exit;
929 }
930
931 /* CSMA capable w/ both pauses */
932 my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
933
934 if (my_phy_caps & BMSR_100BASE4)
935 my_ad_caps |= ADVERTISE_100BASE4;
936 if (my_phy_caps & BMSR_100FULL)
937 my_ad_caps |= ADVERTISE_100FULL;
938 if (my_phy_caps & BMSR_100HALF)
939 my_ad_caps |= ADVERTISE_100HALF;
940 if (my_phy_caps & BMSR_10FULL)
941 my_ad_caps |= ADVERTISE_10FULL;
942 if (my_phy_caps & BMSR_10HALF)
943 my_ad_caps |= ADVERTISE_10HALF;
944
945 /* Disable capabilities not selected by our user */
946 if (lp->ctl_rspeed != 100)
947 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
948
949 if (!lp->ctl_rfduplx)
950 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
951
952 /* Update our Auto-Neg Advertisement Register */
953 SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
954 lp->mii.advertising = my_ad_caps;
955
956 /*
957 * Read the register back. Without this, it appears that when
958 * auto-negotiation is restarted, sometimes it isn't ready and
959 * the link does not come up.
960 */
961 udelay(10);
962 SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
963
964 DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
965 DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
966
967 /* Restart auto-negotiation process in order to advertise my caps */
968 SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
969
970 smc911x_phy_check_media(dev, 1);
971
972 smc911x_phy_configure_exit:
973 spin_unlock_irqrestore(&lp->lock, flags);
974 }
975
976 /*
977 * smc911x_phy_interrupt
978 *
979 * Purpose: Handle interrupts relating to PHY register 18. This is
980 * called from the "hard" interrupt handler under our private spinlock.
981 */
982 static void smc911x_phy_interrupt(struct net_device *dev)
983 {
984 struct smc911x_local *lp = netdev_priv(dev);
985 int phyaddr = lp->mii.phy_id;
986 int status;
987
988 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
989
990 if (lp->phy_type == 0)
991 return;
992
993 smc911x_phy_check_media(dev, 0);
994 /* read to clear status bits */
995 SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
996 DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
997 dev->name, status & 0xffff);
998 DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
999 dev->name, SMC_GET_AFC_CFG(lp));
1000 }
1001
1002 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1003
1004 /*
1005 * This is the main routine of the driver, to handle the device when
1006 * it needs some attention.
1007 */
1008 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1009 {
1010 struct net_device *dev = dev_id;
1011 struct smc911x_local *lp = netdev_priv(dev);
1012 unsigned int status, mask, timeout;
1013 unsigned int rx_overrun=0, cr, pkts;
1014 unsigned long flags;
1015
1016 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1017
1018 spin_lock_irqsave(&lp->lock, flags);
1019
1020 /* Spurious interrupt check */
1021 if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1022 (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1023 spin_unlock_irqrestore(&lp->lock, flags);
1024 return IRQ_NONE;
1025 }
1026
1027 mask = SMC_GET_INT_EN(lp);
1028 SMC_SET_INT_EN(lp, 0);
1029
1030 /* set a timeout value, so I don't stay here forever */
1031 timeout = 8;
1032
1033
1034 do {
1035 status = SMC_GET_INT(lp);
1036
1037 DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1038 dev->name, status, mask, status & ~mask);
1039
1040 status &= mask;
1041 if (!status)
1042 break;
1043
1044 /* Handle SW interrupt condition */
1045 if (status & INT_STS_SW_INT_) {
1046 SMC_ACK_INT(lp, INT_STS_SW_INT_);
1047 mask &= ~INT_EN_SW_INT_EN_;
1048 }
1049 /* Handle various error conditions */
1050 if (status & INT_STS_RXE_) {
1051 SMC_ACK_INT(lp, INT_STS_RXE_);
1052 dev->stats.rx_errors++;
1053 }
1054 if (status & INT_STS_RXDFH_INT_) {
1055 SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1056 dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1057 }
1058 /* Undocumented interrupt-what is the right thing to do here? */
1059 if (status & INT_STS_RXDF_INT_) {
1060 SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1061 }
1062
1063 /* Rx Data FIFO exceeds set level */
1064 if (status & INT_STS_RDFL_) {
1065 if (IS_REV_A(lp->revision)) {
1066 rx_overrun=1;
1067 SMC_GET_MAC_CR(lp, cr);
1068 cr &= ~MAC_CR_RXEN_;
1069 SMC_SET_MAC_CR(lp, cr);
1070 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1071 dev->stats.rx_errors++;
1072 dev->stats.rx_fifo_errors++;
1073 }
1074 SMC_ACK_INT(lp, INT_STS_RDFL_);
1075 }
1076 if (status & INT_STS_RDFO_) {
1077 if (!IS_REV_A(lp->revision)) {
1078 SMC_GET_MAC_CR(lp, cr);
1079 cr &= ~MAC_CR_RXEN_;
1080 SMC_SET_MAC_CR(lp, cr);
1081 rx_overrun=1;
1082 DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
1083 dev->stats.rx_errors++;
1084 dev->stats.rx_fifo_errors++;
1085 }
1086 SMC_ACK_INT(lp, INT_STS_RDFO_);
1087 }
1088 /* Handle receive condition */
1089 if ((status & INT_STS_RSFL_) || rx_overrun) {
1090 unsigned int fifo;
1091 DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
1092 fifo = SMC_GET_RX_FIFO_INF(lp);
1093 pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1094 DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
1095 dev->name, pkts, fifo & 0xFFFF );
1096 if (pkts != 0) {
1097 #ifdef SMC_USE_DMA
1098 unsigned int fifo;
1099 if (lp->rxdma_active){
1100 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1101 "%s: RX DMA active\n", dev->name);
1102 /* The DMA is already running so up the IRQ threshold */
1103 fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1104 fifo |= pkts & 0xFF;
1105 DBG(SMC_DEBUG_RX,
1106 "%s: Setting RX stat FIFO threshold to %d\n",
1107 dev->name, fifo & 0xff);
1108 SMC_SET_FIFO_INT(lp, fifo);
1109 } else
1110 #endif
1111 smc911x_rcv(dev);
1112 }
1113 SMC_ACK_INT(lp, INT_STS_RSFL_);
1114 }
1115 /* Handle transmit FIFO available */
1116 if (status & INT_STS_TDFA_) {
1117 DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
1118 SMC_SET_FIFO_TDA(lp, 0xFF);
1119 lp->tx_throttle = 0;
1120 #ifdef SMC_USE_DMA
1121 if (!lp->txdma_active)
1122 #endif
1123 netif_wake_queue(dev);
1124 SMC_ACK_INT(lp, INT_STS_TDFA_);
1125 }
1126 /* Handle transmit done condition */
1127 #if 1
1128 if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1129 DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
1130 "%s: Tx stat FIFO limit (%d) /GPT irq\n",
1131 dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1132 smc911x_tx(dev);
1133 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1134 SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1136 }
1137 #else
1138 if (status & INT_STS_TSFL_) {
1139 DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
1140 smc911x_tx(dev);
1141 SMC_ACK_INT(lp, INT_STS_TSFL_);
1142 }
1143
1144 if (status & INT_STS_GPT_INT_) {
1145 DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1146 dev->name,
1147 SMC_GET_IRQ_CFG(lp),
1148 SMC_GET_FIFO_INT(lp),
1149 SMC_GET_RX_CFG(lp));
1150 DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
1151 "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1152 dev->name,
1153 (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1154 SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1155 SMC_GET_RX_STS_FIFO_PEEK(lp));
1156 SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1157 SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1158 }
1159 #endif
1160
1161 /* Handle PHY interrupt condition */
1162 if (status & INT_STS_PHY_INT_) {
1163 DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
1164 smc911x_phy_interrupt(dev);
1165 SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1166 }
1167 } while (--timeout);
1168
1169 /* restore mask state */
1170 SMC_SET_INT_EN(lp, mask);
1171
1172 DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
1173 dev->name, 8-timeout);
1174
1175 spin_unlock_irqrestore(&lp->lock, flags);
1176
1177 return IRQ_HANDLED;
1178 }
1179
1180 #ifdef SMC_USE_DMA
1181 static void
1182 smc911x_tx_dma_irq(int dma, void *data)
1183 {
1184 struct net_device *dev = (struct net_device *)data;
1185 struct smc911x_local *lp = netdev_priv(dev);
1186 struct sk_buff *skb = lp->current_tx_skb;
1187 unsigned long flags;
1188
1189 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1190
1191 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
1192 /* Clear the DMA interrupt sources */
1193 SMC_DMA_ACK_IRQ(dev, dma);
1194 BUG_ON(skb == NULL);
1195 dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1196 dev->trans_start = jiffies;
1197 dev_kfree_skb_irq(skb);
1198 lp->current_tx_skb = NULL;
1199 if (lp->pending_tx_skb != NULL)
1200 smc911x_hardware_send_pkt(dev);
1201 else {
1202 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1203 "%s: No pending Tx packets. DMA disabled\n", dev->name);
1204 spin_lock_irqsave(&lp->lock, flags);
1205 lp->txdma_active = 0;
1206 if (!lp->tx_throttle) {
1207 netif_wake_queue(dev);
1208 }
1209 spin_unlock_irqrestore(&lp->lock, flags);
1210 }
1211
1212 DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
1213 "%s: TX DMA irq completed\n", dev->name);
1214 }
1215 static void
1216 smc911x_rx_dma_irq(int dma, void *data)
1217 {
1218 struct net_device *dev = (struct net_device *)data;
1219 unsigned long ioaddr = dev->base_addr;
1220 struct smc911x_local *lp = netdev_priv(dev);
1221 struct sk_buff *skb = lp->current_rx_skb;
1222 unsigned long flags;
1223 unsigned int pkts;
1224
1225 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1226 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
1227 /* Clear the DMA interrupt sources */
1228 SMC_DMA_ACK_IRQ(dev, dma);
1229 dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1230 BUG_ON(skb == NULL);
1231 lp->current_rx_skb = NULL;
1232 PRINT_PKT(skb->data, skb->len);
1233 skb->protocol = eth_type_trans(skb, dev);
1234 dev->stats.rx_packets++;
1235 dev->stats.rx_bytes += skb->len;
1236 netif_rx(skb);
1237
1238 spin_lock_irqsave(&lp->lock, flags);
1239 pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1240 if (pkts != 0) {
1241 smc911x_rcv(dev);
1242 }else {
1243 lp->rxdma_active = 0;
1244 }
1245 spin_unlock_irqrestore(&lp->lock, flags);
1246 DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
1247 "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1248 dev->name, pkts);
1249 }
1250 #endif /* SMC_USE_DMA */
1251
1252 #ifdef CONFIG_NET_POLL_CONTROLLER
1253 /*
1254 * Polling receive - used by netconsole and other diagnostic tools
1255 * to allow network i/o with interrupts disabled.
1256 */
1257 static void smc911x_poll_controller(struct net_device *dev)
1258 {
1259 disable_irq(dev->irq);
1260 smc911x_interrupt(dev->irq, dev);
1261 enable_irq(dev->irq);
1262 }
1263 #endif
1264
1265 /* Our watchdog timed out. Called by the networking layer */
1266 static void smc911x_timeout(struct net_device *dev)
1267 {
1268 struct smc911x_local *lp = netdev_priv(dev);
1269 int status, mask;
1270 unsigned long flags;
1271
1272 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1273
1274 spin_lock_irqsave(&lp->lock, flags);
1275 status = SMC_GET_INT(lp);
1276 mask = SMC_GET_INT_EN(lp);
1277 spin_unlock_irqrestore(&lp->lock, flags);
1278 DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
1279 dev->name, status, mask);
1280
1281 /* Dump the current TX FIFO contents and restart */
1282 mask = SMC_GET_TX_CFG(lp);
1283 SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1284 /*
1285 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1286 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1287 * which calls schedule(). Hence we use a work queue.
1288 */
1289 if (lp->phy_type != 0)
1290 schedule_work(&lp->phy_configure);
1291
1292 /* We can accept TX packets again */
1293 dev->trans_start = jiffies;
1294 netif_wake_queue(dev);
1295 }
1296
1297 /*
1298 * This routine will, depending on the values passed to it,
1299 * either make it accept multicast packets, go into
1300 * promiscuous mode (for TCPDUMP and cousins) or accept
1301 * a select set of multicast packets
1302 */
1303 static void smc911x_set_multicast_list(struct net_device *dev)
1304 {
1305 struct smc911x_local *lp = netdev_priv(dev);
1306 unsigned int multicast_table[2];
1307 unsigned int mcr, update_multicast = 0;
1308 unsigned long flags;
1309
1310 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1311
1312 spin_lock_irqsave(&lp->lock, flags);
1313 SMC_GET_MAC_CR(lp, mcr);
1314 spin_unlock_irqrestore(&lp->lock, flags);
1315
1316 if (dev->flags & IFF_PROMISC) {
1317
1318 DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
1319 mcr |= MAC_CR_PRMS_;
1320 }
1321 /*
1322 * Here, I am setting this to accept all multicast packets.
1323 * I don't need to zero the multicast table, because the flag is
1324 * checked before the table is
1325 */
1326 else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
1327 DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
1328 mcr |= MAC_CR_MCPAS_;
1329 }
1330
1331 /*
1332 * This sets the internal hardware table to filter out unwanted
1333 * multicast packets before they take up memory.
1334 *
1335 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1336 * address are the offset into the table. If that bit is 1, then the
1337 * multicast packet is accepted. Otherwise, it's dropped silently.
1338 *
1339 * To use the 6 bits as an offset into the table, the high 1 bit is
1340 * the number of the 32 bit register, while the low 5 bits are the bit
1341 * within that register.
1342 */
1343 else if (dev->mc_count) {
1344 int i;
1345 struct dev_mc_list *cur_addr;
1346
1347 /* Set the Hash perfec mode */
1348 mcr |= MAC_CR_HPFILT_;
1349
1350 /* start with a table of all zeros: reject all */
1351 memset(multicast_table, 0, sizeof(multicast_table));
1352
1353 cur_addr = dev->mc_list;
1354 for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
1355 u32 position;
1356
1357 /* do we have a pointer here? */
1358 if (!cur_addr)
1359 break;
1360 /* make sure this is a multicast address -
1361 shouldn't this be a given if we have it here ? */
1362 if (!(*cur_addr->dmi_addr & 1))
1363 continue;
1364
1365 /* upper 6 bits are used as hash index */
1366 position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
1367
1368 multicast_table[position>>5] |= 1 << (position&0x1f);
1369 }
1370
1371 /* be sure I get rid of flags I might have set */
1372 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1373
1374 /* now, the table can be loaded into the chipset */
1375 update_multicast = 1;
1376 } else {
1377 DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
1378 dev->name);
1379 mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1380
1381 /*
1382 * since I'm disabling all multicast entirely, I need to
1383 * clear the multicast list
1384 */
1385 memset(multicast_table, 0, sizeof(multicast_table));
1386 update_multicast = 1;
1387 }
1388
1389 spin_lock_irqsave(&lp->lock, flags);
1390 SMC_SET_MAC_CR(lp, mcr);
1391 if (update_multicast) {
1392 DBG(SMC_DEBUG_MISC,
1393 "%s: update mcast hash table 0x%08x 0x%08x\n",
1394 dev->name, multicast_table[0], multicast_table[1]);
1395 SMC_SET_HASHL(lp, multicast_table[0]);
1396 SMC_SET_HASHH(lp, multicast_table[1]);
1397 }
1398 spin_unlock_irqrestore(&lp->lock, flags);
1399 }
1400
1401
1402 /*
1403 * Open and Initialize the board
1404 *
1405 * Set up everything, reset the card, etc..
1406 */
1407 static int
1408 smc911x_open(struct net_device *dev)
1409 {
1410 struct smc911x_local *lp = netdev_priv(dev);
1411
1412 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1413
1414 /*
1415 * Check that the address is valid. If its not, refuse
1416 * to bring the device up. The user must specify an
1417 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
1418 */
1419 if (!is_valid_ether_addr(dev->dev_addr)) {
1420 PRINTK("%s: no valid ethernet hw addr\n", __func__);
1421 return -EINVAL;
1422 }
1423
1424 /* reset the hardware */
1425 smc911x_reset(dev);
1426
1427 /* Configure the PHY, initialize the link state */
1428 smc911x_phy_configure(&lp->phy_configure);
1429
1430 /* Turn on Tx + Rx */
1431 smc911x_enable(dev);
1432
1433 netif_start_queue(dev);
1434
1435 return 0;
1436 }
1437
1438 /*
1439 * smc911x_close
1440 *
1441 * this makes the board clean up everything that it can
1442 * and not talk to the outside world. Caused by
1443 * an 'ifconfig ethX down'
1444 */
1445 static int smc911x_close(struct net_device *dev)
1446 {
1447 struct smc911x_local *lp = netdev_priv(dev);
1448
1449 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1450
1451 netif_stop_queue(dev);
1452 netif_carrier_off(dev);
1453
1454 /* clear everything */
1455 smc911x_shutdown(dev);
1456
1457 if (lp->phy_type != 0) {
1458 /* We need to ensure that no calls to
1459 * smc911x_phy_configure are pending.
1460 */
1461 cancel_work_sync(&lp->phy_configure);
1462 smc911x_phy_powerdown(dev, lp->mii.phy_id);
1463 }
1464
1465 if (lp->pending_tx_skb) {
1466 dev_kfree_skb(lp->pending_tx_skb);
1467 lp->pending_tx_skb = NULL;
1468 }
1469
1470 return 0;
1471 }
1472
1473 /*
1474 * Ethtool support
1475 */
1476 static int
1477 smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1478 {
1479 struct smc911x_local *lp = netdev_priv(dev);
1480 int ret, status;
1481 unsigned long flags;
1482
1483 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1484 cmd->maxtxpkt = 1;
1485 cmd->maxrxpkt = 1;
1486
1487 if (lp->phy_type != 0) {
1488 spin_lock_irqsave(&lp->lock, flags);
1489 ret = mii_ethtool_gset(&lp->mii, cmd);
1490 spin_unlock_irqrestore(&lp->lock, flags);
1491 } else {
1492 cmd->supported = SUPPORTED_10baseT_Half |
1493 SUPPORTED_10baseT_Full |
1494 SUPPORTED_TP | SUPPORTED_AUI;
1495
1496 if (lp->ctl_rspeed == 10)
1497 cmd->speed = SPEED_10;
1498 else if (lp->ctl_rspeed == 100)
1499 cmd->speed = SPEED_100;
1500
1501 cmd->autoneg = AUTONEG_DISABLE;
1502 if (lp->mii.phy_id==1)
1503 cmd->transceiver = XCVR_INTERNAL;
1504 else
1505 cmd->transceiver = XCVR_EXTERNAL;
1506 cmd->port = 0;
1507 SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1508 cmd->duplex =
1509 (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1510 DUPLEX_FULL : DUPLEX_HALF;
1511 ret = 0;
1512 }
1513
1514 return ret;
1515 }
1516
1517 static int
1518 smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1519 {
1520 struct smc911x_local *lp = netdev_priv(dev);
1521 int ret;
1522 unsigned long flags;
1523
1524 if (lp->phy_type != 0) {
1525 spin_lock_irqsave(&lp->lock, flags);
1526 ret = mii_ethtool_sset(&lp->mii, cmd);
1527 spin_unlock_irqrestore(&lp->lock, flags);
1528 } else {
1529 if (cmd->autoneg != AUTONEG_DISABLE ||
1530 cmd->speed != SPEED_10 ||
1531 (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1532 (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1533 return -EINVAL;
1534
1535 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1536
1537 ret = 0;
1538 }
1539
1540 return ret;
1541 }
1542
1543 static void
1544 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1545 {
1546 strncpy(info->driver, CARDNAME, sizeof(info->driver));
1547 strncpy(info->version, version, sizeof(info->version));
1548 strncpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
1549 }
1550
1551 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1552 {
1553 struct smc911x_local *lp = netdev_priv(dev);
1554 int ret = -EINVAL;
1555 unsigned long flags;
1556
1557 if (lp->phy_type != 0) {
1558 spin_lock_irqsave(&lp->lock, flags);
1559 ret = mii_nway_restart(&lp->mii);
1560 spin_unlock_irqrestore(&lp->lock, flags);
1561 }
1562
1563 return ret;
1564 }
1565
1566 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1567 {
1568 struct smc911x_local *lp = netdev_priv(dev);
1569 return lp->msg_enable;
1570 }
1571
1572 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1573 {
1574 struct smc911x_local *lp = netdev_priv(dev);
1575 lp->msg_enable = level;
1576 }
1577
1578 static int smc911x_ethtool_getregslen(struct net_device *dev)
1579 {
1580 /* System regs + MAC regs + PHY regs */
1581 return (((E2P_CMD - ID_REV)/4 + 1) +
1582 (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1583 }
1584
1585 static void smc911x_ethtool_getregs(struct net_device *dev,
1586 struct ethtool_regs* regs, void *buf)
1587 {
1588 struct smc911x_local *lp = netdev_priv(dev);
1589 unsigned long flags;
1590 u32 reg,i,j=0;
1591 u32 *data = (u32*)buf;
1592
1593 regs->version = lp->version;
1594 for(i=ID_REV;i<=E2P_CMD;i+=4) {
1595 data[j++] = SMC_inl(lp, i);
1596 }
1597 for(i=MAC_CR;i<=WUCSR;i++) {
1598 spin_lock_irqsave(&lp->lock, flags);
1599 SMC_GET_MAC_CSR(lp, i, reg);
1600 spin_unlock_irqrestore(&lp->lock, flags);
1601 data[j++] = reg;
1602 }
1603 for(i=0;i<=31;i++) {
1604 spin_lock_irqsave(&lp->lock, flags);
1605 SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1606 spin_unlock_irqrestore(&lp->lock, flags);
1607 data[j++] = reg & 0xFFFF;
1608 }
1609 }
1610
1611 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1612 {
1613 struct smc911x_local *lp = netdev_priv(dev);
1614 unsigned int timeout;
1615 int e2p_cmd;
1616
1617 e2p_cmd = SMC_GET_E2P_CMD(lp);
1618 for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1619 if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1620 PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
1621 dev->name, __func__);
1622 return -EFAULT;
1623 }
1624 mdelay(1);
1625 e2p_cmd = SMC_GET_E2P_CMD(lp);
1626 }
1627 if (timeout == 0) {
1628 PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
1629 dev->name, __func__);
1630 return -ETIMEDOUT;
1631 }
1632 return 0;
1633 }
1634
1635 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1636 int cmd, int addr)
1637 {
1638 struct smc911x_local *lp = netdev_priv(dev);
1639 int ret;
1640
1641 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1642 return ret;
1643 SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1644 ((cmd) & (0x7<<28)) |
1645 ((addr) & 0xFF));
1646 return 0;
1647 }
1648
1649 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1650 u8 *data)
1651 {
1652 struct smc911x_local *lp = netdev_priv(dev);
1653 int ret;
1654
1655 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1656 return ret;
1657 *data = SMC_GET_E2P_DATA(lp);
1658 return 0;
1659 }
1660
1661 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1662 u8 data)
1663 {
1664 struct smc911x_local *lp = netdev_priv(dev);
1665 int ret;
1666
1667 if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1668 return ret;
1669 SMC_SET_E2P_DATA(lp, data);
1670 return 0;
1671 }
1672
1673 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1674 struct ethtool_eeprom *eeprom, u8 *data)
1675 {
1676 u8 eebuf[SMC911X_EEPROM_LEN];
1677 int i, ret;
1678
1679 for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1680 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1681 return ret;
1682 if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1683 return ret;
1684 }
1685 memcpy(data, eebuf+eeprom->offset, eeprom->len);
1686 return 0;
1687 }
1688
1689 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1690 struct ethtool_eeprom *eeprom, u8 *data)
1691 {
1692 int i, ret;
1693
1694 /* Enable erase */
1695 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1696 return ret;
1697 for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1698 /* erase byte */
1699 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1700 return ret;
1701 /* write byte */
1702 if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1703 return ret;
1704 if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1705 return ret;
1706 }
1707 return 0;
1708 }
1709
1710 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1711 {
1712 return SMC911X_EEPROM_LEN;
1713 }
1714
1715 static const struct ethtool_ops smc911x_ethtool_ops = {
1716 .get_settings = smc911x_ethtool_getsettings,
1717 .set_settings = smc911x_ethtool_setsettings,
1718 .get_drvinfo = smc911x_ethtool_getdrvinfo,
1719 .get_msglevel = smc911x_ethtool_getmsglevel,
1720 .set_msglevel = smc911x_ethtool_setmsglevel,
1721 .nway_reset = smc911x_ethtool_nwayreset,
1722 .get_link = ethtool_op_get_link,
1723 .get_regs_len = smc911x_ethtool_getregslen,
1724 .get_regs = smc911x_ethtool_getregs,
1725 .get_eeprom_len = smc911x_ethtool_geteeprom_len,
1726 .get_eeprom = smc911x_ethtool_geteeprom,
1727 .set_eeprom = smc911x_ethtool_seteeprom,
1728 };
1729
1730 /*
1731 * smc911x_findirq
1732 *
1733 * This routine has a simple purpose -- make the SMC chip generate an
1734 * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1735 */
1736 static int __devinit smc911x_findirq(struct net_device *dev)
1737 {
1738 struct smc911x_local *lp = netdev_priv(dev);
1739 int timeout = 20;
1740 unsigned long cookie;
1741
1742 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
1743
1744 cookie = probe_irq_on();
1745
1746 /*
1747 * Force a SW interrupt
1748 */
1749
1750 SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1751
1752 /*
1753 * Wait until positive that the interrupt has been generated
1754 */
1755 do {
1756 int int_status;
1757 udelay(10);
1758 int_status = SMC_GET_INT_EN(lp);
1759 if (int_status & INT_EN_SW_INT_EN_)
1760 break; /* got the interrupt */
1761 } while (--timeout);
1762
1763 /*
1764 * there is really nothing that I can do here if timeout fails,
1765 * as autoirq_report will return a 0 anyway, which is what I
1766 * want in this case. Plus, the clean up is needed in both
1767 * cases.
1768 */
1769
1770 /* and disable all interrupts again */
1771 SMC_SET_INT_EN(lp, 0);
1772
1773 /* and return what I found */
1774 return probe_irq_off(cookie);
1775 }
1776
1777 static const struct net_device_ops smc911x_netdev_ops = {
1778 .ndo_open = smc911x_open,
1779 .ndo_stop = smc911x_close,
1780 .ndo_start_xmit = smc911x_hard_start_xmit,
1781 .ndo_tx_timeout = smc911x_timeout,
1782 .ndo_set_multicast_list = smc911x_set_multicast_list,
1783 .ndo_change_mtu = eth_change_mtu,
1784 .ndo_validate_addr = eth_validate_addr,
1785 .ndo_set_mac_address = eth_mac_addr,
1786 #ifdef CONFIG_NET_POLL_CONTROLLER
1787 .ndo_poll_controller = smc911x_poll_controller,
1788 #endif
1789 };
1790
1791 /*
1792 * Function: smc911x_probe(unsigned long ioaddr)
1793 *
1794 * Purpose:
1795 * Tests to see if a given ioaddr points to an SMC911x chip.
1796 * Returns a 0 on success
1797 *
1798 * Algorithm:
1799 * (1) see if the endian word is OK
1800 * (1) see if I recognize the chip ID in the appropriate register
1801 *
1802 * Here I do typical initialization tasks.
1803 *
1804 * o Initialize the structure if needed
1805 * o print out my vanity message if not done so already
1806 * o print out what type of hardware is detected
1807 * o print out the ethernet address
1808 * o find the IRQ
1809 * o set up my private data
1810 * o configure the dev structure with my subroutines
1811 * o actually GRAB the irq.
1812 * o GRAB the region
1813 */
1814 static int __devinit smc911x_probe(struct net_device *dev)
1815 {
1816 struct smc911x_local *lp = netdev_priv(dev);
1817 int i, retval;
1818 unsigned int val, chip_id, revision;
1819 const char *version_string;
1820 unsigned long irq_flags;
1821
1822 DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
1823
1824 /* First, see if the endian word is recognized */
1825 val = SMC_GET_BYTE_TEST(lp);
1826 DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
1827 if (val != 0x87654321) {
1828 printk(KERN_ERR "Invalid chip endian 0x%08x\n",val);
1829 retval = -ENODEV;
1830 goto err_out;
1831 }
1832
1833 /*
1834 * check if the revision register is something that I
1835 * recognize. These might need to be added to later,
1836 * as future revisions could be added.
1837 */
1838 chip_id = SMC_GET_PN(lp);
1839 DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
1840 for(i=0;chip_ids[i].id != 0; i++) {
1841 if (chip_ids[i].id == chip_id) break;
1842 }
1843 if (!chip_ids[i].id) {
1844 printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
1845 retval = -ENODEV;
1846 goto err_out;
1847 }
1848 version_string = chip_ids[i].name;
1849
1850 revision = SMC_GET_REV(lp);
1851 DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
1852
1853 /* At this point I'll assume that the chip is an SMC911x. */
1854 DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
1855
1856 /* Validate the TX FIFO size requested */
1857 if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1858 printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
1859 retval = -EINVAL;
1860 goto err_out;
1861 }
1862
1863 /* fill in some of the fields */
1864 lp->version = chip_ids[i].id;
1865 lp->revision = revision;
1866 lp->tx_fifo_kb = tx_fifo_kb;
1867 /* Reverse calculate the RX FIFO size from the TX */
1868 lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1869 lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1870
1871 /* Set the automatic flow control values */
1872 switch(lp->tx_fifo_kb) {
1873 /*
1874 * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1875 * AFC_LO is AFC_HI/2
1876 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1877 */
1878 case 2:/* 13440 Rx Data Fifo Size */
1879 lp->afc_cfg=0x008C46AF;break;
1880 case 3:/* 12480 Rx Data Fifo Size */
1881 lp->afc_cfg=0x0082419F;break;
1882 case 4:/* 11520 Rx Data Fifo Size */
1883 lp->afc_cfg=0x00783C9F;break;
1884 case 5:/* 10560 Rx Data Fifo Size */
1885 lp->afc_cfg=0x006E374F;break;
1886 case 6:/* 9600 Rx Data Fifo Size */
1887 lp->afc_cfg=0x0064328F;break;
1888 case 7:/* 8640 Rx Data Fifo Size */
1889 lp->afc_cfg=0x005A2D7F;break;
1890 case 8:/* 7680 Rx Data Fifo Size */
1891 lp->afc_cfg=0x0050287F;break;
1892 case 9:/* 6720 Rx Data Fifo Size */
1893 lp->afc_cfg=0x0046236F;break;
1894 case 10:/* 5760 Rx Data Fifo Size */
1895 lp->afc_cfg=0x003C1E6F;break;
1896 case 11:/* 4800 Rx Data Fifo Size */
1897 lp->afc_cfg=0x0032195F;break;
1898 /*
1899 * AFC_HI is ~1520 bytes less than RX Data Fifo Size
1900 * AFC_LO is AFC_HI/2
1901 * BACK_DUR is about 5uS*(AFC_LO) rounded down
1902 */
1903 case 12:/* 3840 Rx Data Fifo Size */
1904 lp->afc_cfg=0x0024124F;break;
1905 case 13:/* 2880 Rx Data Fifo Size */
1906 lp->afc_cfg=0x0015073F;break;
1907 case 14:/* 1920 Rx Data Fifo Size */
1908 lp->afc_cfg=0x0006032F;break;
1909 default:
1910 PRINTK("%s: ERROR -- no AFC_CFG setting found",
1911 dev->name);
1912 break;
1913 }
1914
1915 DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
1916 "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1917 lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1918
1919 spin_lock_init(&lp->lock);
1920
1921 /* Get the MAC address */
1922 SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1923
1924 /* now, reset the chip, and put it into a known state */
1925 smc911x_reset(dev);
1926
1927 /*
1928 * If dev->irq is 0, then the device has to be banged on to see
1929 * what the IRQ is.
1930 *
1931 * Specifying an IRQ is done with the assumption that the user knows
1932 * what (s)he is doing. No checking is done!!!!
1933 */
1934 if (dev->irq < 1) {
1935 int trials;
1936
1937 trials = 3;
1938 while (trials--) {
1939 dev->irq = smc911x_findirq(dev);
1940 if (dev->irq)
1941 break;
1942 /* kick the card and try again */
1943 smc911x_reset(dev);
1944 }
1945 }
1946 if (dev->irq == 0) {
1947 printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
1948 dev->name);
1949 retval = -ENODEV;
1950 goto err_out;
1951 }
1952 dev->irq = irq_canonicalize(dev->irq);
1953
1954 /* Fill in the fields of the device structure with ethernet values. */
1955 ether_setup(dev);
1956
1957 dev->netdev_ops = &smc911x_netdev_ops;
1958 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1959 dev->ethtool_ops = &smc911x_ethtool_ops;
1960
1961 INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1962 lp->mii.phy_id_mask = 0x1f;
1963 lp->mii.reg_num_mask = 0x1f;
1964 lp->mii.force_media = 0;
1965 lp->mii.full_duplex = 0;
1966 lp->mii.dev = dev;
1967 lp->mii.mdio_read = smc911x_phy_read;
1968 lp->mii.mdio_write = smc911x_phy_write;
1969
1970 /*
1971 * Locate the phy, if any.
1972 */
1973 smc911x_phy_detect(dev);
1974
1975 /* Set default parameters */
1976 lp->msg_enable = NETIF_MSG_LINK;
1977 lp->ctl_rfduplx = 1;
1978 lp->ctl_rspeed = 100;
1979
1980 #ifdef SMC_DYNAMIC_BUS_CONFIG
1981 irq_flags = lp->cfg.irq_flags;
1982 #else
1983 irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1984 #endif
1985
1986 /* Grab the IRQ */
1987 retval = request_irq(dev->irq, &smc911x_interrupt,
1988 irq_flags, dev->name, dev);
1989 if (retval)
1990 goto err_out;
1991
1992 #ifdef SMC_USE_DMA
1993 lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
1994 lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
1995 lp->rxdma_active = 0;
1996 lp->txdma_active = 0;
1997 dev->dma = lp->rxdma;
1998 #endif
1999
2000 retval = register_netdev(dev);
2001 if (retval == 0) {
2002 /* now, print out the card info, in a short format.. */
2003 printk("%s: %s (rev %d) at %#lx IRQ %d",
2004 dev->name, version_string, lp->revision,
2005 dev->base_addr, dev->irq);
2006
2007 #ifdef SMC_USE_DMA
2008 if (lp->rxdma != -1)
2009 printk(" RXDMA %d ", lp->rxdma);
2010
2011 if (lp->txdma != -1)
2012 printk("TXDMA %d", lp->txdma);
2013 #endif
2014 printk("\n");
2015 if (!is_valid_ether_addr(dev->dev_addr)) {
2016 printk("%s: Invalid ethernet MAC address. Please "
2017 "set using ifconfig\n", dev->name);
2018 } else {
2019 /* Print the Ethernet address */
2020 printk("%s: Ethernet addr: ", dev->name);
2021 for (i = 0; i < 5; i++)
2022 printk("%2.2x:", dev->dev_addr[i]);
2023 printk("%2.2x\n", dev->dev_addr[5]);
2024 }
2025
2026 if (lp->phy_type == 0) {
2027 PRINTK("%s: No PHY found\n", dev->name);
2028 } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2029 PRINTK("%s: LAN911x Internal PHY\n", dev->name);
2030 } else {
2031 PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
2032 }
2033 }
2034
2035 err_out:
2036 #ifdef SMC_USE_DMA
2037 if (retval) {
2038 if (lp->rxdma != -1) {
2039 SMC_DMA_FREE(dev, lp->rxdma);
2040 }
2041 if (lp->txdma != -1) {
2042 SMC_DMA_FREE(dev, lp->txdma);
2043 }
2044 }
2045 #endif
2046 return retval;
2047 }
2048
2049 /*
2050 * smc911x_init(void)
2051 *
2052 * Output:
2053 * 0 --> there is a device
2054 * anything else, error
2055 */
2056 static int __devinit smc911x_drv_probe(struct platform_device *pdev)
2057 {
2058 struct net_device *ndev;
2059 struct resource *res;
2060 struct smc911x_local *lp;
2061 unsigned int *addr;
2062 int ret;
2063
2064 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2065 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2066 if (!res) {
2067 ret = -ENODEV;
2068 goto out;
2069 }
2070
2071 /*
2072 * Request the regions.
2073 */
2074 if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2075 ret = -EBUSY;
2076 goto out;
2077 }
2078
2079 ndev = alloc_etherdev(sizeof(struct smc911x_local));
2080 if (!ndev) {
2081 printk("%s: could not allocate device.\n", CARDNAME);
2082 ret = -ENOMEM;
2083 goto release_1;
2084 }
2085 SET_NETDEV_DEV(ndev, &pdev->dev);
2086
2087 ndev->dma = (unsigned char)-1;
2088 ndev->irq = platform_get_irq(pdev, 0);
2089 lp = netdev_priv(ndev);
2090 lp->netdev = ndev;
2091 #ifdef SMC_DYNAMIC_BUS_CONFIG
2092 {
2093 struct smc911x_platdata *pd = pdev->dev.platform_data;
2094 if (!pd) {
2095 ret = -EINVAL;
2096 goto release_both;
2097 }
2098 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2099 }
2100 #endif
2101
2102 addr = ioremap(res->start, SMC911X_IO_EXTENT);
2103 if (!addr) {
2104 ret = -ENOMEM;
2105 goto release_both;
2106 }
2107
2108 platform_set_drvdata(pdev, ndev);
2109 lp->base = addr;
2110 ndev->base_addr = res->start;
2111 ret = smc911x_probe(ndev);
2112 if (ret != 0) {
2113 platform_set_drvdata(pdev, NULL);
2114 iounmap(addr);
2115 release_both:
2116 free_netdev(ndev);
2117 release_1:
2118 release_mem_region(res->start, SMC911X_IO_EXTENT);
2119 out:
2120 printk("%s: not found (%d).\n", CARDNAME, ret);
2121 }
2122 #ifdef SMC_USE_DMA
2123 else {
2124 lp->physaddr = res->start;
2125 lp->dev = &pdev->dev;
2126 }
2127 #endif
2128
2129 return ret;
2130 }
2131
2132 static int __devexit smc911x_drv_remove(struct platform_device *pdev)
2133 {
2134 struct net_device *ndev = platform_get_drvdata(pdev);
2135 struct smc911x_local *lp = netdev_priv(ndev);
2136 struct resource *res;
2137
2138 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2139 platform_set_drvdata(pdev, NULL);
2140
2141 unregister_netdev(ndev);
2142
2143 free_irq(ndev->irq, ndev);
2144
2145 #ifdef SMC_USE_DMA
2146 {
2147 if (lp->rxdma != -1) {
2148 SMC_DMA_FREE(dev, lp->rxdma);
2149 }
2150 if (lp->txdma != -1) {
2151 SMC_DMA_FREE(dev, lp->txdma);
2152 }
2153 }
2154 #endif
2155 iounmap(lp->base);
2156 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2157 release_mem_region(res->start, SMC911X_IO_EXTENT);
2158
2159 free_netdev(ndev);
2160 return 0;
2161 }
2162
2163 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2164 {
2165 struct net_device *ndev = platform_get_drvdata(dev);
2166 struct smc911x_local *lp = netdev_priv(ndev);
2167
2168 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2169 if (ndev) {
2170 if (netif_running(ndev)) {
2171 netif_device_detach(ndev);
2172 smc911x_shutdown(ndev);
2173 #if POWER_DOWN
2174 /* Set D2 - Energy detect only setting */
2175 SMC_SET_PMT_CTRL(lp, 2<<12);
2176 #endif
2177 }
2178 }
2179 return 0;
2180 }
2181
2182 static int smc911x_drv_resume(struct platform_device *dev)
2183 {
2184 struct net_device *ndev = platform_get_drvdata(dev);
2185
2186 DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
2187 if (ndev) {
2188 struct smc911x_local *lp = netdev_priv(ndev);
2189
2190 if (netif_running(ndev)) {
2191 smc911x_reset(ndev);
2192 if (lp->phy_type != 0)
2193 smc911x_phy_configure(&lp->phy_configure);
2194 smc911x_enable(ndev);
2195 netif_device_attach(ndev);
2196 }
2197 }
2198 return 0;
2199 }
2200
2201 static struct platform_driver smc911x_driver = {
2202 .probe = smc911x_drv_probe,
2203 .remove = __devexit_p(smc911x_drv_remove),
2204 .suspend = smc911x_drv_suspend,
2205 .resume = smc911x_drv_resume,
2206 .driver = {
2207 .name = CARDNAME,
2208 .owner = THIS_MODULE,
2209 },
2210 };
2211
2212 static int __init smc911x_init(void)
2213 {
2214 return platform_driver_register(&smc911x_driver);
2215 }
2216
2217 static void __exit smc911x_cleanup(void)
2218 {
2219 platform_driver_unregister(&smc911x_driver);
2220 }
2221
2222 module_init(smc911x_init);
2223 module_exit(smc911x_cleanup);
Support for the Chinese Samsung S3C2440 based development boards