2 * Atmel MACB Ethernet Controller driver
4 * Copyright (C) 2004-2006 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/platform_device.h>
22 #include <linux/phy.h>
24 #include <mach/board.h>
29 #define RX_BUFFER_SIZE 128
30 #define RX_RING_SIZE 512
31 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
36 #define TX_RING_SIZE 128
37 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40 #define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42 #define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50 /* minimum number of free TX descriptors before waking up TX process */
51 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
56 static void __macb_set_hwaddr(struct macb
*bp
)
61 bottom
= cpu_to_le32(*((u32
*)bp
->dev
->dev_addr
));
62 macb_writel(bp
, SA1B
, bottom
);
63 top
= cpu_to_le16(*((u16
*)(bp
->dev
->dev_addr
+ 4)));
64 macb_writel(bp
, SA1T
, top
);
67 static void __init
macb_get_hwaddr(struct macb
*bp
)
73 bottom
= macb_readl(bp
, SA1B
);
74 top
= macb_readl(bp
, SA1T
);
76 addr
[0] = bottom
& 0xff;
77 addr
[1] = (bottom
>> 8) & 0xff;
78 addr
[2] = (bottom
>> 16) & 0xff;
79 addr
[3] = (bottom
>> 24) & 0xff;
81 addr
[5] = (top
>> 8) & 0xff;
83 if (is_valid_ether_addr(addr
)) {
84 memcpy(bp
->dev
->dev_addr
, addr
, sizeof(addr
));
86 dev_info(&bp
->pdev
->dev
, "invalid hw address, using random\n");
87 random_ether_addr(bp
->dev
->dev_addr
);
91 static int macb_mdio_read(struct mii_bus
*bus
, int mii_id
, int regnum
)
93 struct macb
*bp
= bus
->priv
;
96 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
97 | MACB_BF(RW
, MACB_MAN_READ
)
98 | MACB_BF(PHYA
, mii_id
)
99 | MACB_BF(REGA
, regnum
)
100 | MACB_BF(CODE
, MACB_MAN_CODE
)));
102 /* wait for end of transfer */
103 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
106 value
= MACB_BFEXT(DATA
, macb_readl(bp
, MAN
));
111 static int macb_mdio_write(struct mii_bus
*bus
, int mii_id
, int regnum
,
114 struct macb
*bp
= bus
->priv
;
116 macb_writel(bp
, MAN
, (MACB_BF(SOF
, MACB_MAN_SOF
)
117 | MACB_BF(RW
, MACB_MAN_WRITE
)
118 | MACB_BF(PHYA
, mii_id
)
119 | MACB_BF(REGA
, regnum
)
120 | MACB_BF(CODE
, MACB_MAN_CODE
)
121 | MACB_BF(DATA
, value
)));
123 /* wait for end of transfer */
124 while (!MACB_BFEXT(IDLE
, macb_readl(bp
, NSR
)))
130 static int macb_mdio_reset(struct mii_bus
*bus
)
135 static void macb_handle_link_change(struct net_device
*dev
)
137 struct macb
*bp
= netdev_priv(dev
);
138 struct phy_device
*phydev
= bp
->phy_dev
;
141 int status_change
= 0;
143 spin_lock_irqsave(&bp
->lock
, flags
);
146 if ((bp
->speed
!= phydev
->speed
) ||
147 (bp
->duplex
!= phydev
->duplex
)) {
150 reg
= macb_readl(bp
, NCFGR
);
151 reg
&= ~(MACB_BIT(SPD
) | MACB_BIT(FD
));
155 if (phydev
->speed
== SPEED_100
)
156 reg
|= MACB_BIT(SPD
);
158 macb_writel(bp
, NCFGR
, reg
);
160 bp
->speed
= phydev
->speed
;
161 bp
->duplex
= phydev
->duplex
;
166 if (phydev
->link
!= bp
->link
) {
171 bp
->link
= phydev
->link
;
176 spin_unlock_irqrestore(&bp
->lock
, flags
);
180 printk(KERN_INFO
"%s: link up (%d/%s)\n",
181 dev
->name
, phydev
->speed
,
182 DUPLEX_FULL
== phydev
->duplex
? "Full":"Half");
184 printk(KERN_INFO
"%s: link down\n", dev
->name
);
188 /* based on au1000_eth. c*/
189 static int macb_mii_probe(struct net_device
*dev
)
191 struct macb
*bp
= netdev_priv(dev
);
192 struct phy_device
*phydev
= NULL
;
193 struct eth_platform_data
*pdata
;
196 /* find the first phy */
197 for (phy_addr
= 0; phy_addr
< PHY_MAX_ADDR
; phy_addr
++) {
198 if (bp
->mii_bus
->phy_map
[phy_addr
]) {
199 phydev
= bp
->mii_bus
->phy_map
[phy_addr
];
205 printk (KERN_ERR
"%s: no PHY found\n", dev
->name
);
209 pdata
= bp
->pdev
->dev
.platform_data
;
210 /* TODO : add pin_irq */
212 /* attach the mac to the phy */
213 if (pdata
&& pdata
->is_rmii
) {
214 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
),
215 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_RMII
);
217 phydev
= phy_connect(dev
, dev_name(&phydev
->dev
),
218 &macb_handle_link_change
, 0, PHY_INTERFACE_MODE_MII
);
221 if (IS_ERR(phydev
)) {
222 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
223 return PTR_ERR(phydev
);
226 /* mask with MAC supported features */
227 phydev
->supported
&= PHY_BASIC_FEATURES
;
229 phydev
->advertising
= phydev
->supported
;
234 bp
->phy_dev
= phydev
;
239 static int macb_mii_init(struct macb
*bp
)
241 struct eth_platform_data
*pdata
;
244 /* Enable managment port */
245 macb_writel(bp
, NCR
, MACB_BIT(MPE
));
247 bp
->mii_bus
= mdiobus_alloc();
248 if (bp
->mii_bus
== NULL
) {
253 bp
->mii_bus
->name
= "MACB_mii_bus";
254 bp
->mii_bus
->read
= &macb_mdio_read
;
255 bp
->mii_bus
->write
= &macb_mdio_write
;
256 bp
->mii_bus
->reset
= &macb_mdio_reset
;
257 snprintf(bp
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%x", bp
->pdev
->id
);
258 bp
->mii_bus
->priv
= bp
;
259 bp
->mii_bus
->parent
= &bp
->dev
->dev
;
260 pdata
= bp
->pdev
->dev
.platform_data
;
263 bp
->mii_bus
->phy_mask
= pdata
->phy_mask
;
265 bp
->mii_bus
->irq
= kmalloc(sizeof(int)*PHY_MAX_ADDR
, GFP_KERNEL
);
266 if (!bp
->mii_bus
->irq
) {
268 goto err_out_free_mdiobus
;
271 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
272 bp
->mii_bus
->irq
[i
] = PHY_POLL
;
274 platform_set_drvdata(bp
->dev
, bp
->mii_bus
);
276 if (mdiobus_register(bp
->mii_bus
))
277 goto err_out_free_mdio_irq
;
279 if (macb_mii_probe(bp
->dev
) != 0) {
280 goto err_out_unregister_bus
;
285 err_out_unregister_bus
:
286 mdiobus_unregister(bp
->mii_bus
);
287 err_out_free_mdio_irq
:
288 kfree(bp
->mii_bus
->irq
);
289 err_out_free_mdiobus
:
290 mdiobus_free(bp
->mii_bus
);
295 static void macb_update_stats(struct macb
*bp
)
297 u32 __iomem
*reg
= bp
->regs
+ MACB_PFR
;
298 u32
*p
= &bp
->hw_stats
.rx_pause_frames
;
299 u32
*end
= &bp
->hw_stats
.tx_pause_frames
+ 1;
301 WARN_ON((unsigned long)(end
- p
- 1) != (MACB_TPF
- MACB_PFR
) / 4);
303 for(; p
< end
; p
++, reg
++)
304 *p
+= __raw_readl(reg
);
307 static void macb_tx(struct macb
*bp
)
313 status
= macb_readl(bp
, TSR
);
314 macb_writel(bp
, TSR
, status
);
316 dev_dbg(&bp
->pdev
->dev
, "macb_tx status = %02lx\n",
317 (unsigned long)status
);
319 if (status
& (MACB_BIT(UND
) | MACB_BIT(TSR_RLE
))) {
321 printk(KERN_ERR
"%s: TX %s, resetting buffers\n",
322 bp
->dev
->name
, status
& MACB_BIT(UND
) ?
323 "underrun" : "retry limit exceeded");
325 /* Transfer ongoing, disable transmitter, to avoid confusion */
326 if (status
& MACB_BIT(TGO
))
327 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) & ~MACB_BIT(TE
));
331 /*Mark all the buffer as used to avoid sending a lost buffer*/
332 for (i
= 0; i
< TX_RING_SIZE
; i
++)
333 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
335 /* free transmit buffer in upper layer*/
336 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
337 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
338 struct sk_buff
*skb
= rp
->skb
;
344 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
347 dev_kfree_skb_irq(skb
);
350 bp
->tx_head
= bp
->tx_tail
= 0;
352 /* Enable the transmitter again */
353 if (status
& MACB_BIT(TGO
))
354 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TE
));
357 if (!(status
& MACB_BIT(COMP
)))
359 * This may happen when a buffer becomes complete
360 * between reading the ISR and scanning the
361 * descriptors. Nothing to worry about.
366 for (tail
= bp
->tx_tail
; tail
!= head
; tail
= NEXT_TX(tail
)) {
367 struct ring_info
*rp
= &bp
->tx_skb
[tail
];
368 struct sk_buff
*skb
= rp
->skb
;
374 bufstat
= bp
->tx_ring
[tail
].ctrl
;
376 if (!(bufstat
& MACB_BIT(TX_USED
)))
379 dev_dbg(&bp
->pdev
->dev
, "skb %u (data %p) TX complete\n",
381 dma_unmap_single(&bp
->pdev
->dev
, rp
->mapping
, skb
->len
,
383 bp
->stats
.tx_packets
++;
384 bp
->stats
.tx_bytes
+= skb
->len
;
386 dev_kfree_skb_irq(skb
);
390 if (netif_queue_stopped(bp
->dev
) &&
391 TX_BUFFS_AVAIL(bp
) > MACB_TX_WAKEUP_THRESH
)
392 netif_wake_queue(bp
->dev
);
395 static int macb_rx_frame(struct macb
*bp
, unsigned int first_frag
,
396 unsigned int last_frag
)
400 unsigned int offset
= 0;
403 len
= MACB_BFEXT(RX_FRMLEN
, bp
->rx_ring
[last_frag
].ctrl
);
405 dev_dbg(&bp
->pdev
->dev
, "macb_rx_frame frags %u - %u (len %u)\n",
406 first_frag
, last_frag
, len
);
408 skb
= dev_alloc_skb(len
+ RX_OFFSET
);
410 bp
->stats
.rx_dropped
++;
411 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
412 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
413 if (frag
== last_frag
)
420 skb_reserve(skb
, RX_OFFSET
);
421 skb
->ip_summed
= CHECKSUM_NONE
;
424 for (frag
= first_frag
; ; frag
= NEXT_RX(frag
)) {
425 unsigned int frag_len
= RX_BUFFER_SIZE
;
427 if (offset
+ frag_len
> len
) {
428 BUG_ON(frag
!= last_frag
);
429 frag_len
= len
- offset
;
431 skb_copy_to_linear_data_offset(skb
, offset
,
433 (RX_BUFFER_SIZE
* frag
)),
435 offset
+= RX_BUFFER_SIZE
;
436 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
439 if (frag
== last_frag
)
443 skb
->protocol
= eth_type_trans(skb
, bp
->dev
);
445 bp
->stats
.rx_packets
++;
446 bp
->stats
.rx_bytes
+= len
;
447 dev_dbg(&bp
->pdev
->dev
, "received skb of length %u, csum: %08x\n",
448 skb
->len
, skb
->csum
);
449 netif_receive_skb(skb
);
454 /* Mark DMA descriptors from begin up to and not including end as unused */
455 static void discard_partial_frame(struct macb
*bp
, unsigned int begin
,
460 for (frag
= begin
; frag
!= end
; frag
= NEXT_RX(frag
))
461 bp
->rx_ring
[frag
].addr
&= ~MACB_BIT(RX_USED
);
465 * When this happens, the hardware stats registers for
466 * whatever caused this is updated, so we don't have to record
471 static int macb_rx(struct macb
*bp
, int budget
)
474 unsigned int tail
= bp
->rx_tail
;
477 for (; budget
> 0; tail
= NEXT_RX(tail
)) {
481 addr
= bp
->rx_ring
[tail
].addr
;
482 ctrl
= bp
->rx_ring
[tail
].ctrl
;
484 if (!(addr
& MACB_BIT(RX_USED
)))
487 if (ctrl
& MACB_BIT(RX_SOF
)) {
488 if (first_frag
!= -1)
489 discard_partial_frame(bp
, first_frag
, tail
);
493 if (ctrl
& MACB_BIT(RX_EOF
)) {
495 BUG_ON(first_frag
== -1);
497 dropped
= macb_rx_frame(bp
, first_frag
, tail
);
506 if (first_frag
!= -1)
507 bp
->rx_tail
= first_frag
;
514 static int macb_poll(struct napi_struct
*napi
, int budget
)
516 struct macb
*bp
= container_of(napi
, struct macb
, napi
);
520 status
= macb_readl(bp
, RSR
);
521 macb_writel(bp
, RSR
, status
);
525 dev_dbg(&bp
->pdev
->dev
, "poll: status = %08lx, budget = %d\n",
526 (unsigned long)status
, budget
);
528 work_done
= macb_rx(bp
, budget
);
529 if (work_done
< budget
)
533 * We've done what we can to clean the buffers. Make sure we
534 * get notified when new packets arrive.
536 macb_writel(bp
, IER
, MACB_RX_INT_FLAGS
);
538 /* TODO: Handle errors */
543 static irqreturn_t
macb_interrupt(int irq
, void *dev_id
)
545 struct net_device
*dev
= dev_id
;
546 struct macb
*bp
= netdev_priv(dev
);
549 status
= macb_readl(bp
, ISR
);
551 if (unlikely(!status
))
554 spin_lock(&bp
->lock
);
557 /* close possible race with dev_close */
558 if (unlikely(!netif_running(dev
))) {
559 macb_writel(bp
, IDR
, ~0UL);
563 if (status
& MACB_RX_INT_FLAGS
) {
564 if (napi_schedule_prep(&bp
->napi
)) {
566 * There's no point taking any more interrupts
567 * until we have processed the buffers
569 macb_writel(bp
, IDR
, MACB_RX_INT_FLAGS
);
570 dev_dbg(&bp
->pdev
->dev
,
571 "scheduling RX softirq\n");
572 __napi_schedule(&bp
->napi
);
576 if (status
& (MACB_BIT(TCOMP
) | MACB_BIT(ISR_TUND
) |
581 * Link change detection isn't possible with RMII, so we'll
582 * add that if/when we get our hands on a full-blown MII PHY.
585 if (status
& MACB_BIT(HRESP
)) {
587 * TODO: Reset the hardware, and maybe move the printk
588 * to a lower-priority context as well (work queue?)
590 printk(KERN_ERR
"%s: DMA bus error: HRESP not OK\n",
594 status
= macb_readl(bp
, ISR
);
597 spin_unlock(&bp
->lock
);
602 #ifdef CONFIG_NET_POLL_CONTROLLER
604 * Polling receive - used by netconsole and other diagnostic tools
605 * to allow network i/o with interrupts disabled.
607 static void macb_poll_controller(struct net_device
*dev
)
611 local_irq_save(flags
);
612 macb_interrupt(dev
->irq
, dev
);
613 local_irq_restore(flags
);
617 static int macb_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
619 struct macb
*bp
= netdev_priv(dev
);
621 unsigned int len
, entry
;
627 dev_dbg(&bp
->pdev
->dev
,
628 "start_xmit: len %u head %p data %p tail %p end %p\n",
629 skb
->len
, skb
->head
, skb
->data
,
630 skb_tail_pointer(skb
), skb_end_pointer(skb
));
631 dev_dbg(&bp
->pdev
->dev
,
633 for (i
= 0; i
< 16; i
++)
634 printk(" %02x", (unsigned int)skb
->data
[i
]);
639 spin_lock_irqsave(&bp
->lock
, flags
);
641 /* This is a hard error, log it. */
642 if (TX_BUFFS_AVAIL(bp
) < 1) {
643 netif_stop_queue(dev
);
644 spin_unlock_irqrestore(&bp
->lock
, flags
);
645 dev_err(&bp
->pdev
->dev
,
646 "BUG! Tx Ring full when queue awake!\n");
647 dev_dbg(&bp
->pdev
->dev
, "tx_head = %u, tx_tail = %u\n",
648 bp
->tx_head
, bp
->tx_tail
);
649 return NETDEV_TX_BUSY
;
653 dev_dbg(&bp
->pdev
->dev
, "Allocated ring entry %u\n", entry
);
654 mapping
= dma_map_single(&bp
->pdev
->dev
, skb
->data
,
656 bp
->tx_skb
[entry
].skb
= skb
;
657 bp
->tx_skb
[entry
].mapping
= mapping
;
658 dev_dbg(&bp
->pdev
->dev
, "Mapped skb data %p to DMA addr %08lx\n",
659 skb
->data
, (unsigned long)mapping
);
661 ctrl
= MACB_BF(TX_FRMLEN
, len
);
662 ctrl
|= MACB_BIT(TX_LAST
);
663 if (entry
== (TX_RING_SIZE
- 1))
664 ctrl
|= MACB_BIT(TX_WRAP
);
666 bp
->tx_ring
[entry
].addr
= mapping
;
667 bp
->tx_ring
[entry
].ctrl
= ctrl
;
670 entry
= NEXT_TX(entry
);
673 macb_writel(bp
, NCR
, macb_readl(bp
, NCR
) | MACB_BIT(TSTART
));
675 if (TX_BUFFS_AVAIL(bp
) < 1)
676 netif_stop_queue(dev
);
678 spin_unlock_irqrestore(&bp
->lock
, flags
);
680 dev
->trans_start
= jiffies
;
685 static void macb_free_consistent(struct macb
*bp
)
692 dma_free_coherent(&bp
->pdev
->dev
, RX_RING_BYTES
,
693 bp
->rx_ring
, bp
->rx_ring_dma
);
697 dma_free_coherent(&bp
->pdev
->dev
, TX_RING_BYTES
,
698 bp
->tx_ring
, bp
->tx_ring_dma
);
701 if (bp
->rx_buffers
) {
702 dma_free_coherent(&bp
->pdev
->dev
,
703 RX_RING_SIZE
* RX_BUFFER_SIZE
,
704 bp
->rx_buffers
, bp
->rx_buffers_dma
);
705 bp
->rx_buffers
= NULL
;
709 static int macb_alloc_consistent(struct macb
*bp
)
713 size
= TX_RING_SIZE
* sizeof(struct ring_info
);
714 bp
->tx_skb
= kmalloc(size
, GFP_KERNEL
);
718 size
= RX_RING_BYTES
;
719 bp
->rx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
720 &bp
->rx_ring_dma
, GFP_KERNEL
);
723 dev_dbg(&bp
->pdev
->dev
,
724 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
725 size
, (unsigned long)bp
->rx_ring_dma
, bp
->rx_ring
);
727 size
= TX_RING_BYTES
;
728 bp
->tx_ring
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
729 &bp
->tx_ring_dma
, GFP_KERNEL
);
732 dev_dbg(&bp
->pdev
->dev
,
733 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
734 size
, (unsigned long)bp
->tx_ring_dma
, bp
->tx_ring
);
736 size
= RX_RING_SIZE
* RX_BUFFER_SIZE
;
737 bp
->rx_buffers
= dma_alloc_coherent(&bp
->pdev
->dev
, size
,
738 &bp
->rx_buffers_dma
, GFP_KERNEL
);
741 dev_dbg(&bp
->pdev
->dev
,
742 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
743 size
, (unsigned long)bp
->rx_buffers_dma
, bp
->rx_buffers
);
748 macb_free_consistent(bp
);
752 static void macb_init_rings(struct macb
*bp
)
757 addr
= bp
->rx_buffers_dma
;
758 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
759 bp
->rx_ring
[i
].addr
= addr
;
760 bp
->rx_ring
[i
].ctrl
= 0;
761 addr
+= RX_BUFFER_SIZE
;
763 bp
->rx_ring
[RX_RING_SIZE
- 1].addr
|= MACB_BIT(RX_WRAP
);
765 for (i
= 0; i
< TX_RING_SIZE
; i
++) {
766 bp
->tx_ring
[i
].addr
= 0;
767 bp
->tx_ring
[i
].ctrl
= MACB_BIT(TX_USED
);
769 bp
->tx_ring
[TX_RING_SIZE
- 1].ctrl
|= MACB_BIT(TX_WRAP
);
771 bp
->rx_tail
= bp
->tx_head
= bp
->tx_tail
= 0;
774 static void macb_reset_hw(struct macb
*bp
)
776 /* Make sure we have the write buffer for ourselves */
780 * Disable RX and TX (XXX: Should we halt the transmission
783 macb_writel(bp
, NCR
, 0);
785 /* Clear the stats registers (XXX: Update stats first?) */
786 macb_writel(bp
, NCR
, MACB_BIT(CLRSTAT
));
788 /* Clear all status flags */
789 macb_writel(bp
, TSR
, ~0UL);
790 macb_writel(bp
, RSR
, ~0UL);
792 /* Disable all interrupts */
793 macb_writel(bp
, IDR
, ~0UL);
797 static void macb_init_hw(struct macb
*bp
)
802 __macb_set_hwaddr(bp
);
804 config
= macb_readl(bp
, NCFGR
) & MACB_BF(CLK
, -1L);
805 config
|= MACB_BIT(PAE
); /* PAuse Enable */
806 config
|= MACB_BIT(DRFCS
); /* Discard Rx FCS */
807 if (bp
->dev
->flags
& IFF_PROMISC
)
808 config
|= MACB_BIT(CAF
); /* Copy All Frames */
809 if (!(bp
->dev
->flags
& IFF_BROADCAST
))
810 config
|= MACB_BIT(NBC
); /* No BroadCast */
811 macb_writel(bp
, NCFGR
, config
);
813 /* Initialize TX and RX buffers */
814 macb_writel(bp
, RBQP
, bp
->rx_ring_dma
);
815 macb_writel(bp
, TBQP
, bp
->tx_ring_dma
);
817 /* Enable TX and RX */
818 macb_writel(bp
, NCR
, MACB_BIT(RE
) | MACB_BIT(TE
) | MACB_BIT(MPE
));
820 /* Enable interrupts */
821 macb_writel(bp
, IER
, (MACB_BIT(RCOMP
)
833 * The hash address register is 64 bits long and takes up two
834 * locations in the memory map. The least significant bits are stored
835 * in EMAC_HSL and the most significant bits in EMAC_HSH.
837 * The unicast hash enable and the multicast hash enable bits in the
838 * network configuration register enable the reception of hash matched
839 * frames. The destination address is reduced to a 6 bit index into
840 * the 64 bit hash register using the following hash function. The
841 * hash function is an exclusive or of every sixth bit of the
842 * destination address.
844 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
845 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
846 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
847 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
848 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
849 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
851 * da[0] represents the least significant bit of the first byte
852 * received, that is, the multicast/unicast indicator, and da[47]
853 * represents the most significant bit of the last byte received. If
854 * the hash index, hi[n], points to a bit that is set in the hash
855 * register then the frame will be matched according to whether the
856 * frame is multicast or unicast. A multicast match will be signalled
857 * if the multicast hash enable bit is set, da[0] is 1 and the hash
858 * index points to a bit set in the hash register. A unicast match
859 * will be signalled if the unicast hash enable bit is set, da[0] is 0
860 * and the hash index points to a bit set in the hash register. To
861 * receive all multicast frames, the hash register should be set with
862 * all ones and the multicast hash enable bit should be set in the
863 * network configuration register.
866 static inline int hash_bit_value(int bitnr
, __u8
*addr
)
868 if (addr
[bitnr
/ 8] & (1 << (bitnr
% 8)))
874 * Return the hash index value for the specified address.
876 static int hash_get_index(__u8
*addr
)
881 for (j
= 0; j
< 6; j
++) {
882 for (i
= 0, bitval
= 0; i
< 8; i
++)
883 bitval
^= hash_bit_value(i
*6 + j
, addr
);
885 hash_index
|= (bitval
<< j
);
892 * Add multicast addresses to the internal multicast-hash table.
894 static void macb_sethashtable(struct net_device
*dev
)
896 struct dev_mc_list
*curr
;
897 unsigned long mc_filter
[2];
898 unsigned int i
, bitnr
;
899 struct macb
*bp
= netdev_priv(dev
);
901 mc_filter
[0] = mc_filter
[1] = 0;
904 for (i
= 0; i
< dev
->mc_count
; i
++, curr
= curr
->next
) {
905 if (!curr
) break; /* unexpected end of list */
907 bitnr
= hash_get_index(curr
->dmi_addr
);
908 mc_filter
[bitnr
>> 5] |= 1 << (bitnr
& 31);
911 macb_writel(bp
, HRB
, mc_filter
[0]);
912 macb_writel(bp
, HRT
, mc_filter
[1]);
916 * Enable/Disable promiscuous and multicast modes.
918 static void macb_set_rx_mode(struct net_device
*dev
)
921 struct macb
*bp
= netdev_priv(dev
);
923 cfg
= macb_readl(bp
, NCFGR
);
925 if (dev
->flags
& IFF_PROMISC
)
926 /* Enable promiscuous mode */
927 cfg
|= MACB_BIT(CAF
);
928 else if (dev
->flags
& (~IFF_PROMISC
))
929 /* Disable promiscuous mode */
930 cfg
&= ~MACB_BIT(CAF
);
932 if (dev
->flags
& IFF_ALLMULTI
) {
933 /* Enable all multicast mode */
934 macb_writel(bp
, HRB
, -1);
935 macb_writel(bp
, HRT
, -1);
936 cfg
|= MACB_BIT(NCFGR_MTI
);
937 } else if (dev
->mc_count
> 0) {
938 /* Enable specific multicasts */
939 macb_sethashtable(dev
);
940 cfg
|= MACB_BIT(NCFGR_MTI
);
941 } else if (dev
->flags
& (~IFF_ALLMULTI
)) {
942 /* Disable all multicast mode */
943 macb_writel(bp
, HRB
, 0);
944 macb_writel(bp
, HRT
, 0);
945 cfg
&= ~MACB_BIT(NCFGR_MTI
);
948 macb_writel(bp
, NCFGR
, cfg
);
951 static int macb_open(struct net_device
*dev
)
953 struct macb
*bp
= netdev_priv(dev
);
956 dev_dbg(&bp
->pdev
->dev
, "open\n");
958 /* if the phy is not yet register, retry later*/
962 if (!is_valid_ether_addr(dev
->dev_addr
))
963 return -EADDRNOTAVAIL
;
965 err
= macb_alloc_consistent(bp
);
968 "%s: Unable to allocate DMA memory (error %d)\n",
973 napi_enable(&bp
->napi
);
978 /* schedule a link state check */
979 phy_start(bp
->phy_dev
);
981 netif_start_queue(dev
);
986 static int macb_close(struct net_device
*dev
)
988 struct macb
*bp
= netdev_priv(dev
);
991 netif_stop_queue(dev
);
992 napi_disable(&bp
->napi
);
995 phy_stop(bp
->phy_dev
);
997 spin_lock_irqsave(&bp
->lock
, flags
);
999 netif_carrier_off(dev
);
1000 spin_unlock_irqrestore(&bp
->lock
, flags
);
1002 macb_free_consistent(bp
);
1007 static struct net_device_stats
*macb_get_stats(struct net_device
*dev
)
1009 struct macb
*bp
= netdev_priv(dev
);
1010 struct net_device_stats
*nstat
= &bp
->stats
;
1011 struct macb_stats
*hwstat
= &bp
->hw_stats
;
1013 /* read stats from hardware */
1014 macb_update_stats(bp
);
1016 /* Convert HW stats into netdevice stats */
1017 nstat
->rx_errors
= (hwstat
->rx_fcs_errors
+
1018 hwstat
->rx_align_errors
+
1019 hwstat
->rx_resource_errors
+
1020 hwstat
->rx_overruns
+
1021 hwstat
->rx_oversize_pkts
+
1022 hwstat
->rx_jabbers
+
1023 hwstat
->rx_undersize_pkts
+
1024 hwstat
->sqe_test_errors
+
1025 hwstat
->rx_length_mismatch
);
1026 nstat
->tx_errors
= (hwstat
->tx_late_cols
+
1027 hwstat
->tx_excessive_cols
+
1028 hwstat
->tx_underruns
+
1029 hwstat
->tx_carrier_errors
);
1030 nstat
->collisions
= (hwstat
->tx_single_cols
+
1031 hwstat
->tx_multiple_cols
+
1032 hwstat
->tx_excessive_cols
);
1033 nstat
->rx_length_errors
= (hwstat
->rx_oversize_pkts
+
1034 hwstat
->rx_jabbers
+
1035 hwstat
->rx_undersize_pkts
+
1036 hwstat
->rx_length_mismatch
);
1037 nstat
->rx_over_errors
= hwstat
->rx_resource_errors
;
1038 nstat
->rx_crc_errors
= hwstat
->rx_fcs_errors
;
1039 nstat
->rx_frame_errors
= hwstat
->rx_align_errors
;
1040 nstat
->rx_fifo_errors
= hwstat
->rx_overruns
;
1041 /* XXX: What does "missed" mean? */
1042 nstat
->tx_aborted_errors
= hwstat
->tx_excessive_cols
;
1043 nstat
->tx_carrier_errors
= hwstat
->tx_carrier_errors
;
1044 nstat
->tx_fifo_errors
= hwstat
->tx_underruns
;
1045 /* Don't know about heartbeat or window errors... */
1050 static int macb_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1052 struct macb
*bp
= netdev_priv(dev
);
1053 struct phy_device
*phydev
= bp
->phy_dev
;
1058 return phy_ethtool_gset(phydev
, cmd
);
1061 static int macb_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
1063 struct macb
*bp
= netdev_priv(dev
);
1064 struct phy_device
*phydev
= bp
->phy_dev
;
1069 return phy_ethtool_sset(phydev
, cmd
);
1072 static void macb_get_drvinfo(struct net_device
*dev
,
1073 struct ethtool_drvinfo
*info
)
1075 struct macb
*bp
= netdev_priv(dev
);
1077 strcpy(info
->driver
, bp
->pdev
->dev
.driver
->name
);
1078 strcpy(info
->version
, "$Revision: 1.14 $");
1079 strcpy(info
->bus_info
, dev_name(&bp
->pdev
->dev
));
1082 static struct ethtool_ops macb_ethtool_ops
= {
1083 .get_settings
= macb_get_settings
,
1084 .set_settings
= macb_set_settings
,
1085 .get_drvinfo
= macb_get_drvinfo
,
1086 .get_link
= ethtool_op_get_link
,
1089 static int macb_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
1091 struct macb
*bp
= netdev_priv(dev
);
1092 struct phy_device
*phydev
= bp
->phy_dev
;
1094 if (!netif_running(dev
))
1100 return phy_mii_ioctl(phydev
, if_mii(rq
), cmd
);
1103 static const struct net_device_ops macb_netdev_ops
= {
1104 .ndo_open
= macb_open
,
1105 .ndo_stop
= macb_close
,
1106 .ndo_start_xmit
= macb_start_xmit
,
1107 .ndo_set_multicast_list
= macb_set_rx_mode
,
1108 .ndo_get_stats
= macb_get_stats
,
1109 .ndo_do_ioctl
= macb_ioctl
,
1110 .ndo_validate_addr
= eth_validate_addr
,
1111 .ndo_change_mtu
= eth_change_mtu
,
1112 .ndo_set_mac_address
= eth_mac_addr
,
1113 #ifdef CONFIG_NET_POLL_CONTROLLER
1114 .ndo_poll_controller
= macb_poll_controller
,
1118 static int __init
macb_probe(struct platform_device
*pdev
)
1120 struct eth_platform_data
*pdata
;
1121 struct resource
*regs
;
1122 struct net_device
*dev
;
1124 struct phy_device
*phydev
;
1125 unsigned long pclk_hz
;
1129 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1131 dev_err(&pdev
->dev
, "no mmio resource defined\n");
1136 dev
= alloc_etherdev(sizeof(*bp
));
1138 dev_err(&pdev
->dev
, "etherdev alloc failed, aborting.\n");
1142 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1144 /* TODO: Actually, we have some interesting features... */
1147 bp
= netdev_priv(dev
);
1151 spin_lock_init(&bp
->lock
);
1153 #if defined(CONFIG_ARCH_AT91)
1154 bp
->pclk
= clk_get(&pdev
->dev
, "macb_clk");
1155 if (IS_ERR(bp
->pclk
)) {
1156 dev_err(&pdev
->dev
, "failed to get macb_clk\n");
1157 goto err_out_free_dev
;
1159 clk_enable(bp
->pclk
);
1161 bp
->pclk
= clk_get(&pdev
->dev
, "pclk");
1162 if (IS_ERR(bp
->pclk
)) {
1163 dev_err(&pdev
->dev
, "failed to get pclk\n");
1164 goto err_out_free_dev
;
1166 bp
->hclk
= clk_get(&pdev
->dev
, "hclk");
1167 if (IS_ERR(bp
->hclk
)) {
1168 dev_err(&pdev
->dev
, "failed to get hclk\n");
1169 goto err_out_put_pclk
;
1172 clk_enable(bp
->pclk
);
1173 clk_enable(bp
->hclk
);
1176 bp
->regs
= ioremap(regs
->start
, regs
->end
- regs
->start
+ 1);
1178 dev_err(&pdev
->dev
, "failed to map registers, aborting.\n");
1180 goto err_out_disable_clocks
;
1183 dev
->irq
= platform_get_irq(pdev
, 0);
1184 err
= request_irq(dev
->irq
, macb_interrupt
, IRQF_SAMPLE_RANDOM
,
1188 "%s: Unable to request IRQ %d (error %d)\n",
1189 dev
->name
, dev
->irq
, err
);
1190 goto err_out_iounmap
;
1193 dev
->netdev_ops
= &macb_netdev_ops
;
1194 netif_napi_add(dev
, &bp
->napi
, macb_poll
, 64);
1195 dev
->ethtool_ops
= &macb_ethtool_ops
;
1197 dev
->base_addr
= regs
->start
;
1199 /* Set MII management clock divider */
1200 pclk_hz
= clk_get_rate(bp
->pclk
);
1201 if (pclk_hz
<= 20000000)
1202 config
= MACB_BF(CLK
, MACB_CLK_DIV8
);
1203 else if (pclk_hz
<= 40000000)
1204 config
= MACB_BF(CLK
, MACB_CLK_DIV16
);
1205 else if (pclk_hz
<= 80000000)
1206 config
= MACB_BF(CLK
, MACB_CLK_DIV32
);
1208 config
= MACB_BF(CLK
, MACB_CLK_DIV64
);
1209 macb_writel(bp
, NCFGR
, config
);
1211 macb_get_hwaddr(bp
);
1212 pdata
= pdev
->dev
.platform_data
;
1214 if (pdata
&& pdata
->is_rmii
)
1215 #if defined(CONFIG_ARCH_AT91)
1216 macb_writel(bp
, USRIO
, (MACB_BIT(RMII
) | MACB_BIT(CLKEN
)) );
1218 macb_writel(bp
, USRIO
, 0);
1221 #if defined(CONFIG_ARCH_AT91)
1222 macb_writel(bp
, USRIO
, MACB_BIT(CLKEN
));
1224 macb_writel(bp
, USRIO
, MACB_BIT(MII
));
1227 bp
->tx_pending
= DEF_TX_RING_PENDING
;
1229 err
= register_netdev(dev
);
1231 dev_err(&pdev
->dev
, "Cannot register net device, aborting.\n");
1232 goto err_out_free_irq
;
1235 if (macb_mii_init(bp
) != 0) {
1236 goto err_out_unregister_netdev
;
1239 platform_set_drvdata(pdev
, dev
);
1241 printk(KERN_INFO
"%s: Atmel MACB at 0x%08lx irq %d (%pM)\n",
1242 dev
->name
, dev
->base_addr
, dev
->irq
, dev
->dev_addr
);
1244 phydev
= bp
->phy_dev
;
1245 printk(KERN_INFO
"%s: attached PHY driver [%s] "
1246 "(mii_bus:phy_addr=%s, irq=%d)\n", dev
->name
,
1247 phydev
->drv
->name
, dev_name(&phydev
->dev
), phydev
->irq
);
1251 err_out_unregister_netdev
:
1252 unregister_netdev(dev
);
1254 free_irq(dev
->irq
, dev
);
1257 err_out_disable_clocks
:
1258 #ifndef CONFIG_ARCH_AT91
1259 clk_disable(bp
->hclk
);
1262 clk_disable(bp
->pclk
);
1263 #ifndef CONFIG_ARCH_AT91
1270 platform_set_drvdata(pdev
, NULL
);
1274 static int __exit
macb_remove(struct platform_device
*pdev
)
1276 struct net_device
*dev
;
1279 dev
= platform_get_drvdata(pdev
);
1282 bp
= netdev_priv(dev
);
1284 phy_disconnect(bp
->phy_dev
);
1285 mdiobus_unregister(bp
->mii_bus
);
1286 kfree(bp
->mii_bus
->irq
);
1287 mdiobus_free(bp
->mii_bus
);
1288 unregister_netdev(dev
);
1289 free_irq(dev
->irq
, dev
);
1291 #ifndef CONFIG_ARCH_AT91
1292 clk_disable(bp
->hclk
);
1295 clk_disable(bp
->pclk
);
1298 platform_set_drvdata(pdev
, NULL
);
1305 static int macb_suspend(struct platform_device
*pdev
, pm_message_t state
)
1307 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1308 struct macb
*bp
= netdev_priv(netdev
);
1310 netif_device_detach(netdev
);
1312 #ifndef CONFIG_ARCH_AT91
1313 clk_disable(bp
->hclk
);
1315 clk_disable(bp
->pclk
);
1320 static int macb_resume(struct platform_device
*pdev
)
1322 struct net_device
*netdev
= platform_get_drvdata(pdev
);
1323 struct macb
*bp
= netdev_priv(netdev
);
1325 clk_enable(bp
->pclk
);
1326 #ifndef CONFIG_ARCH_AT91
1327 clk_enable(bp
->hclk
);
1330 netif_device_attach(netdev
);
1335 #define macb_suspend NULL
1336 #define macb_resume NULL
1339 static struct platform_driver macb_driver
= {
1340 .remove
= __exit_p(macb_remove
),
1341 .suspend
= macb_suspend
,
1342 .resume
= macb_resume
,
1345 .owner
= THIS_MODULE
,
1349 static int __init
macb_init(void)
1351 return platform_driver_probe(&macb_driver
, macb_probe
);
1354 static void __exit
macb_exit(void)
1356 platform_driver_unregister(&macb_driver
);
1359 module_init(macb_init
);
1360 module_exit(macb_exit
);
1362 MODULE_LICENSE("GPL");
1363 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1364 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
1365 MODULE_ALIAS("platform:macb");