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usb-serial: acquire references when a new tty is installed
[linux-2.6/mini2440.git] / arch / x86 / kvm / mmu.c
blobeca41ae9f453cda6dc61112ab925ce66cdb7fef3
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20 #include "mmu.h"
21 #include "kvm_cache_regs.h"
22
23 #include <linux/kvm_host.h>
24 #include <linux/types.h>
25 #include <linux/string.h>
26 #include <linux/mm.h>
27 #include <linux/highmem.h>
28 #include <linux/module.h>
29 #include <linux/swap.h>
30 #include <linux/hugetlb.h>
31 #include <linux/compiler.h>
32
33 #include <asm/page.h>
34 #include <asm/cmpxchg.h>
35 #include <asm/io.h>
36 #include <asm/vmx.h>
37
38 /*
39 * When setting this variable to true it enables Two-Dimensional-Paging
40 * where the hardware walks 2 page tables:
41 * 1. the guest-virtual to guest-physical
42 * 2. while doing 1. it walks guest-physical to host-physical
43 * If the hardware supports that we don't need to do shadow paging.
44 */
45 bool tdp_enabled = false;
46
47 #undef MMU_DEBUG
48
49 #undef AUDIT
50
51 #ifdef AUDIT
52 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
53 #else
54 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
55 #endif
56
57 #ifdef MMU_DEBUG
58
59 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
60 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
61
62 #else
63
64 #define pgprintk(x...) do { } while (0)
65 #define rmap_printk(x...) do { } while (0)
66
67 #endif
68
69 #if defined(MMU_DEBUG) || defined(AUDIT)
70 static int dbg = 0;
71 module_param(dbg, bool, 0644);
72 #endif
73
74 static int oos_shadow = 1;
75 module_param(oos_shadow, bool, 0644);
76
77 #ifndef MMU_DEBUG
78 #define ASSERT(x) do { } while (0)
79 #else
80 #define ASSERT(x) \
81 if (!(x)) { \
82 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
83 __FILE__, __LINE__, #x); \
84 }
85 #endif
86
87 #define PT_FIRST_AVAIL_BITS_SHIFT 9
88 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
89
90 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
91
92 #define PT64_LEVEL_BITS 9
93
94 #define PT64_LEVEL_SHIFT(level) \
95 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
96
97 #define PT64_LEVEL_MASK(level) \
98 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
99
100 #define PT64_INDEX(address, level)\
101 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
102
103
104 #define PT32_LEVEL_BITS 10
105
106 #define PT32_LEVEL_SHIFT(level) \
107 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
108
109 #define PT32_LEVEL_MASK(level) \
110 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
111 #define PT32_LVL_OFFSET_MASK(level) \
112 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
113 * PT32_LEVEL_BITS))) - 1))
114
115 #define PT32_INDEX(address, level)\
116 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
117
118
119 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
120 #define PT64_DIR_BASE_ADDR_MASK \
121 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
122 #define PT64_LVL_ADDR_MASK(level) \
123 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
124 * PT64_LEVEL_BITS))) - 1))
125 #define PT64_LVL_OFFSET_MASK(level) \
126 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
127 * PT64_LEVEL_BITS))) - 1))
128
129 #define PT32_BASE_ADDR_MASK PAGE_MASK
130 #define PT32_DIR_BASE_ADDR_MASK \
131 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
132 #define PT32_LVL_ADDR_MASK(level) \
133 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
134 * PT32_LEVEL_BITS))) - 1))
135
136 #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
137 | PT64_NX_MASK)
138
139 #define PFERR_PRESENT_MASK (1U << 0)
140 #define PFERR_WRITE_MASK (1U << 1)
141 #define PFERR_USER_MASK (1U << 2)
142 #define PFERR_RSVD_MASK (1U << 3)
143 #define PFERR_FETCH_MASK (1U << 4)
144
145 #define PT_PDPE_LEVEL 3
146 #define PT_DIRECTORY_LEVEL 2
147 #define PT_PAGE_TABLE_LEVEL 1
148
149 #define RMAP_EXT 4
150
151 #define ACC_EXEC_MASK 1
152 #define ACC_WRITE_MASK PT_WRITABLE_MASK
153 #define ACC_USER_MASK PT_USER_MASK
154 #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
155
156 #define CREATE_TRACE_POINTS
157 #include "mmutrace.h"
158
159 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
160
161 struct kvm_rmap_desc {
162 u64 *sptes[RMAP_EXT];
163 struct kvm_rmap_desc *more;
164 };
165
166 struct kvm_shadow_walk_iterator {
167 u64 addr;
168 hpa_t shadow_addr;
169 int level;
170 u64 *sptep;
171 unsigned index;
172 };
173
174 #define for_each_shadow_entry(_vcpu, _addr, _walker) \
175 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
176 shadow_walk_okay(&(_walker)); \
177 shadow_walk_next(&(_walker)))
178
179
180 struct kvm_unsync_walk {
181 int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
182 };
183
184 typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
185
186 static struct kmem_cache *pte_chain_cache;
187 static struct kmem_cache *rmap_desc_cache;
188 static struct kmem_cache *mmu_page_header_cache;
189
190 static u64 __read_mostly shadow_trap_nonpresent_pte;
191 static u64 __read_mostly shadow_notrap_nonpresent_pte;
192 static u64 __read_mostly shadow_base_present_pte;
193 static u64 __read_mostly shadow_nx_mask;
194 static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
195 static u64 __read_mostly shadow_user_mask;
196 static u64 __read_mostly shadow_accessed_mask;
197 static u64 __read_mostly shadow_dirty_mask;
198
199 static inline u64 rsvd_bits(int s, int e)
200 {
201 return ((1ULL << (e - s + 1)) - 1) << s;
202 }
203
204 void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
205 {
206 shadow_trap_nonpresent_pte = trap_pte;
207 shadow_notrap_nonpresent_pte = notrap_pte;
208 }
209 EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
210
211 void kvm_mmu_set_base_ptes(u64 base_pte)
212 {
213 shadow_base_present_pte = base_pte;
214 }
215 EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
216
217 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
218 u64 dirty_mask, u64 nx_mask, u64 x_mask)
219 {
220 shadow_user_mask = user_mask;
221 shadow_accessed_mask = accessed_mask;
222 shadow_dirty_mask = dirty_mask;
223 shadow_nx_mask = nx_mask;
224 shadow_x_mask = x_mask;
225 }
226 EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
227
228 static int is_write_protection(struct kvm_vcpu *vcpu)
229 {
230 return vcpu->arch.cr0 & X86_CR0_WP;
231 }
232
233 static int is_cpuid_PSE36(void)
234 {
235 return 1;
236 }
237
238 static int is_nx(struct kvm_vcpu *vcpu)
239 {
240 return vcpu->arch.shadow_efer & EFER_NX;
241 }
242
243 static int is_shadow_present_pte(u64 pte)
244 {
245 return pte != shadow_trap_nonpresent_pte
246 && pte != shadow_notrap_nonpresent_pte;
247 }
248
249 static int is_large_pte(u64 pte)
250 {
251 return pte & PT_PAGE_SIZE_MASK;
252 }
253
254 static int is_writeble_pte(unsigned long pte)
255 {
256 return pte & PT_WRITABLE_MASK;
257 }
258
259 static int is_dirty_gpte(unsigned long pte)
260 {
261 return pte & PT_DIRTY_MASK;
262 }
263
264 static int is_rmap_spte(u64 pte)
265 {
266 return is_shadow_present_pte(pte);
267 }
268
269 static int is_last_spte(u64 pte, int level)
270 {
271 if (level == PT_PAGE_TABLE_LEVEL)
272 return 1;
273 if (is_large_pte(pte))
274 return 1;
275 return 0;
276 }
277
278 static pfn_t spte_to_pfn(u64 pte)
279 {
280 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
281 }
282
283 static gfn_t pse36_gfn_delta(u32 gpte)
284 {
285 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
286
287 return (gpte & PT32_DIR_PSE36_MASK) << shift;
288 }
289
290 static void __set_spte(u64 *sptep, u64 spte)
291 {
292 #ifdef CONFIG_X86_64
293 set_64bit((unsigned long *)sptep, spte);
294 #else
295 set_64bit((unsigned long long *)sptep, spte);
296 #endif
297 }
298
299 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
300 struct kmem_cache *base_cache, int min)
301 {
302 void *obj;
303
304 if (cache->nobjs >= min)
305 return 0;
306 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
307 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
308 if (!obj)
309 return -ENOMEM;
310 cache->objects[cache->nobjs++] = obj;
311 }
312 return 0;
313 }
314
315 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
316 {
317 while (mc->nobjs)
318 kfree(mc->objects[--mc->nobjs]);
319 }
320
321 static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
322 int min)
323 {
324 struct page *page;
325
326 if (cache->nobjs >= min)
327 return 0;
328 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
329 page = alloc_page(GFP_KERNEL);
330 if (!page)
331 return -ENOMEM;
332 set_page_private(page, 0);
333 cache->objects[cache->nobjs++] = page_address(page);
334 }
335 return 0;
336 }
337
338 static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
339 {
340 while (mc->nobjs)
341 free_page((unsigned long)mc->objects[--mc->nobjs]);
342 }
343
344 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
345 {
346 int r;
347
348 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
349 pte_chain_cache, 4);
350 if (r)
351 goto out;
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
353 rmap_desc_cache, 4);
354 if (r)
355 goto out;
356 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
357 if (r)
358 goto out;
359 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
360 mmu_page_header_cache, 4);
361 out:
362 return r;
363 }
364
365 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
366 {
367 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
368 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
369 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
370 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
371 }
372
373 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
374 size_t size)
375 {
376 void *p;
377
378 BUG_ON(!mc->nobjs);
379 p = mc->objects[--mc->nobjs];
380 return p;
381 }
382
383 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
384 {
385 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
386 sizeof(struct kvm_pte_chain));
387 }
388
389 static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
390 {
391 kfree(pc);
392 }
393
394 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
395 {
396 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
397 sizeof(struct kvm_rmap_desc));
398 }
399
400 static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
401 {
402 kfree(rd);
403 }
404
405 /*
406 * Return the pointer to the largepage write count for a given
407 * gfn, handling slots that are not large page aligned.
408 */
409 static int *slot_largepage_idx(gfn_t gfn,
410 struct kvm_memory_slot *slot,
411 int level)
412 {
413 unsigned long idx;
414
415 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
416 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
417 return &slot->lpage_info[level - 2][idx].write_count;
418 }
419
420 static void account_shadowed(struct kvm *kvm, gfn_t gfn)
421 {
422 struct kvm_memory_slot *slot;
423 int *write_count;
424 int i;
425
426 gfn = unalias_gfn(kvm, gfn);
427
428 slot = gfn_to_memslot_unaliased(kvm, gfn);
429 for (i = PT_DIRECTORY_LEVEL;
430 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
431 write_count = slot_largepage_idx(gfn, slot, i);
432 *write_count += 1;
433 }
434 }
435
436 static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
437 {
438 struct kvm_memory_slot *slot;
439 int *write_count;
440 int i;
441
442 gfn = unalias_gfn(kvm, gfn);
443 for (i = PT_DIRECTORY_LEVEL;
444 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
445 slot = gfn_to_memslot_unaliased(kvm, gfn);
446 write_count = slot_largepage_idx(gfn, slot, i);
447 *write_count -= 1;
448 WARN_ON(*write_count < 0);
449 }
450 }
451
452 static int has_wrprotected_page(struct kvm *kvm,
453 gfn_t gfn,
454 int level)
455 {
456 struct kvm_memory_slot *slot;
457 int *largepage_idx;
458
459 gfn = unalias_gfn(kvm, gfn);
460 slot = gfn_to_memslot_unaliased(kvm, gfn);
461 if (slot) {
462 largepage_idx = slot_largepage_idx(gfn, slot, level);
463 return *largepage_idx;
464 }
465
466 return 1;
467 }
468
469 static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
470 {
471 unsigned long page_size = PAGE_SIZE;
472 struct vm_area_struct *vma;
473 unsigned long addr;
474 int i, ret = 0;
475
476 addr = gfn_to_hva(kvm, gfn);
477 if (kvm_is_error_hva(addr))
478 return page_size;
479
480 down_read(&current->mm->mmap_sem);
481 vma = find_vma(current->mm, addr);
482 if (!vma)
483 goto out;
484
485 page_size = vma_kernel_pagesize(vma);
486
487 out:
488 up_read(&current->mm->mmap_sem);
489
490 for (i = PT_PAGE_TABLE_LEVEL;
491 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
492 if (page_size >= KVM_HPAGE_SIZE(i))
493 ret = i;
494 else
495 break;
496 }
497
498 return ret;
499 }
500
501 static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
502 {
503 struct kvm_memory_slot *slot;
504 int host_level;
505 int level = PT_PAGE_TABLE_LEVEL;
506
507 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
508 if (slot && slot->dirty_bitmap)
509 return PT_PAGE_TABLE_LEVEL;
510
511 host_level = host_mapping_level(vcpu->kvm, large_gfn);
512
513 if (host_level == PT_PAGE_TABLE_LEVEL)
514 return host_level;
515
516 for (level = PT_DIRECTORY_LEVEL; level <= host_level; ++level) {
517
518 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
519 break;
520 }
521
522 return level - 1;
523 }
524
525 /*
526 * Take gfn and return the reverse mapping to it.
527 * Note: gfn must be unaliased before this function get called
528 */
529
530 static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
531 {
532 struct kvm_memory_slot *slot;
533 unsigned long idx;
534
535 slot = gfn_to_memslot(kvm, gfn);
536 if (likely(level == PT_PAGE_TABLE_LEVEL))
537 return &slot->rmap[gfn - slot->base_gfn];
538
539 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
540 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
541
542 return &slot->lpage_info[level - 2][idx].rmap_pde;
543 }
544
545 /*
546 * Reverse mapping data structures:
547 *
548 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
549 * that points to page_address(page).
550 *
551 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
552 * containing more mappings.
553 *
554 * Returns the number of rmap entries before the spte was added or zero if
555 * the spte was not added.
556 *
557 */
558 static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
559 {
560 struct kvm_mmu_page *sp;
561 struct kvm_rmap_desc *desc;
562 unsigned long *rmapp;
563 int i, count = 0;
564
565 if (!is_rmap_spte(*spte))
566 return count;
567 gfn = unalias_gfn(vcpu->kvm, gfn);
568 sp = page_header(__pa(spte));
569 sp->gfns[spte - sp->spt] = gfn;
570 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
571 if (!*rmapp) {
572 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
573 *rmapp = (unsigned long)spte;
574 } else if (!(*rmapp & 1)) {
575 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
576 desc = mmu_alloc_rmap_desc(vcpu);
577 desc->sptes[0] = (u64 *)*rmapp;
578 desc->sptes[1] = spte;
579 *rmapp = (unsigned long)desc | 1;
580 } else {
581 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
582 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
583 while (desc->sptes[RMAP_EXT-1] && desc->more) {
584 desc = desc->more;
585 count += RMAP_EXT;
586 }
587 if (desc->sptes[RMAP_EXT-1]) {
588 desc->more = mmu_alloc_rmap_desc(vcpu);
589 desc = desc->more;
590 }
591 for (i = 0; desc->sptes[i]; ++i)
592 ;
593 desc->sptes[i] = spte;
594 }
595 return count;
596 }
597
598 static void rmap_desc_remove_entry(unsigned long *rmapp,
599 struct kvm_rmap_desc *desc,
600 int i,
601 struct kvm_rmap_desc *prev_desc)
602 {
603 int j;
604
605 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
606 ;
607 desc->sptes[i] = desc->sptes[j];
608 desc->sptes[j] = NULL;
609 if (j != 0)
610 return;
611 if (!prev_desc && !desc->more)
612 *rmapp = (unsigned long)desc->sptes[0];
613 else
614 if (prev_desc)
615 prev_desc->more = desc->more;
616 else
617 *rmapp = (unsigned long)desc->more | 1;
618 mmu_free_rmap_desc(desc);
619 }
620
621 static void rmap_remove(struct kvm *kvm, u64 *spte)
622 {
623 struct kvm_rmap_desc *desc;
624 struct kvm_rmap_desc *prev_desc;
625 struct kvm_mmu_page *sp;
626 pfn_t pfn;
627 unsigned long *rmapp;
628 int i;
629
630 if (!is_rmap_spte(*spte))
631 return;
632 sp = page_header(__pa(spte));
633 pfn = spte_to_pfn(*spte);
634 if (*spte & shadow_accessed_mask)
635 kvm_set_pfn_accessed(pfn);
636 if (is_writeble_pte(*spte))
637 kvm_release_pfn_dirty(pfn);
638 else
639 kvm_release_pfn_clean(pfn);
640 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
641 if (!*rmapp) {
642 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
643 BUG();
644 } else if (!(*rmapp & 1)) {
645 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
646 if ((u64 *)*rmapp != spte) {
647 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
648 spte, *spte);
649 BUG();
650 }
651 *rmapp = 0;
652 } else {
653 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
654 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
655 prev_desc = NULL;
656 while (desc) {
657 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
658 if (desc->sptes[i] == spte) {
659 rmap_desc_remove_entry(rmapp,
660 desc, i,
661 prev_desc);
662 return;
663 }
664 prev_desc = desc;
665 desc = desc->more;
666 }
667 BUG();
668 }
669 }
670
671 static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
672 {
673 struct kvm_rmap_desc *desc;
674 struct kvm_rmap_desc *prev_desc;
675 u64 *prev_spte;
676 int i;
677
678 if (!*rmapp)
679 return NULL;
680 else if (!(*rmapp & 1)) {
681 if (!spte)
682 return (u64 *)*rmapp;
683 return NULL;
684 }
685 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
686 prev_desc = NULL;
687 prev_spte = NULL;
688 while (desc) {
689 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
690 if (prev_spte == spte)
691 return desc->sptes[i];
692 prev_spte = desc->sptes[i];
693 }
694 desc = desc->more;
695 }
696 return NULL;
697 }
698
699 static int rmap_write_protect(struct kvm *kvm, u64 gfn)
700 {
701 unsigned long *rmapp;
702 u64 *spte;
703 int i, write_protected = 0;
704
705 gfn = unalias_gfn(kvm, gfn);
706 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
707
708 spte = rmap_next(kvm, rmapp, NULL);
709 while (spte) {
710 BUG_ON(!spte);
711 BUG_ON(!(*spte & PT_PRESENT_MASK));
712 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
713 if (is_writeble_pte(*spte)) {
714 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
715 write_protected = 1;
716 }
717 spte = rmap_next(kvm, rmapp, spte);
718 }
719 if (write_protected) {
720 pfn_t pfn;
721
722 spte = rmap_next(kvm, rmapp, NULL);
723 pfn = spte_to_pfn(*spte);
724 kvm_set_pfn_dirty(pfn);
725 }
726
727 /* check for huge page mappings */
728 for (i = PT_DIRECTORY_LEVEL;
729 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
730 rmapp = gfn_to_rmap(kvm, gfn, i);
731 spte = rmap_next(kvm, rmapp, NULL);
732 while (spte) {
733 BUG_ON(!spte);
734 BUG_ON(!(*spte & PT_PRESENT_MASK));
735 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
736 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
737 if (is_writeble_pte(*spte)) {
738 rmap_remove(kvm, spte);
739 --kvm->stat.lpages;
740 __set_spte(spte, shadow_trap_nonpresent_pte);
741 spte = NULL;
742 write_protected = 1;
743 }
744 spte = rmap_next(kvm, rmapp, spte);
745 }
746 }
747
748 return write_protected;
749 }
750
751 static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
752 {
753 u64 *spte;
754 int need_tlb_flush = 0;
755
756 while ((spte = rmap_next(kvm, rmapp, NULL))) {
757 BUG_ON(!(*spte & PT_PRESENT_MASK));
758 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
759 rmap_remove(kvm, spte);
760 __set_spte(spte, shadow_trap_nonpresent_pte);
761 need_tlb_flush = 1;
762 }
763 return need_tlb_flush;
764 }
765
766 static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
767 int (*handler)(struct kvm *kvm, unsigned long *rmapp))
768 {
769 int i, j;
770 int retval = 0;
771
772 /*
773 * If mmap_sem isn't taken, we can look the memslots with only
774 * the mmu_lock by skipping over the slots with userspace_addr == 0.
775 */
776 for (i = 0; i < kvm->nmemslots; i++) {
777 struct kvm_memory_slot *memslot = &kvm->memslots[i];
778 unsigned long start = memslot->userspace_addr;
779 unsigned long end;
780
781 /* mmu_lock protects userspace_addr */
782 if (!start)
783 continue;
784
785 end = start + (memslot->npages << PAGE_SHIFT);
786 if (hva >= start && hva < end) {
787 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
788
789 retval |= handler(kvm, &memslot->rmap[gfn_offset]);
790
791 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
792 int idx = gfn_offset;
793 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
794 retval |= handler(kvm,
795 &memslot->lpage_info[j][idx].rmap_pde);
796 }
797 }
798 }
799
800 return retval;
801 }
802
803 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
804 {
805 return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
806 }
807
808 static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
809 {
810 u64 *spte;
811 int young = 0;
812
813 /* always return old for EPT */
814 if (!shadow_accessed_mask)
815 return 0;
816
817 spte = rmap_next(kvm, rmapp, NULL);
818 while (spte) {
819 int _young;
820 u64 _spte = *spte;
821 BUG_ON(!(_spte & PT_PRESENT_MASK));
822 _young = _spte & PT_ACCESSED_MASK;
823 if (_young) {
824 young = 1;
825 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
826 }
827 spte = rmap_next(kvm, rmapp, spte);
828 }
829 return young;
830 }
831
832 #define RMAP_RECYCLE_THRESHOLD 1000
833
834 static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
835 {
836 unsigned long *rmapp;
837 struct kvm_mmu_page *sp;
838
839 sp = page_header(__pa(spte));
840
841 gfn = unalias_gfn(vcpu->kvm, gfn);
842 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
843
844 kvm_unmap_rmapp(vcpu->kvm, rmapp);
845 kvm_flush_remote_tlbs(vcpu->kvm);
846 }
847
848 int kvm_age_hva(struct kvm *kvm, unsigned long hva)
849 {
850 return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
851 }
852
853 #ifdef MMU_DEBUG
854 static int is_empty_shadow_page(u64 *spt)
855 {
856 u64 *pos;
857 u64 *end;
858
859 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
860 if (is_shadow_present_pte(*pos)) {
861 printk(KERN_ERR "%s: %p %llx\n", __func__,
862 pos, *pos);
863 return 0;
864 }
865 return 1;
866 }
867 #endif
868
869 static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
870 {
871 ASSERT(is_empty_shadow_page(sp->spt));
872 list_del(&sp->link);
873 __free_page(virt_to_page(sp->spt));
874 __free_page(virt_to_page(sp->gfns));
875 kfree(sp);
876 ++kvm->arch.n_free_mmu_pages;
877 }
878
879 static unsigned kvm_page_table_hashfn(gfn_t gfn)
880 {
881 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
882 }
883
884 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
885 u64 *parent_pte)
886 {
887 struct kvm_mmu_page *sp;
888
889 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
890 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
891 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
892 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
893 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
894 INIT_LIST_HEAD(&sp->oos_link);
895 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
896 sp->multimapped = 0;
897 sp->parent_pte = parent_pte;
898 --vcpu->kvm->arch.n_free_mmu_pages;
899 return sp;
900 }
901
902 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
903 struct kvm_mmu_page *sp, u64 *parent_pte)
904 {
905 struct kvm_pte_chain *pte_chain;
906 struct hlist_node *node;
907 int i;
908
909 if (!parent_pte)
910 return;
911 if (!sp->multimapped) {
912 u64 *old = sp->parent_pte;
913
914 if (!old) {
915 sp->parent_pte = parent_pte;
916 return;
917 }
918 sp->multimapped = 1;
919 pte_chain = mmu_alloc_pte_chain(vcpu);
920 INIT_HLIST_HEAD(&sp->parent_ptes);
921 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
922 pte_chain->parent_ptes[0] = old;
923 }
924 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
925 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
926 continue;
927 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
928 if (!pte_chain->parent_ptes[i]) {
929 pte_chain->parent_ptes[i] = parent_pte;
930 return;
931 }
932 }
933 pte_chain = mmu_alloc_pte_chain(vcpu);
934 BUG_ON(!pte_chain);
935 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
936 pte_chain->parent_ptes[0] = parent_pte;
937 }
938
939 static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
940 u64 *parent_pte)
941 {
942 struct kvm_pte_chain *pte_chain;
943 struct hlist_node *node;
944 int i;
945
946 if (!sp->multimapped) {
947 BUG_ON(sp->parent_pte != parent_pte);
948 sp->parent_pte = NULL;
949 return;
950 }
951 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
952 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
953 if (!pte_chain->parent_ptes[i])
954 break;
955 if (pte_chain->parent_ptes[i] != parent_pte)
956 continue;
957 while (i + 1 < NR_PTE_CHAIN_ENTRIES
958 && pte_chain->parent_ptes[i + 1]) {
959 pte_chain->parent_ptes[i]
960 = pte_chain->parent_ptes[i + 1];
961 ++i;
962 }
963 pte_chain->parent_ptes[i] = NULL;
964 if (i == 0) {
965 hlist_del(&pte_chain->link);
966 mmu_free_pte_chain(pte_chain);
967 if (hlist_empty(&sp->parent_ptes)) {
968 sp->multimapped = 0;
969 sp->parent_pte = NULL;
970 }
971 }
972 return;
973 }
974 BUG();
975 }
976
977
978 static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
979 mmu_parent_walk_fn fn)
980 {
981 struct kvm_pte_chain *pte_chain;
982 struct hlist_node *node;
983 struct kvm_mmu_page *parent_sp;
984 int i;
985
986 if (!sp->multimapped && sp->parent_pte) {
987 parent_sp = page_header(__pa(sp->parent_pte));
988 fn(vcpu, parent_sp);
989 mmu_parent_walk(vcpu, parent_sp, fn);
990 return;
991 }
992 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
993 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
994 if (!pte_chain->parent_ptes[i])
995 break;
996 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
997 fn(vcpu, parent_sp);
998 mmu_parent_walk(vcpu, parent_sp, fn);
999 }
1000 }
1001
1002 static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1003 {
1004 unsigned int index;
1005 struct kvm_mmu_page *sp = page_header(__pa(spte));
1006
1007 index = spte - sp->spt;
1008 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1009 sp->unsync_children++;
1010 WARN_ON(!sp->unsync_children);
1011 }
1012
1013 static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1014 {
1015 struct kvm_pte_chain *pte_chain;
1016 struct hlist_node *node;
1017 int i;
1018
1019 if (!sp->parent_pte)
1020 return;
1021
1022 if (!sp->multimapped) {
1023 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1024 return;
1025 }
1026
1027 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1028 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1029 if (!pte_chain->parent_ptes[i])
1030 break;
1031 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1032 }
1033 }
1034
1035 static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1036 {
1037 kvm_mmu_update_parents_unsync(sp);
1038 return 1;
1039 }
1040
1041 static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
1042 struct kvm_mmu_page *sp)
1043 {
1044 mmu_parent_walk(vcpu, sp, unsync_walk_fn);
1045 kvm_mmu_update_parents_unsync(sp);
1046 }
1047
1048 static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1049 struct kvm_mmu_page *sp)
1050 {
1051 int i;
1052
1053 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1054 sp->spt[i] = shadow_trap_nonpresent_pte;
1055 }
1056
1057 static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1058 struct kvm_mmu_page *sp)
1059 {
1060 return 1;
1061 }
1062
1063 static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1064 {
1065 }
1066
1067 #define KVM_PAGE_ARRAY_NR 16
1068
1069 struct kvm_mmu_pages {
1070 struct mmu_page_and_offset {
1071 struct kvm_mmu_page *sp;
1072 unsigned int idx;
1073 } page[KVM_PAGE_ARRAY_NR];
1074 unsigned int nr;
1075 };
1076
1077 #define for_each_unsync_children(bitmap, idx) \
1078 for (idx = find_first_bit(bitmap, 512); \
1079 idx < 512; \
1080 idx = find_next_bit(bitmap, 512, idx+1))
1081
1082 static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1083 int idx)
1084 {
1085 int i;
1086
1087 if (sp->unsync)
1088 for (i=0; i < pvec->nr; i++)
1089 if (pvec->page[i].sp == sp)
1090 return 0;
1091
1092 pvec->page[pvec->nr].sp = sp;
1093 pvec->page[pvec->nr].idx = idx;
1094 pvec->nr++;
1095 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1096 }
1097
1098 static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1099 struct kvm_mmu_pages *pvec)
1100 {
1101 int i, ret, nr_unsync_leaf = 0;
1102
1103 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1104 u64 ent = sp->spt[i];
1105
1106 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1107 struct kvm_mmu_page *child;
1108 child = page_header(ent & PT64_BASE_ADDR_MASK);
1109
1110 if (child->unsync_children) {
1111 if (mmu_pages_add(pvec, child, i))
1112 return -ENOSPC;
1113
1114 ret = __mmu_unsync_walk(child, pvec);
1115 if (!ret)
1116 __clear_bit(i, sp->unsync_child_bitmap);
1117 else if (ret > 0)
1118 nr_unsync_leaf += ret;
1119 else
1120 return ret;
1121 }
1122
1123 if (child->unsync) {
1124 nr_unsync_leaf++;
1125 if (mmu_pages_add(pvec, child, i))
1126 return -ENOSPC;
1127 }
1128 }
1129 }
1130
1131 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1132 sp->unsync_children = 0;
1133
1134 return nr_unsync_leaf;
1135 }
1136
1137 static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1138 struct kvm_mmu_pages *pvec)
1139 {
1140 if (!sp->unsync_children)
1141 return 0;
1142
1143 mmu_pages_add(pvec, sp, 0);
1144 return __mmu_unsync_walk(sp, pvec);
1145 }
1146
1147 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1148 {
1149 unsigned index;
1150 struct hlist_head *bucket;
1151 struct kvm_mmu_page *sp;
1152 struct hlist_node *node;
1153
1154 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1155 index = kvm_page_table_hashfn(gfn);
1156 bucket = &kvm->arch.mmu_page_hash[index];
1157 hlist_for_each_entry(sp, node, bucket, hash_link)
1158 if (sp->gfn == gfn && !sp->role.direct
1159 && !sp->role.invalid) {
1160 pgprintk("%s: found role %x\n",
1161 __func__, sp->role.word);
1162 return sp;
1163 }
1164 return NULL;
1165 }
1166
1167 static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1168 {
1169 WARN_ON(!sp->unsync);
1170 sp->unsync = 0;
1171 --kvm->stat.mmu_unsync;
1172 }
1173
1174 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1175
1176 static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1177 {
1178 if (sp->role.glevels != vcpu->arch.mmu.root_level) {
1179 kvm_mmu_zap_page(vcpu->kvm, sp);
1180 return 1;
1181 }
1182
1183 trace_kvm_mmu_sync_page(sp);
1184 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1185 kvm_flush_remote_tlbs(vcpu->kvm);
1186 kvm_unlink_unsync_page(vcpu->kvm, sp);
1187 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1188 kvm_mmu_zap_page(vcpu->kvm, sp);
1189 return 1;
1190 }
1191
1192 kvm_mmu_flush_tlb(vcpu);
1193 return 0;
1194 }
1195
1196 struct mmu_page_path {
1197 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1198 unsigned int idx[PT64_ROOT_LEVEL-1];
1199 };
1200
1201 #define for_each_sp(pvec, sp, parents, i) \
1202 for (i = mmu_pages_next(&pvec, &parents, -1), \
1203 sp = pvec.page[i].sp; \
1204 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1205 i = mmu_pages_next(&pvec, &parents, i))
1206
1207 static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1208 struct mmu_page_path *parents,
1209 int i)
1210 {
1211 int n;
1212
1213 for (n = i+1; n < pvec->nr; n++) {
1214 struct kvm_mmu_page *sp = pvec->page[n].sp;
1215
1216 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1217 parents->idx[0] = pvec->page[n].idx;
1218 return n;
1219 }
1220
1221 parents->parent[sp->role.level-2] = sp;
1222 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1223 }
1224
1225 return n;
1226 }
1227
1228 static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1229 {
1230 struct kvm_mmu_page *sp;
1231 unsigned int level = 0;
1232
1233 do {
1234 unsigned int idx = parents->idx[level];
1235
1236 sp = parents->parent[level];
1237 if (!sp)
1238 return;
1239
1240 --sp->unsync_children;
1241 WARN_ON((int)sp->unsync_children < 0);
1242 __clear_bit(idx, sp->unsync_child_bitmap);
1243 level++;
1244 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1245 }
1246
1247 static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1248 struct mmu_page_path *parents,
1249 struct kvm_mmu_pages *pvec)
1250 {
1251 parents->parent[parent->role.level-1] = NULL;
1252 pvec->nr = 0;
1253 }
1254
1255 static void mmu_sync_children(struct kvm_vcpu *vcpu,
1256 struct kvm_mmu_page *parent)
1257 {
1258 int i;
1259 struct kvm_mmu_page *sp;
1260 struct mmu_page_path parents;
1261 struct kvm_mmu_pages pages;
1262
1263 kvm_mmu_pages_init(parent, &parents, &pages);
1264 while (mmu_unsync_walk(parent, &pages)) {
1265 int protected = 0;
1266
1267 for_each_sp(pages, sp, parents, i)
1268 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1269
1270 if (protected)
1271 kvm_flush_remote_tlbs(vcpu->kvm);
1272
1273 for_each_sp(pages, sp, parents, i) {
1274 kvm_sync_page(vcpu, sp);
1275 mmu_pages_clear_parents(&parents);
1276 }
1277 cond_resched_lock(&vcpu->kvm->mmu_lock);
1278 kvm_mmu_pages_init(parent, &parents, &pages);
1279 }
1280 }
1281
1282 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1283 gfn_t gfn,
1284 gva_t gaddr,
1285 unsigned level,
1286 int direct,
1287 unsigned access,
1288 u64 *parent_pte)
1289 {
1290 union kvm_mmu_page_role role;
1291 unsigned index;
1292 unsigned quadrant;
1293 struct hlist_head *bucket;
1294 struct kvm_mmu_page *sp;
1295 struct hlist_node *node, *tmp;
1296
1297 role = vcpu->arch.mmu.base_role;
1298 role.level = level;
1299 role.direct = direct;
1300 role.access = access;
1301 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1302 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1303 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1304 role.quadrant = quadrant;
1305 }
1306 index = kvm_page_table_hashfn(gfn);
1307 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1308 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1309 if (sp->gfn == gfn) {
1310 if (sp->unsync)
1311 if (kvm_sync_page(vcpu, sp))
1312 continue;
1313
1314 if (sp->role.word != role.word)
1315 continue;
1316
1317 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1318 if (sp->unsync_children) {
1319 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1320 kvm_mmu_mark_parents_unsync(vcpu, sp);
1321 }
1322 trace_kvm_mmu_get_page(sp, false);
1323 return sp;
1324 }
1325 ++vcpu->kvm->stat.mmu_cache_miss;
1326 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1327 if (!sp)
1328 return sp;
1329 sp->gfn = gfn;
1330 sp->role = role;
1331 hlist_add_head(&sp->hash_link, bucket);
1332 if (!direct) {
1333 if (rmap_write_protect(vcpu->kvm, gfn))
1334 kvm_flush_remote_tlbs(vcpu->kvm);
1335 account_shadowed(vcpu->kvm, gfn);
1336 }
1337 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1338 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1339 else
1340 nonpaging_prefetch_page(vcpu, sp);
1341 trace_kvm_mmu_get_page(sp, true);
1342 return sp;
1343 }
1344
1345 static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1346 struct kvm_vcpu *vcpu, u64 addr)
1347 {
1348 iterator->addr = addr;
1349 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1350 iterator->level = vcpu->arch.mmu.shadow_root_level;
1351 if (iterator->level == PT32E_ROOT_LEVEL) {
1352 iterator->shadow_addr
1353 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1354 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1355 --iterator->level;
1356 if (!iterator->shadow_addr)
1357 iterator->level = 0;
1358 }
1359 }
1360
1361 static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1362 {
1363 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1364 return false;
1365
1366 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1367 if (is_large_pte(*iterator->sptep))
1368 return false;
1369
1370 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1371 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1372 return true;
1373 }
1374
1375 static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1376 {
1377 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1378 --iterator->level;
1379 }
1380
1381 static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1382 struct kvm_mmu_page *sp)
1383 {
1384 unsigned i;
1385 u64 *pt;
1386 u64 ent;
1387
1388 pt = sp->spt;
1389
1390 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1391 ent = pt[i];
1392
1393 if (is_shadow_present_pte(ent)) {
1394 if (!is_last_spte(ent, sp->role.level)) {
1395 ent &= PT64_BASE_ADDR_MASK;
1396 mmu_page_remove_parent_pte(page_header(ent),
1397 &pt[i]);
1398 } else {
1399 if (is_large_pte(ent))
1400 --kvm->stat.lpages;
1401 rmap_remove(kvm, &pt[i]);
1402 }
1403 }
1404 pt[i] = shadow_trap_nonpresent_pte;
1405 }
1406 }
1407
1408 static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1409 {
1410 mmu_page_remove_parent_pte(sp, parent_pte);
1411 }
1412
1413 static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1414 {
1415 int i;
1416 struct kvm_vcpu *vcpu;
1417
1418 kvm_for_each_vcpu(i, vcpu, kvm)
1419 vcpu->arch.last_pte_updated = NULL;
1420 }
1421
1422 static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1423 {
1424 u64 *parent_pte;
1425
1426 while (sp->multimapped || sp->parent_pte) {
1427 if (!sp->multimapped)
1428 parent_pte = sp->parent_pte;
1429 else {
1430 struct kvm_pte_chain *chain;
1431
1432 chain = container_of(sp->parent_ptes.first,
1433 struct kvm_pte_chain, link);
1434 parent_pte = chain->parent_ptes[0];
1435 }
1436 BUG_ON(!parent_pte);
1437 kvm_mmu_put_page(sp, parent_pte);
1438 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1439 }
1440 }
1441
1442 static int mmu_zap_unsync_children(struct kvm *kvm,
1443 struct kvm_mmu_page *parent)
1444 {
1445 int i, zapped = 0;
1446 struct mmu_page_path parents;
1447 struct kvm_mmu_pages pages;
1448
1449 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1450 return 0;
1451
1452 kvm_mmu_pages_init(parent, &parents, &pages);
1453 while (mmu_unsync_walk(parent, &pages)) {
1454 struct kvm_mmu_page *sp;
1455
1456 for_each_sp(pages, sp, parents, i) {
1457 kvm_mmu_zap_page(kvm, sp);
1458 mmu_pages_clear_parents(&parents);
1459 }
1460 zapped += pages.nr;
1461 kvm_mmu_pages_init(parent, &parents, &pages);
1462 }
1463
1464 return zapped;
1465 }
1466
1467 static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1468 {
1469 int ret;
1470
1471 trace_kvm_mmu_zap_page(sp);
1472 ++kvm->stat.mmu_shadow_zapped;
1473 ret = mmu_zap_unsync_children(kvm, sp);
1474 kvm_mmu_page_unlink_children(kvm, sp);
1475 kvm_mmu_unlink_parents(kvm, sp);
1476 kvm_flush_remote_tlbs(kvm);
1477 if (!sp->role.invalid && !sp->role.direct)
1478 unaccount_shadowed(kvm, sp->gfn);
1479 if (sp->unsync)
1480 kvm_unlink_unsync_page(kvm, sp);
1481 if (!sp->root_count) {
1482 hlist_del(&sp->hash_link);
1483 kvm_mmu_free_page(kvm, sp);
1484 } else {
1485 sp->role.invalid = 1;
1486 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1487 kvm_reload_remote_mmus(kvm);
1488 }
1489 kvm_mmu_reset_last_pte_updated(kvm);
1490 return ret;
1491 }
1492
1493 /*
1494 * Changing the number of mmu pages allocated to the vm
1495 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1496 */
1497 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1498 {
1499 int used_pages;
1500
1501 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1502 used_pages = max(0, used_pages);
1503
1504 /*
1505 * If we set the number of mmu pages to be smaller be than the
1506 * number of actived pages , we must to free some mmu pages before we
1507 * change the value
1508 */
1509
1510 if (used_pages > kvm_nr_mmu_pages) {
1511 while (used_pages > kvm_nr_mmu_pages) {
1512 struct kvm_mmu_page *page;
1513
1514 page = container_of(kvm->arch.active_mmu_pages.prev,
1515 struct kvm_mmu_page, link);
1516 kvm_mmu_zap_page(kvm, page);
1517 used_pages--;
1518 }
1519 kvm->arch.n_free_mmu_pages = 0;
1520 }
1521 else
1522 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1523 - kvm->arch.n_alloc_mmu_pages;
1524
1525 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1526 }
1527
1528 static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1529 {
1530 unsigned index;
1531 struct hlist_head *bucket;
1532 struct kvm_mmu_page *sp;
1533 struct hlist_node *node, *n;
1534 int r;
1535
1536 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1537 r = 0;
1538 index = kvm_page_table_hashfn(gfn);
1539 bucket = &kvm->arch.mmu_page_hash[index];
1540 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1541 if (sp->gfn == gfn && !sp->role.direct) {
1542 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1543 sp->role.word);
1544 r = 1;
1545 if (kvm_mmu_zap_page(kvm, sp))
1546 n = bucket->first;
1547 }
1548 return r;
1549 }
1550
1551 static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1552 {
1553 unsigned index;
1554 struct hlist_head *bucket;
1555 struct kvm_mmu_page *sp;
1556 struct hlist_node *node, *nn;
1557
1558 index = kvm_page_table_hashfn(gfn);
1559 bucket = &kvm->arch.mmu_page_hash[index];
1560 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1561 if (sp->gfn == gfn && !sp->role.direct
1562 && !sp->role.invalid) {
1563 pgprintk("%s: zap %lx %x\n",
1564 __func__, gfn, sp->role.word);
1565 kvm_mmu_zap_page(kvm, sp);
1566 }
1567 }
1568 }
1569
1570 static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1571 {
1572 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
1573 struct kvm_mmu_page *sp = page_header(__pa(pte));
1574
1575 __set_bit(slot, sp->slot_bitmap);
1576 }
1577
1578 static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1579 {
1580 int i;
1581 u64 *pt = sp->spt;
1582
1583 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1584 return;
1585
1586 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1587 if (pt[i] == shadow_notrap_nonpresent_pte)
1588 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1589 }
1590 }
1591
1592 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
1593 {
1594 struct page *page;
1595
1596 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
1597
1598 if (gpa == UNMAPPED_GVA)
1599 return NULL;
1600
1601 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
1602
1603 return page;
1604 }
1605
1606 /*
1607 * The function is based on mtrr_type_lookup() in
1608 * arch/x86/kernel/cpu/mtrr/generic.c
1609 */
1610 static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1611 u64 start, u64 end)
1612 {
1613 int i;
1614 u64 base, mask;
1615 u8 prev_match, curr_match;
1616 int num_var_ranges = KVM_NR_VAR_MTRR;
1617
1618 if (!mtrr_state->enabled)
1619 return 0xFF;
1620
1621 /* Make end inclusive end, instead of exclusive */
1622 end--;
1623
1624 /* Look in fixed ranges. Just return the type as per start */
1625 if (mtrr_state->have_fixed && (start < 0x100000)) {
1626 int idx;
1627
1628 if (start < 0x80000) {
1629 idx = 0;
1630 idx += (start >> 16);
1631 return mtrr_state->fixed_ranges[idx];
1632 } else if (start < 0xC0000) {
1633 idx = 1 * 8;
1634 idx += ((start - 0x80000) >> 14);
1635 return mtrr_state->fixed_ranges[idx];
1636 } else if (start < 0x1000000) {
1637 idx = 3 * 8;
1638 idx += ((start - 0xC0000) >> 12);
1639 return mtrr_state->fixed_ranges[idx];
1640 }
1641 }
1642
1643 /*
1644 * Look in variable ranges
1645 * Look of multiple ranges matching this address and pick type
1646 * as per MTRR precedence
1647 */
1648 if (!(mtrr_state->enabled & 2))
1649 return mtrr_state->def_type;
1650
1651 prev_match = 0xFF;
1652 for (i = 0; i < num_var_ranges; ++i) {
1653 unsigned short start_state, end_state;
1654
1655 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1656 continue;
1657
1658 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1659 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1660 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1661 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1662
1663 start_state = ((start & mask) == (base & mask));
1664 end_state = ((end & mask) == (base & mask));
1665 if (start_state != end_state)
1666 return 0xFE;
1667
1668 if ((start & mask) != (base & mask))
1669 continue;
1670
1671 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1672 if (prev_match == 0xFF) {
1673 prev_match = curr_match;
1674 continue;
1675 }
1676
1677 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1678 curr_match == MTRR_TYPE_UNCACHABLE)
1679 return MTRR_TYPE_UNCACHABLE;
1680
1681 if ((prev_match == MTRR_TYPE_WRBACK &&
1682 curr_match == MTRR_TYPE_WRTHROUGH) ||
1683 (prev_match == MTRR_TYPE_WRTHROUGH &&
1684 curr_match == MTRR_TYPE_WRBACK)) {
1685 prev_match = MTRR_TYPE_WRTHROUGH;
1686 curr_match = MTRR_TYPE_WRTHROUGH;
1687 }
1688
1689 if (prev_match != curr_match)
1690 return MTRR_TYPE_UNCACHABLE;
1691 }
1692
1693 if (prev_match != 0xFF)
1694 return prev_match;
1695
1696 return mtrr_state->def_type;
1697 }
1698
1699 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1700 {
1701 u8 mtrr;
1702
1703 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1704 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1705 if (mtrr == 0xfe || mtrr == 0xff)
1706 mtrr = MTRR_TYPE_WRBACK;
1707 return mtrr;
1708 }
1709 EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1710
1711 static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1712 {
1713 unsigned index;
1714 struct hlist_head *bucket;
1715 struct kvm_mmu_page *s;
1716 struct hlist_node *node, *n;
1717
1718 trace_kvm_mmu_unsync_page(sp);
1719 index = kvm_page_table_hashfn(sp->gfn);
1720 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1721 /* don't unsync if pagetable is shadowed with multiple roles */
1722 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1723 if (s->gfn != sp->gfn || s->role.direct)
1724 continue;
1725 if (s->role.word != sp->role.word)
1726 return 1;
1727 }
1728 ++vcpu->kvm->stat.mmu_unsync;
1729 sp->unsync = 1;
1730
1731 kvm_mmu_mark_parents_unsync(vcpu, sp);
1732
1733 mmu_convert_notrap(sp);
1734 return 0;
1735 }
1736
1737 static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1738 bool can_unsync)
1739 {
1740 struct kvm_mmu_page *shadow;
1741
1742 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1743 if (shadow) {
1744 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1745 return 1;
1746 if (shadow->unsync)
1747 return 0;
1748 if (can_unsync && oos_shadow)
1749 return kvm_unsync_page(vcpu, shadow);
1750 return 1;
1751 }
1752 return 0;
1753 }
1754
1755 static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1756 unsigned pte_access, int user_fault,
1757 int write_fault, int dirty, int level,
1758 gfn_t gfn, pfn_t pfn, bool speculative,
1759 bool can_unsync)
1760 {
1761 u64 spte;
1762 int ret = 0;
1763
1764 /*
1765 * We don't set the accessed bit, since we sometimes want to see
1766 * whether the guest actually used the pte (in order to detect
1767 * demand paging).
1768 */
1769 spte = shadow_base_present_pte | shadow_dirty_mask;
1770 if (!speculative)
1771 spte |= shadow_accessed_mask;
1772 if (!dirty)
1773 pte_access &= ~ACC_WRITE_MASK;
1774 if (pte_access & ACC_EXEC_MASK)
1775 spte |= shadow_x_mask;
1776 else
1777 spte |= shadow_nx_mask;
1778 if (pte_access & ACC_USER_MASK)
1779 spte |= shadow_user_mask;
1780 if (level > PT_PAGE_TABLE_LEVEL)
1781 spte |= PT_PAGE_SIZE_MASK;
1782 if (tdp_enabled)
1783 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1784 kvm_is_mmio_pfn(pfn));
1785
1786 spte |= (u64)pfn << PAGE_SHIFT;
1787
1788 if ((pte_access & ACC_WRITE_MASK)
1789 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1790
1791 if (level > PT_PAGE_TABLE_LEVEL &&
1792 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1793 ret = 1;
1794 spte = shadow_trap_nonpresent_pte;
1795 goto set_pte;
1796 }
1797
1798 spte |= PT_WRITABLE_MASK;
1799
1800 /*
1801 * Optimization: for pte sync, if spte was writable the hash
1802 * lookup is unnecessary (and expensive). Write protection
1803 * is responsibility of mmu_get_page / kvm_sync_page.
1804 * Same reasoning can be applied to dirty page accounting.
1805 */
1806 if (!can_unsync && is_writeble_pte(*sptep))
1807 goto set_pte;
1808
1809 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1810 pgprintk("%s: found shadow page for %lx, marking ro\n",
1811 __func__, gfn);
1812 ret = 1;
1813 pte_access &= ~ACC_WRITE_MASK;
1814 if (is_writeble_pte(spte))
1815 spte &= ~PT_WRITABLE_MASK;
1816 }
1817 }
1818
1819 if (pte_access & ACC_WRITE_MASK)
1820 mark_page_dirty(vcpu->kvm, gfn);
1821
1822 set_pte:
1823 __set_spte(sptep, spte);
1824 return ret;
1825 }
1826
1827 static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1828 unsigned pt_access, unsigned pte_access,
1829 int user_fault, int write_fault, int dirty,
1830 int *ptwrite, int level, gfn_t gfn,
1831 pfn_t pfn, bool speculative)
1832 {
1833 int was_rmapped = 0;
1834 int was_writeble = is_writeble_pte(*sptep);
1835 int rmap_count;
1836
1837 pgprintk("%s: spte %llx access %x write_fault %d"
1838 " user_fault %d gfn %lx\n",
1839 __func__, *sptep, pt_access,
1840 write_fault, user_fault, gfn);
1841
1842 if (is_rmap_spte(*sptep)) {
1843 /*
1844 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1845 * the parent of the now unreachable PTE.
1846 */
1847 if (level > PT_PAGE_TABLE_LEVEL &&
1848 !is_large_pte(*sptep)) {
1849 struct kvm_mmu_page *child;
1850 u64 pte = *sptep;
1851
1852 child = page_header(pte & PT64_BASE_ADDR_MASK);
1853 mmu_page_remove_parent_pte(child, sptep);
1854 } else if (pfn != spte_to_pfn(*sptep)) {
1855 pgprintk("hfn old %lx new %lx\n",
1856 spte_to_pfn(*sptep), pfn);
1857 rmap_remove(vcpu->kvm, sptep);
1858 } else
1859 was_rmapped = 1;
1860 }
1861
1862 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1863 dirty, level, gfn, pfn, speculative, true)) {
1864 if (write_fault)
1865 *ptwrite = 1;
1866 kvm_x86_ops->tlb_flush(vcpu);
1867 }
1868
1869 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1870 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1871 is_large_pte(*sptep)? "2MB" : "4kB",
1872 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1873 *sptep, sptep);
1874 if (!was_rmapped && is_large_pte(*sptep))
1875 ++vcpu->kvm->stat.lpages;
1876
1877 page_header_update_slot(vcpu->kvm, sptep, gfn);
1878 if (!was_rmapped) {
1879 rmap_count = rmap_add(vcpu, sptep, gfn);
1880 if (!is_rmap_spte(*sptep))
1881 kvm_release_pfn_clean(pfn);
1882 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1883 rmap_recycle(vcpu, sptep, gfn);
1884 } else {
1885 if (was_writeble)
1886 kvm_release_pfn_dirty(pfn);
1887 else
1888 kvm_release_pfn_clean(pfn);
1889 }
1890 if (speculative) {
1891 vcpu->arch.last_pte_updated = sptep;
1892 vcpu->arch.last_pte_gfn = gfn;
1893 }
1894 }
1895
1896 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1897 {
1898 }
1899
1900 static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1901 int level, gfn_t gfn, pfn_t pfn)
1902 {
1903 struct kvm_shadow_walk_iterator iterator;
1904 struct kvm_mmu_page *sp;
1905 int pt_write = 0;
1906 gfn_t pseudo_gfn;
1907
1908 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1909 if (iterator.level == level) {
1910 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1911 0, write, 1, &pt_write,
1912 level, gfn, pfn, false);
1913 ++vcpu->stat.pf_fixed;
1914 break;
1915 }
1916
1917 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1918 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1919 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1920 iterator.level - 1,
1921 1, ACC_ALL, iterator.sptep);
1922 if (!sp) {
1923 pgprintk("nonpaging_map: ENOMEM\n");
1924 kvm_release_pfn_clean(pfn);
1925 return -ENOMEM;
1926 }
1927
1928 __set_spte(iterator.sptep,
1929 __pa(sp->spt)
1930 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1931 | shadow_user_mask | shadow_x_mask);
1932 }
1933 }
1934 return pt_write;
1935 }
1936
1937 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
1938 {
1939 int r;
1940 int level;
1941 pfn_t pfn;
1942 unsigned long mmu_seq;
1943
1944 level = mapping_level(vcpu, gfn);
1945
1946 /*
1947 * This path builds a PAE pagetable - so we can map 2mb pages at
1948 * maximum. Therefore check if the level is larger than that.
1949 */
1950 if (level > PT_DIRECTORY_LEVEL)
1951 level = PT_DIRECTORY_LEVEL;
1952
1953 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
1954
1955 mmu_seq = vcpu->kvm->mmu_notifier_seq;
1956 smp_rmb();
1957 pfn = gfn_to_pfn(vcpu->kvm, gfn);
1958
1959 /* mmio */
1960 if (is_error_pfn(pfn)) {
1961 kvm_release_pfn_clean(pfn);
1962 return 1;
1963 }
1964
1965 spin_lock(&vcpu->kvm->mmu_lock);
1966 if (mmu_notifier_retry(vcpu, mmu_seq))
1967 goto out_unlock;
1968 kvm_mmu_free_some_pages(vcpu);
1969 r = __direct_map(vcpu, v, write, level, gfn, pfn);
1970 spin_unlock(&vcpu->kvm->mmu_lock);
1971
1972
1973 return r;
1974
1975 out_unlock:
1976 spin_unlock(&vcpu->kvm->mmu_lock);
1977 kvm_release_pfn_clean(pfn);
1978 return 0;
1979 }
1980
1981
1982 static void mmu_free_roots(struct kvm_vcpu *vcpu)
1983 {
1984 int i;
1985 struct kvm_mmu_page *sp;
1986
1987 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
1988 return;
1989 spin_lock(&vcpu->kvm->mmu_lock);
1990 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
1991 hpa_t root = vcpu->arch.mmu.root_hpa;
1992
1993 sp = page_header(root);
1994 --sp->root_count;
1995 if (!sp->root_count && sp->role.invalid)
1996 kvm_mmu_zap_page(vcpu->kvm, sp);
1997 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
1998 spin_unlock(&vcpu->kvm->mmu_lock);
1999 return;
2000 }
2001 for (i = 0; i < 4; ++i) {
2002 hpa_t root = vcpu->arch.mmu.pae_root[i];
2003
2004 if (root) {
2005 root &= PT64_BASE_ADDR_MASK;
2006 sp = page_header(root);
2007 --sp->root_count;
2008 if (!sp->root_count && sp->role.invalid)
2009 kvm_mmu_zap_page(vcpu->kvm, sp);
2010 }
2011 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2012 }
2013 spin_unlock(&vcpu->kvm->mmu_lock);
2014 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2015 }
2016
2017 static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2018 {
2019 int ret = 0;
2020
2021 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2022 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2023 ret = 1;
2024 }
2025
2026 return ret;
2027 }
2028
2029 static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2030 {
2031 int i;
2032 gfn_t root_gfn;
2033 struct kvm_mmu_page *sp;
2034 int direct = 0;
2035 u64 pdptr;
2036
2037 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2038
2039 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2040 hpa_t root = vcpu->arch.mmu.root_hpa;
2041
2042 ASSERT(!VALID_PAGE(root));
2043 if (tdp_enabled)
2044 direct = 1;
2045 if (mmu_check_root(vcpu, root_gfn))
2046 return 1;
2047 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2048 PT64_ROOT_LEVEL, direct,
2049 ACC_ALL, NULL);
2050 root = __pa(sp->spt);
2051 ++sp->root_count;
2052 vcpu->arch.mmu.root_hpa = root;
2053 return 0;
2054 }
2055 direct = !is_paging(vcpu);
2056 if (tdp_enabled)
2057 direct = 1;
2058 for (i = 0; i < 4; ++i) {
2059 hpa_t root = vcpu->arch.mmu.pae_root[i];
2060
2061 ASSERT(!VALID_PAGE(root));
2062 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2063 pdptr = kvm_pdptr_read(vcpu, i);
2064 if (!is_present_gpte(pdptr)) {
2065 vcpu->arch.mmu.pae_root[i] = 0;
2066 continue;
2067 }
2068 root_gfn = pdptr >> PAGE_SHIFT;
2069 } else if (vcpu->arch.mmu.root_level == 0)
2070 root_gfn = 0;
2071 if (mmu_check_root(vcpu, root_gfn))
2072 return 1;
2073 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2074 PT32_ROOT_LEVEL, direct,
2075 ACC_ALL, NULL);
2076 root = __pa(sp->spt);
2077 ++sp->root_count;
2078 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2079 }
2080 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2081 return 0;
2082 }
2083
2084 static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2085 {
2086 int i;
2087 struct kvm_mmu_page *sp;
2088
2089 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2090 return;
2091 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2092 hpa_t root = vcpu->arch.mmu.root_hpa;
2093 sp = page_header(root);
2094 mmu_sync_children(vcpu, sp);
2095 return;
2096 }
2097 for (i = 0; i < 4; ++i) {
2098 hpa_t root = vcpu->arch.mmu.pae_root[i];
2099
2100 if (root && VALID_PAGE(root)) {
2101 root &= PT64_BASE_ADDR_MASK;
2102 sp = page_header(root);
2103 mmu_sync_children(vcpu, sp);
2104 }
2105 }
2106 }
2107
2108 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2109 {
2110 spin_lock(&vcpu->kvm->mmu_lock);
2111 mmu_sync_roots(vcpu);
2112 spin_unlock(&vcpu->kvm->mmu_lock);
2113 }
2114
2115 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
2116 {
2117 return vaddr;
2118 }
2119
2120 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2121 u32 error_code)
2122 {
2123 gfn_t gfn;
2124 int r;
2125
2126 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2127 r = mmu_topup_memory_caches(vcpu);
2128 if (r)
2129 return r;
2130
2131 ASSERT(vcpu);
2132 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2133
2134 gfn = gva >> PAGE_SHIFT;
2135
2136 return nonpaging_map(vcpu, gva & PAGE_MASK,
2137 error_code & PFERR_WRITE_MASK, gfn);
2138 }
2139
2140 static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2141 u32 error_code)
2142 {
2143 pfn_t pfn;
2144 int r;
2145 int level;
2146 gfn_t gfn = gpa >> PAGE_SHIFT;
2147 unsigned long mmu_seq;
2148
2149 ASSERT(vcpu);
2150 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2151
2152 r = mmu_topup_memory_caches(vcpu);
2153 if (r)
2154 return r;
2155
2156 level = mapping_level(vcpu, gfn);
2157
2158 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2159
2160 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2161 smp_rmb();
2162 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2163 if (is_error_pfn(pfn)) {
2164 kvm_release_pfn_clean(pfn);
2165 return 1;
2166 }
2167 spin_lock(&vcpu->kvm->mmu_lock);
2168 if (mmu_notifier_retry(vcpu, mmu_seq))
2169 goto out_unlock;
2170 kvm_mmu_free_some_pages(vcpu);
2171 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2172 level, gfn, pfn);
2173 spin_unlock(&vcpu->kvm->mmu_lock);
2174
2175 return r;
2176
2177 out_unlock:
2178 spin_unlock(&vcpu->kvm->mmu_lock);
2179 kvm_release_pfn_clean(pfn);
2180 return 0;
2181 }
2182
2183 static void nonpaging_free(struct kvm_vcpu *vcpu)
2184 {
2185 mmu_free_roots(vcpu);
2186 }
2187
2188 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2189 {
2190 struct kvm_mmu *context = &vcpu->arch.mmu;
2191
2192 context->new_cr3 = nonpaging_new_cr3;
2193 context->page_fault = nonpaging_page_fault;
2194 context->gva_to_gpa = nonpaging_gva_to_gpa;
2195 context->free = nonpaging_free;
2196 context->prefetch_page = nonpaging_prefetch_page;
2197 context->sync_page = nonpaging_sync_page;
2198 context->invlpg = nonpaging_invlpg;
2199 context->root_level = 0;
2200 context->shadow_root_level = PT32E_ROOT_LEVEL;
2201 context->root_hpa = INVALID_PAGE;
2202 return 0;
2203 }
2204
2205 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2206 {
2207 ++vcpu->stat.tlb_flush;
2208 kvm_x86_ops->tlb_flush(vcpu);
2209 }
2210
2211 static void paging_new_cr3(struct kvm_vcpu *vcpu)
2212 {
2213 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2214 mmu_free_roots(vcpu);
2215 }
2216
2217 static void inject_page_fault(struct kvm_vcpu *vcpu,
2218 u64 addr,
2219 u32 err_code)
2220 {
2221 kvm_inject_page_fault(vcpu, addr, err_code);
2222 }
2223
2224 static void paging_free(struct kvm_vcpu *vcpu)
2225 {
2226 nonpaging_free(vcpu);
2227 }
2228
2229 static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2230 {
2231 int bit7;
2232
2233 bit7 = (gpte >> 7) & 1;
2234 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2235 }
2236
2237 #define PTTYPE 64
2238 #include "paging_tmpl.h"
2239 #undef PTTYPE
2240
2241 #define PTTYPE 32
2242 #include "paging_tmpl.h"
2243 #undef PTTYPE
2244
2245 static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2246 {
2247 struct kvm_mmu *context = &vcpu->arch.mmu;
2248 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2249 u64 exb_bit_rsvd = 0;
2250
2251 if (!is_nx(vcpu))
2252 exb_bit_rsvd = rsvd_bits(63, 63);
2253 switch (level) {
2254 case PT32_ROOT_LEVEL:
2255 /* no rsvd bits for 2 level 4K page table entries */
2256 context->rsvd_bits_mask[0][1] = 0;
2257 context->rsvd_bits_mask[0][0] = 0;
2258 if (is_cpuid_PSE36())
2259 /* 36bits PSE 4MB page */
2260 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2261 else
2262 /* 32 bits PSE 4MB page */
2263 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2264 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2265 break;
2266 case PT32E_ROOT_LEVEL:
2267 context->rsvd_bits_mask[0][2] =
2268 rsvd_bits(maxphyaddr, 63) |
2269 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2270 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2271 rsvd_bits(maxphyaddr, 62); /* PDE */
2272 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2273 rsvd_bits(maxphyaddr, 62); /* PTE */
2274 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2275 rsvd_bits(maxphyaddr, 62) |
2276 rsvd_bits(13, 20); /* large page */
2277 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2278 break;
2279 case PT64_ROOT_LEVEL:
2280 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2281 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2282 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2283 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2284 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2285 rsvd_bits(maxphyaddr, 51);
2286 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2287 rsvd_bits(maxphyaddr, 51);
2288 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2289 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2290 rsvd_bits(maxphyaddr, 51) |
2291 rsvd_bits(13, 29);
2292 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2293 rsvd_bits(maxphyaddr, 51) |
2294 rsvd_bits(13, 20); /* large page */
2295 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
2296 break;
2297 }
2298 }
2299
2300 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2301 {
2302 struct kvm_mmu *context = &vcpu->arch.mmu;
2303
2304 ASSERT(is_pae(vcpu));
2305 context->new_cr3 = paging_new_cr3;
2306 context->page_fault = paging64_page_fault;
2307 context->gva_to_gpa = paging64_gva_to_gpa;
2308 context->prefetch_page = paging64_prefetch_page;
2309 context->sync_page = paging64_sync_page;
2310 context->invlpg = paging64_invlpg;
2311 context->free = paging_free;
2312 context->root_level = level;
2313 context->shadow_root_level = level;
2314 context->root_hpa = INVALID_PAGE;
2315 return 0;
2316 }
2317
2318 static int paging64_init_context(struct kvm_vcpu *vcpu)
2319 {
2320 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2321 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2322 }
2323
2324 static int paging32_init_context(struct kvm_vcpu *vcpu)
2325 {
2326 struct kvm_mmu *context = &vcpu->arch.mmu;
2327
2328 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2329 context->new_cr3 = paging_new_cr3;
2330 context->page_fault = paging32_page_fault;
2331 context->gva_to_gpa = paging32_gva_to_gpa;
2332 context->free = paging_free;
2333 context->prefetch_page = paging32_prefetch_page;
2334 context->sync_page = paging32_sync_page;
2335 context->invlpg = paging32_invlpg;
2336 context->root_level = PT32_ROOT_LEVEL;
2337 context->shadow_root_level = PT32E_ROOT_LEVEL;
2338 context->root_hpa = INVALID_PAGE;
2339 return 0;
2340 }
2341
2342 static int paging32E_init_context(struct kvm_vcpu *vcpu)
2343 {
2344 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2345 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2346 }
2347
2348 static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2349 {
2350 struct kvm_mmu *context = &vcpu->arch.mmu;
2351
2352 context->new_cr3 = nonpaging_new_cr3;
2353 context->page_fault = tdp_page_fault;
2354 context->free = nonpaging_free;
2355 context->prefetch_page = nonpaging_prefetch_page;
2356 context->sync_page = nonpaging_sync_page;
2357 context->invlpg = nonpaging_invlpg;
2358 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2359 context->root_hpa = INVALID_PAGE;
2360
2361 if (!is_paging(vcpu)) {
2362 context->gva_to_gpa = nonpaging_gva_to_gpa;
2363 context->root_level = 0;
2364 } else if (is_long_mode(vcpu)) {
2365 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2366 context->gva_to_gpa = paging64_gva_to_gpa;
2367 context->root_level = PT64_ROOT_LEVEL;
2368 } else if (is_pae(vcpu)) {
2369 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2370 context->gva_to_gpa = paging64_gva_to_gpa;
2371 context->root_level = PT32E_ROOT_LEVEL;
2372 } else {
2373 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2374 context->gva_to_gpa = paging32_gva_to_gpa;
2375 context->root_level = PT32_ROOT_LEVEL;
2376 }
2377
2378 return 0;
2379 }
2380
2381 static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2382 {
2383 int r;
2384
2385 ASSERT(vcpu);
2386 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2387
2388 if (!is_paging(vcpu))
2389 r = nonpaging_init_context(vcpu);
2390 else if (is_long_mode(vcpu))
2391 r = paging64_init_context(vcpu);
2392 else if (is_pae(vcpu))
2393 r = paging32E_init_context(vcpu);
2394 else
2395 r = paging32_init_context(vcpu);
2396
2397 vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
2398
2399 return r;
2400 }
2401
2402 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2403 {
2404 vcpu->arch.update_pte.pfn = bad_pfn;
2405
2406 if (tdp_enabled)
2407 return init_kvm_tdp_mmu(vcpu);
2408 else
2409 return init_kvm_softmmu(vcpu);
2410 }
2411
2412 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2413 {
2414 ASSERT(vcpu);
2415 if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
2416 vcpu->arch.mmu.free(vcpu);
2417 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2418 }
2419 }
2420
2421 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2422 {
2423 destroy_kvm_mmu(vcpu);
2424 return init_kvm_mmu(vcpu);
2425 }
2426 EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2427
2428 int kvm_mmu_load(struct kvm_vcpu *vcpu)
2429 {
2430 int r;
2431
2432 r = mmu_topup_memory_caches(vcpu);
2433 if (r)
2434 goto out;
2435 spin_lock(&vcpu->kvm->mmu_lock);
2436 kvm_mmu_free_some_pages(vcpu);
2437 r = mmu_alloc_roots(vcpu);
2438 mmu_sync_roots(vcpu);
2439 spin_unlock(&vcpu->kvm->mmu_lock);
2440 if (r)
2441 goto out;
2442 /* set_cr3() should ensure TLB has been flushed */
2443 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2444 out:
2445 return r;
2446 }
2447 EXPORT_SYMBOL_GPL(kvm_mmu_load);
2448
2449 void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2450 {
2451 mmu_free_roots(vcpu);
2452 }
2453
2454 static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2455 struct kvm_mmu_page *sp,
2456 u64 *spte)
2457 {
2458 u64 pte;
2459 struct kvm_mmu_page *child;
2460
2461 pte = *spte;
2462 if (is_shadow_present_pte(pte)) {
2463 if (is_last_spte(pte, sp->role.level))
2464 rmap_remove(vcpu->kvm, spte);
2465 else {
2466 child = page_header(pte & PT64_BASE_ADDR_MASK);
2467 mmu_page_remove_parent_pte(child, spte);
2468 }
2469 }
2470 __set_spte(spte, shadow_trap_nonpresent_pte);
2471 if (is_large_pte(pte))
2472 --vcpu->kvm->stat.lpages;
2473 }
2474
2475 static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2476 struct kvm_mmu_page *sp,
2477 u64 *spte,
2478 const void *new)
2479 {
2480 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2481 ++vcpu->kvm->stat.mmu_pde_zapped;
2482 return;
2483 }
2484
2485 ++vcpu->kvm->stat.mmu_pte_updated;
2486 if (sp->role.glevels == PT32_ROOT_LEVEL)
2487 paging32_update_pte(vcpu, sp, spte, new);
2488 else
2489 paging64_update_pte(vcpu, sp, spte, new);
2490 }
2491
2492 static bool need_remote_flush(u64 old, u64 new)
2493 {
2494 if (!is_shadow_present_pte(old))
2495 return false;
2496 if (!is_shadow_present_pte(new))
2497 return true;
2498 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2499 return true;
2500 old ^= PT64_NX_MASK;
2501 new ^= PT64_NX_MASK;
2502 return (old & ~new & PT64_PERM_MASK) != 0;
2503 }
2504
2505 static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2506 {
2507 if (need_remote_flush(old, new))
2508 kvm_flush_remote_tlbs(vcpu->kvm);
2509 else
2510 kvm_mmu_flush_tlb(vcpu);
2511 }
2512
2513 static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2514 {
2515 u64 *spte = vcpu->arch.last_pte_updated;
2516
2517 return !!(spte && (*spte & shadow_accessed_mask));
2518 }
2519
2520 static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2521 const u8 *new, int bytes)
2522 {
2523 gfn_t gfn;
2524 int r;
2525 u64 gpte = 0;
2526 pfn_t pfn;
2527
2528 if (bytes != 4 && bytes != 8)
2529 return;
2530
2531 /*
2532 * Assume that the pte write on a page table of the same type
2533 * as the current vcpu paging mode. This is nearly always true
2534 * (might be false while changing modes). Note it is verified later
2535 * by update_pte().
2536 */
2537 if (is_pae(vcpu)) {
2538 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2539 if ((bytes == 4) && (gpa % 4 == 0)) {
2540 r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
2541 if (r)
2542 return;
2543 memcpy((void *)&gpte + (gpa % 8), new, 4);
2544 } else if ((bytes == 8) && (gpa % 8 == 0)) {
2545 memcpy((void *)&gpte, new, 8);
2546 }
2547 } else {
2548 if ((bytes == 4) && (gpa % 4 == 0))
2549 memcpy((void *)&gpte, new, 4);
2550 }
2551 if (!is_present_gpte(gpte))
2552 return;
2553 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2554
2555 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2556 smp_rmb();
2557 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2558
2559 if (is_error_pfn(pfn)) {
2560 kvm_release_pfn_clean(pfn);
2561 return;
2562 }
2563 vcpu->arch.update_pte.gfn = gfn;
2564 vcpu->arch.update_pte.pfn = pfn;
2565 }
2566
2567 static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2568 {
2569 u64 *spte = vcpu->arch.last_pte_updated;
2570
2571 if (spte
2572 && vcpu->arch.last_pte_gfn == gfn
2573 && shadow_accessed_mask
2574 && !(*spte & shadow_accessed_mask)
2575 && is_shadow_present_pte(*spte))
2576 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2577 }
2578
2579 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2580 const u8 *new, int bytes,
2581 bool guest_initiated)
2582 {
2583 gfn_t gfn = gpa >> PAGE_SHIFT;
2584 struct kvm_mmu_page *sp;
2585 struct hlist_node *node, *n;
2586 struct hlist_head *bucket;
2587 unsigned index;
2588 u64 entry, gentry;
2589 u64 *spte;
2590 unsigned offset = offset_in_page(gpa);
2591 unsigned pte_size;
2592 unsigned page_offset;
2593 unsigned misaligned;
2594 unsigned quadrant;
2595 int level;
2596 int flooded = 0;
2597 int npte;
2598 int r;
2599
2600 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2601 mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
2602 spin_lock(&vcpu->kvm->mmu_lock);
2603 kvm_mmu_access_page(vcpu, gfn);
2604 kvm_mmu_free_some_pages(vcpu);
2605 ++vcpu->kvm->stat.mmu_pte_write;
2606 kvm_mmu_audit(vcpu, "pre pte write");
2607 if (guest_initiated) {
2608 if (gfn == vcpu->arch.last_pt_write_gfn
2609 && !last_updated_pte_accessed(vcpu)) {
2610 ++vcpu->arch.last_pt_write_count;
2611 if (vcpu->arch.last_pt_write_count >= 3)
2612 flooded = 1;
2613 } else {
2614 vcpu->arch.last_pt_write_gfn = gfn;
2615 vcpu->arch.last_pt_write_count = 1;
2616 vcpu->arch.last_pte_updated = NULL;
2617 }
2618 }
2619 index = kvm_page_table_hashfn(gfn);
2620 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2621 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2622 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2623 continue;
2624 pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
2625 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2626 misaligned |= bytes < 4;
2627 if (misaligned || flooded) {
2628 /*
2629 * Misaligned accesses are too much trouble to fix
2630 * up; also, they usually indicate a page is not used
2631 * as a page table.
2632 *
2633 * If we're seeing too many writes to a page,
2634 * it may no longer be a page table, or we may be
2635 * forking, in which case it is better to unmap the
2636 * page.
2637 */
2638 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2639 gpa, bytes, sp->role.word);
2640 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2641 n = bucket->first;
2642 ++vcpu->kvm->stat.mmu_flooded;
2643 continue;
2644 }
2645 page_offset = offset;
2646 level = sp->role.level;
2647 npte = 1;
2648 if (sp->role.glevels == PT32_ROOT_LEVEL) {
2649 page_offset <<= 1; /* 32->64 */
2650 /*
2651 * A 32-bit pde maps 4MB while the shadow pdes map
2652 * only 2MB. So we need to double the offset again
2653 * and zap two pdes instead of one.
2654 */
2655 if (level == PT32_ROOT_LEVEL) {
2656 page_offset &= ~7; /* kill rounding error */
2657 page_offset <<= 1;
2658 npte = 2;
2659 }
2660 quadrant = page_offset >> PAGE_SHIFT;
2661 page_offset &= ~PAGE_MASK;
2662 if (quadrant != sp->role.quadrant)
2663 continue;
2664 }
2665 spte = &sp->spt[page_offset / sizeof(*spte)];
2666 if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
2667 gentry = 0;
2668 r = kvm_read_guest_atomic(vcpu->kvm,
2669 gpa & ~(u64)(pte_size - 1),
2670 &gentry, pte_size);
2671 new = (const void *)&gentry;
2672 if (r < 0)
2673 new = NULL;
2674 }
2675 while (npte--) {
2676 entry = *spte;
2677 mmu_pte_write_zap_pte(vcpu, sp, spte);
2678 if (new)
2679 mmu_pte_write_new_pte(vcpu, sp, spte, new);
2680 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2681 ++spte;
2682 }
2683 }
2684 kvm_mmu_audit(vcpu, "post pte write");
2685 spin_unlock(&vcpu->kvm->mmu_lock);
2686 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2687 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2688 vcpu->arch.update_pte.pfn = bad_pfn;
2689 }
2690 }
2691
2692 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2693 {
2694 gpa_t gpa;
2695 int r;
2696
2697 if (tdp_enabled)
2698 return 0;
2699
2700 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
2701
2702 spin_lock(&vcpu->kvm->mmu_lock);
2703 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2704 spin_unlock(&vcpu->kvm->mmu_lock);
2705 return r;
2706 }
2707 EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2708
2709 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2710 {
2711 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2712 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2713 struct kvm_mmu_page *sp;
2714
2715 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2716 struct kvm_mmu_page, link);
2717 kvm_mmu_zap_page(vcpu->kvm, sp);
2718 ++vcpu->kvm->stat.mmu_recycled;
2719 }
2720 }
2721
2722 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2723 {
2724 int r;
2725 enum emulation_result er;
2726
2727 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2728 if (r < 0)
2729 goto out;
2730
2731 if (!r) {
2732 r = 1;
2733 goto out;
2734 }
2735
2736 r = mmu_topup_memory_caches(vcpu);
2737 if (r)
2738 goto out;
2739
2740 er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
2741
2742 switch (er) {
2743 case EMULATE_DONE:
2744 return 1;
2745 case EMULATE_DO_MMIO:
2746 ++vcpu->stat.mmio_exits;
2747 return 0;
2748 case EMULATE_FAIL:
2749 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
2750 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
2751 return 0;
2752 default:
2753 BUG();
2754 }
2755 out:
2756 return r;
2757 }
2758 EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2759
2760 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2761 {
2762 vcpu->arch.mmu.invlpg(vcpu, gva);
2763 kvm_mmu_flush_tlb(vcpu);
2764 ++vcpu->stat.invlpg;
2765 }
2766 EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2767
2768 void kvm_enable_tdp(void)
2769 {
2770 tdp_enabled = true;
2771 }
2772 EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2773
2774 void kvm_disable_tdp(void)
2775 {
2776 tdp_enabled = false;
2777 }
2778 EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2779
2780 static void free_mmu_pages(struct kvm_vcpu *vcpu)
2781 {
2782 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2783 }
2784
2785 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2786 {
2787 struct page *page;
2788 int i;
2789
2790 ASSERT(vcpu);
2791
2792 /*
2793 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2794 * Therefore we need to allocate shadow page tables in the first
2795 * 4GB of memory, which happens to fit the DMA32 zone.
2796 */
2797 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2798 if (!page)
2799 goto error_1;
2800 vcpu->arch.mmu.pae_root = page_address(page);
2801 for (i = 0; i < 4; ++i)
2802 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2803
2804 return 0;
2805
2806 error_1:
2807 free_mmu_pages(vcpu);
2808 return -ENOMEM;
2809 }
2810
2811 int kvm_mmu_create(struct kvm_vcpu *vcpu)
2812 {
2813 ASSERT(vcpu);
2814 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2815
2816 return alloc_mmu_pages(vcpu);
2817 }
2818
2819 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2820 {
2821 ASSERT(vcpu);
2822 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2823
2824 return init_kvm_mmu(vcpu);
2825 }
2826
2827 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2828 {
2829 ASSERT(vcpu);
2830
2831 destroy_kvm_mmu(vcpu);
2832 free_mmu_pages(vcpu);
2833 mmu_free_memory_caches(vcpu);
2834 }
2835
2836 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2837 {
2838 struct kvm_mmu_page *sp;
2839
2840 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2841 int i;
2842 u64 *pt;
2843
2844 if (!test_bit(slot, sp->slot_bitmap))
2845 continue;
2846
2847 pt = sp->spt;
2848 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2849 /* avoid RMW */
2850 if (pt[i] & PT_WRITABLE_MASK)
2851 pt[i] &= ~PT_WRITABLE_MASK;
2852 }
2853 kvm_flush_remote_tlbs(kvm);
2854 }
2855
2856 void kvm_mmu_zap_all(struct kvm *kvm)
2857 {
2858 struct kvm_mmu_page *sp, *node;
2859
2860 spin_lock(&kvm->mmu_lock);
2861 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2862 if (kvm_mmu_zap_page(kvm, sp))
2863 node = container_of(kvm->arch.active_mmu_pages.next,
2864 struct kvm_mmu_page, link);
2865 spin_unlock(&kvm->mmu_lock);
2866
2867 kvm_flush_remote_tlbs(kvm);
2868 }
2869
2870 static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
2871 {
2872 struct kvm_mmu_page *page;
2873
2874 page = container_of(kvm->arch.active_mmu_pages.prev,
2875 struct kvm_mmu_page, link);
2876 kvm_mmu_zap_page(kvm, page);
2877 }
2878
2879 static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
2880 {
2881 struct kvm *kvm;
2882 struct kvm *kvm_freed = NULL;
2883 int cache_count = 0;
2884
2885 spin_lock(&kvm_lock);
2886
2887 list_for_each_entry(kvm, &vm_list, vm_list) {
2888 int npages;
2889
2890 if (!down_read_trylock(&kvm->slots_lock))
2891 continue;
2892 spin_lock(&kvm->mmu_lock);
2893 npages = kvm->arch.n_alloc_mmu_pages -
2894 kvm->arch.n_free_mmu_pages;
2895 cache_count += npages;
2896 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2897 kvm_mmu_remove_one_alloc_mmu_page(kvm);
2898 cache_count--;
2899 kvm_freed = kvm;
2900 }
2901 nr_to_scan--;
2902
2903 spin_unlock(&kvm->mmu_lock);
2904 up_read(&kvm->slots_lock);
2905 }
2906 if (kvm_freed)
2907 list_move_tail(&kvm_freed->vm_list, &vm_list);
2908
2909 spin_unlock(&kvm_lock);
2910
2911 return cache_count;
2912 }
2913
2914 static struct shrinker mmu_shrinker = {
2915 .shrink = mmu_shrink,
2916 .seeks = DEFAULT_SEEKS * 10,
2917 };
2918
2919 static void mmu_destroy_caches(void)
2920 {
2921 if (pte_chain_cache)
2922 kmem_cache_destroy(pte_chain_cache);
2923 if (rmap_desc_cache)
2924 kmem_cache_destroy(rmap_desc_cache);
2925 if (mmu_page_header_cache)
2926 kmem_cache_destroy(mmu_page_header_cache);
2927 }
2928
2929 void kvm_mmu_module_exit(void)
2930 {
2931 mmu_destroy_caches();
2932 unregister_shrinker(&mmu_shrinker);
2933 }
2934
2935 int kvm_mmu_module_init(void)
2936 {
2937 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
2938 sizeof(struct kvm_pte_chain),
2939 0, 0, NULL);
2940 if (!pte_chain_cache)
2941 goto nomem;
2942 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
2943 sizeof(struct kvm_rmap_desc),
2944 0, 0, NULL);
2945 if (!rmap_desc_cache)
2946 goto nomem;
2947
2948 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
2949 sizeof(struct kvm_mmu_page),
2950 0, 0, NULL);
2951 if (!mmu_page_header_cache)
2952 goto nomem;
2953
2954 register_shrinker(&mmu_shrinker);
2955
2956 return 0;
2957
2958 nomem:
2959 mmu_destroy_caches();
2960 return -ENOMEM;
2961 }
2962
2963 /*
2964 * Caculate mmu pages needed for kvm.
2965 */
2966 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
2967 {
2968 int i;
2969 unsigned int nr_mmu_pages;
2970 unsigned int nr_pages = 0;
2971
2972 for (i = 0; i < kvm->nmemslots; i++)
2973 nr_pages += kvm->memslots[i].npages;
2974
2975 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
2976 nr_mmu_pages = max(nr_mmu_pages,
2977 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
2978
2979 return nr_mmu_pages;
2980 }
2981
2982 static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2983 unsigned len)
2984 {
2985 if (len > buffer->len)
2986 return NULL;
2987 return buffer->ptr;
2988 }
2989
2990 static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
2991 unsigned len)
2992 {
2993 void *ret;
2994
2995 ret = pv_mmu_peek_buffer(buffer, len);
2996 if (!ret)
2997 return ret;
2998 buffer->ptr += len;
2999 buffer->len -= len;
3000 buffer->processed += len;
3001 return ret;
3002 }
3003
3004 static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3005 gpa_t addr, gpa_t value)
3006 {
3007 int bytes = 8;
3008 int r;
3009
3010 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3011 bytes = 4;
3012
3013 r = mmu_topup_memory_caches(vcpu);
3014 if (r)
3015 return r;
3016
3017 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3018 return -EFAULT;
3019
3020 return 1;
3021 }
3022
3023 static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3024 {
3025 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3026 return 1;
3027 }
3028
3029 static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3030 {
3031 spin_lock(&vcpu->kvm->mmu_lock);
3032 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3033 spin_unlock(&vcpu->kvm->mmu_lock);
3034 return 1;
3035 }
3036
3037 static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3038 struct kvm_pv_mmu_op_buffer *buffer)
3039 {
3040 struct kvm_mmu_op_header *header;
3041
3042 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3043 if (!header)
3044 return 0;
3045 switch (header->op) {
3046 case KVM_MMU_OP_WRITE_PTE: {
3047 struct kvm_mmu_op_write_pte *wpte;
3048
3049 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3050 if (!wpte)
3051 return 0;
3052 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3053 wpte->pte_val);
3054 }
3055 case KVM_MMU_OP_FLUSH_TLB: {
3056 struct kvm_mmu_op_flush_tlb *ftlb;
3057
3058 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3059 if (!ftlb)
3060 return 0;
3061 return kvm_pv_mmu_flush_tlb(vcpu);
3062 }
3063 case KVM_MMU_OP_RELEASE_PT: {
3064 struct kvm_mmu_op_release_pt *rpt;
3065
3066 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3067 if (!rpt)
3068 return 0;
3069 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3070 }
3071 default: return 0;
3072 }
3073 }
3074
3075 int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3076 gpa_t addr, unsigned long *ret)
3077 {
3078 int r;
3079 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3080
3081 buffer->ptr = buffer->buf;
3082 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3083 buffer->processed = 0;
3084
3085 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3086 if (r)
3087 goto out;
3088
3089 while (buffer->len) {
3090 r = kvm_pv_mmu_op_one(vcpu, buffer);
3091 if (r < 0)
3092 goto out;
3093 if (r == 0)
3094 break;
3095 }
3096
3097 r = 1;
3098 out:
3099 *ret = buffer->processed;
3100 return r;
3101 }
3102
3103 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3104 {
3105 struct kvm_shadow_walk_iterator iterator;
3106 int nr_sptes = 0;
3107
3108 spin_lock(&vcpu->kvm->mmu_lock);
3109 for_each_shadow_entry(vcpu, addr, iterator) {
3110 sptes[iterator.level-1] = *iterator.sptep;
3111 nr_sptes++;
3112 if (!is_shadow_present_pte(*iterator.sptep))
3113 break;
3114 }
3115 spin_unlock(&vcpu->kvm->mmu_lock);
3116
3117 return nr_sptes;
3118 }
3119 EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3120
3121 #ifdef AUDIT
3122
3123 static const char *audit_msg;
3124
3125 static gva_t canonicalize(gva_t gva)
3126 {
3127 #ifdef CONFIG_X86_64
3128 gva = (long long)(gva << 16) >> 16;
3129 #endif
3130 return gva;
3131 }
3132
3133
3134 typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
3135 u64 *sptep);
3136
3137 static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3138 inspect_spte_fn fn)
3139 {
3140 int i;
3141
3142 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3143 u64 ent = sp->spt[i];
3144
3145 if (is_shadow_present_pte(ent)) {
3146 if (!is_last_spte(ent, sp->role.level)) {
3147 struct kvm_mmu_page *child;
3148 child = page_header(ent & PT64_BASE_ADDR_MASK);
3149 __mmu_spte_walk(kvm, child, fn);
3150 } else
3151 fn(kvm, sp, &sp->spt[i]);
3152 }
3153 }
3154 }
3155
3156 static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3157 {
3158 int i;
3159 struct kvm_mmu_page *sp;
3160
3161 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3162 return;
3163 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3164 hpa_t root = vcpu->arch.mmu.root_hpa;
3165 sp = page_header(root);
3166 __mmu_spte_walk(vcpu->kvm, sp, fn);
3167 return;
3168 }
3169 for (i = 0; i < 4; ++i) {
3170 hpa_t root = vcpu->arch.mmu.pae_root[i];
3171
3172 if (root && VALID_PAGE(root)) {
3173 root &= PT64_BASE_ADDR_MASK;
3174 sp = page_header(root);
3175 __mmu_spte_walk(vcpu->kvm, sp, fn);
3176 }
3177 }
3178 return;
3179 }
3180
3181 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3182 gva_t va, int level)
3183 {
3184 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3185 int i;
3186 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3187
3188 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3189 u64 ent = pt[i];
3190
3191 if (ent == shadow_trap_nonpresent_pte)
3192 continue;
3193
3194 va = canonicalize(va);
3195 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3196 audit_mappings_page(vcpu, ent, va, level - 1);
3197 else {
3198 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
3199 gfn_t gfn = gpa >> PAGE_SHIFT;
3200 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3201 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3202
3203 if (is_error_pfn(pfn)) {
3204 kvm_release_pfn_clean(pfn);
3205 continue;
3206 }
3207
3208 if (is_shadow_present_pte(ent)
3209 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3210 printk(KERN_ERR "xx audit error: (%s) levels %d"
3211 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3212 audit_msg, vcpu->arch.mmu.root_level,
3213 va, gpa, hpa, ent,
3214 is_shadow_present_pte(ent));
3215 else if (ent == shadow_notrap_nonpresent_pte
3216 && !is_error_hpa(hpa))
3217 printk(KERN_ERR "audit: (%s) notrap shadow,"
3218 " valid guest gva %lx\n", audit_msg, va);
3219 kvm_release_pfn_clean(pfn);
3220
3221 }
3222 }
3223 }
3224
3225 static void audit_mappings(struct kvm_vcpu *vcpu)
3226 {
3227 unsigned i;
3228
3229 if (vcpu->arch.mmu.root_level == 4)
3230 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3231 else
3232 for (i = 0; i < 4; ++i)
3233 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3234 audit_mappings_page(vcpu,
3235 vcpu->arch.mmu.pae_root[i],
3236 i << 30,
3237 2);
3238 }
3239
3240 static int count_rmaps(struct kvm_vcpu *vcpu)
3241 {
3242 int nmaps = 0;
3243 int i, j, k;
3244
3245 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3246 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
3247 struct kvm_rmap_desc *d;
3248
3249 for (j = 0; j < m->npages; ++j) {
3250 unsigned long *rmapp = &m->rmap[j];
3251
3252 if (!*rmapp)
3253 continue;
3254 if (!(*rmapp & 1)) {
3255 ++nmaps;
3256 continue;
3257 }
3258 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3259 while (d) {
3260 for (k = 0; k < RMAP_EXT; ++k)
3261 if (d->sptes[k])
3262 ++nmaps;
3263 else
3264 break;
3265 d = d->more;
3266 }
3267 }
3268 }
3269 return nmaps;
3270 }
3271
3272 void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
3273 {
3274 unsigned long *rmapp;
3275 struct kvm_mmu_page *rev_sp;
3276 gfn_t gfn;
3277
3278 if (*sptep & PT_WRITABLE_MASK) {
3279 rev_sp = page_header(__pa(sptep));
3280 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3281
3282 if (!gfn_to_memslot(kvm, gfn)) {
3283 if (!printk_ratelimit())
3284 return;
3285 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3286 audit_msg, gfn);
3287 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3288 audit_msg, sptep - rev_sp->spt,
3289 rev_sp->gfn);
3290 dump_stack();
3291 return;
3292 }
3293
3294 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3295 is_large_pte(*sptep));
3296 if (!*rmapp) {
3297 if (!printk_ratelimit())
3298 return;
3299 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3300 audit_msg, *sptep);
3301 dump_stack();
3302 }
3303 }
3304
3305 }
3306
3307 void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3308 {
3309 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3310 }
3311
3312 static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3313 {
3314 struct kvm_mmu_page *sp;
3315 int i;
3316
3317 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3318 u64 *pt = sp->spt;
3319
3320 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3321 continue;
3322
3323 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3324 u64 ent = pt[i];
3325
3326 if (!(ent & PT_PRESENT_MASK))
3327 continue;
3328 if (!(ent & PT_WRITABLE_MASK))
3329 continue;
3330 inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
3331 }
3332 }
3333 return;
3334 }
3335
3336 static void audit_rmap(struct kvm_vcpu *vcpu)
3337 {
3338 check_writable_mappings_rmap(vcpu);
3339 count_rmaps(vcpu);
3340 }
3341
3342 static void audit_write_protection(struct kvm_vcpu *vcpu)
3343 {
3344 struct kvm_mmu_page *sp;
3345 struct kvm_memory_slot *slot;
3346 unsigned long *rmapp;
3347 u64 *spte;
3348 gfn_t gfn;
3349
3350 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3351 if (sp->role.direct)
3352 continue;
3353 if (sp->unsync)
3354 continue;
3355
3356 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3357 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3358 rmapp = &slot->rmap[gfn - slot->base_gfn];
3359
3360 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3361 while (spte) {
3362 if (*spte & PT_WRITABLE_MASK)
3363 printk(KERN_ERR "%s: (%s) shadow page has "
3364 "writable mappings: gfn %lx role %x\n",
3365 __func__, audit_msg, sp->gfn,
3366 sp->role.word);
3367 spte = rmap_next(vcpu->kvm, rmapp, spte);
3368 }
3369 }
3370 }
3371
3372 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3373 {
3374 int olddbg = dbg;
3375
3376 dbg = 0;
3377 audit_msg = msg;
3378 audit_rmap(vcpu);
3379 audit_write_protection(vcpu);
3380 if (strcmp("pre pte write", audit_msg) != 0)
3381 audit_mappings(vcpu);
3382 audit_writable_sptes_have_rmaps(vcpu);
3383 dbg = olddbg;
3384 }
3385
3386 #endif
Support for the Chinese Samsung S3C2440 based development boards