drivers/char/rocket.c

   1 /*
   2  * RocketPort device driver for Linux
   3  *
   4  * Written by Theodore Ts'o, 1995, 1996, 1997, 1998, 1999, 2000.
   5  *
   6  * Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2003 by Comtrol, Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of the
  11  * License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 /*
  24  * Kernel Synchronization:
  25  *
  26  * This driver has 2 kernel control paths - exception handlers (calls into the driver
  27  * from user mode) and the timer bottom half (tasklet).  This is a polled driver, interrupts
  28  * are not used.
  29  *
  30  * Critical data:
  31  * -  rp_table[], accessed through passed "info" pointers, is a global (static) array of
  32  *    serial port state information and the xmit_buf circular buffer.  Protected by
  33  *    a per port spinlock.
  34  * -  xmit_flags[], an array of ints indexed by line (port) number, indicating that there
  35  *    is data to be transmitted.  Protected by atomic bit operations.
  36  * -  rp_num_ports, int indicating number of open ports, protected by atomic operations.
  37  *
  38  * rp_write() and rp_write_char() functions use a per port semaphore to protect against
  39  * simultaneous access to the same port by more than one process.
  40  */
  41
  42 /****** Defines ******/
  43 #define ROCKET_PARANOIA_CHECK
  44 #define ROCKET_DISABLE_SIMUSAGE
  45
  46 #undef ROCKET_SOFT_FLOW
  47 #undef ROCKET_DEBUG_OPEN
  48 #undef ROCKET_DEBUG_INTR
  49 #undef ROCKET_DEBUG_WRITE
  50 #undef ROCKET_DEBUG_FLOW
  51 #undef ROCKET_DEBUG_THROTTLE
  52 #undef ROCKET_DEBUG_WAIT_UNTIL_SENT
  53 #undef ROCKET_DEBUG_RECEIVE
  54 #undef ROCKET_DEBUG_HANGUP
  55 #undef REV_PCI_ORDER
  56 #undef ROCKET_DEBUG_IO
  57
  58 #define POLL_PERIOD HZ/100      /*  Polling period .01 seconds (10ms) */
  59
  60 /****** Kernel includes ******/
  61
  62 #include <linux/module.h>
  63 #include <linux/errno.h>
  64 #include <linux/major.h>
  65 #include <linux/kernel.h>
  66 #include <linux/signal.h>
  67 #include <linux/slab.h>
  68 #include <linux/mm.h>
  69 #include <linux/sched.h>
  70 #include <linux/timer.h>
  71 #include <linux/interrupt.h>
  72 #include <linux/tty.h>
  73 #include <linux/tty_driver.h>
  74 #include <linux/tty_flip.h>
  75 #include <linux/serial.h>
  76 #include <linux/string.h>
  77 #include <linux/fcntl.h>
  78 #include <linux/ptrace.h>
  79 #include <linux/mutex.h>
  80 #include <linux/ioport.h>
  81 #include <linux/delay.h>
  82 #include <linux/completion.h>
  83 #include <linux/wait.h>
  84 #include <linux/pci.h>
  85 #include <linux/uaccess.h>
  86 #include <asm/atomic.h>
  87 #include <asm/unaligned.h>
  88 #include <linux/bitops.h>
  89 #include <linux/spinlock.h>
  90 #include <linux/init.h>
  91
  92 /****** RocketPort includes ******/
  93
  94 #include "rocket_int.h"
  95 #include "rocket.h"
  96
  97 #define ROCKET_VERSION "2.09"
  98 #define ROCKET_DATE "12-June-2003"
  99
 100 /****** RocketPort Local Variables ******/
 101
 102 static void rp_do_poll(unsigned long dummy);
 103
 104 static struct tty_driver *rocket_driver;
 105
 106 static struct rocket_version driver_version = {
 107         ROCKET_VERSION, ROCKET_DATE
 108 };
 109
 110 static struct r_port *rp_table[MAX_RP_PORTS];          /*  The main repository of serial port state information. */
 111 static unsigned int xmit_flags[NUM_BOARDS];            /*  Bit significant, indicates port had data to transmit. */
 112                                                        /*  eg.  Bit 0 indicates port 0 has xmit data, ...        */
 113 static atomic_t rp_num_ports_open;                     /*  Number of serial ports open                           */
 114 static DEFINE_TIMER(rocket_timer, rp_do_poll, 0, 0);
 115
 116 static unsigned long board1;                           /* ISA addresses, retrieved from rocketport.conf          */
 117 static unsigned long board2;
 118 static unsigned long board3;
 119 static unsigned long board4;
 120 static unsigned long controller;
 121 static int support_low_speed;
 122 static unsigned long modem1;
 123 static unsigned long modem2;
 124 static unsigned long modem3;
 125 static unsigned long modem4;
 126 static unsigned long pc104_1[8];
 127 static unsigned long pc104_2[8];
 128 static unsigned long pc104_3[8];
 129 static unsigned long pc104_4[8];
 130 static unsigned long *pc104[4] = { pc104_1, pc104_2, pc104_3, pc104_4 };
 131
 132 static int rp_baud_base[NUM_BOARDS];                   /*  Board config info (Someday make a per-board structure)  */
 133 static unsigned long rcktpt_io_addr[NUM_BOARDS];
 134 static int rcktpt_type[NUM_BOARDS];
 135 static int is_PCI[NUM_BOARDS];
 136 static rocketModel_t rocketModel[NUM_BOARDS];
 137 static int max_board;
 138
 139 /*
 140  * The following arrays define the interrupt bits corresponding to each AIOP.
 141  * These bits are different between the ISA and regular PCI boards and the
 142  * Universal PCI boards.
 143  */
 144
 145 static Word_t aiop_intr_bits[AIOP_CTL_SIZE] = {
 146         AIOP_INTR_BIT_0,
 147         AIOP_INTR_BIT_1,
 148         AIOP_INTR_BIT_2,
 149         AIOP_INTR_BIT_3
 150 };
 151
 152 static Word_t upci_aiop_intr_bits[AIOP_CTL_SIZE] = {
 153         UPCI_AIOP_INTR_BIT_0,
 154         UPCI_AIOP_INTR_BIT_1,
 155         UPCI_AIOP_INTR_BIT_2,
 156         UPCI_AIOP_INTR_BIT_3
 157 };
 158
 159 static Byte_t RData[RDATASIZE] = {
 160         0x00, 0x09, 0xf6, 0x82,
 161         0x02, 0x09, 0x86, 0xfb,
 162         0x04, 0x09, 0x00, 0x0a,
 163         0x06, 0x09, 0x01, 0x0a,
 164         0x08, 0x09, 0x8a, 0x13,
 165         0x0a, 0x09, 0xc5, 0x11,
 166         0x0c, 0x09, 0x86, 0x85,
 167         0x0e, 0x09, 0x20, 0x0a,
 168         0x10, 0x09, 0x21, 0x0a,
 169         0x12, 0x09, 0x41, 0xff,
 170         0x14, 0x09, 0x82, 0x00,
 171         0x16, 0x09, 0x82, 0x7b,
 172         0x18, 0x09, 0x8a, 0x7d,
 173         0x1a, 0x09, 0x88, 0x81,
 174         0x1c, 0x09, 0x86, 0x7a,
 175         0x1e, 0x09, 0x84, 0x81,
 176         0x20, 0x09, 0x82, 0x7c,
 177         0x22, 0x09, 0x0a, 0x0a
 178 };
 179
 180 static Byte_t RRegData[RREGDATASIZE] = {
 181         0x00, 0x09, 0xf6, 0x82, /* 00: Stop Rx processor */
 182         0x08, 0x09, 0x8a, 0x13, /* 04: Tx software flow control */
 183         0x0a, 0x09, 0xc5, 0x11, /* 08: XON char */
 184         0x0c, 0x09, 0x86, 0x85, /* 0c: XANY */
 185         0x12, 0x09, 0x41, 0xff, /* 10: Rx mask char */
 186         0x14, 0x09, 0x82, 0x00, /* 14: Compare/Ignore #0 */
 187         0x16, 0x09, 0x82, 0x7b, /* 18: Compare #1 */
 188         0x18, 0x09, 0x8a, 0x7d, /* 1c: Compare #2 */
 189         0x1a, 0x09, 0x88, 0x81, /* 20: Interrupt #1 */
 190         0x1c, 0x09, 0x86, 0x7a, /* 24: Ignore/Replace #1 */
 191         0x1e, 0x09, 0x84, 0x81, /* 28: Interrupt #2 */
 192         0x20, 0x09, 0x82, 0x7c, /* 2c: Ignore/Replace #2 */
 193         0x22, 0x09, 0x0a, 0x0a  /* 30: Rx FIFO Enable */
 194 };
 195
 196 static CONTROLLER_T sController[CTL_SIZE] = {
 197         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 198          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 199         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 200          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 201         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 202          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}},
 203         {-1, -1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, {0, 0, 0, 0},
 204          {0, 0, 0, 0}, {-1, -1, -1, -1}, {0, 0, 0, 0}}
 205 };
 206
 207 static Byte_t sBitMapClrTbl[8] = {
 208         0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f
 209 };
 210
 211 static Byte_t sBitMapSetTbl[8] = {
 212         0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
 213 };
 214
 215 static int sClockPrescale = 0x14;
 216
 217 /*
 218  *  Line number is the ttySIx number (x), the Minor number.  We
 219  *  assign them sequentially, starting at zero.  The following
 220  *  array keeps track of the line number assigned to a given board/aiop/channel.
 221  */
 222 static unsigned char lineNumbers[MAX_RP_PORTS];
 223 static unsigned long nextLineNumber;
 224
 225 /*****  RocketPort Static Prototypes   *********/
 226 static int __init init_ISA(int i);
 227 static void rp_wait_until_sent(struct tty_struct *tty, int timeout);
 228 static void rp_flush_buffer(struct tty_struct *tty);
 229 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model);
 230 static unsigned char GetLineNumber(int ctrl, int aiop, int ch);
 231 static unsigned char SetLineNumber(int ctrl, int aiop, int ch);
 232 static void rp_start(struct tty_struct *tty);
 233 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
 234                      int ChanNum);
 235 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode);
 236 static void sFlushRxFIFO(CHANNEL_T * ChP);
 237 static void sFlushTxFIFO(CHANNEL_T * ChP);
 238 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags);
 239 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags);
 240 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on);
 241 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on);
 242 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data);
 243 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
 244                               ByteIO_t * AiopIOList, int AiopIOListSize,
 245                               WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
 246                               int PeriodicOnly, int altChanRingIndicator,
 247                               int UPCIRingInd);
 248 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
 249                            ByteIO_t * AiopIOList, int AiopIOListSize,
 250                            int IRQNum, Byte_t Frequency, int PeriodicOnly);
 251 static int sReadAiopID(ByteIO_t io);
 252 static int sReadAiopNumChan(WordIO_t io);
 253
 254 MODULE_AUTHOR("Theodore Ts'o");
 255 MODULE_DESCRIPTION("Comtrol RocketPort driver");
 256 module_param(board1, ulong, 0);
 257 MODULE_PARM_DESC(board1, "I/O port for (ISA) board #1");
 258 module_param(board2, ulong, 0);
 259 MODULE_PARM_DESC(board2, "I/O port for (ISA) board #2");
 260 module_param(board3, ulong, 0);
 261 MODULE_PARM_DESC(board3, "I/O port for (ISA) board #3");
 262 module_param(board4, ulong, 0);
 263 MODULE_PARM_DESC(board4, "I/O port for (ISA) board #4");
 264 module_param(controller, ulong, 0);
 265 MODULE_PARM_DESC(controller, "I/O port for (ISA) rocketport controller");
 266 module_param(support_low_speed, bool, 0);
 267 MODULE_PARM_DESC(support_low_speed, "1 means support 50 baud, 0 means support 460400 baud");
 268 module_param(modem1, ulong, 0);
 269 MODULE_PARM_DESC(modem1, "1 means (ISA) board #1 is a RocketModem");
 270 module_param(modem2, ulong, 0);
 271 MODULE_PARM_DESC(modem2, "1 means (ISA) board #2 is a RocketModem");
 272 module_param(modem3, ulong, 0);
 273 MODULE_PARM_DESC(modem3, "1 means (ISA) board #3 is a RocketModem");
 274 module_param(modem4, ulong, 0);
 275 MODULE_PARM_DESC(modem4, "1 means (ISA) board #4 is a RocketModem");
 276 module_param_array(pc104_1, ulong, NULL, 0);
 277 MODULE_PARM_DESC(pc104_1, "set interface types for ISA(PC104) board #1 (e.g. pc104_1=232,232,485,485,...");
 278 module_param_array(pc104_2, ulong, NULL, 0);
 279 MODULE_PARM_DESC(pc104_2, "set interface types for ISA(PC104) board #2 (e.g. pc104_2=232,232,485,485,...");
 280 module_param_array(pc104_3, ulong, NULL, 0);
 281 MODULE_PARM_DESC(pc104_3, "set interface types for ISA(PC104) board #3 (e.g. pc104_3=232,232,485,485,...");
 282 module_param_array(pc104_4, ulong, NULL, 0);
 283 MODULE_PARM_DESC(pc104_4, "set interface types for ISA(PC104) board #4 (e.g. pc104_4=232,232,485,485,...");
 284
 285 static int rp_init(void);
 286 static void rp_cleanup_module(void);
 287
 288 module_init(rp_init);
 289 module_exit(rp_cleanup_module);
 290
 291
 292 MODULE_LICENSE("Dual BSD/GPL");
 293
 294 /*************************************************************************/
 295 /*                     Module code starts here                           */
 296
 297 static inline int rocket_paranoia_check(struct r_port *info,
 298                                         const char *routine)
 299 {
 300 #ifdef ROCKET_PARANOIA_CHECK
 301         if (!info)
 302                 return 1;
 303         if (info->magic != RPORT_MAGIC) {
 304                 printk(KERN_WARNING "Warning: bad magic number for rocketport "
 305                                 "struct in %s\n", routine);
 306                 return 1;
 307         }
 308 #endif
 309         return 0;
 310 }
 311
 312
 313 /*  Serial port receive data function.  Called (from timer poll) when an AIOPIC signals
 314  *  that receive data is present on a serial port.  Pulls data from FIFO, moves it into the
 315  *  tty layer.
 316  */
 317 static void rp_do_receive(struct r_port *info,
 318                           struct tty_struct *tty,
 319                           CHANNEL_t * cp, unsigned int ChanStatus)
 320 {
 321         unsigned int CharNStat;
 322         int ToRecv, wRecv, space;
 323         unsigned char *cbuf;
 324
 325         ToRecv = sGetRxCnt(cp);
 326 #ifdef ROCKET_DEBUG_INTR
 327         printk(KERN_INFO "rp_do_receive(%d)...\n", ToRecv);
 328 #endif
 329         if (ToRecv == 0)
 330                 return;
 331
 332         /*
 333          * if status indicates there are errored characters in the
 334          * FIFO, then enter status mode (a word in FIFO holds
 335          * character and status).
 336          */
 337         if (ChanStatus & (RXFOVERFL | RXBREAK | RXFRAME | RXPARITY)) {
 338                 if (!(ChanStatus & STATMODE)) {
 339 #ifdef ROCKET_DEBUG_RECEIVE
 340                         printk(KERN_INFO "Entering STATMODE...\n");
 341 #endif
 342                         ChanStatus |= STATMODE;
 343                         sEnRxStatusMode(cp);
 344                 }
 345         }
 346
 347         /*
 348          * if we previously entered status mode, then read down the
 349          * FIFO one word at a time, pulling apart the character and
 350          * the status.  Update error counters depending on status
 351          */
 352         if (ChanStatus & STATMODE) {
 353 #ifdef ROCKET_DEBUG_RECEIVE
 354                 printk(KERN_INFO "Ignore %x, read %x...\n",
 355                         info->ignore_status_mask, info->read_status_mask);
 356 #endif
 357                 while (ToRecv) {
 358                         char flag;
 359
 360                         CharNStat = sInW(sGetTxRxDataIO(cp));
 361 #ifdef ROCKET_DEBUG_RECEIVE
 362                         printk(KERN_INFO "%x...\n", CharNStat);
 363 #endif
 364                         if (CharNStat & STMBREAKH)
 365                                 CharNStat &= ~(STMFRAMEH | STMPARITYH);
 366                         if (CharNStat & info->ignore_status_mask) {
 367                                 ToRecv--;
 368                                 continue;
 369                         }
 370                         CharNStat &= info->read_status_mask;
 371                         if (CharNStat & STMBREAKH)
 372                                 flag = TTY_BREAK;
 373                         else if (CharNStat & STMPARITYH)
 374                                 flag = TTY_PARITY;
 375                         else if (CharNStat & STMFRAMEH)
 376                                 flag = TTY_FRAME;
 377                         else if (CharNStat & STMRCVROVRH)
 378                                 flag = TTY_OVERRUN;
 379                         else
 380                                 flag = TTY_NORMAL;
 381                         tty_insert_flip_char(tty, CharNStat & 0xff, flag);
 382                         ToRecv--;
 383                 }
 384
 385                 /*
 386                  * after we've emptied the FIFO in status mode, turn
 387                  * status mode back off
 388                  */
 389                 if (sGetRxCnt(cp) == 0) {
 390 #ifdef ROCKET_DEBUG_RECEIVE
 391                         printk(KERN_INFO "Status mode off.\n");
 392 #endif
 393                         sDisRxStatusMode(cp);
 394                 }
 395         } else {
 396                 /*
 397                  * we aren't in status mode, so read down the FIFO two
 398                  * characters at time by doing repeated word IO
 399                  * transfer.
 400                  */
 401                 space = tty_prepare_flip_string(tty, &cbuf, ToRecv);
 402                 if (space < ToRecv) {
 403 #ifdef ROCKET_DEBUG_RECEIVE
 404                         printk(KERN_INFO "rp_do_receive:insufficient space ToRecv=%d space=%d\n", ToRecv, space);
 405 #endif
 406                         if (space <= 0)
 407                                 return;
 408                         ToRecv = space;
 409                 }
 410                 wRecv = ToRecv >> 1;
 411                 if (wRecv)
 412                         sInStrW(sGetTxRxDataIO(cp), (unsigned short *) cbuf, wRecv);
 413                 if (ToRecv & 1)
 414                         cbuf[ToRecv - 1] = sInB(sGetTxRxDataIO(cp));
 415         }
 416         /*  Push the data up to the tty layer */
 417         tty_flip_buffer_push(tty);
 418 }
 419
 420 /*
 421  *  Serial port transmit data function.  Called from the timer polling loop as a
 422  *  result of a bit set in xmit_flags[], indicating data (from the tty layer) is ready
 423  *  to be sent out the serial port.  Data is buffered in rp_table[line].xmit_buf, it is
 424  *  moved to the port's xmit FIFO.  *info is critical data, protected by spinlocks.
 425  */
 426 static void rp_do_transmit(struct r_port *info)
 427 {
 428         int c;
 429         CHANNEL_t *cp = &info->channel;
 430         struct tty_struct *tty;
 431         unsigned long flags;
 432
 433 #ifdef ROCKET_DEBUG_INTR
 434         printk(KERN_DEBUG "%s\n", __func__);
 435 #endif
 436         if (!info)
 437                 return;
 438         if (!info->port.tty) {
 439                 printk(KERN_WARNING "rp: WARNING %s called with "
 440                                 "info->port.tty==NULL\n", __func__);
 441                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 442                 return;
 443         }
 444
 445         spin_lock_irqsave(&info->slock, flags);
 446         tty = info->port.tty;
 447         info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
 448
 449         /*  Loop sending data to FIFO until done or FIFO full */
 450         while (1) {
 451                 if (tty->stopped || tty->hw_stopped)
 452                         break;
 453                 c = min(info->xmit_fifo_room, info->xmit_cnt);
 454                 c = min(c, XMIT_BUF_SIZE - info->xmit_tail);
 455                 if (c <= 0 || info->xmit_fifo_room <= 0)
 456                         break;
 457                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) (info->xmit_buf + info->xmit_tail), c / 2);
 458                 if (c & 1)
 459                         sOutB(sGetTxRxDataIO(cp), info->xmit_buf[info->xmit_tail + c - 1]);
 460                 info->xmit_tail += c;
 461                 info->xmit_tail &= XMIT_BUF_SIZE - 1;
 462                 info->xmit_cnt -= c;
 463                 info->xmit_fifo_room -= c;
 464 #ifdef ROCKET_DEBUG_INTR
 465                 printk(KERN_INFO "tx %d chars...\n", c);
 466 #endif
 467         }
 468
 469         if (info->xmit_cnt == 0)
 470                 clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
 471
 472         if (info->xmit_cnt < WAKEUP_CHARS) {
 473                 tty_wakeup(tty);
 474 #ifdef ROCKETPORT_HAVE_POLL_WAIT
 475                 wake_up_interruptible(&tty->poll_wait);
 476 #endif
 477         }
 478
 479         spin_unlock_irqrestore(&info->slock, flags);
 480
 481 #ifdef ROCKET_DEBUG_INTR
 482         printk(KERN_DEBUG "(%d,%d,%d,%d)...\n", info->xmit_cnt, info->xmit_head,
 483                info->xmit_tail, info->xmit_fifo_room);
 484 #endif
 485 }
 486
 487 /*
 488  *  Called when a serial port signals it has read data in it's RX FIFO.
 489  *  It checks what interrupts are pending and services them, including
 490  *  receiving serial data.
 491  */
 492 static void rp_handle_port(struct r_port *info)
 493 {
 494         CHANNEL_t *cp;
 495         struct tty_struct *tty;
 496         unsigned int IntMask, ChanStatus;
 497
 498         if (!info)
 499                 return;
 500
 501         if ((info->flags & ROCKET_INITIALIZED) == 0) {
 502                 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
 503                                 "info->flags & NOT_INIT\n");
 504                 return;
 505         }
 506         if (!info->port.tty) {
 507                 printk(KERN_WARNING "rp: WARNING: rp_handle_port called with "
 508                                 "info->port.tty==NULL\n");
 509                 return;
 510         }
 511         cp = &info->channel;
 512         tty = info->port.tty;
 513
 514         IntMask = sGetChanIntID(cp) & info->intmask;
 515 #ifdef ROCKET_DEBUG_INTR
 516         printk(KERN_INFO "rp_interrupt %02x...\n", IntMask);
 517 #endif
 518         ChanStatus = sGetChanStatus(cp);
 519         if (IntMask & RXF_TRIG) {       /* Rx FIFO trigger level */
 520                 rp_do_receive(info, tty, cp, ChanStatus);
 521         }
 522         if (IntMask & DELTA_CD) {       /* CD change  */
 523 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_INTR) || defined(ROCKET_DEBUG_HANGUP))
 524                 printk(KERN_INFO "ttyR%d CD now %s...\n", info->line,
 525                        (ChanStatus & CD_ACT) ? "on" : "off");
 526 #endif
 527                 if (!(ChanStatus & CD_ACT) && info->cd_status) {
 528 #ifdef ROCKET_DEBUG_HANGUP
 529                         printk(KERN_INFO "CD drop, calling hangup.\n");
 530 #endif
 531                         tty_hangup(tty);
 532                 }
 533                 info->cd_status = (ChanStatus & CD_ACT) ? 1 : 0;
 534                 wake_up_interruptible(&info->port.open_wait);
 535         }
 536 #ifdef ROCKET_DEBUG_INTR
 537         if (IntMask & DELTA_CTS) {      /* CTS change */
 538                 printk(KERN_INFO "CTS change...\n");
 539         }
 540         if (IntMask & DELTA_DSR) {      /* DSR change */
 541                 printk(KERN_INFO "DSR change...\n");
 542         }
 543 #endif
 544 }
 545
 546 /*
 547  *  The top level polling routine.  Repeats every 1/100 HZ (10ms).
 548  */
 549 static void rp_do_poll(unsigned long dummy)
 550 {
 551         CONTROLLER_t *ctlp;
 552         int ctrl, aiop, ch, line;
 553         unsigned int xmitmask, i;
 554         unsigned int CtlMask;
 555         unsigned char AiopMask;
 556         Word_t bit;
 557
 558         /*  Walk through all the boards (ctrl's) */
 559         for (ctrl = 0; ctrl < max_board; ctrl++) {
 560                 if (rcktpt_io_addr[ctrl] <= 0)
 561                         continue;
 562
 563                 /*  Get a ptr to the board's control struct */
 564                 ctlp = sCtlNumToCtlPtr(ctrl);
 565
 566                 /*  Get the interrupt status from the board */
 567 #ifdef CONFIG_PCI
 568                 if (ctlp->BusType == isPCI)
 569                         CtlMask = sPCIGetControllerIntStatus(ctlp);
 570                 else
 571 #endif
 572                         CtlMask = sGetControllerIntStatus(ctlp);
 573
 574                 /*  Check if any AIOP read bits are set */
 575                 for (aiop = 0; CtlMask; aiop++) {
 576                         bit = ctlp->AiopIntrBits[aiop];
 577                         if (CtlMask & bit) {
 578                                 CtlMask &= ~bit;
 579                                 AiopMask = sGetAiopIntStatus(ctlp, aiop);
 580
 581                                 /*  Check if any port read bits are set */
 582                                 for (ch = 0; AiopMask;  AiopMask >>= 1, ch++) {
 583                                         if (AiopMask & 1) {
 584
 585                                                 /*  Get the line number (/dev/ttyRx number). */
 586                                                 /*  Read the data from the port. */
 587                                                 line = GetLineNumber(ctrl, aiop, ch);
 588                                                 rp_handle_port(rp_table[line]);
 589                                         }
 590                                 }
 591                         }
 592                 }
 593
 594                 xmitmask = xmit_flags[ctrl];
 595
 596                 /*
 597                  *  xmit_flags contains bit-significant flags, indicating there is data
 598                  *  to xmit on the port. Bit 0 is port 0 on this board, bit 1 is port
 599                  *  1, ... (32 total possible).  The variable i has the aiop and ch
 600                  *  numbers encoded in it (port 0-7 are aiop0, 8-15 are aiop1, etc).
 601                  */
 602                 if (xmitmask) {
 603                         for (i = 0; i < rocketModel[ctrl].numPorts; i++) {
 604                                 if (xmitmask & (1 << i)) {
 605                                         aiop = (i & 0x18) >> 3;
 606                                         ch = i & 0x07;
 607                                         line = GetLineNumber(ctrl, aiop, ch);
 608                                         rp_do_transmit(rp_table[line]);
 609                                 }
 610                         }
 611                 }
 612         }
 613
 614         /*
 615          * Reset the timer so we get called at the next clock tick (10ms).
 616          */
 617         if (atomic_read(&rp_num_ports_open))
 618                 mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
 619 }
 620
 621 /*
 622  *  Initializes the r_port structure for a port, as well as enabling the port on
 623  *  the board.
 624  *  Inputs:  board, aiop, chan numbers
 625  */
 626 static void init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
 627 {
 628         unsigned rocketMode;
 629         struct r_port *info;
 630         int line;
 631         CONTROLLER_T *ctlp;
 632
 633         /*  Get the next available line number */
 634         line = SetLineNumber(board, aiop, chan);
 635
 636         ctlp = sCtlNumToCtlPtr(board);
 637
 638         /*  Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
 639         info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
 640         if (!info) {
 641                 printk(KERN_ERR "Couldn't allocate info struct for line #%d\n",
 642                                 line);
 643                 return;
 644         }
 645
 646         info->magic = RPORT_MAGIC;
 647         info->line = line;
 648         info->ctlp = ctlp;
 649         info->board = board;
 650         info->aiop = aiop;
 651         info->chan = chan;
 652         info->port.closing_wait = 3000;
 653         info->port.close_delay = 50;
 654         init_waitqueue_head(&info->port.open_wait);
 655         init_completion(&info->close_wait);
 656         info->flags &= ~ROCKET_MODE_MASK;
 657         switch (pc104[board][line]) {
 658         case 422:
 659                 info->flags |= ROCKET_MODE_RS422;
 660                 break;
 661         case 485:
 662                 info->flags |= ROCKET_MODE_RS485;
 663                 break;
 664         case 232:
 665         default:
 666                 info->flags |= ROCKET_MODE_RS232;
 667                 break;
 668         }
 669
 670         info->intmask = RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR;
 671         if (sInitChan(ctlp, &info->channel, aiop, chan) == 0) {
 672                 printk(KERN_ERR "RocketPort sInitChan(%d, %d, %d) failed!\n",
 673                                 board, aiop, chan);
 674                 kfree(info);
 675                 return;
 676         }
 677
 678         rocketMode = info->flags & ROCKET_MODE_MASK;
 679
 680         if ((info->flags & ROCKET_RTS_TOGGLE) || (rocketMode == ROCKET_MODE_RS485))
 681                 sEnRTSToggle(&info->channel);
 682         else
 683                 sDisRTSToggle(&info->channel);
 684
 685         if (ctlp->boardType == ROCKET_TYPE_PC104) {
 686                 switch (rocketMode) {
 687                 case ROCKET_MODE_RS485:
 688                         sSetInterfaceMode(&info->channel, InterfaceModeRS485);
 689                         break;
 690                 case ROCKET_MODE_RS422:
 691                         sSetInterfaceMode(&info->channel, InterfaceModeRS422);
 692                         break;
 693                 case ROCKET_MODE_RS232:
 694                 default:
 695                         if (info->flags & ROCKET_RTS_TOGGLE)
 696                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232T);
 697                         else
 698                                 sSetInterfaceMode(&info->channel, InterfaceModeRS232);
 699                         break;
 700                 }
 701         }
 702         spin_lock_init(&info->slock);
 703         mutex_init(&info->write_mtx);
 704         rp_table[line] = info;
 705         tty_register_device(rocket_driver, line, pci_dev ? &pci_dev->dev :
 706                         NULL);
 707 }
 708
 709 /*
 710  *  Configures a rocketport port according to its termio settings.  Called from
 711  *  user mode into the driver (exception handler).  *info CD manipulation is spinlock protected.
 712  */
 713 static void configure_r_port(struct r_port *info,
 714                              struct ktermios *old_termios)
 715 {
 716         unsigned cflag;
 717         unsigned long flags;
 718         unsigned rocketMode;
 719         int bits, baud, divisor;
 720         CHANNEL_t *cp;
 721         struct ktermios *t = info->port.tty->termios;
 722
 723         cp = &info->channel;
 724         cflag = t->c_cflag;
 725
 726         /* Byte size and parity */
 727         if ((cflag & CSIZE) == CS8) {
 728                 sSetData8(cp);
 729                 bits = 10;
 730         } else {
 731                 sSetData7(cp);
 732                 bits = 9;
 733         }
 734         if (cflag & CSTOPB) {
 735                 sSetStop2(cp);
 736                 bits++;
 737         } else {
 738                 sSetStop1(cp);
 739         }
 740
 741         if (cflag & PARENB) {
 742                 sEnParity(cp);
 743                 bits++;
 744                 if (cflag & PARODD) {
 745                         sSetOddParity(cp);
 746                 } else {
 747                         sSetEvenParity(cp);
 748                 }
 749         } else {
 750                 sDisParity(cp);
 751         }
 752
 753         /* baud rate */
 754         baud = tty_get_baud_rate(info->port.tty);
 755         if (!baud)
 756                 baud = 9600;
 757         divisor = ((rp_baud_base[info->board] + (baud >> 1)) / baud) - 1;
 758         if ((divisor >= 8192 || divisor < 0) && old_termios) {
 759                 baud = tty_termios_baud_rate(old_termios);
 760                 if (!baud)
 761                         baud = 9600;
 762                 divisor = (rp_baud_base[info->board] / baud) - 1;
 763         }
 764         if (divisor >= 8192 || divisor < 0) {
 765                 baud = 9600;
 766                 divisor = (rp_baud_base[info->board] / baud) - 1;
 767         }
 768         info->cps = baud / bits;
 769         sSetBaud(cp, divisor);
 770
 771         /* FIXME: Should really back compute a baud rate from the divisor */
 772         tty_encode_baud_rate(info->port.tty, baud, baud);
 773
 774         if (cflag & CRTSCTS) {
 775                 info->intmask |= DELTA_CTS;
 776                 sEnCTSFlowCtl(cp);
 777         } else {
 778                 info->intmask &= ~DELTA_CTS;
 779                 sDisCTSFlowCtl(cp);
 780         }
 781         if (cflag & CLOCAL) {
 782                 info->intmask &= ~DELTA_CD;
 783         } else {
 784                 spin_lock_irqsave(&info->slock, flags);
 785                 if (sGetChanStatus(cp) & CD_ACT)
 786                         info->cd_status = 1;
 787                 else
 788                         info->cd_status = 0;
 789                 info->intmask |= DELTA_CD;
 790                 spin_unlock_irqrestore(&info->slock, flags);
 791         }
 792
 793         /*
 794          * Handle software flow control in the board
 795          */
 796 #ifdef ROCKET_SOFT_FLOW
 797         if (I_IXON(info->port.tty)) {
 798                 sEnTxSoftFlowCtl(cp);
 799                 if (I_IXANY(info->port.tty)) {
 800                         sEnIXANY(cp);
 801                 } else {
 802                         sDisIXANY(cp);
 803                 }
 804                 sSetTxXONChar(cp, START_CHAR(info->port.tty));
 805                 sSetTxXOFFChar(cp, STOP_CHAR(info->port.tty));
 806         } else {
 807                 sDisTxSoftFlowCtl(cp);
 808                 sDisIXANY(cp);
 809                 sClrTxXOFF(cp);
 810         }
 811 #endif
 812
 813         /*
 814          * Set up ignore/read mask words
 815          */
 816         info->read_status_mask = STMRCVROVRH | 0xFF;
 817         if (I_INPCK(info->port.tty))
 818                 info->read_status_mask |= STMFRAMEH | STMPARITYH;
 819         if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
 820                 info->read_status_mask |= STMBREAKH;
 821
 822         /*
 823          * Characters to ignore
 824          */
 825         info->ignore_status_mask = 0;
 826         if (I_IGNPAR(info->port.tty))
 827                 info->ignore_status_mask |= STMFRAMEH | STMPARITYH;
 828         if (I_IGNBRK(info->port.tty)) {
 829                 info->ignore_status_mask |= STMBREAKH;
 830                 /*
 831                  * If we're ignoring parity and break indicators,
 832                  * ignore overruns too.  (For real raw support).
 833                  */
 834                 if (I_IGNPAR(info->port.tty))
 835                         info->ignore_status_mask |= STMRCVROVRH;
 836         }
 837
 838         rocketMode = info->flags & ROCKET_MODE_MASK;
 839
 840         if ((info->flags & ROCKET_RTS_TOGGLE)
 841             || (rocketMode == ROCKET_MODE_RS485))
 842                 sEnRTSToggle(cp);
 843         else
 844                 sDisRTSToggle(cp);
 845
 846         sSetRTS(&info->channel);
 847
 848         if (cp->CtlP->boardType == ROCKET_TYPE_PC104) {
 849                 switch (rocketMode) {
 850                 case ROCKET_MODE_RS485:
 851                         sSetInterfaceMode(cp, InterfaceModeRS485);
 852                         break;
 853                 case ROCKET_MODE_RS422:
 854                         sSetInterfaceMode(cp, InterfaceModeRS422);
 855                         break;
 856                 case ROCKET_MODE_RS232:
 857                 default:
 858                         if (info->flags & ROCKET_RTS_TOGGLE)
 859                                 sSetInterfaceMode(cp, InterfaceModeRS232T);
 860                         else
 861                                 sSetInterfaceMode(cp, InterfaceModeRS232);
 862                         break;
 863                 }
 864         }
 865 }
 866
 867 /*  info->port.count is considered critical, protected by spinlocks.  */
 868 static int block_til_ready(struct tty_struct *tty, struct file *filp,
 869                            struct r_port *info)
 870 {
 871         DECLARE_WAITQUEUE(wait, current);
 872         int retval;
 873         int do_clocal = 0, extra_count = 0;
 874         unsigned long flags;
 875
 876         /*
 877          * If the device is in the middle of being closed, then block
 878          * until it's done, and then try again.
 879          */
 880         if (tty_hung_up_p(filp))
 881                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 882         if (info->flags & ROCKET_CLOSING) {
 883                 if (wait_for_completion_interruptible(&info->close_wait))
 884                         return -ERESTARTSYS;
 885                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 886         }
 887
 888         /*
 889          * If non-blocking mode is set, or the port is not enabled,
 890          * then make the check up front and then exit.
 891          */
 892         if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
 893                 info->flags |= ROCKET_NORMAL_ACTIVE;
 894                 return 0;
 895         }
 896         if (tty->termios->c_cflag & CLOCAL)
 897                 do_clocal = 1;
 898
 899         /*
 900          * Block waiting for the carrier detect and the line to become free.  While we are in
 901          * this loop, info->port.count is dropped by one, so that rp_close() knows when to free things.
 902          * We restore it upon exit, either normal or abnormal.
 903          */
 904         retval = 0;
 905         add_wait_queue(&info->port.open_wait, &wait);
 906 #ifdef ROCKET_DEBUG_OPEN
 907         printk(KERN_INFO "block_til_ready before block: ttyR%d, count = %d\n", info->line, info->port.count);
 908 #endif
 909         spin_lock_irqsave(&info->slock, flags);
 910
 911 #ifdef ROCKET_DISABLE_SIMUSAGE
 912         info->flags |= ROCKET_NORMAL_ACTIVE;
 913 #else
 914         if (!tty_hung_up_p(filp)) {
 915                 extra_count = 1;
 916                 info->port.count--;
 917         }
 918 #endif
 919         info->port.blocked_open++;
 920
 921         spin_unlock_irqrestore(&info->slock, flags);
 922
 923         while (1) {
 924                 if (tty->termios->c_cflag & CBAUD) {
 925                         sSetDTR(&info->channel);
 926                         sSetRTS(&info->channel);
 927                 }
 928                 set_current_state(TASK_INTERRUPTIBLE);
 929                 if (tty_hung_up_p(filp) || !(info->flags & ROCKET_INITIALIZED)) {
 930                         if (info->flags & ROCKET_HUP_NOTIFY)
 931                                 retval = -EAGAIN;
 932                         else
 933                                 retval = -ERESTARTSYS;
 934                         break;
 935                 }
 936                 if (!(info->flags & ROCKET_CLOSING) && (do_clocal || (sGetChanStatusLo(&info->channel) & CD_ACT)))
 937                         break;
 938                 if (signal_pending(current)) {
 939                         retval = -ERESTARTSYS;
 940                         break;
 941                 }
 942 #ifdef ROCKET_DEBUG_OPEN
 943                 printk(KERN_INFO "block_til_ready blocking: ttyR%d, count = %d, flags=0x%0x\n",
 944                      info->line, info->port.count, info->flags);
 945 #endif
 946                 schedule();     /*  Don't hold spinlock here, will hang PC */
 947         }
 948         __set_current_state(TASK_RUNNING);
 949         remove_wait_queue(&info->port.open_wait, &wait);
 950
 951         spin_lock_irqsave(&info->slock, flags);
 952
 953         if (extra_count)
 954                 info->port.count++;
 955         info->port.blocked_open--;
 956
 957         spin_unlock_irqrestore(&info->slock, flags);
 958
 959 #ifdef ROCKET_DEBUG_OPEN
 960         printk(KERN_INFO "block_til_ready after blocking: ttyR%d, count = %d\n",
 961                info->line, info->port.count);
 962 #endif
 963         if (retval)
 964                 return retval;
 965         info->flags |= ROCKET_NORMAL_ACTIVE;
 966         return 0;
 967 }
 968
 969 /*
 970  *  Exception handler that opens a serial port.  Creates xmit_buf storage, fills in
 971  *  port's r_port struct.  Initializes the port hardware.
 972  */
 973 static int rp_open(struct tty_struct *tty, struct file *filp)
 974 {
 975         struct r_port *info;
 976         int line = 0, retval;
 977         CHANNEL_t *cp;
 978         unsigned long page;
 979
 980         line = tty->index;
 981         if ((line < 0) || (line >= MAX_RP_PORTS) || ((info = rp_table[line]) == NULL))
 982                 return -ENXIO;
 983
 984         page = __get_free_page(GFP_KERNEL);
 985         if (!page)
 986                 return -ENOMEM;
 987
 988         if (info->flags & ROCKET_CLOSING) {
 989                 retval = wait_for_completion_interruptible(&info->close_wait);
 990                 free_page(page);
 991                 if (retval)
 992                         return retval;
 993                 return ((info->flags & ROCKET_HUP_NOTIFY) ? -EAGAIN : -ERESTARTSYS);
 994         }
 995
 996         /*
 997          * We must not sleep from here until the port is marked fully in use.
 998          */
 999         if (info->xmit_buf)
1000                 free_page(page);
1001         else
1002                 info->xmit_buf = (unsigned char *) page;
1003
1004         tty->driver_data = info;
1005         info->port.tty = tty;
1006
1007         if (info->port.count++ == 0) {
1008                 atomic_inc(&rp_num_ports_open);
1009
1010 #ifdef ROCKET_DEBUG_OPEN
1011                 printk(KERN_INFO "rocket mod++ = %d...\n",
1012                                 atomic_read(&rp_num_ports_open));
1013 #endif
1014         }
1015 #ifdef ROCKET_DEBUG_OPEN
1016         printk(KERN_INFO "rp_open ttyR%d, count=%d\n", info->line, info->port.count);
1017 #endif
1018
1019         /*
1020          * Info->count is now 1; so it's safe to sleep now.
1021          */
1022         if ((info->flags & ROCKET_INITIALIZED) == 0) {
1023                 cp = &info->channel;
1024                 sSetRxTrigger(cp, TRIG_1);
1025                 if (sGetChanStatus(cp) & CD_ACT)
1026                         info->cd_status = 1;
1027                 else
1028                         info->cd_status = 0;
1029                 sDisRxStatusMode(cp);
1030                 sFlushRxFIFO(cp);
1031                 sFlushTxFIFO(cp);
1032
1033                 sEnInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1034                 sSetRxTrigger(cp, TRIG_1);
1035
1036                 sGetChanStatus(cp);
1037                 sDisRxStatusMode(cp);
1038                 sClrTxXOFF(cp);
1039
1040                 sDisCTSFlowCtl(cp);
1041                 sDisTxSoftFlowCtl(cp);
1042
1043                 sEnRxFIFO(cp);
1044                 sEnTransmit(cp);
1045
1046                 info->flags |= ROCKET_INITIALIZED;
1047
1048                 /*
1049                  * Set up the tty->alt_speed kludge
1050                  */
1051                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
1052                         info->port.tty->alt_speed = 57600;
1053                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
1054                         info->port.tty->alt_speed = 115200;
1055                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
1056                         info->port.tty->alt_speed = 230400;
1057                 if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
1058                         info->port.tty->alt_speed = 460800;
1059
1060                 configure_r_port(info, NULL);
1061                 if (tty->termios->c_cflag & CBAUD) {
1062                         sSetDTR(cp);
1063                         sSetRTS(cp);
1064                 }
1065         }
1066         /*  Starts (or resets) the maint polling loop */
1067         mod_timer(&rocket_timer, jiffies + POLL_PERIOD);
1068
1069         retval = block_til_ready(tty, filp, info);
1070         if (retval) {
1071 #ifdef ROCKET_DEBUG_OPEN
1072                 printk(KERN_INFO "rp_open returning after block_til_ready with %d\n", retval);
1073 #endif
1074                 return retval;
1075         }
1076         return 0;
1077 }
1078
1079 /*
1080  *  Exception handler that closes a serial port. info->port.count is considered critical.
1081  */
1082 static void rp_close(struct tty_struct *tty, struct file *filp)
1083 {
1084         struct r_port *info = (struct r_port *) tty->driver_data;
1085         unsigned long flags;
1086         int timeout;
1087         CHANNEL_t *cp;
1088
1089         if (rocket_paranoia_check(info, "rp_close"))
1090                 return;
1091
1092 #ifdef ROCKET_DEBUG_OPEN
1093         printk(KERN_INFO "rp_close ttyR%d, count = %d\n", info->line, info->port.count);
1094 #endif
1095
1096         if (tty_hung_up_p(filp))
1097                 return;
1098         spin_lock_irqsave(&info->slock, flags);
1099
1100         if ((tty->count == 1) && (info->port.count != 1)) {
1101                 /*
1102                  * Uh, oh.  tty->count is 1, which means that the tty
1103                  * structure will be freed.  Info->count should always
1104                  * be one in these conditions.  If it's greater than
1105                  * one, we've got real problems, since it means the
1106                  * serial port won't be shutdown.
1107                  */
1108                 printk(KERN_WARNING "rp_close: bad serial port count; "
1109                         "tty->count is 1, info->port.count is %d\n", info->port.count);
1110                 info->port.count = 1;
1111         }
1112         if (--info->port.count < 0) {
1113                 printk(KERN_WARNING "rp_close: bad serial port count for "
1114                                 "ttyR%d: %d\n", info->line, info->port.count);
1115                 info->port.count = 0;
1116         }
1117         if (info->port.count) {
1118                 spin_unlock_irqrestore(&info->slock, flags);
1119                 return;
1120         }
1121         info->flags |= ROCKET_CLOSING;
1122         spin_unlock_irqrestore(&info->slock, flags);
1123
1124         cp = &info->channel;
1125
1126         /*
1127          * Notify the line discpline to only process XON/XOFF characters
1128          */
1129         tty->closing = 1;
1130
1131         /*
1132          * If transmission was throttled by the application request,
1133          * just flush the xmit buffer.
1134          */
1135         if (tty->flow_stopped)
1136                 rp_flush_buffer(tty);
1137
1138         /*
1139          * Wait for the transmit buffer to clear
1140          */
1141         if (info->port.closing_wait != ROCKET_CLOSING_WAIT_NONE)
1142                 tty_wait_until_sent(tty, info->port.closing_wait);
1143         /*
1144          * Before we drop DTR, make sure the UART transmitter
1145          * has completely drained; this is especially
1146          * important if there is a transmit FIFO!
1147          */
1148         timeout = (sGetTxCnt(cp) + 1) * HZ / info->cps;
1149         if (timeout == 0)
1150                 timeout = 1;
1151         rp_wait_until_sent(tty, timeout);
1152         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1153
1154         sDisTransmit(cp);
1155         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1156         sDisCTSFlowCtl(cp);
1157         sDisTxSoftFlowCtl(cp);
1158         sClrTxXOFF(cp);
1159         sFlushRxFIFO(cp);
1160         sFlushTxFIFO(cp);
1161         sClrRTS(cp);
1162         if (C_HUPCL(tty))
1163                 sClrDTR(cp);
1164
1165         rp_flush_buffer(tty);
1166
1167         tty_ldisc_flush(tty);
1168
1169         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1170
1171         if (info->port.blocked_open) {
1172                 if (info->port.close_delay) {
1173                         msleep_interruptible(jiffies_to_msecs(info->port.close_delay));
1174                 }
1175                 wake_up_interruptible(&info->port.open_wait);
1176         } else {
1177                 if (info->xmit_buf) {
1178                         free_page((unsigned long) info->xmit_buf);
1179                         info->xmit_buf = NULL;
1180                 }
1181         }
1182         info->flags &= ~(ROCKET_INITIALIZED | ROCKET_CLOSING | ROCKET_NORMAL_ACTIVE);
1183         tty->closing = 0;
1184         complete_all(&info->close_wait);
1185         atomic_dec(&rp_num_ports_open);
1186
1187 #ifdef ROCKET_DEBUG_OPEN
1188         printk(KERN_INFO "rocket mod-- = %d...\n",
1189                         atomic_read(&rp_num_ports_open));
1190         printk(KERN_INFO "rp_close ttyR%d complete shutdown\n", info->line);
1191 #endif
1192
1193 }
1194
1195 static void rp_set_termios(struct tty_struct *tty,
1196                            struct ktermios *old_termios)
1197 {
1198         struct r_port *info = (struct r_port *) tty->driver_data;
1199         CHANNEL_t *cp;
1200         unsigned cflag;
1201
1202         if (rocket_paranoia_check(info, "rp_set_termios"))
1203                 return;
1204
1205         cflag = tty->termios->c_cflag;
1206
1207         /*
1208          * This driver doesn't support CS5 or CS6
1209          */
1210         if (((cflag & CSIZE) == CS5) || ((cflag & CSIZE) == CS6))
1211                 tty->termios->c_cflag =
1212                     ((cflag & ~CSIZE) | (old_termios->c_cflag & CSIZE));
1213         /* Or CMSPAR */
1214         tty->termios->c_cflag &= ~CMSPAR;
1215
1216         configure_r_port(info, old_termios);
1217
1218         cp = &info->channel;
1219
1220         /* Handle transition to B0 status */
1221         if ((old_termios->c_cflag & CBAUD) && !(tty->termios->c_cflag & CBAUD)) {
1222                 sClrDTR(cp);
1223                 sClrRTS(cp);
1224         }
1225
1226         /* Handle transition away from B0 status */
1227         if (!(old_termios->c_cflag & CBAUD) && (tty->termios->c_cflag & CBAUD)) {
1228                 if (!tty->hw_stopped || !(tty->termios->c_cflag & CRTSCTS))
1229                         sSetRTS(cp);
1230                 sSetDTR(cp);
1231         }
1232
1233         if ((old_termios->c_cflag & CRTSCTS) && !(tty->termios->c_cflag & CRTSCTS)) {
1234                 tty->hw_stopped = 0;
1235                 rp_start(tty);
1236         }
1237 }
1238
1239 static int rp_break(struct tty_struct *tty, int break_state)
1240 {
1241         struct r_port *info = (struct r_port *) tty->driver_data;
1242         unsigned long flags;
1243
1244         if (rocket_paranoia_check(info, "rp_break"))
1245                 return -EINVAL;
1246
1247         spin_lock_irqsave(&info->slock, flags);
1248         if (break_state == -1)
1249                 sSendBreak(&info->channel);
1250         else
1251                 sClrBreak(&info->channel);
1252         spin_unlock_irqrestore(&info->slock, flags);
1253         return 0;
1254 }
1255
1256 /*
1257  * sGetChanRI used to be a macro in rocket_int.h. When the functionality for
1258  * the UPCI boards was added, it was decided to make this a function because
1259  * the macro was getting too complicated. All cases except the first one
1260  * (UPCIRingInd) are taken directly from the original macro.
1261  */
1262 static int sGetChanRI(CHANNEL_T * ChP)
1263 {
1264         CONTROLLER_t *CtlP = ChP->CtlP;
1265         int ChanNum = ChP->ChanNum;
1266         int RingInd = 0;
1267
1268         if (CtlP->UPCIRingInd)
1269                 RingInd = !(sInB(CtlP->UPCIRingInd) & sBitMapSetTbl[ChanNum]);
1270         else if (CtlP->AltChanRingIndicator)
1271                 RingInd = sInB((ByteIO_t) (ChP->ChanStat + 8)) & DSR_ACT;
1272         else if (CtlP->boardType == ROCKET_TYPE_PC104)
1273                 RingInd = !(sInB(CtlP->AiopIO[3]) & sBitMapSetTbl[ChanNum]);
1274
1275         return RingInd;
1276 }
1277
1278 /********************************************************************************************/
1279 /*  Here are the routines used by rp_ioctl.  These are all called from exception handlers.  */
1280
1281 /*
1282  *  Returns the state of the serial modem control lines.  These next 2 functions
1283  *  are the way kernel versions > 2.5 handle modem control lines rather than IOCTLs.
1284  */
1285 static int rp_tiocmget(struct tty_struct *tty, struct file *file)
1286 {
1287         struct r_port *info = (struct r_port *)tty->driver_data;
1288         unsigned int control, result, ChanStatus;
1289
1290         ChanStatus = sGetChanStatusLo(&info->channel);
1291         control = info->channel.TxControl[3];
1292         result = ((control & SET_RTS) ? TIOCM_RTS : 0) |
1293                 ((control & SET_DTR) ?  TIOCM_DTR : 0) |
1294                 ((ChanStatus & CD_ACT) ? TIOCM_CAR : 0) |
1295                 (sGetChanRI(&info->channel) ? TIOCM_RNG : 0) |
1296                 ((ChanStatus & DSR_ACT) ? TIOCM_DSR : 0) |
1297                 ((ChanStatus & CTS_ACT) ? TIOCM_CTS : 0);
1298
1299         return result;
1300 }
1301
1302 /*
1303  *  Sets the modem control lines
1304  */
1305 static int rp_tiocmset(struct tty_struct *tty, struct file *file,
1306                     unsigned int set, unsigned int clear)
1307 {
1308         struct r_port *info = (struct r_port *)tty->driver_data;
1309
1310         if (set & TIOCM_RTS)
1311                 info->channel.TxControl[3] |= SET_RTS;
1312         if (set & TIOCM_DTR)
1313                 info->channel.TxControl[3] |= SET_DTR;
1314         if (clear & TIOCM_RTS)
1315                 info->channel.TxControl[3] &= ~SET_RTS;
1316         if (clear & TIOCM_DTR)
1317                 info->channel.TxControl[3] &= ~SET_DTR;
1318
1319         out32(info->channel.IndexAddr, info->channel.TxControl);
1320         return 0;
1321 }
1322
1323 static int get_config(struct r_port *info, struct rocket_config __user *retinfo)
1324 {
1325         struct rocket_config tmp;
1326
1327         if (!retinfo)
1328                 return -EFAULT;
1329         memset(&tmp, 0, sizeof (tmp));
1330         tmp.line = info->line;
1331         tmp.flags = info->flags;
1332         tmp.close_delay = info->port.close_delay;
1333         tmp.closing_wait = info->port.closing_wait;
1334         tmp.port = rcktpt_io_addr[(info->line >> 5) & 3];
1335
1336         if (copy_to_user(retinfo, &tmp, sizeof (*retinfo)))
1337                 return -EFAULT;
1338         return 0;
1339 }
1340
1341 static int set_config(struct r_port *info, struct rocket_config __user *new_info)
1342 {
1343         struct rocket_config new_serial;
1344
1345         if (copy_from_user(&new_serial, new_info, sizeof (new_serial)))
1346                 return -EFAULT;
1347
1348         if (!capable(CAP_SYS_ADMIN))
1349         {
1350                 if ((new_serial.flags & ~ROCKET_USR_MASK) != (info->flags & ~ROCKET_USR_MASK))
1351                         return -EPERM;
1352                 info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK));
1353                 configure_r_port(info, NULL);
1354                 return 0;
1355         }
1356
1357         info->flags = ((info->flags & ~ROCKET_FLAGS) | (new_serial.flags & ROCKET_FLAGS));
1358         info->port.close_delay = new_serial.close_delay;
1359         info->port.closing_wait = new_serial.closing_wait;
1360
1361         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_HI)
1362                 info->port.tty->alt_speed = 57600;
1363         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_VHI)
1364                 info->port.tty->alt_speed = 115200;
1365         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_SHI)
1366                 info->port.tty->alt_speed = 230400;
1367         if ((info->flags & ROCKET_SPD_MASK) == ROCKET_SPD_WARP)
1368                 info->port.tty->alt_speed = 460800;
1369
1370         configure_r_port(info, NULL);
1371         return 0;
1372 }
1373
1374 /*
1375  *  This function fills in a rocket_ports struct with information
1376  *  about what boards/ports are in the system.  This info is passed
1377  *  to user space.  See setrocket.c where the info is used to create
1378  *  the /dev/ttyRx ports.
1379  */
1380 static int get_ports(struct r_port *info, struct rocket_ports __user *retports)
1381 {
1382         struct rocket_ports tmp;
1383         int board;
1384
1385         if (!retports)
1386                 return -EFAULT;
1387         memset(&tmp, 0, sizeof (tmp));
1388         tmp.tty_major = rocket_driver->major;
1389
1390         for (board = 0; board < 4; board++) {
1391                 tmp.rocketModel[board].model = rocketModel[board].model;
1392                 strcpy(tmp.rocketModel[board].modelString, rocketModel[board].modelString);
1393                 tmp.rocketModel[board].numPorts = rocketModel[board].numPorts;
1394                 tmp.rocketModel[board].loadrm2 = rocketModel[board].loadrm2;
1395                 tmp.rocketModel[board].startingPortNumber = rocketModel[board].startingPortNumber;
1396         }
1397         if (copy_to_user(retports, &tmp, sizeof (*retports)))
1398                 return -EFAULT;
1399         return 0;
1400 }
1401
1402 static int reset_rm2(struct r_port *info, void __user *arg)
1403 {
1404         int reset;
1405
1406         if (!capable(CAP_SYS_ADMIN))
1407                 return -EPERM;
1408
1409         if (copy_from_user(&reset, arg, sizeof (int)))
1410                 return -EFAULT;
1411         if (reset)
1412                 reset = 1;
1413
1414         if (rcktpt_type[info->board] != ROCKET_TYPE_MODEMII &&
1415             rcktpt_type[info->board] != ROCKET_TYPE_MODEMIII)
1416                 return -EINVAL;
1417
1418         if (info->ctlp->BusType == isISA)
1419                 sModemReset(info->ctlp, info->chan, reset);
1420         else
1421                 sPCIModemReset(info->ctlp, info->chan, reset);
1422
1423         return 0;
1424 }
1425
1426 static int get_version(struct r_port *info, struct rocket_version __user *retvers)
1427 {
1428         if (copy_to_user(retvers, &driver_version, sizeof (*retvers)))
1429                 return -EFAULT;
1430         return 0;
1431 }
1432
1433 /*  IOCTL call handler into the driver */
1434 static int rp_ioctl(struct tty_struct *tty, struct file *file,
1435                     unsigned int cmd, unsigned long arg)
1436 {
1437         struct r_port *info = (struct r_port *) tty->driver_data;
1438         void __user *argp = (void __user *)arg;
1439         int ret = 0;
1440
1441         if (cmd != RCKP_GET_PORTS && rocket_paranoia_check(info, "rp_ioctl"))
1442                 return -ENXIO;
1443
1444         lock_kernel();
1445
1446         switch (cmd) {
1447         case RCKP_GET_STRUCT:
1448                 if (copy_to_user(argp, info, sizeof (struct r_port)))
1449                         ret = -EFAULT;
1450                 break;
1451         case RCKP_GET_CONFIG:
1452                 ret = get_config(info, argp);
1453                 break;
1454         case RCKP_SET_CONFIG:
1455                 ret = set_config(info, argp);
1456                 break;
1457         case RCKP_GET_PORTS:
1458                 ret = get_ports(info, argp);
1459                 break;
1460         case RCKP_RESET_RM2:
1461                 ret = reset_rm2(info, argp);
1462                 break;
1463         case RCKP_GET_VERSION:
1464                 ret = get_version(info, argp);
1465                 break;
1466         default:
1467                 ret = -ENOIOCTLCMD;
1468         }
1469         unlock_kernel();
1470         return ret;
1471 }
1472
1473 static void rp_send_xchar(struct tty_struct *tty, char ch)
1474 {
1475         struct r_port *info = (struct r_port *) tty->driver_data;
1476         CHANNEL_t *cp;
1477
1478         if (rocket_paranoia_check(info, "rp_send_xchar"))
1479                 return;
1480
1481         cp = &info->channel;
1482         if (sGetTxCnt(cp))
1483                 sWriteTxPrioByte(cp, ch);
1484         else
1485                 sWriteTxByte(sGetTxRxDataIO(cp), ch);
1486 }
1487
1488 static void rp_throttle(struct tty_struct *tty)
1489 {
1490         struct r_port *info = (struct r_port *) tty->driver_data;
1491         CHANNEL_t *cp;
1492
1493 #ifdef ROCKET_DEBUG_THROTTLE
1494         printk(KERN_INFO "throttle %s: %d....\n", tty->name,
1495                tty->ldisc.chars_in_buffer(tty));
1496 #endif
1497
1498         if (rocket_paranoia_check(info, "rp_throttle"))
1499                 return;
1500
1501         cp = &info->channel;
1502         if (I_IXOFF(tty))
1503                 rp_send_xchar(tty, STOP_CHAR(tty));
1504
1505         sClrRTS(&info->channel);
1506 }
1507
1508 static void rp_unthrottle(struct tty_struct *tty)
1509 {
1510         struct r_port *info = (struct r_port *) tty->driver_data;
1511         CHANNEL_t *cp;
1512 #ifdef ROCKET_DEBUG_THROTTLE
1513         printk(KERN_INFO "unthrottle %s: %d....\n", tty->name,
1514                tty->ldisc.chars_in_buffer(tty));
1515 #endif
1516
1517         if (rocket_paranoia_check(info, "rp_throttle"))
1518                 return;
1519
1520         cp = &info->channel;
1521         if (I_IXOFF(tty))
1522                 rp_send_xchar(tty, START_CHAR(tty));
1523
1524         sSetRTS(&info->channel);
1525 }
1526
1527 /*
1528  * ------------------------------------------------------------
1529  * rp_stop() and rp_start()
1530  *
1531  * This routines are called before setting or resetting tty->stopped.
1532  * They enable or disable transmitter interrupts, as necessary.
1533  * ------------------------------------------------------------
1534  */
1535 static void rp_stop(struct tty_struct *tty)
1536 {
1537         struct r_port *info = (struct r_port *) tty->driver_data;
1538
1539 #ifdef ROCKET_DEBUG_FLOW
1540         printk(KERN_INFO "stop %s: %d %d....\n", tty->name,
1541                info->xmit_cnt, info->xmit_fifo_room);
1542 #endif
1543
1544         if (rocket_paranoia_check(info, "rp_stop"))
1545                 return;
1546
1547         if (sGetTxCnt(&info->channel))
1548                 sDisTransmit(&info->channel);
1549 }
1550
1551 static void rp_start(struct tty_struct *tty)
1552 {
1553         struct r_port *info = (struct r_port *) tty->driver_data;
1554
1555 #ifdef ROCKET_DEBUG_FLOW
1556         printk(KERN_INFO "start %s: %d %d....\n", tty->name,
1557                info->xmit_cnt, info->xmit_fifo_room);
1558 #endif
1559
1560         if (rocket_paranoia_check(info, "rp_stop"))
1561                 return;
1562
1563         sEnTransmit(&info->channel);
1564         set_bit((info->aiop * 8) + info->chan,
1565                 (void *) &xmit_flags[info->board]);
1566 }
1567
1568 /*
1569  * rp_wait_until_sent() --- wait until the transmitter is empty
1570  */
1571 static void rp_wait_until_sent(struct tty_struct *tty, int timeout)
1572 {
1573         struct r_port *info = (struct r_port *) tty->driver_data;
1574         CHANNEL_t *cp;
1575         unsigned long orig_jiffies;
1576         int check_time, exit_time;
1577         int txcnt;
1578
1579         if (rocket_paranoia_check(info, "rp_wait_until_sent"))
1580                 return;
1581
1582         cp = &info->channel;
1583
1584         orig_jiffies = jiffies;
1585 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1586         printk(KERN_INFO "In RP_wait_until_sent(%d) (jiff=%lu)...\n", timeout,
1587                jiffies);
1588         printk(KERN_INFO "cps=%d...\n", info->cps);
1589 #endif
1590         lock_kernel();
1591         while (1) {
1592                 txcnt = sGetTxCnt(cp);
1593                 if (!txcnt) {
1594                         if (sGetChanStatusLo(cp) & TXSHRMT)
1595                                 break;
1596                         check_time = (HZ / info->cps) / 5;
1597                 } else {
1598                         check_time = HZ * txcnt / info->cps;
1599                 }
1600                 if (timeout) {
1601                         exit_time = orig_jiffies + timeout - jiffies;
1602                         if (exit_time <= 0)
1603                                 break;
1604                         if (exit_time < check_time)
1605                                 check_time = exit_time;
1606                 }
1607                 if (check_time == 0)
1608                         check_time = 1;
1609 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1610                 printk(KERN_INFO "txcnt = %d (jiff=%lu,check=%d)...\n", txcnt,
1611                                 jiffies, check_time);
1612 #endif
1613                 msleep_interruptible(jiffies_to_msecs(check_time));
1614                 if (signal_pending(current))
1615                         break;
1616         }
1617         __set_current_state(TASK_RUNNING);
1618         unlock_kernel();
1619 #ifdef ROCKET_DEBUG_WAIT_UNTIL_SENT
1620         printk(KERN_INFO "txcnt = %d (jiff=%lu)...done\n", txcnt, jiffies);
1621 #endif
1622 }
1623
1624 /*
1625  * rp_hangup() --- called by tty_hangup() when a hangup is signaled.
1626  */
1627 static void rp_hangup(struct tty_struct *tty)
1628 {
1629         CHANNEL_t *cp;
1630         struct r_port *info = (struct r_port *) tty->driver_data;
1631
1632         if (rocket_paranoia_check(info, "rp_hangup"))
1633                 return;
1634
1635 #if (defined(ROCKET_DEBUG_OPEN) || defined(ROCKET_DEBUG_HANGUP))
1636         printk(KERN_INFO "rp_hangup of ttyR%d...\n", info->line);
1637 #endif
1638         rp_flush_buffer(tty);
1639         if (info->flags & ROCKET_CLOSING)
1640                 return;
1641         if (info->port.count)
1642                 atomic_dec(&rp_num_ports_open);
1643         clear_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1644
1645         info->port.count = 0;
1646         info->flags &= ~ROCKET_NORMAL_ACTIVE;
1647         info->port.tty = NULL;
1648
1649         cp = &info->channel;
1650         sDisRxFIFO(cp);
1651         sDisTransmit(cp);
1652         sDisInterrupts(cp, (TXINT_EN | MCINT_EN | RXINT_EN | SRCINT_EN | CHANINT_EN));
1653         sDisCTSFlowCtl(cp);
1654         sDisTxSoftFlowCtl(cp);
1655         sClrTxXOFF(cp);
1656         info->flags &= ~ROCKET_INITIALIZED;
1657
1658         wake_up_interruptible(&info->port.open_wait);
1659 }
1660
1661 /*
1662  *  Exception handler - write char routine.  The RocketPort driver uses a
1663  *  double-buffering strategy, with the twist that if the in-memory CPU
1664  *  buffer is empty, and there's space in the transmit FIFO, the
1665  *  writing routines will write directly to transmit FIFO.
1666  *  Write buffer and counters protected by spinlocks
1667  */
1668 static int rp_put_char(struct tty_struct *tty, unsigned char ch)
1669 {
1670         struct r_port *info = (struct r_port *) tty->driver_data;
1671         CHANNEL_t *cp;
1672         unsigned long flags;
1673
1674         if (rocket_paranoia_check(info, "rp_put_char"))
1675                 return 0;
1676
1677         /*
1678          * Grab the port write mutex, locking out other processes that try to
1679          * write to this port
1680          */
1681         mutex_lock(&info->write_mtx);
1682
1683 #ifdef ROCKET_DEBUG_WRITE
1684         printk(KERN_INFO "rp_put_char %c...\n", ch);
1685 #endif
1686
1687         spin_lock_irqsave(&info->slock, flags);
1688         cp = &info->channel;
1689
1690         if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room == 0)
1691                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1692
1693         if (tty->stopped || tty->hw_stopped || info->xmit_fifo_room == 0 || info->xmit_cnt != 0) {
1694                 info->xmit_buf[info->xmit_head++] = ch;
1695                 info->xmit_head &= XMIT_BUF_SIZE - 1;
1696                 info->xmit_cnt++;
1697                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1698         } else {
1699                 sOutB(sGetTxRxDataIO(cp), ch);
1700                 info->xmit_fifo_room--;
1701         }
1702         spin_unlock_irqrestore(&info->slock, flags);
1703         mutex_unlock(&info->write_mtx);
1704         return 1;
1705 }
1706
1707 /*
1708  *  Exception handler - write routine, called when user app writes to the device.
1709  *  A per port write mutex is used to protect from another process writing to
1710  *  this port at the same time.  This other process could be running on the other CPU
1711  *  or get control of the CPU if the copy_from_user() blocks due to a page fault (swapped out).
1712  *  Spinlocks protect the info xmit members.
1713  */
1714 static int rp_write(struct tty_struct *tty,
1715                     const unsigned char *buf, int count)
1716 {
1717         struct r_port *info = (struct r_port *) tty->driver_data;
1718         CHANNEL_t *cp;
1719         const unsigned char *b;
1720         int c, retval = 0;
1721         unsigned long flags;
1722
1723         if (count <= 0 || rocket_paranoia_check(info, "rp_write"))
1724                 return 0;
1725
1726         if (mutex_lock_interruptible(&info->write_mtx))
1727                 return -ERESTARTSYS;
1728
1729 #ifdef ROCKET_DEBUG_WRITE
1730         printk(KERN_INFO "rp_write %d chars...\n", count);
1731 #endif
1732         cp = &info->channel;
1733
1734         if (!tty->stopped && !tty->hw_stopped && info->xmit_fifo_room < count)
1735                 info->xmit_fifo_room = TXFIFO_SIZE - sGetTxCnt(cp);
1736
1737         /*
1738          *  If the write queue for the port is empty, and there is FIFO space, stuff bytes
1739          *  into FIFO.  Use the write queue for temp storage.
1740          */
1741         if (!tty->stopped && !tty->hw_stopped && info->xmit_cnt == 0 && info->xmit_fifo_room > 0) {
1742                 c = min(count, info->xmit_fifo_room);
1743                 b = buf;
1744
1745                 /*  Push data into FIFO, 2 bytes at a time */
1746                 sOutStrW(sGetTxRxDataIO(cp), (unsigned short *) b, c / 2);
1747
1748                 /*  If there is a byte remaining, write it */
1749                 if (c & 1)
1750                         sOutB(sGetTxRxDataIO(cp), b[c - 1]);
1751
1752                 retval += c;
1753                 buf += c;
1754                 count -= c;
1755
1756                 spin_lock_irqsave(&info->slock, flags);
1757                 info->xmit_fifo_room -= c;
1758                 spin_unlock_irqrestore(&info->slock, flags);
1759         }
1760
1761         /* If count is zero, we wrote it all and are done */
1762         if (!count)
1763                 goto end;
1764
1765         /*  Write remaining data into the port's xmit_buf */
1766         while (1) {
1767                 if (!info->port.tty)            /* Seemingly obligatory check... */
1768                         goto end;
1769                 c = min(count, XMIT_BUF_SIZE - info->xmit_cnt - 1);
1770                 c = min(c, XMIT_BUF_SIZE - info->xmit_head);
1771                 if (c <= 0)
1772                         break;
1773
1774                 b = buf;
1775                 memcpy(info->xmit_buf + info->xmit_head, b, c);
1776
1777                 spin_lock_irqsave(&info->slock, flags);
1778                 info->xmit_head =
1779                     (info->xmit_head + c) & (XMIT_BUF_SIZE - 1);
1780                 info->xmit_cnt += c;
1781                 spin_unlock_irqrestore(&info->slock, flags);
1782
1783                 buf += c;
1784                 count -= c;
1785                 retval += c;
1786         }
1787
1788         if ((retval > 0) && !tty->stopped && !tty->hw_stopped)
1789                 set_bit((info->aiop * 8) + info->chan, (void *) &xmit_flags[info->board]);
1790
1791 end:
1792         if (info->xmit_cnt < WAKEUP_CHARS) {
1793                 tty_wakeup(tty);
1794 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1795                 wake_up_interruptible(&tty->poll_wait);
1796 #endif
1797         }
1798         mutex_unlock(&info->write_mtx);
1799         return retval;
1800 }
1801
1802 /*
1803  * Return the number of characters that can be sent.  We estimate
1804  * only using the in-memory transmit buffer only, and ignore the
1805  * potential space in the transmit FIFO.
1806  */
1807 static int rp_write_room(struct tty_struct *tty)
1808 {
1809         struct r_port *info = (struct r_port *) tty->driver_data;
1810         int ret;
1811
1812         if (rocket_paranoia_check(info, "rp_write_room"))
1813                 return 0;
1814
1815         ret = XMIT_BUF_SIZE - info->xmit_cnt - 1;
1816         if (ret < 0)
1817                 ret = 0;
1818 #ifdef ROCKET_DEBUG_WRITE
1819         printk(KERN_INFO "rp_write_room returns %d...\n", ret);
1820 #endif
1821         return ret;
1822 }
1823
1824 /*
1825  * Return the number of characters in the buffer.  Again, this only
1826  * counts those characters in the in-memory transmit buffer.
1827  */
1828 static int rp_chars_in_buffer(struct tty_struct *tty)
1829 {
1830         struct r_port *info = (struct r_port *) tty->driver_data;
1831         CHANNEL_t *cp;
1832
1833         if (rocket_paranoia_check(info, "rp_chars_in_buffer"))
1834                 return 0;
1835
1836         cp = &info->channel;
1837
1838 #ifdef ROCKET_DEBUG_WRITE
1839         printk(KERN_INFO "rp_chars_in_buffer returns %d...\n", info->xmit_cnt);
1840 #endif
1841         return info->xmit_cnt;
1842 }
1843
1844 /*
1845  *  Flushes the TX fifo for a port, deletes data in the xmit_buf stored in the
1846  *  r_port struct for the port.  Note that spinlock are used to protect info members,
1847  *  do not call this function if the spinlock is already held.
1848  */
1849 static void rp_flush_buffer(struct tty_struct *tty)
1850 {
1851         struct r_port *info = (struct r_port *) tty->driver_data;
1852         CHANNEL_t *cp;
1853         unsigned long flags;
1854
1855         if (rocket_paranoia_check(info, "rp_flush_buffer"))
1856                 return;
1857
1858         spin_lock_irqsave(&info->slock, flags);
1859         info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1860         spin_unlock_irqrestore(&info->slock, flags);
1861
1862 #ifdef ROCKETPORT_HAVE_POLL_WAIT
1863         wake_up_interruptible(&tty->poll_wait);
1864 #endif
1865         tty_wakeup(tty);
1866
1867         cp = &info->channel;
1868         sFlushTxFIFO(cp);
1869 }
1870
1871 #ifdef CONFIG_PCI
1872
1873 static struct pci_device_id __devinitdata rocket_pci_ids[] = {
1874         { PCI_DEVICE(PCI_VENDOR_ID_RP, PCI_ANY_ID) },
1875         { }
1876 };
1877 MODULE_DEVICE_TABLE(pci, rocket_pci_ids);
1878
1879 /*
1880  *  Called when a PCI card is found.  Retrieves and stores model information,
1881  *  init's aiopic and serial port hardware.
1882  *  Inputs:  i is the board number (0-n)
1883  */
1884 static __init int register_PCI(int i, struct pci_dev *dev)
1885 {
1886         int num_aiops, aiop, max_num_aiops, num_chan, chan;
1887         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
1888         char *str, *board_type;
1889         CONTROLLER_t *ctlp;
1890
1891         int fast_clock = 0;
1892         int altChanRingIndicator = 0;
1893         int ports_per_aiop = 8;
1894         WordIO_t ConfigIO = 0;
1895         ByteIO_t UPCIRingInd = 0;
1896
1897         if (!dev || pci_enable_device(dev))
1898                 return 0;
1899
1900         rcktpt_io_addr[i] = pci_resource_start(dev, 0);
1901
1902         rcktpt_type[i] = ROCKET_TYPE_NORMAL;
1903         rocketModel[i].loadrm2 = 0;
1904         rocketModel[i].startingPortNumber = nextLineNumber;
1905
1906         /*  Depending on the model, set up some config variables */
1907         switch (dev->device) {
1908         case PCI_DEVICE_ID_RP4QUAD:
1909                 str = "Quadcable";
1910                 max_num_aiops = 1;
1911                 ports_per_aiop = 4;
1912                 rocketModel[i].model = MODEL_RP4QUAD;
1913                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/quad cable");
1914                 rocketModel[i].numPorts = 4;
1915                 break;
1916         case PCI_DEVICE_ID_RP8OCTA:
1917                 str = "Octacable";
1918                 max_num_aiops = 1;
1919                 rocketModel[i].model = MODEL_RP8OCTA;
1920                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/octa cable");
1921                 rocketModel[i].numPorts = 8;
1922                 break;
1923         case PCI_DEVICE_ID_URP8OCTA:
1924                 str = "Octacable";
1925                 max_num_aiops = 1;
1926                 rocketModel[i].model = MODEL_UPCI_RP8OCTA;
1927                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/octa cable");
1928                 rocketModel[i].numPorts = 8;
1929                 break;
1930         case PCI_DEVICE_ID_RP8INTF:
1931                 str = "8";
1932                 max_num_aiops = 1;
1933                 rocketModel[i].model = MODEL_RP8INTF;
1934                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/external I/F");
1935                 rocketModel[i].numPorts = 8;
1936                 break;
1937         case PCI_DEVICE_ID_URP8INTF:
1938                 str = "8";
1939                 max_num_aiops = 1;
1940                 rocketModel[i].model = MODEL_UPCI_RP8INTF;
1941                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 8 port w/external I/F");
1942                 rocketModel[i].numPorts = 8;
1943                 break;
1944         case PCI_DEVICE_ID_RP8J:
1945                 str = "8J";
1946                 max_num_aiops = 1;
1947                 rocketModel[i].model = MODEL_RP8J;
1948                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/RJ11 connectors");
1949                 rocketModel[i].numPorts = 8;
1950                 break;
1951         case PCI_DEVICE_ID_RP4J:
1952                 str = "4J";
1953                 max_num_aiops = 1;
1954                 ports_per_aiop = 4;
1955                 rocketModel[i].model = MODEL_RP4J;
1956                 strcpy(rocketModel[i].modelString, "RocketPort 4 port w/RJ45 connectors");
1957                 rocketModel[i].numPorts = 4;
1958                 break;
1959         case PCI_DEVICE_ID_RP8SNI:
1960                 str = "8 (DB78 Custom)";
1961                 max_num_aiops = 1;
1962                 rocketModel[i].model = MODEL_RP8SNI;
1963                 strcpy(rocketModel[i].modelString, "RocketPort 8 port w/ custom DB78");
1964                 rocketModel[i].numPorts = 8;
1965                 break;
1966         case PCI_DEVICE_ID_RP16SNI:
1967                 str = "16 (DB78 Custom)";
1968                 max_num_aiops = 2;
1969                 rocketModel[i].model = MODEL_RP16SNI;
1970                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/ custom DB78");
1971                 rocketModel[i].numPorts = 16;
1972                 break;
1973         case PCI_DEVICE_ID_RP16INTF:
1974                 str = "16";
1975                 max_num_aiops = 2;
1976                 rocketModel[i].model = MODEL_RP16INTF;
1977                 strcpy(rocketModel[i].modelString, "RocketPort 16 port w/external I/F");
1978                 rocketModel[i].numPorts = 16;
1979                 break;
1980         case PCI_DEVICE_ID_URP16INTF:
1981                 str = "16";
1982                 max_num_aiops = 2;
1983                 rocketModel[i].model = MODEL_UPCI_RP16INTF;
1984                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 16 port w/external I/F");
1985                 rocketModel[i].numPorts = 16;
1986                 break;
1987         case PCI_DEVICE_ID_CRP16INTF:
1988                 str = "16";
1989                 max_num_aiops = 2;
1990                 rocketModel[i].model = MODEL_CPCI_RP16INTF;
1991                 strcpy(rocketModel[i].modelString, "RocketPort Compact PCI 16 port w/external I/F");
1992                 rocketModel[i].numPorts = 16;
1993                 break;
1994         case PCI_DEVICE_ID_RP32INTF:
1995                 str = "32";
1996                 max_num_aiops = 4;
1997                 rocketModel[i].model = MODEL_RP32INTF;
1998                 strcpy(rocketModel[i].modelString, "RocketPort 32 port w/external I/F");
1999                 rocketModel[i].numPorts = 32;
2000                 break;
2001         case PCI_DEVICE_ID_URP32INTF:
2002                 str = "32";
2003                 max_num_aiops = 4;
2004                 rocketModel[i].model = MODEL_UPCI_RP32INTF;
2005                 strcpy(rocketModel[i].modelString, "RocketPort UPCI 32 port w/external I/F");
2006                 rocketModel[i].numPorts = 32;
2007                 break;
2008         case PCI_DEVICE_ID_RPP4:
2009                 str = "Plus Quadcable";
2010                 max_num_aiops = 1;
2011                 ports_per_aiop = 4;
2012                 altChanRingIndicator++;
2013                 fast_clock++;
2014                 rocketModel[i].model = MODEL_RPP4;
2015                 strcpy(rocketModel[i].modelString, "RocketPort Plus 4 port");
2016                 rocketModel[i].numPorts = 4;
2017                 break;
2018         case PCI_DEVICE_ID_RPP8:
2019                 str = "Plus Octacable";
2020                 max_num_aiops = 2;
2021                 ports_per_aiop = 4;
2022                 altChanRingIndicator++;
2023                 fast_clock++;
2024                 rocketModel[i].model = MODEL_RPP8;
2025                 strcpy(rocketModel[i].modelString, "RocketPort Plus 8 port");
2026                 rocketModel[i].numPorts = 8;
2027                 break;
2028         case PCI_DEVICE_ID_RP2_232:
2029                 str = "Plus 2 (RS-232)";
2030                 max_num_aiops = 1;
2031                 ports_per_aiop = 2;
2032                 altChanRingIndicator++;
2033                 fast_clock++;
2034                 rocketModel[i].model = MODEL_RP2_232;
2035                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS232");
2036                 rocketModel[i].numPorts = 2;
2037                 break;
2038         case PCI_DEVICE_ID_RP2_422:
2039                 str = "Plus 2 (RS-422)";
2040                 max_num_aiops = 1;
2041                 ports_per_aiop = 2;
2042                 altChanRingIndicator++;
2043                 fast_clock++;
2044                 rocketModel[i].model = MODEL_RP2_422;
2045                 strcpy(rocketModel[i].modelString, "RocketPort Plus 2 port RS422");
2046                 rocketModel[i].numPorts = 2;
2047                 break;
2048         case PCI_DEVICE_ID_RP6M:
2049
2050                 max_num_aiops = 1;
2051                 ports_per_aiop = 6;
2052                 str = "6-port";
2053
2054                 /*  If revision is 1, the rocketmodem flash must be loaded.
2055                  *  If it is 2 it is a "socketed" version. */
2056                 if (dev->revision == 1) {
2057                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2058                         rocketModel[i].loadrm2 = 1;
2059                 } else {
2060                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2061                 }
2062
2063                 rocketModel[i].model = MODEL_RP6M;
2064                 strcpy(rocketModel[i].modelString, "RocketModem 6 port");
2065                 rocketModel[i].numPorts = 6;
2066                 break;
2067         case PCI_DEVICE_ID_RP4M:
2068                 max_num_aiops = 1;
2069                 ports_per_aiop = 4;
2070                 str = "4-port";
2071                 if (dev->revision == 1) {
2072                         rcktpt_type[i] = ROCKET_TYPE_MODEMII;
2073                         rocketModel[i].loadrm2 = 1;
2074                 } else {
2075                         rcktpt_type[i] = ROCKET_TYPE_MODEM;
2076                 }
2077
2078                 rocketModel[i].model = MODEL_RP4M;
2079                 strcpy(rocketModel[i].modelString, "RocketModem 4 port");
2080                 rocketModel[i].numPorts = 4;
2081                 break;
2082         default:
2083                 str = "(unknown/unsupported)";
2084                 max_num_aiops = 0;
2085                 break;
2086         }
2087
2088         /*
2089          * Check for UPCI boards.
2090          */
2091
2092         switch (dev->device) {
2093         case PCI_DEVICE_ID_URP32INTF:
2094         case PCI_DEVICE_ID_URP8INTF:
2095         case PCI_DEVICE_ID_URP16INTF:
2096         case PCI_DEVICE_ID_CRP16INTF:
2097         case PCI_DEVICE_ID_URP8OCTA:
2098                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2099                 ConfigIO = pci_resource_start(dev, 1);
2100                 if (dev->device == PCI_DEVICE_ID_URP8OCTA) {
2101                         UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2102
2103                         /*
2104                          * Check for octa or quad cable.
2105                          */
2106                         if (!
2107                             (sInW(ConfigIO + _PCI_9030_GPIO_CTRL) &
2108                              PCI_GPIO_CTRL_8PORT)) {
2109                                 str = "Quadcable";
2110                                 ports_per_aiop = 4;
2111                                 rocketModel[i].numPorts = 4;
2112                         }
2113                 }
2114                 break;
2115         case PCI_DEVICE_ID_UPCI_RM3_8PORT:
2116                 str = "8 ports";
2117                 max_num_aiops = 1;
2118                 rocketModel[i].model = MODEL_UPCI_RM3_8PORT;
2119                 strcpy(rocketModel[i].modelString, "RocketModem III 8 port");
2120                 rocketModel[i].numPorts = 8;
2121                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2122                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2123                 ConfigIO = pci_resource_start(dev, 1);
2124                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2125                 break;
2126         case PCI_DEVICE_ID_UPCI_RM3_4PORT:
2127                 str = "4 ports";
2128                 max_num_aiops = 1;
2129                 rocketModel[i].model = MODEL_UPCI_RM3_4PORT;
2130                 strcpy(rocketModel[i].modelString, "RocketModem III 4 port");
2131                 rocketModel[i].numPorts = 4;
2132                 rcktpt_io_addr[i] = pci_resource_start(dev, 2);
2133                 UPCIRingInd = rcktpt_io_addr[i] + _PCI_9030_RING_IND;
2134                 ConfigIO = pci_resource_start(dev, 1);
2135                 rcktpt_type[i] = ROCKET_TYPE_MODEMIII;
2136                 break;
2137         default:
2138                 break;
2139         }
2140
2141         switch (rcktpt_type[i]) {
2142         case ROCKET_TYPE_MODEM:
2143                 board_type = "RocketModem";
2144                 break;
2145         case ROCKET_TYPE_MODEMII:
2146                 board_type = "RocketModem II";
2147                 break;
2148         case ROCKET_TYPE_MODEMIII:
2149                 board_type = "RocketModem III";
2150                 break;
2151         default:
2152                 board_type = "RocketPort";
2153                 break;
2154         }
2155
2156         if (fast_clock) {
2157                 sClockPrescale = 0x12;  /* mod 2 (divide by 3) */
2158                 rp_baud_base[i] = 921600;
2159         } else {
2160                 /*
2161                  * If support_low_speed is set, use the slow clock
2162                  * prescale, which supports 50 bps
2163                  */
2164                 if (support_low_speed) {
2165                         /* mod 9 (divide by 10) prescale */
2166                         sClockPrescale = 0x19;
2167                         rp_baud_base[i] = 230400;
2168                 } else {
2169                         /* mod 4 (devide by 5) prescale */
2170                         sClockPrescale = 0x14;
2171                         rp_baud_base[i] = 460800;
2172                 }
2173         }
2174
2175         for (aiop = 0; aiop < max_num_aiops; aiop++)
2176                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x40);
2177         ctlp = sCtlNumToCtlPtr(i);
2178         num_aiops = sPCIInitController(ctlp, i, aiopio, max_num_aiops, ConfigIO, 0, FREQ_DIS, 0, altChanRingIndicator, UPCIRingInd);
2179         for (aiop = 0; aiop < max_num_aiops; aiop++)
2180                 ctlp->AiopNumChan[aiop] = ports_per_aiop;
2181
2182         dev_info(&dev->dev, "comtrol PCI controller #%d found at "
2183                 "address %04lx, %d AIOP(s) (%s), creating ttyR%d - %ld\n",
2184                 i, rcktpt_io_addr[i], num_aiops, rocketModel[i].modelString,
2185                 rocketModel[i].startingPortNumber,
2186                 rocketModel[i].startingPortNumber + rocketModel[i].numPorts-1);
2187
2188         if (num_aiops <= 0) {
2189                 rcktpt_io_addr[i] = 0;
2190                 return (0);
2191         }
2192         is_PCI[i] = 1;
2193
2194         /*  Reset the AIOPIC, init the serial ports */
2195         for (aiop = 0; aiop < num_aiops; aiop++) {
2196                 sResetAiopByNum(ctlp, aiop);
2197                 num_chan = ports_per_aiop;
2198                 for (chan = 0; chan < num_chan; chan++)
2199                         init_r_port(i, aiop, chan, dev);
2200         }
2201
2202         /*  Rocket modems must be reset */
2203         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) ||
2204             (rcktpt_type[i] == ROCKET_TYPE_MODEMII) ||
2205             (rcktpt_type[i] == ROCKET_TYPE_MODEMIII)) {
2206                 num_chan = ports_per_aiop;
2207                 for (chan = 0; chan < num_chan; chan++)
2208                         sPCIModemReset(ctlp, chan, 1);
2209                 msleep(500);
2210                 for (chan = 0; chan < num_chan; chan++)
2211                         sPCIModemReset(ctlp, chan, 0);
2212                 msleep(500);
2213                 rmSpeakerReset(ctlp, rocketModel[i].model);
2214         }
2215         return (1);
2216 }
2217
2218 /*
2219  *  Probes for PCI cards, inits them if found
2220  *  Input:   board_found = number of ISA boards already found, or the
2221  *           starting board number
2222  *  Returns: Number of PCI boards found
2223  */
2224 static int __init init_PCI(int boards_found)
2225 {
2226         struct pci_dev *dev = NULL;
2227         int count = 0;
2228
2229         /*  Work through the PCI device list, pulling out ours */
2230         while ((dev = pci_get_device(PCI_VENDOR_ID_RP, PCI_ANY_ID, dev))) {
2231                 if (register_PCI(count + boards_found, dev))
2232                         count++;
2233         }
2234         return (count);
2235 }
2236
2237 #endif                          /* CONFIG_PCI */
2238
2239 /*
2240  *  Probes for ISA cards
2241  *  Input:   i = the board number to look for
2242  *  Returns: 1 if board found, 0 else
2243  */
2244 static int __init init_ISA(int i)
2245 {
2246         int num_aiops, num_chan = 0, total_num_chan = 0;
2247         int aiop, chan;
2248         unsigned int aiopio[MAX_AIOPS_PER_BOARD];
2249         CONTROLLER_t *ctlp;
2250         char *type_string;
2251
2252         /*  If io_addr is zero, no board configured */
2253         if (rcktpt_io_addr[i] == 0)
2254                 return (0);
2255
2256         /*  Reserve the IO region */
2257         if (!request_region(rcktpt_io_addr[i], 64, "Comtrol RocketPort")) {
2258                 printk(KERN_ERR "Unable to reserve IO region for configured "
2259                                 "ISA RocketPort at address 0x%lx, board not "
2260                                 "installed...\n", rcktpt_io_addr[i]);
2261                 rcktpt_io_addr[i] = 0;
2262                 return (0);
2263         }
2264
2265         ctlp = sCtlNumToCtlPtr(i);
2266
2267         ctlp->boardType = rcktpt_type[i];
2268
2269         switch (rcktpt_type[i]) {
2270         case ROCKET_TYPE_PC104:
2271                 type_string = "(PC104)";
2272                 break;
2273         case ROCKET_TYPE_MODEM:
2274                 type_string = "(RocketModem)";
2275                 break;
2276         case ROCKET_TYPE_MODEMII:
2277                 type_string = "(RocketModem II)";
2278                 break;
2279         default:
2280                 type_string = "";
2281                 break;
2282         }
2283
2284         /*
2285          * If support_low_speed is set, use the slow clock prescale,
2286          * which supports 50 bps
2287          */
2288         if (support_low_speed) {
2289                 sClockPrescale = 0x19;  /* mod 9 (divide by 10) prescale */
2290                 rp_baud_base[i] = 230400;
2291         } else {
2292                 sClockPrescale = 0x14;  /* mod 4 (devide by 5) prescale */
2293                 rp_baud_base[i] = 460800;
2294         }
2295
2296         for (aiop = 0; aiop < MAX_AIOPS_PER_BOARD; aiop++)
2297                 aiopio[aiop] = rcktpt_io_addr[i] + (aiop * 0x400);
2298
2299         num_aiops = sInitController(ctlp, i, controller + (i * 0x400), aiopio,  MAX_AIOPS_PER_BOARD, 0, FREQ_DIS, 0);
2300
2301         if (ctlp->boardType == ROCKET_TYPE_PC104) {
2302                 sEnAiop(ctlp, 2);       /* only one AIOPIC, but these */
2303                 sEnAiop(ctlp, 3);       /* CSels used for other stuff */
2304         }
2305
2306         /*  If something went wrong initing the AIOP's release the ISA IO memory */
2307         if (num_aiops <= 0) {
2308                 release_region(rcktpt_io_addr[i], 64);
2309                 rcktpt_io_addr[i] = 0;
2310                 return (0);
2311         }
2312
2313         rocketModel[i].startingPortNumber = nextLineNumber;
2314
2315         for (aiop = 0; aiop < num_aiops; aiop++) {
2316                 sResetAiopByNum(ctlp, aiop);
2317                 sEnAiop(ctlp, aiop);
2318                 num_chan = sGetAiopNumChan(ctlp, aiop);
2319                 total_num_chan += num_chan;
2320                 for (chan = 0; chan < num_chan; chan++)
2321                         init_r_port(i, aiop, chan, NULL);
2322         }
2323         is_PCI[i] = 0;
2324         if ((rcktpt_type[i] == ROCKET_TYPE_MODEM) || (rcktpt_type[i] == ROCKET_TYPE_MODEMII)) {
2325                 num_chan = sGetAiopNumChan(ctlp, 0);
2326                 total_num_chan = num_chan;
2327                 for (chan = 0; chan < num_chan; chan++)
2328                         sModemReset(ctlp, chan, 1);
2329                 msleep(500);
2330                 for (chan = 0; chan < num_chan; chan++)
2331                         sModemReset(ctlp, chan, 0);
2332                 msleep(500);
2333                 strcpy(rocketModel[i].modelString, "RocketModem ISA");
2334         } else {
2335                 strcpy(rocketModel[i].modelString, "RocketPort ISA");
2336         }
2337         rocketModel[i].numPorts = total_num_chan;
2338         rocketModel[i].model = MODEL_ISA;
2339
2340         printk(KERN_INFO "RocketPort ISA card #%d found at 0x%lx - %d AIOPs %s\n",
2341                i, rcktpt_io_addr[i], num_aiops, type_string);
2342
2343         printk(KERN_INFO "Installing %s, creating /dev/ttyR%d - %ld\n",
2344                rocketModel[i].modelString,
2345                rocketModel[i].startingPortNumber,
2346                rocketModel[i].startingPortNumber +
2347                rocketModel[i].numPorts - 1);
2348
2349         return (1);
2350 }
2351
2352 static const struct tty_operations rocket_ops = {
2353         .open = rp_open,
2354         .close = rp_close,
2355         .write = rp_write,
2356         .put_char = rp_put_char,
2357         .write_room = rp_write_room,
2358         .chars_in_buffer = rp_chars_in_buffer,
2359         .flush_buffer = rp_flush_buffer,
2360         .ioctl = rp_ioctl,
2361         .throttle = rp_throttle,
2362         .unthrottle = rp_unthrottle,
2363         .set_termios = rp_set_termios,
2364         .stop = rp_stop,
2365         .start = rp_start,
2366         .hangup = rp_hangup,
2367         .break_ctl = rp_break,
2368         .send_xchar = rp_send_xchar,
2369         .wait_until_sent = rp_wait_until_sent,
2370         .tiocmget = rp_tiocmget,
2371         .tiocmset = rp_tiocmset,
2372 };
2373
2374 /*
2375  * The module "startup" routine; it's run when the module is loaded.
2376  */
2377 static int __init rp_init(void)
2378 {
2379         int ret = -ENOMEM, pci_boards_found, isa_boards_found, i;
2380
2381         printk(KERN_INFO "RocketPort device driver module, version %s, %s\n",
2382                ROCKET_VERSION, ROCKET_DATE);
2383
2384         rocket_driver = alloc_tty_driver(MAX_RP_PORTS);
2385         if (!rocket_driver)
2386                 goto err;
2387
2388         /*
2389          *  If board 1 is non-zero, there is at least one ISA configured.  If controller is
2390          *  zero, use the default controller IO address of board1 + 0x40.
2391          */
2392         if (board1) {
2393                 if (controller == 0)
2394                         controller = board1 + 0x40;
2395         } else {
2396                 controller = 0;  /*  Used as a flag, meaning no ISA boards */
2397         }
2398
2399         /*  If an ISA card is configured, reserve the 4 byte IO space for the Mudbac controller */
2400         if (controller && (!request_region(controller, 4, "Comtrol RocketPort"))) {
2401                 printk(KERN_ERR "Unable to reserve IO region for first "
2402                         "configured ISA RocketPort controller 0x%lx.  "
2403                         "Driver exiting\n", controller);
2404                 ret = -EBUSY;
2405                 goto err_tty;
2406         }
2407
2408         /*  Store ISA variable retrieved from command line or .conf file. */
2409         rcktpt_io_addr[0] = board1;
2410         rcktpt_io_addr[1] = board2;
2411         rcktpt_io_addr[2] = board3;
2412         rcktpt_io_addr[3] = board4;
2413
2414         rcktpt_type[0] = modem1 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2415         rcktpt_type[0] = pc104_1[0] ? ROCKET_TYPE_PC104 : rcktpt_type[0];
2416         rcktpt_type[1] = modem2 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2417         rcktpt_type[1] = pc104_2[0] ? ROCKET_TYPE_PC104 : rcktpt_type[1];
2418         rcktpt_type[2] = modem3 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2419         rcktpt_type[2] = pc104_3[0] ? ROCKET_TYPE_PC104 : rcktpt_type[2];
2420         rcktpt_type[3] = modem4 ? ROCKET_TYPE_MODEM : ROCKET_TYPE_NORMAL;
2421         rcktpt_type[3] = pc104_4[0] ? ROCKET_TYPE_PC104 : rcktpt_type[3];
2422
2423         /*
2424          * Set up the tty driver structure and then register this
2425          * driver with the tty layer.
2426          */
2427
2428         rocket_driver->owner = THIS_MODULE;
2429         rocket_driver->flags = TTY_DRIVER_DYNAMIC_DEV;
2430         rocket_driver->name = "ttyR";
2431         rocket_driver->driver_name = "Comtrol RocketPort";
2432         rocket_driver->major = TTY_ROCKET_MAJOR;
2433         rocket_driver->minor_start = 0;
2434         rocket_driver->type = TTY_DRIVER_TYPE_SERIAL;
2435         rocket_driver->subtype = SERIAL_TYPE_NORMAL;
2436         rocket_driver->init_termios = tty_std_termios;
2437         rocket_driver->init_termios.c_cflag =
2438             B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2439         rocket_driver->init_termios.c_ispeed = 9600;
2440         rocket_driver->init_termios.c_ospeed = 9600;
2441 #ifdef ROCKET_SOFT_FLOW
2442         rocket_driver->flags |= TTY_DRIVER_REAL_RAW;
2443 #endif
2444         tty_set_operations(rocket_driver, &rocket_ops);
2445
2446         ret = tty_register_driver(rocket_driver);
2447         if (ret < 0) {
2448                 printk(KERN_ERR "Couldn't install tty RocketPort driver\n");
2449                 goto err_tty;
2450         }
2451
2452 #ifdef ROCKET_DEBUG_OPEN
2453         printk(KERN_INFO "RocketPort driver is major %d\n", rocket_driver.major);
2454 #endif
2455
2456         /*
2457          *  OK, let's probe each of the controllers looking for boards.  Any boards found
2458          *  will be initialized here.
2459          */
2460         isa_boards_found = 0;
2461         pci_boards_found = 0;
2462
2463         for (i = 0; i < NUM_BOARDS; i++) {
2464                 if (init_ISA(i))
2465                         isa_boards_found++;
2466         }
2467
2468 #ifdef CONFIG_PCI
2469         if (isa_boards_found < NUM_BOARDS)
2470                 pci_boards_found = init_PCI(isa_boards_found);
2471 #endif
2472
2473         max_board = pci_boards_found + isa_boards_found;
2474
2475         if (max_board == 0) {
2476                 printk(KERN_ERR "No rocketport ports found; unloading driver\n");
2477                 ret = -ENXIO;
2478                 goto err_ttyu;
2479         }
2480
2481         return 0;
2482 err_ttyu:
2483         tty_unregister_driver(rocket_driver);
2484 err_tty:
2485         put_tty_driver(rocket_driver);
2486 err:
2487         return ret;
2488 }
2489
2490
2491 static void rp_cleanup_module(void)
2492 {
2493         int retval;
2494         int i;
2495
2496         del_timer_sync(&rocket_timer);
2497
2498         retval = tty_unregister_driver(rocket_driver);
2499         if (retval)
2500                 printk(KERN_ERR "Error %d while trying to unregister "
2501                        "rocketport driver\n", -retval);
2502
2503         for (i = 0; i < MAX_RP_PORTS; i++)
2504                 if (rp_table[i]) {
2505                         tty_unregister_device(rocket_driver, i);
2506                         kfree(rp_table[i]);
2507                 }
2508
2509         put_tty_driver(rocket_driver);
2510
2511         for (i = 0; i < NUM_BOARDS; i++) {
2512                 if (rcktpt_io_addr[i] <= 0 || is_PCI[i])
2513                         continue;
2514                 release_region(rcktpt_io_addr[i], 64);
2515         }
2516         if (controller)
2517                 release_region(controller, 4);
2518 }
2519
2520 /***************************************************************************
2521 Function: sInitController
2522 Purpose:  Initialization of controller global registers and controller
2523           structure.
2524 Call:     sInitController(CtlP,CtlNum,MudbacIO,AiopIOList,AiopIOListSize,
2525                           IRQNum,Frequency,PeriodicOnly)
2526           CONTROLLER_T *CtlP; Ptr to controller structure
2527           int CtlNum; Controller number
2528           ByteIO_t MudbacIO; Mudbac base I/O address.
2529           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2530              This list must be in the order the AIOPs will be found on the
2531              controller.  Once an AIOP in the list is not found, it is
2532              assumed that there are no more AIOPs on the controller.
2533           int AiopIOListSize; Number of addresses in AiopIOList
2534           int IRQNum; Interrupt Request number.  Can be any of the following:
2535                          0: Disable global interrupts
2536                          3: IRQ 3
2537                          4: IRQ 4
2538                          5: IRQ 5
2539                          9: IRQ 9
2540                          10: IRQ 10
2541                          11: IRQ 11
2542                          12: IRQ 12
2543                          15: IRQ 15
2544           Byte_t Frequency: A flag identifying the frequency
2545                    of the periodic interrupt, can be any one of the following:
2546                       FREQ_DIS - periodic interrupt disabled
2547                       FREQ_137HZ - 137 Hertz
2548                       FREQ_69HZ - 69 Hertz
2549                       FREQ_34HZ - 34 Hertz
2550                       FREQ_17HZ - 17 Hertz
2551                       FREQ_9HZ - 9 Hertz
2552                       FREQ_4HZ - 4 Hertz
2553                    If IRQNum is set to 0 the Frequency parameter is
2554                    overidden, it is forced to a value of FREQ_DIS.
2555           int PeriodicOnly: 1 if all interrupts except the periodic
2556                                interrupt are to be blocked.
2557                             0 is both the periodic interrupt and
2558                                other channel interrupts are allowed.
2559                             If IRQNum is set to 0 the PeriodicOnly parameter is
2560                                overidden, it is forced to a value of 0.
2561 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2562                initialization failed.
2563
2564 Comments:
2565           If periodic interrupts are to be disabled but AIOP interrupts
2566           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2567
2568           If interrupts are to be completely disabled set IRQNum to 0.
2569
2570           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2571           invalid combination.
2572
2573           This function performs initialization of global interrupt modes,
2574           but it does not actually enable global interrupts.  To enable
2575           and disable global interrupts use functions sEnGlobalInt() and
2576           sDisGlobalInt().  Enabling of global interrupts is normally not
2577           done until all other initializations are complete.
2578
2579           Even if interrupts are globally enabled, they must also be
2580           individually enabled for each channel that is to generate
2581           interrupts.
2582
2583 Warnings: No range checking on any of the parameters is done.
2584
2585           No context switches are allowed while executing this function.
2586
2587           After this function all AIOPs on the controller are disabled,
2588           they can be enabled with sEnAiop().
2589 */
2590 static int sInitController(CONTROLLER_T * CtlP, int CtlNum, ByteIO_t MudbacIO,
2591                            ByteIO_t * AiopIOList, int AiopIOListSize,
2592                            int IRQNum, Byte_t Frequency, int PeriodicOnly)
2593 {
2594         int i;
2595         ByteIO_t io;
2596         int done;
2597
2598         CtlP->AiopIntrBits = aiop_intr_bits;
2599         CtlP->AltChanRingIndicator = 0;
2600         CtlP->CtlNum = CtlNum;
2601         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2602         CtlP->BusType = isISA;
2603         CtlP->MBaseIO = MudbacIO;
2604         CtlP->MReg1IO = MudbacIO + 1;
2605         CtlP->MReg2IO = MudbacIO + 2;
2606         CtlP->MReg3IO = MudbacIO + 3;
2607 #if 1
2608         CtlP->MReg2 = 0;        /* interrupt disable */
2609         CtlP->MReg3 = 0;        /* no periodic interrupts */
2610 #else
2611         if (sIRQMap[IRQNum] == 0) {     /* interrupts globally disabled */
2612                 CtlP->MReg2 = 0;        /* interrupt disable */
2613                 CtlP->MReg3 = 0;        /* no periodic interrupts */
2614         } else {
2615                 CtlP->MReg2 = sIRQMap[IRQNum];  /* set IRQ number */
2616                 CtlP->MReg3 = Frequency;        /* set frequency */
2617                 if (PeriodicOnly) {     /* periodic interrupt only */
2618                         CtlP->MReg3 |= PERIODIC_ONLY;
2619                 }
2620         }
2621 #endif
2622         sOutB(CtlP->MReg2IO, CtlP->MReg2);
2623         sOutB(CtlP->MReg3IO, CtlP->MReg3);
2624         sControllerEOI(CtlP);   /* clear EOI if warm init */
2625         /* Init AIOPs */
2626         CtlP->NumAiop = 0;
2627         for (i = done = 0; i < AiopIOListSize; i++) {
2628                 io = AiopIOList[i];
2629                 CtlP->AiopIO[i] = (WordIO_t) io;
2630                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2631                 sOutB(CtlP->MReg2IO, CtlP->MReg2 | (i & 0x03)); /* AIOP index */
2632                 sOutB(MudbacIO, (Byte_t) (io >> 6));    /* set up AIOP I/O in MUDBAC */
2633                 if (done)
2634                         continue;
2635                 sEnAiop(CtlP, i);       /* enable the AIOP */
2636                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2637                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2638                         done = 1;       /* done looking for AIOPs */
2639                 else {
2640                         CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2641                         sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2642                         sOutB(io + _INDX_DATA, sClockPrescale);
2643                         CtlP->NumAiop++;        /* bump count of AIOPs */
2644                 }
2645                 sDisAiop(CtlP, i);      /* disable AIOP */
2646         }
2647
2648         if (CtlP->NumAiop == 0)
2649                 return (-1);
2650         else
2651                 return (CtlP->NumAiop);
2652 }
2653
2654 /***************************************************************************
2655 Function: sPCIInitController
2656 Purpose:  Initialization of controller global registers and controller
2657           structure.
2658 Call:     sPCIInitController(CtlP,CtlNum,AiopIOList,AiopIOListSize,
2659                           IRQNum,Frequency,PeriodicOnly)
2660           CONTROLLER_T *CtlP; Ptr to controller structure
2661           int CtlNum; Controller number
2662           ByteIO_t *AiopIOList; List of I/O addresses for each AIOP.
2663              This list must be in the order the AIOPs will be found on the
2664              controller.  Once an AIOP in the list is not found, it is
2665              assumed that there are no more AIOPs on the controller.
2666           int AiopIOListSize; Number of addresses in AiopIOList
2667           int IRQNum; Interrupt Request number.  Can be any of the following:
2668                          0: Disable global interrupts
2669                          3: IRQ 3
2670                          4: IRQ 4
2671                          5: IRQ 5
2672                          9: IRQ 9
2673                          10: IRQ 10
2674                          11: IRQ 11
2675                          12: IRQ 12
2676                          15: IRQ 15
2677           Byte_t Frequency: A flag identifying the frequency
2678                    of the periodic interrupt, can be any one of the following:
2679                       FREQ_DIS - periodic interrupt disabled
2680                       FREQ_137HZ - 137 Hertz
2681                       FREQ_69HZ - 69 Hertz
2682                       FREQ_34HZ - 34 Hertz
2683                       FREQ_17HZ - 17 Hertz
2684                       FREQ_9HZ - 9 Hertz
2685                       FREQ_4HZ - 4 Hertz
2686                    If IRQNum is set to 0 the Frequency parameter is
2687                    overidden, it is forced to a value of FREQ_DIS.
2688           int PeriodicOnly: 1 if all interrupts except the periodic
2689                                interrupt are to be blocked.
2690                             0 is both the periodic interrupt and
2691                                other channel interrupts are allowed.
2692                             If IRQNum is set to 0 the PeriodicOnly parameter is
2693                                overidden, it is forced to a value of 0.
2694 Return:   int: Number of AIOPs on the controller, or CTLID_NULL if controller
2695                initialization failed.
2696
2697 Comments:
2698           If periodic interrupts are to be disabled but AIOP interrupts
2699           are allowed, set Frequency to FREQ_DIS and PeriodicOnly to 0.
2700
2701           If interrupts are to be completely disabled set IRQNum to 0.
2702
2703           Setting Frequency to FREQ_DIS and PeriodicOnly to 1 is an
2704           invalid combination.
2705
2706           This function performs initialization of global interrupt modes,
2707           but it does not actually enable global interrupts.  To enable
2708           and disable global interrupts use functions sEnGlobalInt() and
2709           sDisGlobalInt().  Enabling of global interrupts is normally not
2710           done until all other initializations are complete.
2711
2712           Even if interrupts are globally enabled, they must also be
2713           individually enabled for each channel that is to generate
2714           interrupts.
2715
2716 Warnings: No range checking on any of the parameters is done.
2717
2718           No context switches are allowed while executing this function.
2719
2720           After this function all AIOPs on the controller are disabled,
2721           they can be enabled with sEnAiop().
2722 */
2723 static int sPCIInitController(CONTROLLER_T * CtlP, int CtlNum,
2724                               ByteIO_t * AiopIOList, int AiopIOListSize,
2725                               WordIO_t ConfigIO, int IRQNum, Byte_t Frequency,
2726                               int PeriodicOnly, int altChanRingIndicator,
2727                               int UPCIRingInd)
2728 {
2729         int i;
2730         ByteIO_t io;
2731
2732         CtlP->AltChanRingIndicator = altChanRingIndicator;
2733         CtlP->UPCIRingInd = UPCIRingInd;
2734         CtlP->CtlNum = CtlNum;
2735         CtlP->CtlID = CTLID_0001;       /* controller release 1 */
2736         CtlP->BusType = isPCI;  /* controller release 1 */
2737
2738         if (ConfigIO) {
2739                 CtlP->isUPCI = 1;
2740                 CtlP->PCIIO = ConfigIO + _PCI_9030_INT_CTRL;
2741                 CtlP->PCIIO2 = ConfigIO + _PCI_9030_GPIO_CTRL;
2742                 CtlP->AiopIntrBits = upci_aiop_intr_bits;
2743         } else {
2744                 CtlP->isUPCI = 0;
2745                 CtlP->PCIIO =
2746                     (WordIO_t) ((ByteIO_t) AiopIOList[0] + _PCI_INT_FUNC);
2747                 CtlP->AiopIntrBits = aiop_intr_bits;
2748         }
2749
2750         sPCIControllerEOI(CtlP);        /* clear EOI if warm init */
2751         /* Init AIOPs */
2752         CtlP->NumAiop = 0;
2753         for (i = 0; i < AiopIOListSize; i++) {
2754                 io = AiopIOList[i];
2755                 CtlP->AiopIO[i] = (WordIO_t) io;
2756                 CtlP->AiopIntChanIO[i] = io + _INT_CHAN;
2757
2758                 CtlP->AiopID[i] = sReadAiopID(io);      /* read AIOP ID */
2759                 if (CtlP->AiopID[i] == AIOPID_NULL)     /* if AIOP does not exist */
2760                         break;  /* done looking for AIOPs */
2761
2762                 CtlP->AiopNumChan[i] = sReadAiopNumChan((WordIO_t) io); /* num channels in AIOP */
2763                 sOutW((WordIO_t) io + _INDX_ADDR, _CLK_PRE);    /* clock prescaler */
2764                 sOutB(io + _INDX_DATA, sClockPrescale);
2765                 CtlP->NumAiop++;        /* bump count of AIOPs */
2766         }
2767
2768         if (CtlP->NumAiop == 0)
2769                 return (-1);
2770         else
2771                 return (CtlP->NumAiop);
2772 }
2773
2774 /***************************************************************************
2775 Function: sReadAiopID
2776 Purpose:  Read the AIOP idenfication number directly from an AIOP.
2777 Call:     sReadAiopID(io)
2778           ByteIO_t io: AIOP base I/O address
2779 Return:   int: Flag AIOPID_XXXX if a valid AIOP is found, where X
2780                  is replace by an identifying number.
2781           Flag AIOPID_NULL if no valid AIOP is found
2782 Warnings: No context switches are allowed while executing this function.
2783
2784 */
2785 static int sReadAiopID(ByteIO_t io)
2786 {
2787         Byte_t AiopID;          /* ID byte from AIOP */
2788
2789         sOutB(io + _CMD_REG, RESET_ALL);        /* reset AIOP */
2790         sOutB(io + _CMD_REG, 0x0);
2791         AiopID = sInW(io + _CHN_STAT0) & 0x07;
2792         if (AiopID == 0x06)
2793                 return (1);
2794         else                    /* AIOP does not exist */
2795                 return (-1);
2796 }
2797
2798 /***************************************************************************
2799 Function: sReadAiopNumChan
2800 Purpose:  Read the number of channels available in an AIOP directly from
2801           an AIOP.
2802 Call:     sReadAiopNumChan(io)
2803           WordIO_t io: AIOP base I/O address
2804 Return:   int: The number of channels available
2805 Comments: The number of channels is determined by write/reads from identical
2806           offsets within the SRAM address spaces for channels 0 and 4.
2807           If the channel 4 space is mirrored to channel 0 it is a 4 channel
2808           AIOP, otherwise it is an 8 channel.
2809 Warnings: No context switches are allowed while executing this function.
2810 */
2811 static int sReadAiopNumChan(WordIO_t io)
2812 {
2813         Word_t x;
2814         static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
2815
2816         /* write to chan 0 SRAM */
2817         out32((DWordIO_t) io + _INDX_ADDR, R);
2818         sOutW(io + _INDX_ADDR, 0);      /* read from SRAM, chan 0 */
2819         x = sInW(io + _INDX_DATA);
2820         sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
2821         if (x != sInW(io + _INDX_DATA)) /* if different must be 8 chan */
2822                 return (8);
2823         else
2824                 return (4);
2825 }
2826
2827 /***************************************************************************
2828 Function: sInitChan
2829 Purpose:  Initialization of a channel and channel structure
2830 Call:     sInitChan(CtlP,ChP,AiopNum,ChanNum)
2831           CONTROLLER_T *CtlP; Ptr to controller structure
2832           CHANNEL_T *ChP; Ptr to channel structure
2833           int AiopNum; AIOP number within controller
2834           int ChanNum; Channel number within AIOP
2835 Return:   int: 1 if initialization succeeded, 0 if it fails because channel
2836                number exceeds number of channels available in AIOP.
2837 Comments: This function must be called before a channel can be used.
2838 Warnings: No range checking on any of the parameters is done.
2839
2840           No context switches are allowed while executing this function.
2841 */
2842 static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
2843                      int ChanNum)
2844 {
2845         int i;
2846         WordIO_t AiopIO;
2847         WordIO_t ChIOOff;
2848         Byte_t *ChR;
2849         Word_t ChOff;
2850         static Byte_t R[4];
2851         int brd9600;
2852
2853         if (ChanNum >= CtlP->AiopNumChan[AiopNum])
2854                 return 0;       /* exceeds num chans in AIOP */
2855
2856         /* Channel, AIOP, and controller identifiers */
2857         ChP->CtlP = CtlP;
2858         ChP->ChanID = CtlP->AiopID[AiopNum];
2859         ChP->AiopNum = AiopNum;
2860         ChP->ChanNum = ChanNum;
2861
2862         /* Global direct addresses */
2863         AiopIO = CtlP->AiopIO[AiopNum];
2864         ChP->Cmd = (ByteIO_t) AiopIO + _CMD_REG;
2865         ChP->IntChan = (ByteIO_t) AiopIO + _INT_CHAN;
2866         ChP->IntMask = (ByteIO_t) AiopIO + _INT_MASK;
2867         ChP->IndexAddr = (DWordIO_t) AiopIO + _INDX_ADDR;
2868         ChP->IndexData = AiopIO + _INDX_DATA;
2869
2870         /* Channel direct addresses */
2871         ChIOOff = AiopIO + ChP->ChanNum * 2;
2872         ChP->TxRxData = ChIOOff + _TD0;
2873         ChP->ChanStat = ChIOOff + _CHN_STAT0;
2874         ChP->TxRxCount = ChIOOff + _FIFO_CNT0;
2875         ChP->IntID = (ByteIO_t) AiopIO + ChP->ChanNum + _INT_ID0;
2876
2877         /* Initialize the channel from the RData array */
2878         for (i = 0; i < RDATASIZE; i += 4) {
2879                 R[0] = RData[i];
2880                 R[1] = RData[i + 1] + 0x10 * ChanNum;
2881                 R[2] = RData[i + 2];
2882                 R[3] = RData[i + 3];
2883                 out32(ChP->IndexAddr, R);
2884         }
2885
2886         ChR = ChP->R;
2887         for (i = 0; i < RREGDATASIZE; i += 4) {
2888                 ChR[i] = RRegData[i];
2889                 ChR[i + 1] = RRegData[i + 1] + 0x10 * ChanNum;
2890                 ChR[i + 2] = RRegData[i + 2];
2891                 ChR[i + 3] = RRegData[i + 3];
2892         }
2893
2894         /* Indexed registers */
2895         ChOff = (Word_t) ChanNum *0x1000;
2896
2897         if (sClockPrescale == 0x14)
2898                 brd9600 = 47;
2899         else
2900                 brd9600 = 23;
2901
2902         ChP->BaudDiv[0] = (Byte_t) (ChOff + _BAUD);
2903         ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
2904         ChP->BaudDiv[2] = (Byte_t) brd9600;
2905         ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
2906         out32(ChP->IndexAddr, ChP->BaudDiv);
2907
2908         ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
2909         ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
2910         ChP->TxControl[2] = 0;
2911         ChP->TxControl[3] = 0;
2912         out32(ChP->IndexAddr, ChP->TxControl);
2913
2914         ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
2915         ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
2916         ChP->RxControl[2] = 0;
2917         ChP->RxControl[3] = 0;
2918         out32(ChP->IndexAddr, ChP->RxControl);
2919
2920         ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
2921         ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
2922         ChP->TxEnables[2] = 0;
2923         ChP->TxEnables[3] = 0;
2924         out32(ChP->IndexAddr, ChP->TxEnables);
2925
2926         ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
2927         ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
2928         ChP->TxCompare[2] = 0;
2929         ChP->TxCompare[3] = 0;
2930         out32(ChP->IndexAddr, ChP->TxCompare);
2931
2932         ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
2933         ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
2934         ChP->TxReplace1[2] = 0;
2935         ChP->TxReplace1[3] = 0;
2936         out32(ChP->IndexAddr, ChP->TxReplace1);
2937
2938         ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
2939         ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
2940         ChP->TxReplace2[2] = 0;
2941         ChP->TxReplace2[3] = 0;
2942         out32(ChP->IndexAddr, ChP->TxReplace2);
2943
2944         ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
2945         ChP->TxFIFO = ChOff + _TX_FIFO;
2946
2947         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESTXFCNT);  /* apply reset Tx FIFO count */
2948         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Tx FIFO count */
2949         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
2950         sOutW(ChP->IndexData, 0);
2951         ChP->RxFIFOPtrs = ChOff + _RXF_OUTP;
2952         ChP->RxFIFO = ChOff + _RX_FIFO;
2953
2954         sOutB(ChP->Cmd, (Byte_t) ChanNum | RESRXFCNT);  /* apply reset Rx FIFO count */
2955         sOutB(ChP->Cmd, (Byte_t) ChanNum);      /* remove reset Rx FIFO count */
2956         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
2957         sOutW(ChP->IndexData, 0);
2958         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
2959         sOutW(ChP->IndexData, 0);
2960         ChP->TxPrioCnt = ChOff + _TXP_CNT;
2961         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioCnt);
2962         sOutB(ChP->IndexData, 0);
2963         ChP->TxPrioPtr = ChOff + _TXP_PNTR;
2964         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxPrioPtr);
2965         sOutB(ChP->IndexData, 0);
2966         ChP->TxPrioBuf = ChOff + _TXP_BUF;
2967         sEnRxProcessor(ChP);    /* start the Rx processor */
2968
2969         return 1;
2970 }
2971
2972 /***************************************************************************
2973 Function: sStopRxProcessor
2974 Purpose:  Stop the receive processor from processing a channel.
2975 Call:     sStopRxProcessor(ChP)
2976           CHANNEL_T *ChP; Ptr to channel structure
2977
2978 Comments: The receive processor can be started again with sStartRxProcessor().
2979           This function causes the receive processor to skip over the
2980           stopped channel.  It does not stop it from processing other channels.
2981
2982 Warnings: No context switches are allowed while executing this function.
2983
2984           Do not leave the receive processor stopped for more than one
2985           character time.
2986
2987           After calling this function a delay of 4 uS is required to ensure
2988           that the receive processor is no longer processing this channel.
2989 */
2990 static void sStopRxProcessor(CHANNEL_T * ChP)
2991 {
2992         Byte_t R[4];
2993
2994         R[0] = ChP->R[0];
2995         R[1] = ChP->R[1];
2996         R[2] = 0x0a;
2997         R[3] = ChP->R[3];
2998         out32(ChP->IndexAddr, R);
2999 }
3000
3001 /***************************************************************************
3002 Function: sFlushRxFIFO
3003 Purpose:  Flush the Rx FIFO
3004 Call:     sFlushRxFIFO(ChP)
3005           CHANNEL_T *ChP; Ptr to channel structure
3006 Return:   void
3007 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3008           while it is being flushed the receive processor is stopped
3009           and the transmitter is disabled.  After these operations a
3010           4 uS delay is done before clearing the pointers to allow
3011           the receive processor to stop.  These items are handled inside
3012           this function.
3013 Warnings: No context switches are allowed while executing this function.
3014 */
3015 static void sFlushRxFIFO(CHANNEL_T * ChP)
3016 {
3017         int i;
3018         Byte_t Ch;              /* channel number within AIOP */
3019         int RxFIFOEnabled;      /* 1 if Rx FIFO enabled */
3020
3021         if (sGetRxCnt(ChP) == 0)        /* Rx FIFO empty */
3022                 return;         /* don't need to flush */
3023
3024         RxFIFOEnabled = 0;
3025         if (ChP->R[0x32] == 0x08) {     /* Rx FIFO is enabled */
3026                 RxFIFOEnabled = 1;
3027                 sDisRxFIFO(ChP);        /* disable it */
3028                 for (i = 0; i < 2000 / 200; i++)        /* delay 2 uS to allow proc to disable FIFO */
3029                         sInB(ChP->IntChan);     /* depends on bus i/o timing */
3030         }
3031         sGetChanStatus(ChP);    /* clear any pending Rx errors in chan stat */
3032         Ch = (Byte_t) sGetChanNum(ChP);
3033         sOutB(ChP->Cmd, Ch | RESRXFCNT);        /* apply reset Rx FIFO count */
3034         sOutB(ChP->Cmd, Ch);    /* remove reset Rx FIFO count */
3035         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs);      /* clear Rx out ptr */
3036         sOutW(ChP->IndexData, 0);
3037         sOutW((WordIO_t) ChP->IndexAddr, ChP->RxFIFOPtrs + 2);  /* clear Rx in ptr */
3038         sOutW(ChP->IndexData, 0);
3039         if (RxFIFOEnabled)
3040                 sEnRxFIFO(ChP); /* enable Rx FIFO */
3041 }
3042
3043 /***************************************************************************
3044 Function: sFlushTxFIFO
3045 Purpose:  Flush the Tx FIFO
3046 Call:     sFlushTxFIFO(ChP)
3047           CHANNEL_T *ChP; Ptr to channel structure
3048 Return:   void
3049 Comments: To prevent data from being enqueued or dequeued in the Tx FIFO
3050           while it is being flushed the receive processor is stopped
3051           and the transmitter is disabled.  After these operations a
3052           4 uS delay is done before clearing the pointers to allow
3053           the receive processor to stop.  These items are handled inside
3054           this function.
3055 Warnings: No context switches are allowed while executing this function.
3056 */
3057 static void sFlushTxFIFO(CHANNEL_T * ChP)
3058 {
3059         int i;
3060         Byte_t Ch;              /* channel number within AIOP */
3061         int TxEnabled;          /* 1 if transmitter enabled */
3062
3063         if (sGetTxCnt(ChP) == 0)        /* Tx FIFO empty */
3064                 return;         /* don't need to flush */
3065
3066         TxEnabled = 0;
3067         if (ChP->TxControl[3] & TX_ENABLE) {
3068                 TxEnabled = 1;
3069                 sDisTransmit(ChP);      /* disable transmitter */
3070         }
3071         sStopRxProcessor(ChP);  /* stop Rx processor */
3072         for (i = 0; i < 4000 / 200; i++)        /* delay 4 uS to allow proc to stop */
3073                 sInB(ChP->IntChan);     /* depends on bus i/o timing */
3074         Ch = (Byte_t) sGetChanNum(ChP);
3075         sOutB(ChP->Cmd, Ch | RESTXFCNT);        /* apply reset Tx FIFO count */
3076         sOutB(ChP->Cmd, Ch);    /* remove reset Tx FIFO count */
3077         sOutW((WordIO_t) ChP->IndexAddr, ChP->TxFIFOPtrs);      /* clear Tx in/out ptrs */
3078         sOutW(ChP->IndexData, 0);
3079         if (TxEnabled)
3080                 sEnTransmit(ChP);       /* enable transmitter */
3081         sStartRxProcessor(ChP); /* restart Rx processor */
3082 }
3083
3084 /***************************************************************************
3085 Function: sWriteTxPrioByte
3086 Purpose:  Write a byte of priority transmit data to a channel
3087 Call:     sWriteTxPrioByte(ChP,Data)
3088           CHANNEL_T *ChP; Ptr to channel structure
3089           Byte_t Data; The transmit data byte
3090
3091 Return:   int: 1 if the bytes is successfully written, otherwise 0.
3092
3093 Comments: The priority byte is transmitted before any data in the Tx FIFO.
3094
3095 Warnings: No context switches are allowed while executing this function.
3096 */
3097 static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
3098 {
3099         Byte_t DWBuf[4];        /* buffer for double word writes */
3100         Word_t *WordPtr;        /* must be far because Win SS != DS */
3101         register DWordIO_t IndexAddr;
3102
3103         if (sGetTxCnt(ChP) > 1) {       /* write it to Tx priority buffer */
3104                 IndexAddr = ChP->IndexAddr;
3105                 sOutW((WordIO_t) IndexAddr, ChP->TxPrioCnt);    /* get priority buffer status */
3106                 if (sInB((ByteIO_t) ChP->IndexData) & PRI_PEND) /* priority buffer busy */
3107                         return (0);     /* nothing sent */
3108
3109                 WordPtr = (Word_t *) (&DWBuf[0]);
3110                 *WordPtr = ChP->TxPrioBuf;      /* data byte address */
3111
3112                 DWBuf[2] = Data;        /* data byte value */
3113                 out32(IndexAddr, DWBuf);        /* write it out */
3114
3115                 *WordPtr = ChP->TxPrioCnt;      /* Tx priority count address */
3116
3117                 DWBuf[2] = PRI_PEND + 1;        /* indicate 1 byte pending */
3118                 DWBuf[3] = 0;   /* priority buffer pointer */
3119                 out32(IndexAddr, DWBuf);        /* write it out */
3120         } else {                /* write it to Tx FIFO */
3121
3122                 sWriteTxByte(sGetTxRxDataIO(ChP), Data);
3123         }
3124         return (1);             /* 1 byte sent */
3125 }
3126
3127 /***************************************************************************
3128 Function: sEnInterrupts
3129 Purpose:  Enable one or more interrupts for a channel
3130 Call:     sEnInterrupts(ChP,Flags)
3131           CHANNEL_T *ChP; Ptr to channel structure
3132           Word_t Flags: Interrupt enable flags, can be any combination
3133              of the following flags:
3134                 TXINT_EN:   Interrupt on Tx FIFO empty
3135                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3136                             sSetRxTrigger())
3137                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3138                 MCINT_EN:   Interrupt on modem input change
3139                 CHANINT_EN: Allow channel interrupt signal to the AIOP's
3140                             Interrupt Channel Register.
3141 Return:   void
3142 Comments: If an interrupt enable flag is set in Flags, that interrupt will be
3143           enabled.  If an interrupt enable flag is not set in Flags, that
3144           interrupt will not be changed.  Interrupts can be disabled with
3145           function sDisInterrupts().
3146
3147           This function sets the appropriate bit for the channel in the AIOP's
3148           Interrupt Mask Register if the CHANINT_EN flag is set.  This allows
3149           this channel's bit to be set in the AIOP's Interrupt Channel Register.
3150
3151           Interrupts must also be globally enabled before channel interrupts
3152           will be passed on to the host.  This is done with function
3153           sEnGlobalInt().
3154
3155           In some cases it may be desirable to disable interrupts globally but
3156           enable channel interrupts.  This would allow the global interrupt
3157           status register to be used to determine which AIOPs need service.
3158 */
3159 static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
3160 {
3161         Byte_t Mask;            /* Interrupt Mask Register */
3162
3163         ChP->RxControl[2] |=
3164             ((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3165
3166         out32(ChP->IndexAddr, ChP->RxControl);
3167
3168         ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
3169
3170         out32(ChP->IndexAddr, ChP->TxControl);
3171
3172         if (Flags & CHANINT_EN) {
3173                 Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
3174                 sOutB(ChP->IntMask, Mask);
3175         }
3176 }
3177
3178 /***************************************************************************
3179 Function: sDisInterrupts
3180 Purpose:  Disable one or more interrupts for a channel
3181 Call:     sDisInterrupts(ChP,Flags)
3182           CHANNEL_T *ChP; Ptr to channel structure
3183           Word_t Flags: Interrupt flags, can be any combination
3184              of the following flags:
3185                 TXINT_EN:   Interrupt on Tx FIFO empty
3186                 RXINT_EN:   Interrupt on Rx FIFO at trigger level (see
3187                             sSetRxTrigger())
3188                 SRCINT_EN:  Interrupt on SRC (Special Rx Condition)
3189                 MCINT_EN:   Interrupt on modem input change
3190                 CHANINT_EN: Disable channel interrupt signal to the
3191                             AIOP's Interrupt Channel Register.
3192 Return:   void
3193 Comments: If an interrupt flag is set in Flags, that interrupt will be
3194           disabled.  If an interrupt flag is not set in Flags, that
3195           interrupt will not be changed.  Interrupts can be enabled with
3196           function sEnInterrupts().
3197
3198           This function clears the appropriate bit for the channel in the AIOP's
3199           Interrupt Mask Register if the CHANINT_EN flag is set.  This blocks
3200           this channel's bit from being set in the AIOP's Interrupt Channel
3201           Register.
3202 */
3203 static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
3204 {
3205         Byte_t Mask;            /* Interrupt Mask Register */
3206
3207         ChP->RxControl[2] &=
3208             ~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
3209         out32(ChP->IndexAddr, ChP->RxControl);
3210         ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
3211         out32(ChP->IndexAddr, ChP->TxControl);
3212
3213         if (Flags & CHANINT_EN) {
3214                 Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
3215                 sOutB(ChP->IntMask, Mask);
3216         }
3217 }
3218
3219 static void sSetInterfaceMode(CHANNEL_T * ChP, Byte_t mode)
3220 {
3221         sOutB(ChP->CtlP->AiopIO[2], (mode & 0x18) | ChP->ChanNum);
3222 }
3223
3224 /*
3225  *  Not an official SSCI function, but how to reset RocketModems.
3226  *  ISA bus version
3227  */
3228 static void sModemReset(CONTROLLER_T * CtlP, int chan, int on)
3229 {
3230         ByteIO_t addr;
3231         Byte_t val;
3232
3233         addr = CtlP->AiopIO[0] + 0x400;
3234         val = sInB(CtlP->MReg3IO);
3235         /* if AIOP[1] is not enabled, enable it */
3236         if ((val & 2) == 0) {
3237                 val = sInB(CtlP->MReg2IO);
3238                 sOutB(CtlP->MReg2IO, (val & 0xfc) | (1 & 0x03));
3239                 sOutB(CtlP->MBaseIO, (unsigned char) (addr >> 6));
3240         }
3241
3242         sEnAiop(CtlP, 1);
3243         if (!on)
3244                 addr += 8;
3245         sOutB(addr + chan, 0);  /* apply or remove reset */
3246         sDisAiop(CtlP, 1);
3247 }
3248
3249 /*
3250  *  Not an official SSCI function, but how to reset RocketModems.
3251  *  PCI bus version
3252  */
3253 static void sPCIModemReset(CONTROLLER_T * CtlP, int chan, int on)
3254 {
3255         ByteIO_t addr;
3256
3257         addr = CtlP->AiopIO[0] + 0x40;  /* 2nd AIOP */
3258         if (!on)
3259                 addr += 8;
3260         sOutB(addr + chan, 0);  /* apply or remove reset */
3261 }
3262
3263 /*  Resets the speaker controller on RocketModem II and III devices */
3264 static void rmSpeakerReset(CONTROLLER_T * CtlP, unsigned long model)
3265 {
3266         ByteIO_t addr;
3267
3268         /* RocketModem II speaker control is at the 8th port location of offset 0x40 */
3269         if ((model == MODEL_RP4M) || (model == MODEL_RP6M)) {
3270                 addr = CtlP->AiopIO[0] + 0x4F;
3271                 sOutB(addr, 0);
3272         }
3273
3274         /* RocketModem III speaker control is at the 1st port location of offset 0x80 */
3275         if ((model == MODEL_UPCI_RM3_8PORT)
3276             || (model == MODEL_UPCI_RM3_4PORT)) {
3277                 addr = CtlP->AiopIO[0] + 0x88;
3278                 sOutB(addr, 0);
3279         }
3280 }
3281
3282 /*  Returns the line number given the controller (board), aiop and channel number */
3283 static unsigned char GetLineNumber(int ctrl, int aiop, int ch)
3284 {
3285         return lineNumbers[(ctrl << 5) | (aiop << 3) | ch];
3286 }
3287
3288 /*
3289  *  Stores the line number associated with a given controller (board), aiop
3290  *  and channel number.
3291  *  Returns:  The line number assigned
3292  */
3293 static unsigned char SetLineNumber(int ctrl, int aiop, int ch)
3294 {
3295         lineNumbers[(ctrl << 5) | (aiop << 3) | ch] = nextLineNumber++;
3296         return (nextLineNumber - 1);
3297 }